* configure.host: Set gdb_host_cpu to sh for all sh*.
(sh*-*-netbsdelf*): New host.
* configure.tgt: Set gdb_target_cpu to sh for all sh*.
(sh*-*-netbsdelf*): New target.
* sh-nbsd-nat.c: New file.
* sh-nbsd-tdep.c: New file.
* sh-nbsd-tdep.h: New file.
* config/sh/nbsd.mh: New file.
* config/sh/nbsd.mt: New file.
* config/sh/nm-nbsd.h: New file.
* config/sh/tm-nbsd.h: New file.
* config/sh/tm-sh.h (struct gdbarch_tdep): Add
FLOAT_ARGLAST_REGNUM, RETURN_REGNUM, ARG0_REGNUM, ARGLAST_REGNUM,
PR_REGNUM fields.
* sh-tdep.c (sh_skip_prologue_hard_way): Rename from
skip_prologue_hard_way().
(skip_prologue_hard_way): Make it a function pointer.
(sh_print_register): Use function pointer do_pseudo_register,
instead of sh_do_pseudo_register.
(sh_do_registers_info): Ditto.
(sh_gdbarch_init): Initialize do_pseudo_register.
(IS_MOV_TO_R14): Rename from IS_MOV_R14.
(skip_prologue_hard_way): Update.
(sh_gdbarch_init): Move setting of frame_chain,
get_saved_register, init_extra_frame_info, push_arguments,
extract_return_value, pop_frame, store_struct_return,
extract_struct_value_address, use_struct_convention,
init_extra_frame_info to before target specific settings.
(sh_gdbarch_init): Initialize new tdep fields
FLOAT_ARGLAST_REGNUM, RETURN_REGNUM, ARG0_REGNUM, ARGLAST_REGNUM,
PR_REGNUM.
(sh_push_arguments): Use new gdbarch_tdep fields
{ARG0,ARGLAST}_REGNUM.
(sh_saved_pc_after_call, sh_nofp_frame_init_saved_regs,
sh_init_extra_frame_info, sh_push_return_address,
sh_generic_show_regs, sh3_show_regs, sh3e_show_regs,
sh3_dsp_show_regs, sh4_show_regs, sh_dsp_show_regs): Update to use
gdbarch_tdep->PR_REGNUM.
(dr_reg_base_num, fv_reg_base_num): Move to earlier in the file.
* sh-tdep.c (sh_generic_show_regs, sh3_show_regs, sh3e_show_regs,
sh3_dsp_show_regs, sh4_show_regs, sh_dsp_show_regs): SR_REGNUM is
now part of gdbarch_tdep structure.
(sh_gdbarch_init): Initialize SR_REGNUM.
* config/sh/tm-sh.h (struct gdbarch_tdep): Add field SR_REGNUM.
* config/sh/tm-sh.h (struct gdbarch_tdep): Rename fields
{FP15,DR14,FV12}_REGNUM to {FP,DR,FV}_LAST_REGNUM.
* sh-tdep.c (sh_sh3e_register_virtual_type,
sh_sh4_register_virtual_type, sh_do_registers_info,
sh_gdbarch_init, sh_sh4_register_byte, sh_sh4_register_raw_size,
sh_sh4_register_convertible, sh_sh4_register_convert_to_virtual,
sh_sh4_register_convert_to_raw, sh_fetch_pseudo_register,
sh_store_pseudo_register, sh_do_pseudo_register): Ditto.
* sh-tdep.c (sh_gdbarch_init): Use a function pointer to set the
disassembly print function.
(_initialize_sh_tdep): Initialize tm_print_insn using the function
pointer.
* config/sh/tm-sh.h (struct gdbarch_tdep): Get rid of
DR{2,4,6,8,10,12}_REGNUM, FV{4,8}_REGNUM, they are not used
anywhere.
* sh-tdep.c (sh_gdbarch_init): Don't initialize
DR{2,4,6,8,10,12}_REGNUM, FV{4,8}_REGNUM.
* config/sh/tm-linux.h: New file. Include generic tm-linux.h,
plus tm-sh.h, then define SVR4_FETCH_LINK_MAP_OFFSETS to use
the sh target function instead of the default link map offsets.
* config/sh/sh.mt: Add solib.o and solib-svr4.o to TDEPFILES.
Use sh/tm-linux.h instead of sh/tm-sh.h.
* sh-tdep.c (sh_linux_svr4_fetch_link_map_offsets):
New function. Construct target-specific link map offsets.
* i386-linux-tdep.c (i386_linux_svr4_fetch_link_map_offsets:
New function. Construct target-specific link map offsets.
* config/i386/tm-linux.h: Use above function instead of default.
2000-10-30 Michael Snyder <msnyder@cleaver.cygnus.com>
* config/i386/tm-linux.h: Remove definition of SVR4_SHARED_LIBS,
and inclusion of solib.h. Move up into ../tm-linux.h.
config/tm-linux.h: Define SVR4_SHARED_LIBS, include solib.h.
* sh-tdep.c (sh_sh4_register_name, sh_sh4_register_byte,
sh_sh4_register_raw_size, sh_sh4_register_virtual_type,
sh_fetch_pseudo_register, sh_store_pseudo_register,
sh_do_pseudo_register, sh_gdbarch_init): Fix names for pseudoregs,
they should be numbered as drx fvy where x and y are multiples of
2 and 4 respectively.
* config/sh/tm-sh.h: Fix names of pseudo regs.
* config/sh/tm-sh.h (struct gdbarch_tdep): Add sh4 specific
pseudo registers.
(DO_REGISTERS_INFO): Define.
* sh-tdep.c (sh_sh4_register_name): New function.
(sh_generic_show_regs, sh3_show_regs, sh3e_show_regs,
sh3_dsp_show_regs, sh4_show_regs, sh_dsp_show_regs): Update
signature.
(sh_show_regs_command): New function. Actual function called by
the 'regs' command.
(sh_register_byte): Rename to...
(sh_default_register_byte): ...New function.
(sh_sh4_register_byte): New function.
(sh_register_raw_size): Rename to...
(sh_default_register_raw_size): ...New function.
(sh_sh4_register_raw_size): New function.
(sh_sh4_register_virtual_type): New function.
(sh_sh4_build_float_register_type): New function.
(sh_fetch_pseudo_register, sh_store_pseudo_register): New
functions.
(fv_reg_base_num, dr_reg_base_num): New functions.
(do_fv_register_info, do_dr_register_info, sh_do_pseudo_register,
sh_do_fp_register, sh_do_register, sh_print_register,
sh_do_registers_info): New functions.
(sh_gdbarch_init): Initialize sh4 pseudo registers to -1. Update
architecture specific parts.
(_initialize_sh_tdep): Use sh_show_regs_command for 'regs' command.
* config/sh/tm-sh.h (STORE_RETURN_VALUE): Redefine as
sh_store_return_value().
* sh-tdep.c (sh_store_return_value): New function. Store the
value returned by a function into the appropriate register.
2000-07-10 Elena Zannoni <ezannoni@kwikemart.cygnus.com>
* sh-tdep.c (sh_skip_prologue): Before looking at the actual
instructions, try to see if the symbol table can be of help, by
calling after_prologue(). If this doesn't work, call
skip_prologue_hard_way().
(skip_prologue_hard_way): Renamed from sh_skip_prologue. Add some
more instruction pattern matching for pushing of arguments, and
manipulation of r14.
(after_prologue): New function. Use symbol table info to determine
the end of the prologue, if possible.
sim:
* Makefile.in (interp.o): Depends on ppi.c .
(ppi.c): New rule.
* gencode.c (printonmatch, think, genopc): Deleted.
(MAX_NR_STUFF): Now 42.
(tab): Add SH-DSP CPU instructions.
Amalgamate ldc / stc / lds / sts instructions with similar
bit patterns. Fix opcodes of stc Rm_BANK,@-<REG_N>.
Fix semantics of lds.l @<REG_N>+,MACH (no sign extend).
(movsxy_tab): New array.
For movs, change MMMM field to GGGG, and mmmm field to MMMM.
Added entries for movx, movy and parallel processing insns.
(ppi_tab): New array.
(qfunc): Stabilize sort.
(expand_opcode): Handle [01][01]NN, [01][01]xx and [01][01]yy.
Handle 'M', 'G' 's' 'X', 'a', 'Y' and 'A'.
(dumptable): Now takes three arguments. Changed all callers.
Emit just one contigous jump table.
(filltable): Now takes an argument. Changed all callers.
Make index static.
(ppi_moves, expand_ppi_code, ppi_filltable, ppi_gensim): New functions.
(gensim_caselist): New function, broken out of gensim.
Handle opcode fields 'x', 'y', 's', 'M', 'G', 'X', 'a', and 'Y'.
Handle ref '9'.
(gensim): Handle 'N' in code field and '8' in refs field.
Call gensim_caselist - twice.
(ppi_index): New static variable.
(main): Unsupport default action.
Add dsp support for -x / -s option. Add -p option.
* interp.c (sh_jump_table, sh_dsp_table, ppi_table): Declare.
(saved_state_type): Rearrange to allow amalgamated ldc / stc /
lds / sts to work efficiently.
(target_dsp): New static variable.
(GBR, VBR, SSR, SPC, MACH, MACL): Reflect saved_state_type change.
(FPUL, Rn_BANK, SET_Rn_BANK, M, Q, S, T, SR_BL, SR_RB): Likewise.
(SR_MD, SR_RC, SET_SR_BIT, GET_SR, SET_RC, GET_FPSCR): Likewise.
(RS, RE, MOD, MOD_ME, DSP_R): Likewise.
(set_fpscr1): Likewise. Use target_dsp to check for dsp.
(MOD_MSi, SIG_BUS_FETCH): Deleted.
(CREG, SREG, PR, SR_MASK_DMY, SR_MASK_DMX, SR_DMY): New macros.
(SR_DMX, DSR, MOD_DELTA, GET_DSP_GRD): Likewise.
(SET_MOD): Reflect saved_state_type change. Set MOD_DELTA instead
of MOD_MS, and encode SR_DMY / SR_DMX into high word of MOD_ME.
(set_sr): Reflect saved_state_type change. Fix SR_RB handling.
Use SET_MOD.
(MA, L, TL, TB): Now controlled by ACE_FAST.
(SEXT32): Just cast to int.
(SIGN32): Fixed to only shift by 31.
(CHECK_INSN_PTR): SIGBUS at insn fetch now represented by insn_end 0.
(ppi_insn): Declare.
(ppi.c): Include.
(init_dsp): Set target_dsp. When it changes, switch end of
sh_jump_table with sh_dsp_table.
(sim_resume) Don't declare sh_jump_table0. Use sh_jump_table instead.
Don't Declare PR if it's #defined.
Fix single-stepping (Was broken in Mar 6 16:59:10 patch).
(sim_store_register, sim_read_register): Translate accesses to
reflect saved_state_type change.
* interp.c (set_sr): Set sr.
(SET_RC, MOD, MOD_MS, MOD_ME, SET_MOD, MOD_MS, MOD_ME): New macros.
(set_fpscr1): Don't bank-switch fpu registers when simulating sh-dsp.
(DSP_R): Fix definition.
(sim_resume): Remove outdated SET_SR use.
* interp.c (saved_state): New members for struct member asregs:
rs, re, insn_end, xram_start, yram_start.
(struct loop_bounds): New struct.
(SKIP_INSN): New macro.
(get_loop_bounds): New function.
(endianw): Renamed to global_endianw.
(maskw): negated bits.
(PC): Now insn_ptr.
(SR_MASK_RC, SR_RC_INCREMENT, SR_RC, RAISE_EXCEPTION): New macros.
(RS, RE, DSP_R, DSP_GRD, A1, A0, X0, X1, Y0, Y1, M0, A1G): Likewise.
(M1, A0G, RIAT, PT2H, PH2T, SET_NIP, CHECK_INSN_PTR): Likewise.
(SIG_BUS_FETCH): Likewise
(raise_exception, riat_fast): New functions.
(raise_buserror, sim_stop): Use raise_exception.
(PROCESS_SPECIAL_ADDRESS): Use xram_start / yram_start.
(BUSERROR, WRITE_BUSERROR, READ_BUSERROR):
Reverse sense of mask argument.
(FP_OP, set_dr): Use RAISE_EXCEPTION.
(wlat_fast, wwat_fast, wbat_fast, rlat_fast, rwat_fast, rbat_fast):
Declare. Remove redundant masking.
(wwat_fast, rwat_fast): Add argument endianw. Changed callers.
(MA): Updated for change pc -> PC.
(Delay_Slot): Use RIAT.
(empty): Deleted.
(trap): Remove argument little_endian. Add argument endianw.
Changed all callers. Use raise_exception.
(macw): Add argument endainw. Changed all callers.
(init_dsp): New function, extended after broken out of init_pointers.
(sim_resume): Replace pc with insn_ptr. Replace little_endian with
endianw. Replace nia with nip. Reverse sense of maskb / maskw /
maskl. Implement logic for zero-overhead loops. Don't try to
interpret garbage when getting a SIGBUS at insn fetch.
(sim_open): Call init_dsp.
* gencode.c (tab): Use SET_NIP instead of nia = . Use PH2T / PT2H /
RAISE_EXCEPTION where appropriate.
Add extra cycles for brai, braf , bsr, bsrf, jmp, jsr.
* interp.c (sim_store_register, sim_fetch_register):
Do proper endianness switch.
* interp.c (saved_state_type): New members for struct member asregs:
xymem_select, xmem, ymem, xmem_offset, ymem_offset.
(special_address): Delete.
(BUSERROR): Now a two-argument predicate.
(PROCESS_SPECIAL_ADDRESS, WRITE_BUSERROR, READ_BUSERROR): New macros.
(wlat_little, wwat_little, wbat_any, wlat_big, wwat_big): Delete.
(process_wlat_addr, process_wwat_addr): New functions.
(process_wbat_addr, process_rlat_addr, process_rwat_addr): Likewise.
(process_rbat_addr): Likewise.
(wlat_fast, wwat_fast, wbat_fast): Use WRITE_BUSERROR.
(rlat_little, rwat_little, rbat_any, rlat_big, rwat_big): Delete.
(rlat_fast, rwat_fast, rbat_fast): Use READ_BUSERROR.
(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Delete SLOW versions.
(do_rdat, trap): Delete SLOW code.
(SEXT32, SIGN32): New macros.
(swap, swap16): Now integer in - integer out. Changed all callers.
(strswaplen, strnswap): Delete SLOW versions.
(init_pointers): Initialize dsp memory selection (preliminary).
(sim_store_register, sim_fetch_register): Use swap instead of
big / little endian read / write functions.
* interp.c (maskl): Deleted.
(endianw, endianb): New variables.
(special_address): Now inline.
(bp_holder): Put raising of buserror there, rename to:
(raise_buserror).
(BUSERROR): Now yields a value. Changed all users.
(wbat_big): Delete.
(wlat_fast, wwat_fast, wbat_fast): New functions.
(rlat_fast, rwat_fast, rbat_fast): Likewise.
(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Use new functions.
(do_rdat, do_wdat): Likewise. Take maskl argument instead of
little_endian one. Changed caller macros.
(swap, swap16): Use w[rw]lat_big / w[rw]lat_little directly.
(strswaplen, strnswap): New functions.
(trap): Use them to fix up endian mismatches;
disable SYS_execve and SYS_execv; fix double address translation for
SYS_pipe and SYS_stat.
(sym_write, sym_read): Add endianness translation.
(sym_store_register, sym_fetch_register): Add maskl local variable.
(sim_open): Set endianw and endianb.
gdb:
* sh-tdep.c (sh_dsp_reg_names, sh3_dsp_reg_names): New arrays.
(sh_processor_type_table): Add entries for bfd_mach_sh_dsp and
bfd_mach_sh3_dsp.
(sh_show_regs): Floating point registers are called fr0-fr15.
For sh4, display fpul, fpscr and fr0-fr15 / dr0-dr14 as appropriate.
Handle sh-dsp and sh3-dsp.
config/sh/tm-sh.h (REGISTER_VIRTUAL_TYPE): sh-dsp / sh3-dsp
don't have floating point registers.
(DSR_REGNUM, A0G_REGNUM, A0_REGNUM, A1G_REGNUM, A1_REGNUM): Define.
(M0_REGNUM, M1_REGNUM, X0_REGNUM, X1_REGNUM, Y0_REGNUM): Likewise.
(Y1_REGNUM, MOD_REGNUM, RS_REGNUM, RE_REGNUM, R0B_REGNUM): Likewise.
(mempool): Just free any buffer prior to reuse. Don't bother with realloc.
(flag_single_step): New function.
(skip_message): Detect "helpful" Windows CE messages and skip sending them to
the host.
(wait_for_debug_event): Use skip_message to avoid sending debug messages to the
host.
(dispatch): Prelimary implementation of single step detection.
* wince.c: Rework SH single stepping code to be more consistent with other
wince targets.
(handle_output_debug_string): Allow first chance exceptions to come through
since they seem to be all that we get on some versions of Windows CE.
(check_for_step): New function, conditionally compiled based on target.
(regptr): Delete obsolete function.
(handle_exception): Detect illegal instructions.
(get_child_debug_event): Return success only if event code matches target.
(child_create_inferior): Reflect change to get_child_debug_event arguments.
* gdbarch.sh (IEEE_FLOAT): New entry.
* gdbarch.c, gdbarch.h: Regenerated.
* valprint.c (IEEE_FLOAT): Provide a default #definition for this.
(print_floating): Use IEEE_FLOAT as if it were an expression; use
the code specific to IEEE-format numbers whenever the value of
IEEE_FLOAT is non-zero.
* config/a29k/tm-a29k.h, config/alpha/tm-alpha.h,
config/arc/tm-arc.h, config/arm/tm-arm.h, config/fr30/tm-fr30.h,
config/h8300/tm-h8300.h, config/i386/tm-i386.h,
config/i960/tm-i960.h, config/m88k/tm-m88k.h,
config/mips/tm-mips.h, config/pa/tm-hppa.h,
config/sparc/tm-sparc.h, config/delta/tm-delta.h,
config/frv/tm-frv.h (IEEE_FLOAT): For all ports that #define
IEEE_FLOAT, make sure they give it the value (1).
* config/arm/tm-wince.h: New file.
* config/arm/wince.mt New file.
* config/sh/tm-wince.h: New file.
* config/sh/wince.mt New file.
* config/mips/tm-wince.h: New file.
* config/mips/wince.mt New file.
* wince.c: New file.
* wince-stub.c: New file.
* wince-stub.h: New file.
* sh-tdep.c: Use correct register names for Windows CE.
* valops.c (COERCE_FLOAT_TO_DOUBLE): Rework definition to be
more function-like.
(default_coerce_float_to_double, standard_coerce_float_to_double):
New functions.
(value_arg_coerce): Adjust for new definition.
* value.h (default_coerce_float_to_double,
standard_coerce_float_to_double): New declarations for the above.
* gdbarch.sh (coerce_float_to_double): New entry, replacing macro.
* gdbarch.c, gdbarch.h: Regenerated.
* tm-alpha.h, tm-fr30.h, tm-m32r.h, tm-mips.h, tm-hppa.h,
tm-rs6000.h, tm-sh.h, tm-sparc.h (COERCE_FLOAT_TO_DOUBLE): Change
definitions.
* mips-tdep.c (mips_coerce_float_to_double): Supply our own custom
function here.
(mips_gdbarch_init): Install that as our coerce_float_to_double
function.
