Most optional operands to powerpc instructions use a default value of
zero, but there are a few exceptions. Those have been handled by
PPC_OPERAND_OPTIONAL_VALUE and an entry in the powerpc_operands table
for the default value, smuggled in the shift field. This patch
changes that to using the operand extract function to provide non-zero
defaults.
I've also moved the code determining whether optional operands are
provided or omitted, to the point the first optional operand is seen,
and allowed for the possibility of optional base register operands
in a future patch.
The patch does change the error you get on invalid assembly like
ld 3,4
You'll now see "missing operand" rather than
"syntax error; end of line, expected `('".
gas/
* config/tc-ppc.c (md_assemble): Delay counting of optional
operands until one is encountered. Allow for the possibility
of optional base regs, ie. PPC_OPERAND_PARENS. Call
ppc_optional_operand_value with extra args.
include/
* opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
Mention use of "extract" function to provide default value.
(PPC_OPERAND_OPTIONAL_VALUE): Delete.
(ppc_optional_operand_value): Rewrite to use extract function.
opcodes/
* ppc-dis.c (operand_value_powerpc): Init "invalid".
(skip_optional_operands): Count optional operands, and update
ppc_optional_operand_value call.
* ppc-opc.c (extract_dxdn): Remove ATTRIBUTE_UNUSED from used arg.
(extract_vlensi): Likewise.
(extract_fxm): Return default value for missing optional operand.
(extract_ls, extract_raq, extract_tbr): Likewise.
(insert_sxl, extract_sxl): New functions.
(insert_esync, extract_esync): Remove Power9 handling and simplify.
(powerpc_operands <FXM4, TBR>): Delete PPC_OPERAND_OPTIONAL_VALUE
flag and extra entry.
(powerpc_operands <SXL>): Likewise, and use insert_sxl and
extract_sxl.
These take up far too many lines in the files. This patch introduces
a replacement for the HOWTO macro that simplifies the relow howto
initialization. Apart from the two relocs mentioned in the ChangeLog,
no relocation howto is changed.
* elf64-ppc.c (HOW): Define.
(ONES): Delete.
(ppc64_elf_howto_raw): Use HOW to initialize entries.
* elf32-ppc.c (HOW): Define.
(ppc_elf_howto_raw): Use HOW to initialize entries, updating
R_PPC_VLE_REL15 and R_PPC_VLE_REL24 to use bitpos=0.
This patch uses bitfields in reloc_howto_struct, reducing its size
from 80 to 40 bytes on 64-bit hosts and from 52 to 32 bytes on 32-bit
hosts (with a 32-bit bfd_vma). I've also added a new "negate" field
rather than making the encoded "size" field do double duty as both
a size and a flag.
There was just one use of an encoded size of 8, which according to
bfd_get_reloc_size meant 16 bytes, in vms-alpha.c ALPHA_R_LINKAGE.
See git commit c3d8e071bf adding ALPHA_R_LINKAGE and git commit
8612a388f7 decoding size 8 in bfd_get_reloc_size. Since no other part
of BFD handles 16 byte relocs, I've removed that encoding and special
cased the ALPHA_R_LINKAGE size in vms-alpha.c.
* reloc.c (reloc_howto_type): Typedef.
(bfd_symbol): Delete forward declaration.
(struct reloc_howto_struct): Add "negate" field. Make "size",
"bitsize", "rightshift", "bitpos", "complain_on_overflow",
"pc_relative", "partial_inplace", and "pcrel_offset" bitfields.
Rearrange for better packing. Revise comments.
(HOWTO): Map to rearranged reloc_howto_struct.
(bfd_get_reloc_size): Delete now unused cases.
(read_reloc, write_reloc): Likewise.
(apply_reloc, _bfd_relocate_contents): Test howto->negate
rather than howto->size < 0 for negated relocation values.
* coff-rs6000.c (xcoff_complain_overflow_bitfield_func): Avoid
signed/unsigned warning.
(xcoff_ppc_relocate_section): Delete "condition is always false"
code.
* coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise.
* cpu-ns32k.c (do_ns32k_reloc): Adjust to suit reloc_howto_struct
changes.
* vms-alpha.c (_bfd_vms_write_etir, alpha_vms_slurp_relocs): Use
size 16 for ALPHA_R_LINKAGE.
(alpha_howto_table <ALPHA_R_LINKAGE>): Set encoded size and
bitsize to zero.
* bfd-in.h (reloc_howto_type): Delete.
* bfd-in2.h: Regenerate.
NEWHOWTO was promised way back in 1991 (git commit e568362218).
I doubt it's ever going to be implemented. This patch removes it,
and tidies some reloc howtos. I was going to make some changes to
reloc_howto_struct, so I think it's important that all relocs howtos
are initialized with HOWTO.
* reloc.c (HOWTO): Revise comment.
(NEWHOWTO, HOWTO_PREPARE): Delete.
* coff-arm.c (coff_arm_reloc_type_lookup): Replace const struc
reloc_howto_struct with reloc_howto_type.
* ns32knetbsd.c (MY_bfd_reloc_type_lookup): Likewise.
* vms-alpha.c (alpha_vms_bfd_reloc_type_lookup): Likewise.
* elf-hppa.h (HOW): Define.
(elf_hppa_howto_table): Use it to simplify this table, correcting
name of R_PARISC_LTOFF16WF, R_PARISC_LTOFF_FPTR64, and
R_PARISC_LTOFF_FPTR16DF.
* elf32-mep.c (MEPREL): Use HOWTO.
* bfd-in2.h: Regenerate.
When it can be done at compile time.
* mmo.c (valid_mmo_symbol_character_set): Initialize and make
array const.
(mmo_init): Don't init valid_mmo_symbol_character_set.
Certain PIE executables produced by gold cannot be debugged by gdb after
being stripped. GDB requires program headers of PIE executables to match,
and those checks may fail due to adjustments made during stripping.
One case of this occurs because strip recomputes the memsz of PT_TLS and
does not add alignment, while gold does. This is another variant of PR
11786, so apply the same fix of relaxing the program header matching.
gdb/ChangeLog:
PR gdb/11786
* solib-svr4.c (svr4_exec_displacement): Ignore memsz fields
for PT_TLS segments.
gdb/testsuite/ChangeLog:
PR gdb/11786
* gdb.base/gcore-tls-pie.c: New file.
* gdb.base/gcore-tls-pie.exp: New file.
This patch adds support for DW_OP_GNU_variable_value to GDB.
Jakub Jelinek provides a fairly expansive discussion of this DWARF
expression opcode in his GCC patch...
https://gcc.gnu.org/ml/gcc-patches/2017-02/msg01499.html
It has also been proposed for addition to the DWARF Standard:
http://www.dwarfstd.org/ShowIssue.php?issue=161109.2
If compiled with a suitable version of GCC, the test case associated
with GCC Bug 77589 uses DW_OP_GNU_variable_value in a DW_AT_byte_stride
expression. Here's a link to the bug:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77589
This is what the DWARF looks like. Look at the last line, which has
the DW_AT_byte_stride expression:
<2><e1>: Abbrev Number: 12 (DW_TAG_variable)
<e2> DW_AT_name : (indirect string, offset: 0x115): span.0
<e6> DW_AT_type : <0x2e>
<ea> DW_AT_artificial : 1
<ea> DW_AT_location : 3 byte block: 91 b0 7f (DW_OP_fbreg: -80)
...
<2><178>: Abbrev Number: 18 (DW_TAG_subrange_type)
<179> DW_AT_lower_bound : 4 byte block: 97 23 20 6 (DW_OP_push_object_address; DW_OP_plus_uconst: 32; DW_OP_deref)
<17e> DW_AT_upper_bound : 4 byte block: 97 23 28 6 (DW_OP_push_object_address; DW_OP_plus_uconst: 40; DW_OP_deref)
<183> DW_AT_byte_stride : 10 byte block: 97 23 18 6 fd e1 0 0 0 1e (DW_OP_push_object_address; DW_OP_plus_uconst: 24; DW_OP_deref; DW_OP_GNU_variable_value: <0xe1>; DW_OP_mul)
A patch to readelf, which I'm also submitting, is required to do this
decoding.
I found that GDB gave me the correct answer for "p c40pt(2)" once I
(correctly) implemented DW_OP_GNU_variable_value.
I also have test case (later in this series) which uses the DWARF
assembler and, therefore, do not rely on having a compiler with this
support.
gdb/ChangeLog:
* dwarf2expr.h (struct dwarf_expr_context): Add virtual method
dwarf_variable_value.
* dwarf2-frame.c (class dwarf_expr_executor):
Add override for dwarf_variable_value.
* dwarf2loc.c (class dwarf_evaluate_loc_desc): Likewise.
(class symbol_needs_eval_context): Likewise.
(indirect_synthetic_pointer): Add forward declaration.
(sect_variable_value): New function.
(dwarf2_compile_expr_to_ax): Add case for DW_OP_GNU_variable_value.
* dwarf2expr.c (dwarf_expr_context::execute_stack_op): Add case
for DW_OP_GNU_variable_value.
Bit manipulation instructions which are not normally generated by the
assembler, should nevertheless be decoded by the disassembler.
opcodes/
* s12z-dis.c: BM_RESERVED1 to behave like BM_OPR_REG, and
BM_RESERVED0 like BM_REG_IMM.
opcodes/
* s12z.h: Delete.
* s12z-dis.c: Adjust path of included file.
include/
* opcode/s12z.h: New file.
gas/
* config/tc-s12z.c: Adjust path of included file.
The strip-13 test runs into difficulty using dc.a on some targets.
dc.a writes a power of 2 number of bytes large enough to contain a
target address. On some targets, eg. avr-elf, this can be 2 bytes but
the ELF format used require words of 4 bytes to make up a relocation
entry. There was a hack in the test, duplicating the reloc type into
what is normally the addend to make the test work when little-endian,
but that hack fails for similar big-endian targets.
This patch fixes that problem by arranging to emit 32-bit and 64-bit
ELF relocs using .4byte and .8byte directives, chosen as appropriate
for the ELF size. I've also bumped the reloc number tested to a
higher unused value, and made the number more easily parameterised by
target should that be necessary in the future. Whether REL or RELA
relocs are used is now chosen by a new is_rela readelf test of an
object file, rather than by lists of targets.
* testsuite/lib/binutils-common.exp (is_elf64): Use directory of
input file for readelf.out.
(is_rela): New proc.
* testsuite/binutils-all/objcopy.exp (elf64): Set new variable
from first result of is_elf64 test.
(reloc_format): Set using is_rela.
(strip-13): Pass RELOC and ELF64 to assembler.
(strip-14, strip-15): Use elf64 rather than calling is_elf64 again.
* testsuite/binutils-all/strip-13.d: Run for more targets.
* testsuite/binutils-all/strip-13mips64.s: Use RELOC and set
addend to zero.
* testsuite/binutils-all/strip-13rel.s: Use RELOC and ELF64.
Don't add _NONE reloc.
* testsuite/binutils-all/strip-13rela.s: Likewise.
-fsanitize=address showed a use-after-free in number_or_range_parser.
The cause was that handle_line_of_input could stash the input into
"saved_command_line", and then this could be freed by reentrant calls.
This fixes the bug by preventing commands that are read by "commands"
from being eligible for repeating.
gdb/ChangeLog
2018-08-17 Tom Tromey <tom@tromey.com>
* cli/cli-script.c (read_next_line): Pass 0 as repeat argument to
command_line_input.
There is no need to generate .note.gnu.property section with empty
X86_FEATURE_1_AND property. This patch adds fixup_gnu_properties
to ELF linker backend so that x86 backend can remove it.
bfd/
PR ld/23515
* elf-bfd.h (elf_backend_data): Add fixup_gnu_properties.
* elf-properties.c (_bfd_elf_link_setup_gnu_properties): Call
backend fixup_gnu_properties if it isn't NULL. Discard
.note.gnu.property section if all properties have been removed.
* elfxx-target.h (elf_backend_fixup_gnu_properties): New.
(elfNN_bed): Initialize fixup_gnu_properties.
* elfxx-x86.c (_bfd_x86_elf_link_fixup_gnu_properties): New
function.
* elfxx-x86.h (_bfd_x86_elf_link_fixup_gnu_properties): New
prototype.
(elf_backend_fixup_gnu_properties): New.
ld/
PR ld/23515
* testsuite/ld-i386/ibt-plt-2a.d: Updated.
* testsuite/ld-i386/ibt-plt-2b.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2a.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2b-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2b.d: Likewise.
Cannot assume result of first and third ldr will go into x0.
Rewrite asm to be clearer.
gdb/testsuite/
PR gdb/18931:
* gdb.arch/aarch64-fp.c (main): Fix asm registers.
There is a small think-o in compile.exp:
if { $srcfile3 != "" } {
gdb_test "p constvar" " = 3"
gdb_test "info addr constvar" {Symbol "constvar" is constant\.}
gdb_test "compile code globalvar = constvar;"; # INCORRECT
gdb_test "print globalvar" " = 3" "print constvar value"
} else {
untested "print constvar value"
}
The line marked INCORRECT runs a simple "compile code" which is expected
to succeed. When this happens, the compile plug-in and GDB will not
output anything. The use of gdb_test matches against anything.
This is certainly not the intent, and this patch corrects the two instances
of this in the file. [The rest of gdb.compile looks okay.]
testsuite/ChangeLog:
* gdb.compile/compile.exp: Use gdb_test_no_output for "compile code"
tests expected to pass.
ppc_stub_long_branch_notoc will never need more than a 32-bit offset
for the r12 offset since the stub target must be in range of a
branch instruction.
* elf64-ppc.c: Correct ppc_stub_long_branch_notoc example.
Formatting.
While testing a patch on the buildbot, I got this error:
../../binutils-gdb/gdb/aarch64-linux-tdep.c: In function uint64_t aarch64_linux_core_read_vq(gdbarch*, bfd*):
../../binutils-gdb/gdb/aarch64-linux-tdep.c:285:29: error: format %ld expects argument of type long int, but argument 2 has type uint64_t {aka long long unsigned int} [-Werror=format=]
This patch avoids the problem by using pulongest rather than %ld.
This seems safe to me because, if aarch64-linux-tdep.c is included in
the build, then ULONGEST must be a 64-bit type.
gdb/ChangeLog
2018-08-15 Tom Tromey <tom@tromey.com>
* aarch64-linux-tdep.c (aarch64_linux_core_read_vq): Use pulongest.
In 64-bit mode, display eiz for address with the addr32 prefix and without
base nor index registers. For
mov -0xccddef(,%eiz,), %rax
disassembler now displays:
67 48 8b 04 25 11 22 33 ff mov -0xccddef(,%eiz,1),%rax
instead of
67 48 8b 04 25 11 22 33 ff addr32 mov 0xffffffffff332211,%rax
gas/
* testsuite/gas/i386/evex-no-scale-64.d: Updated.
* testsuite/gas/i386/x86-64-addr32-intel.d: Likewise.
* testsuite/gas/i386/x86-64-addr32.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-addr32.d: Likewise.
* testsuite/gas/i386/x86-64-addr32.s: Add %eiz tests.
opcodes/
* i386-dis.c (OP_E_memory): In 64-bit mode, display eiz for
address with the addr32 prefix and without base nor index
registers.
The CLI "disassemble" command allows specifying a single address - in
that case the function surrounding that address is disassembled.
This commit adds this feature to the equivalent MI command
"-data-disassemble".
gdb/ChangeLog:
2018-08-14 Jan Vrany <jan.vrany@fit.cvut.cz>
* mi/mi-cmd-disas.c (mi_cmd_disassemble): Add -a option.
If used, use find_pc_partial_function to find address range
to disassemble.
* mi/mi-main.c (mi_cmd_list_features): Report
"data-disassemble-a-option" feature.
* NEWS: Mention new -data-disassemble option -a.
gdb/doc/ChangeLog:
2018-08-14 Jan Vrany <jan.vrany@fit.cvut.cz>
* gdb.texinfo (GDB/MI Data Manipulation): Document
"-data-disassemble -a addr".
(GDB/MI Support Commands): Document "data-disassemble-a-option"
feature.
gdb/testsuite/ChangeLog:
2018-08-14 Jan Vrany <jan.vrany@fit.cvut.cz>
* gdb.mi/mi-disassemble.exp (test_disassembly_only): Add tests for
-data-disassemble -a.
(test_disassembly_bogus_args): Likewise.
In the test script gdb.mi/list-thread-groups-available.exp we ask GDB
to list all thread groups, and match the output against a
regexp. Occasionally, I would see this test fail.
The expected output is a list of entries, each entry looking roughly
like this:
{id="<DECIMAL>",type="process",description="<STRING>",
user="<STRING>",cores=["<DECIMAL>","<DECIMAL>",...]}
All the fields after 'id' and 'type' are optional, and the 'cores'
list can contain 1 or more "<DECIMAL>" entries.
On my machine (Running Fedora 27, kernel 4.17.3-100.fc27.x86_64)
usually the 'description' is a non-empty string, and the 'cores' list
has at least one entry in it. But sometimes, very rarely, I'll see an
entry in the process group list where the 'description' is an empty
string, the 'user' is the string "?", and the 'cores' list is empty.
Such an entry looks like this:
{id="19863",type="process",description="",user="?",cores=[]}
I believe that this is caused by the process exiting while GDB is
scanning /proc for process information. The current code in
gdb/nat/linux-osdata.c is not (I think) resilient against exiting
processes.
This commit adjusts the regex that matches the 'cores' list so that an
empty list is acceptable, with this patch in place the test script
gdb.mi/list-thread-groups-available.exp never fails for me now.
I've only adjusted the cores regexp for the occasion when we have GDB
read information about all processes, its only in this case that we
might encounter an exiting process. When we read information about
two known PIDs, that we know will not exit for the duration of the
test, we require that the core list be non-empty.
gdb/testsuite/ChangeLog:
* gdb.mi/list-thread-groups-available.exp: Update test regexp.
This defines _FORTIFY_SOURCE in common-defs.h. This seems like a
sensible safety measure, and also it may help avoid build problems
with -Wunused-result on distros that already define _FORTIFY_SOURCE by
default.
Tested by the buildbot.
gdb/ChangeLog
2018-08-13 Tom Tromey <tom@tromey.com>
* common/common-defs.h (_FORTIFY_SOURCE): Define.
commit 6404ab9937
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Wed Aug 8 21:00:04 2018 -0700
Convert .note.gnu.property section between ELF32 and ELF64
updated bfd_convert_section_size and bfd_convert_section_contents
in bfd.c to call _bfd_elf_convert_gnu_property_size and
_bfd_elf_convert_gnu_properties, which are defined in elf-properties.c.
It led to
bfd.c:2484: undefined reference to `_bfd_elf_convert_gnu_property_size'
for non-ELF targets. Since elf-properties.c is a generic implementation
and doesn't reference any ELF specific functions directly, this patch
moves elf-properties.lo BFD32_LIBS.
Tested for many ELF and non-ELF targets.
PR binutils/23494
* Makefile.am (BFD32_LIBS): Add elf-properties.lo.
(BFD32_LIBS_CFILES): Add elf-properties.c.
(BFD32_BACKENDS): Remove elf-properties.lo.
(BFD32_BACKENDS_CFILES): Remove elf-properties.c.
* configure.ac (elf): Remove elf-properties.lo.
* Makefile.in: Regenerated.
* configure: Likewise.
sve_regmap cannot be global static as the size is dependant on the current
vector length.
gdb/
* aarch64-linux-tdep.c (aarch64_linux_supply_sve_regset): New function.
(aarch64_linux_collect_sve_regset): Likewise.
(aarch64_linux_iterate_over_regset_sections): Check for SVE.
* regcache.h (regcache_map_entry_size): New function.
The SVE section in a core file contains a header followed by the registers.
Add defines to easily access the header fields within a buffer.
gdb/
* aarch64-linux-tdep.c (SVE_HEADER_SIZE_LENGTH): Add define.
(SVE_HEADER_MAX_SIZE_LENGTH): Likewise.
(SVE_HEADER_VL_LENGTH): Likewise.
(SVE_HEADER_MAX_VL_LENGTH): Likewise.
(SVE_HEADER_FLAGS_LENGTH): Likewise.
(SVE_HEADER_RESERVED_LENGTH): Likewise.
(SVE_HEADER_SIZE_OFFSET): Likewise.
(SVE_HEADER_MAX_SIZE_OFFSET): Likewise.
(SVE_HEADER_VL_OFFSET): Likewise.
(SVE_HEADER_MAX_VL_OFFSET): Likewise.
(SVE_HEADER_FLAGS_OFFSET): Likewise.
(SVE_HEADER_RESERVED_OFFSET): Likewise.
(SVE_HEADER_SIZE): Likewise.
(aarch64_linux_core_read_vq): Add function.
(aarch64_linux_core_read_description): Check for SVE section.
In the existing code, when using the regset section iteration functions, the
size parameter is used in different ways.
With collect, size is used to create the buffer in which to write the regset.
(see linux-tdep.c::linux_collect_regset_section_cb).
With supply, size is used to confirm the existing regset is the correct size.
If REGSET_VARIABLE_SIZE is set then the regset can be bigger than size.
Effectively, size is the minimum possible size of the regset.
(see corelow.c::get_core_register_section).
There are currently no targets with both REGSET_VARIABLE_SIZE and a collect
function.
In SVE, a corefile can contain one of two formats after the header, both of
which are different sizes. However, when writing a core file, we always want
to write out the full bigger size.
To allow support of collects for REGSET_VARIABLE_SIZE we need two sizes.
This is done by adding supply_size and collect_size.
gdb/
* aarch64-fbsd-tdep.c
(aarch64_fbsd_iterate_over_regset_sections): Add supply_size and
collect_size.
* aarch64-linux-tdep.c
(aarch64_linux_iterate_over_regset_sections): Likewise.
* alpha-linux-tdep.c
(alpha_linux_iterate_over_regset_sections):
* alpha-nbsd-tdep.c
(alphanbsd_iterate_over_regset_sections): Likewise.
* amd64-fbsd-tdep.c
(amd64fbsd_iterate_over_regset_sections): Likewise.
* amd64-linux-tdep.c
(amd64_linux_iterate_over_regset_sections): Likewise.
* arm-bsd-tdep.c
(armbsd_iterate_over_regset_sections): Likewise.
* arm-fbsd-tdep.c
(arm_fbsd_iterate_over_regset_sections): Likewise.
* arm-linux-tdep.c
(arm_linux_iterate_over_regset_sections): Likewise.
* corelow.c (get_core_registers_cb): Likewise.
(core_target::fetch_registers): Likewise.
* fbsd-tdep.c (fbsd_collect_regset_section_cb): Likewise.
* frv-linux-tdep.c (frv_linux_iterate_over_regset_sections): Likewise.
* gdbarch.h (void): Regenerate.
* gdbarch.sh: Add supply_size and collect_size.
* hppa-linux-tdep.c (hppa_linux_iterate_over_regset_sections): Likewise.
* hppa-nbsd-tdep.c (hppanbsd_iterate_over_regset_sections): Likewise.
* hppa-obsd-tdep.c (hppaobsd_iterate_over_regset_sections): Likewise.
* i386-fbsd-tdep.c (i386fbsd_iterate_over_regset_sections): Likewise.
* i386-linux-tdep.c (i386_linux_iterate_over_regset_sections): Likewise.
* i386-tdep.c (i386_iterate_over_regset_sections): Likewise.
* ia64-linux-tdep.c (ia64_linux_iterate_over_regset_sections): Likewise.
* linux-tdep.c (linux_collect_regset_section_cb): Likewise.
* m32r-linux-tdep.c (m32r_linux_iterate_over_regset_sections): Likewise.
* m68k-bsd-tdep.c (m68kbsd_iterate_over_regset_sections): Likewise.
* m68k-linux-tdep.c (m68k_linux_iterate_over_regset_sections): Likewise.
* mips-fbsd-tdep.c (mips_fbsd_iterate_over_regset_sections): Likewise.
* mips-linux-tdep.c (mips_linux_iterate_over_regset_sections): Likewise.
* mips-nbsd-tdep.c (mipsnbsd_iterate_over_regset_sections): Likewise.
* mips64-obsd-tdep.c (mips64obsd_iterate_over_regset_sections): Likewise.
* mn10300-linux-tdep.c (am33_iterate_over_regset_sections): Likewise.
* nios2-linux-tdep.c (nios2_iterate_over_regset_sections): Likewise.
* ppc-fbsd-tdep.c (ppcfbsd_iterate_over_regset_sections): Likewise.
* ppc-linux-tdep.c (ppc_linux_iterate_over_regset_sections): Likewise.
* ppc-nbsd-tdep.c (ppcnbsd_iterate_over_regset_sections): Likewise.
* ppc-obsd-tdep.c (ppcobsd_iterate_over_regset_sections): Likewise.
* riscv-linux-tdep.c (riscv_linux_iterate_over_regset_sections): Likewise.
* rs6000-aix-tdep.c (rs6000_aix_iterate_over_regset_sections): Likewise.
* s390-linux-tdep.c (s390_iterate_over_regset_sections): Likewise.
* score-tdep.c (score7_linux_iterate_over_regset_sections): Likewise.
* sh-tdep.c (sh_iterate_over_regset_sections): Likewise.
* sparc-tdep.c (sparc_iterate_over_regset_sections): Likewise.
* tilegx-linux-tdep.c (tilegx_iterate_over_regset_sections): Likewise.
* vax-tdep.c (vax_iterate_over_regset_sections): Likewise.
* xtensa-tdep.c (xtensa_iterate_over_regset_sections): Likewise.
There are separate CPUID feature bits for fxsave/fxrstor and cmovCC
instructions. This patch adds CpuCMOV and CpuFXSR to replace Cpu686
on corresponding instructions.
gas/
* config/tc-i386.c (cpu_arch): Add .cmov and .fxsr.
(cpu_noarch): Add nocmov and nofxsr.
* doc/c-i386.texi: Document cmov and fxsr.
opcodes/
* i386-gen.c (cpu_flag_init): Add CpuCMOV and CpuFXSR to
CPU_I686_FLAGS. Add CPU_CMOV_FLAGS, CPU_FXSR_FLAGS,
CPU_ANY_CMOV_FLAGS and CPU_ANY_FXSR_FLAGS.
(cpu_flags): Add CpuCMOV and CpuFXSR.
* i386-opc.tbl: Replace Cpu686 with CpuFXSR on fxsave, fxsave64,
fxrstor and fxrstor64. Replace Cpu686 with CpuCMOV on cmovCC.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Existing properties may be removed during property merging. We avoid
adding X86_ISA_1_NEEDED property only if existing properties won't be
removed.
bfd/
PR ld/23428
* elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): Don't
add X86_ISA_1_NEEDED property only if existing properties won't
be removed.
ld/
PR ld/23428
* testsuite/ld-elf/dummy.s: New file.
* testsuite/ld-elf/linux-x86.S: Add X86_FEATURE_1_AND property.
* testsuite/ld-elf/linux-x86.exp: Add dummy.s to pr23428.
This patch factors out some code common to both bfd_perform_relocation
and bfd_install_relocation, in the process fixing the omission of
"case -1" in bfd_install_relocation.
* reloc.c (bfd_get_reloc_size): Sort switch.
(read_reloc, write_reloc, apply_reloc): New functions.
(bfd_perform_relocation, bfd_install_relocation): Use apply_reloc.
(_bfd_relocate_contents): Use read_reloc and write_reloc.
(_bfd_clear_contents): Likewise.
