When a coredump is generated, there are a few registers in
ARC HS that are put under a special section, namely ".reg-v2".
It is for backward compatibility reasons with older tools that
we have decided not to extend the generic ".reg" section.
This patch makes it possible to display the information better
regarding that section. Compare the output of "readelf" without
and with these changes:
$ readelf -n core # without the patch
...
LINUX 0x0000000c Unknown note type: (0x00000600)
description data: 78 08 00 00 2f 6c 64 2d 75 43 6c 69
$ readelf -n core # with the patch
...
LINUX 0x0000000c NT_ARC_V2 (ARC HS accumulator/extra registers)
description data: 78 08 00 00 2f 6c 64 2d 75 43 6c 69
In another commit (soon to be submitted), GDB will makes use of these
changes to parse the extra section and its registers.
bfd/ChangeLog
2020-03-26 Anton Kolesov <anton.kolesov@synopsys.com>
* elf-bfd.h (elfcore_write_arc_v2): Add prototype.
* elf.c (elfcore_grok_arc_v2): New function.
(elfcore_grok_note): Call the new function to handle the corresponding
note.
(elfcore_write_arc_v2): New function.
(elfcore_write_register_note): Call the new function to handle the
corresponding pseudo-sections.
binutils/ChangeLog
2020-03-26 Anton Kolesov <anton.kolesov@synopsys.com>
* readelf.c (get_note_type): Handle NT_ARC_V2.
include/elf/ChangeLog
2020-03-26 Anton Kolesov <anton.kolesov@synopsys.com>
* common.h (NT_ARC_V2): New macro definitions.
Introduce new relaxations XTENSA_PDIFF{8,16,32} for positive differences
(subtracted symbol precedes diminished symbol) and XTENSA_NDIFF{8,16,32}
for negative differences (subtracted symbol follows diminished symbol).
Don't generate XTENSA_DIFF relocations in the assembler, generate
XTENSA_PDIFF or XTENSA_NDIFF based on relative symbol position.
Handle XTENSA_DIFF in BFD for compatibility with old object files.
Handle XTENSA_PDIFF and XTENSA_NDIFF in BFD, treating difference value
as unsigned.
2020-04-22 Max Filippov <jcmvbkbc@gmail.com>
bfd/
* bfd-in2.h: Regenerated.
* elf32-xtensa.c (elf_howto_table): New entries for
R_XTENSA_PDIFF{8,16,32} and R_XTENSA_NDIFF{8,16,32}.
(elf_xtensa_reloc_type_lookup, elf_xtensa_do_reloc)
(relax_section): Add cases for R_XTENSA_PDIFF{8,16,32} and
R_XTENSA_NDIFF{8,16,32}.
* libbfd.h (bfd_reloc_code_real_names): Add names for
BFD_RELOC_XTENSA_PDIFF{8,16,32} and
BFD_RELOC_XTENSA_NDIFF{8,16,32}.
* reloc.c: Add documentation for BFD_RELOC_XTENSA_PDIFF{8,16,32}
and BFD_RELOC_XTENSA_NDIFF{8,16,32}.
binutils/
* readelf.c (is_none_reloc): Recognize
BFD_RELOC_XTENSA_PDIFF{8,16,32} and
BFD_RELOC_XTENSA_NDIFF{8,16,32}.
gas/
* config/tc-xtensa.c (md_apply_fix): Replace
BFD_RELOC_XTENSA_DIFF{8,16,32} generation with
BFD_RELOC_XTENSA_PDIFF{8,16,32} and
BFD_RELOC_XTENSA_NDIFF{8,16,32} generation.
* testsuite/gas/xtensa/loc.d: Replace BFD_RELOC_XTENSA_DIFF16
with BFD_RELOC_XTENSA_PDIFF16 in the expected output.
include/
* elf/xtensa.h (elf_xtensa_reloc_type): New entries for
R_XTENSA_PDIFF{8,16,32} and R_XTENSA_NDIFF{8,16,32}.
ld/
* testsuite/ld-xtensa/relax-loc.d: New test definition.
* testsuite/ld-xtensa/relax-loc.s: New test source.
* testsuite/ld-xtensa/xtensa.exp (relax-loc): New test.
The check in bfd_get_full_section_contents is trying to check that we don't
allocate more space for a section than the size of the section is on disk.
Previously we excluded linker created sections since they didn't have a size on
disk. However we also need to exclude sections with no content as well such as
the BSS section. Space for these would not have been allocated by the assembler
and so the check would incorrectly fail.
bfd/ChangeLog:
PR binutils/24753
* compress.c (bfd_get_full_section_contents): Exclude sections with no
content.
gas/ChangeLog:
PR binutils/24753
* testsuite/gas/arm/pr24753.d: New test.
* testsuite/gas/arm/pr24753.s: New test.
ELF size_dynamic_sections is called by the ELF backend linker after all
the linker input files have been seen but before the section sizes have
been set. After the sections sizes have been set, target-specific,
global optimizations may make some dynamic sections zero-sized if they
are no longer needed.
Add ELF strip_zero_sized_dynamic_sections so that ELF backend linker can
strip zero-sized dynamic sections after the sections sizes have been set.
bfd/
PR ld/25849
* elf-bfd.h (elf_backend_data): Add
elf_backend_strip_zero_sized_dynamic_sections.
(_bfd_elf_strip_zero_sized_dynamic_sections): New prototype.
* elf64-alpha.c (elf_backend_strip_zero_sized_dynamic_sections):
New macro.
* elflink.c (_bfd_elf_strip_zero_sized_dynamic_sections): New
function.
* elfxx-target.h (elf_backend_strip_zero_sized_dynamic_sections):
New macro.
(elfNN_bed): Add elf_backend_strip_zero_sized_dynamic_sections.
ld/
PR ld/25849
* ldelfgen.c (ldelf_map_segments): Call
elf_backend_strip_zero_sized_dynamic_sections.
* testsuite/ld-alpha/tlsbinr.rd: Updated.
This fixes:
FAIL: DT_TEXTREL map file warning
* elf64-alpha.c (alpha_elf_reloc_entry): Replace reltext with
sec.
(elf64_alpha_check_relocs): Set sec instead of reltext. Warn
DT_TEXTREL with -M.
(elf64_alpha_calc_dynrel_sizes): Warn DT_TEXTREL with -M.
git commit 211dc24b87 removed most sh5 and sh64 SuperH support, after
they were obsoleted by git commit 2b213129c5. This patch removes a
few remaining pieces that should have gone with 211dc24b87.
include/
* elf/sh.h (STO_SH5_ISA32, SHF_SH5_ISA32, SHF_SH5_ISA32_MIXED),
(SHT_SH5_CR_SORTED, STT_DATALABEL): Delete.
bfd/
* elf32-sh.c (sh_elf_relocate_section): Remove STO_SH5_ISA32
processing.
Separately, in translate_symbol_table() the 16-bit symbol values were sign extended to unsigned long (e.g., 64 bits) when they really should be treated as unsigned so the value remains 16 bits.
PR 25828
* pdp11.c (N_STAB): Modify value to avoid conflict with N_EXT
causing globals from linker script to be treated as debug symbols.
(translate_symbol_table): Don't sign-extend symbol values from 16
to 64 bits in nm output.
Stripping .rela.branch_lt is easy enough but messes with the
testsuite due to stub symbols (that use section id) changing. Tests
that run on more than one target variant can be tricky to fix, this
renaming happened to work.
bfd/
* elf64-ppc.c (ppc64_elf_size_stubs): Strip relbrlt too.
ld/
* testsuite/ld-powerpc/tlsopt5.s: Rename foo to aaaaa.
* testsuite/ld-powerpc/tlsopt5.d: Adjust to suit.
* testsuite/ld-powerpc/tlsopt6.d: Likewise.
PR 25803
gas * config/obj-elf.c (obj_elf_type): Reject ifunc symbols on MIPS
targets.
* testsuite/gas/elf/elf.exp: Add MIPS targets to the list to skip
for the type-2 test.
* testsuite/gas/elf/type-noifunc.e: Update to allow for MIPS
targets running this test.
bfd * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Replace an
abort with a more helpful error message.
I can't see any reason why ELFv2 should create a PLT entry for ifuncs
referenced by GOT relocs as long as the GOT entry remains. The GOT
entry ought to be resolved by ld.so to the value returned by the ifunc
resolver, or if there is global entry stub created for some other
reason, by the linker to the stub address.
* elf64-ppc.c (ppc64_elf_check_relocs): Don't create plt entries
for GOT relocs against ifuncs.
When the symbol referenced by a GOT reloc is an ifunc, we can't
optimise away the GOT indirection. Well, we can, but only if a global
entry stub is created with the ifunc symbol redefined to the stub.
But that results in slower code and an indirection via the PLT so
there isn't much to like about that solution.
* elf64-ppc.c (ppc64_elf_edit_toc): Exclude ifunc from GOT
optimisation.
(ppc64_elf_relocate_section): Likewise.
PR 25823
* peXXigen.c (_bfd_XXi_swap_sym_in <C_SECTION>): Don't use a
pointer into strings that may be freed for section name, always
allocate a new string.
This patch extends the relocation and line number counters for
coff-go32 and coff-go32-exe to 32 bits. As I understand it works the
same as for PE-COFF:
If the number of relocations in an object file exceeds 65534, the
NRELOC field is set to 65535 and the actual number of relocations is
stored in the VADDR field of the first relocation entry.
Executable files have no relocations, and thus the NRELOC field is
repurposed to extend NLNNO to 32-bits.
bfd * coff-go32.c (COFF_GO32, IMAGE_SCN_LNK_NRELOC_OVFL)
(coff_SWAP_scnhdr_in, coff_SWAP_scnhdr_out): Define.
(_bfd_go32_swap_scnhdr_in, _bfd_go32_swap_scnhdr_out)
(_bfd_go32_mkobject): New functions.
* coff-stgo32.c (IMAGE_SCN_LNK_NRELOC_OVFL)
(coff_SWAP_scnhdr_in, coff_SWAP_scnhdr_out): Define.
(go32exe_mkobject): Call _bfd_go32_mkobject.
* coffcode.h (COFF_WITH_EXTENDED_RELOC_COUNTER): Define.
(coff_set_alignment_hook): Define function for COFF_GO32_EXE
and COFF_GO32.
(coff_write_relocs): Enable extended reloc counter code if
COFF_WITH_EXTENDED_RELOC_COUNTER is defined. Test for obj_go32.
(coff_write_object_contents): Likewise. Pad section headers
for COFF_GO32 and COFF_GO32EXE. Use bfd_coff_swap_scnhdr_out
instead of coff_swap_scnhdr_out.
* cofflink.c (_bfd_coff_final_link): Test also for obj_go32 to
enable extended reloc counter.
* coffswap.h: (coff_swap_scnhdr_in, coff_swap_scnhdr_out):
Declare with ATTRIBUTE_UNUSED.
* libcoff-in.h: (struct coff_tdata): New field go32.
(obj_go32): Define.
* libcoff.h: Regenerate.
Several ld plugin tests currently FAIL on 32-bit Solaris/SPARC:
FAIL: load plugin with source
FAIL: plugin claimfile lost symbol with source
FAIL: plugin claimfile replace symbol with source
FAIL: plugin claimfile resolve symbol with source
FAIL: plugin claimfile replace file with source
FAIL: plugin set symbol visibility with source
FAIL: plugin ignore lib with source
FAIL: plugin claimfile replace lib with source
FAIL: plugin 2 with source lib
FAIL: load plugin 2 with source
FAIL: load plugin 2 with source and -r
FAIL: plugin 3 with source lib
FAIL: load plugin 3 with source
FAIL: load plugin 3 with source and -r
FAIL: PR ld/20070
all of them in the same way:
./ld-new: BFD (GNU Binutils) 2.34.50.20200328 internal error, aborting at /vol/src/gnu/binutils/hg/master/git/bfd/elf32-sparc.c:154 in sparc_final_write_processing
This happens when bfd_get_mach returns 0 when abfd refers to a source
file:
$11 = {
filename = 0x28c358 "/vol/src/gnu/binutils/hg/master/local/ld/testsuite/ld-plugin/func.c (symbol from plugin)", xvec = 0x24ed6c <sparc_elf32_sol2_vec>,
[...]
While I could find no specification what abfd's are allowed/expected in
*_final_write_processing, I could find no other target that behaved the
same. And indeed ignoring the 0 case fixes the failures. The code now
errors for other values. 64-bit SPARC is not affected because it doesn't
have a specific implementation of elf_backend_final_write_processing.
Tested on sparc-sun-solaris2.11.
2020-04-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
Nick Clifton <nickc@redhat.com>
* elf32-sparc.c (sparc_final_write_processing): Fix whitespace.
<0>: Ignore.
<default>: Error rather than abort.
Remove zero-sized relocation section from a section group since it has
been removed from the output.
PR ld/25767
* elf.c (_bfd_elf_fixup_group_sections): Remove zero-sized
relocation section from section group.
The stub size in GO32 executables has historically been fixed at 2048
bytes, due to hardcoded limitations in bfd. Recent patches to djgpp by
Stas Sergeev (CC'd) have pushed the stub right up to this limit, so if
any further expansion is desired, this must first be patched in bfd.
This series includes three patches: The first changes the meaning of
the bfd->origin field slightly, so that target code can use this to
specify an offset into the file where the actual bfd is located.
The second patch then uses this to enable support for variable-sized
stubs in the coff-go32-exe format.
The final patch is only a cleanup, it normalizes function and variable
names in coff-stgo32.c so that they all begin with the same prefix.
bfd * bfdio.c (bfd_bread, bfd_tell, bfd_seek, bfd_mmap): Always add
bfd->origin to file offset.
* bfdwin.c (bfd_get_file_window): Likewise.
* bfd.c: Clarify the use of the bfd->origin field.
* bfd-in2.h: Regenerate.
* coff-i386.c: Don't include go32exe.h. Allow overriding
coff_write_object_contents via COFF_WRITE_CONTENTS.
* coff-stgo32.c (go32exe_cleanup, go32exe_mkobject)
(go32exe_write_object_contents): New functions.
(go32exe_temp_stub, go32exe_temp_stub_size): New static globals.
(COFF_WRITE_CONTENTS, GO32EXE_DEFAULT_STUB_SIZE): Define.
(create_go32_stub): Remove check for 2k size limit. Read stub
from go32exe_temp_stub if present.
(go32_stubbed_coff_bfd_copy_private_bfd_data): Allocate and
copy variable-length stub.
(go32_check_format): Read stub to go32exe_temp_stub, set
origin, return go32exe_cleanup.
(adjust_filehdr_in_post, adjust_filehdr_out_pre)
(adjust_filehdr_out_post, adjust_scnhdr_in_post)
(adjust_scnhdr_out_pre, adjust_scnhdr_out_post)
(adjust_aux_in_post, adjust_aux_out_pre, adjust_aux_out_post):
Remove functions and their associated #defines.
* coffcode.h (coff_mkobject_hook): Remove stub copying code.
* libcoff-in.h: (struct coff_tdata): New field stub_size.
Rename field go32stub to stub.
* libcoff.h: Regenerate.
* coff-stgo32.c (go32_check_format): Rename to...
(go32exe_check_format): ...this.
(go32_stubbed_coff_bfd_copy_private_bfd_data): Rename to...
(go32exe_copy_private_bfd_data): ...this.
(stub_bytes): Rename to...
(go32exe_default_stub): ...this.
(create_go32_stub): Rename to...
(go32exe_create_stub): ...this.
* coff-stgo32.c (go32exe_copy_private_bfd_data): Avoid realloc
when possible.
include * coff/go32exe.h: Remove file.
* coff/internal.h (struct internal_filehdr): Remove field
go32stub. Remove flag F_GO32STUB.
Since value of non-preemptible absolute symbol (SHN_ABS) won't change,
only relocations, which can be resolved as absolute value + addend, and
GOTPCREL relocations, where absolute value + addend is stored in the GOT
slot, against non-preemptible absolute symbol are allowed in PIE and
shared library.
Also convert load relocation to R_386_32, R_X86_64_32S or R_X86_64_32 for
relocation against non-preemptible absolute symbol. Don't convert to
R_X86_64_32S nor R_X86_64_32 for non-preemptible absolute symbol if they
overflow.
bfd/
PR ld/25749
PR ld/25754
* elf32-i386.c (elf_i386_convert_load_reloc): Convert load
relocation to R_386_32 for relocation against non-preemptible
absolute symbol.
(elf_i386_check_relocs): Call _bfd_elf_x86_valid_reloc_p. Don't
allocate dynamic relocation for non-preemptible absolute symbol.
(elf_i386_relocate_section): Pass sec to
GENERATE_DYNAMIC_RELOCATION_P.
* elf64-x86-64.c (R_X86_64_converted_reloc_bit): Moved.
(elf_x86_64_convert_load_reloc): Covert load relocation to
R_X86_64_32S or R_X86_64_32 for relocation against non-preemptible
absolute symbol. Don't convert to R_X86_64_32S nor R_X86_64_32
for non-preemptible absolute symbol if they overflow.
(elf_x86_64_check_relocs): Call _bfd_elf_x86_valid_reloc_p. Set
tls_type for GOT slot to GOT_ABS for non-preemptible absolute
symbol. Don't allocate dynamic relocation for non-preemptible
absolute symbol.
(elf_x86_64_relocate_section): Don't generate relative relocation
for GOTPCREL relocations aganst local absolute symbol. Pass sec
to GENERATE_DYNAMIC_RELOCATION_P.
* elfxx-x86.c (elf_x86_allocate_dynrelocs): No dynamic relocation
against non-preemptible absolute symbol.
(_bfd_elf_x86_valid_reloc_p): New function.
(_bfd_x86_elf_size_dynamic_sections): No dynamic relocation for
GOT_ABS GOT slot.
* elfxx-x86.h (GENERATE_DYNAMIC_RELOCATION_P): Add an SEC
argument. Don't generate dynamic relocation against
non-preemptible absolute symbol.
(ABS_SYMBOL_P): New.
(GENERATE_RELATIVE_RELOC_P): Don't generate relative relocation
against non-preemptible absolute symbol.
(GOT_ABS): New.
(R_X86_64_converted_reloc_bit): New. Moved from elf64-x86-64.c.
(_bfd_elf_x86_valid_reloc_p): New.
ld/
PR ld/25749
PR ld/25754
* testsuite/ld-elf/linux-x86.exp: Run ld/25749 tests.
* testsuite/ld-elf/pr25749-1.c: New file.
* testsuite/ld-elf/pr25749-1a.c: Likewise.
* testsuite/ld-elf/pr25749-1b.c: Likewise.
* testsuite/ld-elf/pr25749-1b.err: Likewise.
* testsuite/ld-elf/pr25749-1c.c: Likewise.
* testsuite/ld-elf/pr25749-1d.c: Likewise.
* testsuite/ld-elf/pr25749-2.c: Likewise.
* testsuite/ld-elf/pr25749-2a.s: Likewise.
* testsuite/ld-elf/pr25749-2b.s: Likewise.
* testsuite/ld-elf/pr25749.rd: Likewise.
* testsuite/ld-elf/pr25754-1a.c: Likewise.
* testsuite/ld-elf/pr25754-1b.s: Likewise.
* testsuite/ld-elf/pr25754-2a.c: Likewise.
* testsuite/ld-elf/pr25754-2b.err: Likewise.
* testsuite/ld-elf/pr25754-2b.s: Likewise.
* testsuite/ld-elf/pr25754-3a.c: Likewise.
* testsuite/ld-elf/pr25754-3b.s: Likewise.
* testsuite/ld-elf/pr25754-4a.c: Likewise.
* testsuite/ld-elf/pr25754-4b.s: Likewise.
* testsuite/ld-elf/pr25754-4c.s: Likewise.
* testsuite/ld-elf/pr25754-5a.c: Likewise.
* testsuite/ld-elf/pr25754-5b.s: Likewise.
* testsuite/ld-elf/pr25754-5c.s: Likewise.
* testsuite/ld-elf/pr25754-6a.c: Likewise.
* testsuite/ld-elf/pr25754-6b.s: Likewise.
* testsuite/ld-x86-64/pr19609-6a.d: Don't expect linker error.
When you have a Thumb only PLT then the address in the GOT for PLT0 needs to
have the Thumb bit set since the instruction used in PLTn to get there is
`ldr.w pc` which is an inter-working instruction:
the PLT sequence in question is
00000120 <foo@plt>:
120: f240 0c98 movw ip, #152 ; 0x98
124: f2c0 0c01 movt ip, #1
128: 44fc add ip, pc
12a: f8dc f000 ldr.w pc, [ip]
12e: e7fc b.n 12a <foo@plt+0xa>
Disassembly of section .text:
00000130 <bar>:
130: b580 push {r7, lr}
132: af00 add r7, sp, #0
134: f7ff fff4 bl 120 <foo@plt>
and previously the linker would generate
Hex dump of section '.got':
...
0x000101b8 40010100 00000000 00000000 10010000 @...............
Which would make it jump and transition out of thumb mode and crash since you
only have thumb mode on such cores.
Now it correctly generates
Hex dump of section '.got':
...
0x000101b8 40010100 00000000 00000000 11010000 @...............
Thanks to Amol for testing patch and to rgujju for reporting it.
bfd/ChangeLog:
PR ld/16017
* elf32-arm.c (elf32_arm_populate_plt_entry): Set LSB of the PLT0
address in the GOT if in thumb only mode.
ld/ChangeLog:
PR ld/16017
* testsuite/ld-arm/arm-elf.exp (thumb-plt-got): New.
* testsuite/ld-arm/thumb-plt-got.d: New test.
When I previously changed these offsets I had incorrectly used an offset of -2
for this Thumb2 PLT. Unfortunately because we had no tests for this PLT I had
missed that the result was incorrect.
This patch fixes the offset to PC .-4 so that it correctly addresses the
previous instruction and adds a test for this PLT stub.
bfd/ChangeLog:
* elf32-arm.c (elf32_thumb2_plt_entry): Fix PC-rel offset.
ld/ChangeLog:
* testsuite/ld-arm/arm-elf.exp (thumb-plt): New.
* testsuite/ld-arm/thumb-plt.d: New test.
* testsuite/ld-arm/thumb-plt.s: New test.
