Commit Graph

544 Commits

Author SHA1 Message Date
Mike Frysinger
37a9c3a53e sim: testsuite: allow tests to declare expected exit status
Some tests want to verify they can control the exit status, and
allowing any non-zero value would allow tests to silently fail:
if it crashed & exited 1, or forced all non-zero to 1, then we
wouldn't be able to differentiate with a test exiting with a
status like 47.

Extend the test harness to allow tests to declare their expected
exit status that would be defined as a "pass".  This requires a
small tweak to the sim_run API to return the status directly, but
that shouldn't be a big deal as it's only used by sim code.
2021-01-15 01:33:35 -05:00
Mike Frysinger
254c3783fe sim: tests: get common tests working again
These were written with 32-bit host assumptions baked into it.
Simplify the printf formats to use ll length modifier as it's
in C11 rather than trying to manually break it up into two,
and cleanup some of the casts to stop assuming sizeof(long) is
the same as sizeof(int).

We also have to add a few more includes for the various funcs
used in here.

The tests aren't compiled automatically still.  We can figure
that out later with more work.
2021-01-11 18:30:06 -05:00
Mike Frysinger
a9fd212a24 sim: replace rindex with strrchr 2021-01-09 09:40:59 -05:00
Mike Frysinger
f8cab0b995 sim: sh64: delete port
Support for sh64 was dropped from bfd et al in 2018.  Without
that, the sim port is useless.  So clean up this code too.
2021-01-09 09:29:17 -05:00
Mike Frysinger
0f8e278da2 sim: ChangeLog: move arch-specific entries into the arch dir
We don't want arch-specific entries in the common ChangeLog files.
Most arches do this already, so clean up the recent additions, and
move some older entries down to help avoid confusing newcomers.
2021-01-07 12:22:33 -05:00
Mike Frysinger
e6c1dbbfe8 sim: cris: disable test that crashes the linker
PR ld/13900
Linking this test crashes the linker, so disable it.  The crash
was reported about 9 years ago but haven't made progress, so lets
avoid the failures in test runs.
2021-01-07 12:22:14 -05:00
Mike Frysinger
a39487c668 sim: cris: use -sim with C tests for cris-elf targets
Building the C tests with a cris-elf toolchain (gcc-10.2 &
newlib-4.1.0) currently fail due to warnings it emits:
cris-elf-ld: libc.a(lib_a-closer.o): in function `_close_r':
newlib/libc/reent/closer.c:47: warning: _close is not implemented and will always fail

This is because the default target for cris-elf is bare metal, not
the simulator.  For that, we need -sim.  So add it for elf targets.

We don't add it for all targets as the simulator (and testsuite)
run both libgloss programs as well as Linux userspace programs.
2021-01-07 12:21:48 -05:00
Mike Frysinger
9446bcf6be fix paths in ChangeLog 2021-01-07 01:27:06 -05:00
Mike Frysinger
1861f7cfbf sim: cris: fix C tests with newer toolchains
Make sure we include unistd.h for getpid prototypes to fix build
warnings/errors with newer compilers & C libraries.

Doing that for close in openpf highlights these were using the
wrong function -- need to use fclose on FILE*, not close.

These tests pass again with a cris-elf toolchain.
2021-01-07 01:19:49 -05:00
Mike Frysinger
865288236d sim: fr30: delete unused testsuite
Looking through the history, it doesn't seem like the fr30 port was
ever merged.  There used to be a testsuite/fr30-elf/ dir, but that
was punted back in 2005 as being dead too.  Since there's no refs
and the dir hasn't been touched since 1999, lets assume no one will
ever notice or care.
2021-01-05 19:29:46 -05:00
Mike Frysinger
c004e77f7d sim: testsuite: delete unused Make-common.in file
This seems like it was meant to unify arch test Makefiles, but
that never happened, and we've instead unified using dejagnu.
2021-01-05 19:29:11 -05:00
Mike Frysinger
a2f8e947a8 sim: h8300: fix test mach markers
These tests all fail to assemble when targeting the h8300 or h8300h
cpu variants with errors like:
rotl.s:242: Warning: Opcode `rotl.b' with these operand types not available in H8/300H mode
rotl.s:242: Error: invalid operands

It's been this way for years and no one seems to care, so disable
them for those targets since the assembler thinks it's impossible.
2021-01-05 19:26:33 -05:00
Mike Frysinger
0c7f5bd08c sim: h8300: simplify testsuite runner
We don't need to manually enumerate every test.  Use a glob function
like every other port and rely on the (already existing) #mach headers
in each file to filter out targets we don't care about.
2021-01-05 19:26:17 -05:00
Mike Frysinger
9416af6e7d sim: stdlib.h for abs()
Make sure the files using abs() include stdlib.h for its prototype.
These files were relying on it being included implicitly by others
which isn't guaranteed, and newer toolchains produce warnings.
2021-01-04 20:13:10 -05:00
Mike Frysinger
dfb856ba26 sim: update bug URI to https:// 2021-01-04 18:14:37 -05:00
Joel Brobecker
3666a04883 Update copyright year range in all GDB files
This commits the result of running gdb/copyright.py as per our Start
of New Year procedure...

gdb/ChangeLog

        Update copyright year range in copyright header of all GDB files.
2021-01-01 12:12:21 +04:00
Dimitar Dimitrov
e57cf1f2cd sim: pru: Add support for LMBD instruction
Binutils support for LMBD instruction was merged [1]. So add it also
to simulator.

LMBD instruction does left-most-bit-detection. It returns 32 if
the given bit value is not found in the provided word value.

[1] https://sourceware.org/pipermail/binutils/2020-October/113901.html

sim/pru/ChangeLog:

	* pru.h (RS1SEL): New macro.
	(RS1_WIDTH): New macro.
	* pru.isa: Describe the LMBD instruction.

sim/testsuite/sim/pru/ChangeLog:

	* lmbd.s: New test.
2020-11-12 22:41:10 +02:00
Andrew Burgess
043f5c63f0 sim: Fix autoreconf errors in sim/ directory
Run autoreconf in sim/ directory and you'll see some errors.  The
problem is that autoreconf (a perl script) does not evaluate the value
passed as an argument to AC_CONFIG_AUX_DIR, so something like:

  AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)

does not do the right thing inside autoreconf, my understanding is
that changing to something like this is fine:

  AC_CONFIG_AUX_DIR(../..)

the generated configure seems to check the value passed, and the value
passed relative to the source directory, so I think we get basically
the same behaviour as before.

sim/testsuite/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/d10v-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/frv-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/m32r-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/mips64el-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.
2020-10-06 11:29:44 +01:00
David Faust
3ad6c19423 bpf: simulator: correct div, mod insn semantics
The div and mod eBPF instructions are unsigned, but the semantic
specification for the simulator incorrectly used signed operators.
Correct them to unsigned versions, and correct the ALU tests in
the simulator (which incorrectly assumed signed semantics).

Tested in bpf-unknown-none.

cpu/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* bpf.cpu (define-alu-instructions): Correct semantic operators
	for div, mod to unsigned versions.

sim/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* bpf/sem-be.c: Regenerate.
	* bpf/sem-le.c: Likewise.

sim/testsuite/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* sim/bpf/alu.s: Correct div and mod tests.
	* sim/bpf/alu32.s: Likewise.
2020-09-08 11:39:07 -07:00
Jozef Lawrynowicz
e8a387fb5f MSP430: sim: Fix incorrect simulation of unsigned widening multiply
Operand sizes used for simulation of MSP430 hardware multiply
operations are not aligned with the sizes used on the target, resulting
in the simulator storing signed operands with too much precision.

Additionally, simulation of unsigned multiplication is missing explicit
casts to prevent any implicit sign extension.

gcc.c-torture/execute/pr91450-1.c uses unsigned widening multiplication
of 32-bit operands -4 and 2, to produce a 64-bit result:
0xffff fffc * 0x2 = 0x1 ffff fff8

If -4 is stored in 64-bit precision, then the multiplication is
essentially signed and the result is -8 in 64-bit precision
(0xffff ffff ffff fffc), which is not correct.

sim/msp430/ChangeLog:

	* msp430-sim.c (put_op): For unsigned multiplication, explicitly cast
	operands to the unsigned type before multiplying.
	* msp430-sim.h (struct msp430_cpu_state): Fix types used to store hwmult
	operands.

sim/testsuite/sim/msp430/ChangeLog:

	* mpyull_hwmult.s: New test.
2020-08-05 15:02:30 +01:00
Jose E. Marchesi
b26e2ae7d3 sim: eBPF simulator
This patch introduces the basics of an instruction-simulator for eBPF.
The simulator is based on CGEN.

gdb/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure.tgt: Set gdb_sim for bpf-*-* targets.

sim/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
	    David Faust <david.faust@oracle.com>

	* configure.tgt (sim_arch): Add entry for bpf-*-*.
	* configure: Regenerate.
	* MAINTAINERS: Add maintainer for the BPF simulator.
	* bpf/Makefile.in: New file.
	* bpf/bpf-helpers.c: Likewise.
	* bpf/bpf-helpers.def: Likewise.
	* bpf/bpf-helpers.h: Likewise.
	* bpf/bpf-sim.h: Likewise.
	* bpf/bpf.c: Likewise.
	* bpf/config.in: Likewise.
	* bpf/configure.ac: Likewise.
	* bpf/decode.h: Likewise.
	* bpf/eng.h: Likewise.
	* bpf/mloop.in: Likewise.
	* bpf/sim-if.c: Likewise.
	* bpf/sim-main.h: Likewise.
	* bpf/traps.c: Likewise.
	* bpf/configure: Generate.
	* bpf/aclocal.m4: Likewise.

sim/testsuite/ChangeLog:

2020-08-04  David Faust  <david.faust@oracle.com>
	    Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure: Regenerate.
	* sim/bpf/allinsn.exp: New file.
	* sim/bpf/alu.s: Likewise.
	* sim/bpf/alu32.s: Likewise.
	* sim/bpf/endbe.s: Likewise.
	* sim/bpf/endle.s: Likewise.
	* sim/bpf/jmp.s: Likewise.
	* sim/bpf/jmp32.s: Likewise.
	* sim/bpf/ldabs.s: Likewise.
	* sim/bpf/mem.s: Likewise.
	* sim/bpf/mov.s: Likewise.
	* sim/bpf/testutils.inc: Likewise.
	* sim/bpf/xadd.s: Likewise.
2020-08-04 18:09:16 +02:00
Simon Marchi
f693213d12 Run autoreconf -vf throughout
I ran

    for i in $(find . -name configure.ac); do pushd $(dirname $i); autoreconf -vf; popd; done

to re-generate all automake/autoconf files throughout the repo (with
upstream autoconf 2.69 and automake 1.15.1).  These were the changes
that came out.  I am pushing this as obvious.

libdecnumber/ChangeLog:

	* aclocal.m4, configure: Re-generate.

sim/bfin/ChangeLog:

	* aclocal.m4, configure: Re-generate.

sim/erc32/ChangeLog:

	* configure: Re-generate.

sim/mips/ChangeLog:

	* configure: Re-generate.

sim/testsuite/ChangeLog:

	* configure: Re-generate.

Change-Id: I97335c09972d25cc5f6fd8da4db4ffe4a0348787
2020-07-29 16:03:55 -04:00
Jozef Lawrynowicz
b7dcc42dfd MSP430: Fix simulator execution of RRUX instruction
The MSP430X RRUX instruction (unsigned right shift) is synthesized as
the RRC (rotate right through carry) instruction, but with the ZC
(zero carry) bit of the opcode extention word set.

Ensure the carry flag is ignored when the ZC bit is set.

sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* msp430-sim.c (msp430_step_once): Ignore the carry flag when executing
	an RRC instruction, if the ZC bit of the extension word is set.

sim/testsuite/sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* rrux.s: New test.
2020-01-22 21:52:29 +00:00
Joel Brobecker
b811d2c292 Update copyright year range in all GDB files.
gdb/ChangeLog:

        Update copyright year range in all GDB files.
2020-01-01 10:20:53 +04:00
Tom Tromey
78aa740b76 Add install-strip to sim/
PR build/24572 notes that "make install-strip" fails.  For me, it
works in every directory except "sim", so this patch adds
install-strip targets to the Makefiles that appear there.

sim/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/common/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/igen/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/ppc/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/testsuite/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

Change-Id: I76613bc5c7e7812284f33826f8a5d914477fcdc5
2019-12-19 11:28:53 -07:00
Dimitar Dimitrov
e2e9097bd2 Add testsuite for the PRU simulator port
sim/testsuite/ChangeLog:

	* configure: Regenerate.

sim/testsuite/sim/pru/ChangeLog:

	* add.s: New test.
	* allinsn.exp: New file.
	* dmem-zero-pass.s: New test.
	* dmem-zero-trap.s: New test.
	* dram.s: New test.
	* jmp.s: New test.
	* loop-imm.s: New test.
	* loop-reg.s: New test.
	* mul.s: New test.
	* subreg.s: New test.
	* testutils.inc: New file.
2019-09-23 22:11:16 +01:00
Stafford Horne
57a63d27dc sim/testsuite/or1k: Add tests for unordered compares
Add tests for 32-bit and 64-bit unordered compare instructions.

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* fpu-unordered.S: New file.
	* fpu64a32-unordered.S: New file.
2019-06-13 21:27:10 +09:00
Stafford Horne
3c83b496d4 sim/testsuite/or1k: Add test case for l.adrp instruction
This is a simple test to ensure that the l.adrp instruction can be assembled and
simulated correctly.

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* adrp.S: New file.
2019-06-13 21:27:10 +09:00
Stafford Horne
b4f9e00346 sim/testsuite/or1k: Add test for 64-bit fpu operations
This is a very basic test but it ensure the machine is wired up
correctly and that the assembler works.

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* fpu64a32.S: New file.
2019-06-13 21:27:10 +09:00
Joel Brobecker
42a4f53d2b Update copyright year range in all GDB files.
This commit applies all changes made after running the gdb/copyright.py
script.

Note that one file was flagged by the script, due to an invalid
copyright header
(gdb/unittests/basic_string_view/element_access/char/empty.cc).
As the file was copied from GCC's libstdc++-v3 testsuite, this commit
leaves this file untouched for the time being; a patch to fix the header
was sent to gcc-patches first.

gdb/ChangeLog:

	Update copyright year range in all GDB files.
2019-01-01 10:01:51 +04:00
Richard Henderson
07f5f4c683 or1k: Add the l.muld, l.muldu, l.macu, l.msbu insns
Also fix the incorrect definitions of multiply and divide carry and
overflow float.

Changes to the instructions are made in the .cpu file, then we
regenerate the binutils and sim files.

The changes also required a few fixups for tests and additional sim helpers.

cpu/ChangeLog:

yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
	    Stafford Horne  <shorne@gmail.com>

	* or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
	(insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
	(l-mul): Fix overflow support and indentation.
	(l-mulu): Fix overflow support and indentation.
	(l-muld, l-muldu, l-msbu, l-macu): New instructions.
	(l-div); Remove incorrect carry behavior.
	(l-divu): Fix carry and overflow behavior.
	(l-mac): Add overflow support.
	(l-msb, l-msbu): Add carry and overflow support.

opcodes/ChangeLog:

yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
	    Stafford Horne  <shorne@gmail.com>

	* or1k-desc.c: Regenerate.
	* or1k-desc.h: Regenerate.
	* or1k-opc.c: Regenerate.
	* or1k-opc.h: Regenerate.
	* or1k-opinst.c: Regenerate.

sim/common/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* cgen-ops.h (ADDCFDI): New function, add carry flag DI variant.
	(ADDOFDI): New function, add overflow flag DI variant.
	(SUBCFDI): New function, subtract carry flag DI variant.
	(SUBOFDI): New function, subtract overflow flag DI variant.

sim/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* or1k/cpu.h: Regenerate.
	* or1k/decode.c: Regenerate.
	* or1k/decode.h: Regenerate.
	* or1k/model.c: Regenerate.
	* or1k/sem-switch.c: Regenerate.
	* or1k/sem.c: Regenerate:

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* div.S: Fix tests to match correct overflow/carry semantics.
	* mul.S: Likewise.

gas/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* testsuite/gas/or1k/allinsn.s: Add instruction tests for
	l.muld, l.muldu, l.macu, l.msb, l.msbu.
	* testsuite/gas/or1k/allinsn.d: Add test results for new
	instructions.
2018-10-05 11:41:42 +09:00
Simon Marchi
d0ac1c4488 Bump to autoconf 2.69 and automake 1.15.1
When trying to run the update-gnulib.sh script in gdb, I get this:

Error: Wrong automake version (Unescaped left brace in regex is deprecated, passed through in regex; marked by <-- HERE in m/\${ <-- HERE ([^      =:+{}]+)}/ at /opt/automake/1.11.1/bin/automake line 4113.), we need 1.11.1.
Aborting.

Apparently, it's an issue with a regex in automake that triggers a
warning starting with Perl 5.22.  It has been fixed in automake 1.15.1.
So I think it's a good excuse to bump the versions of autoconf and
automake used in the gnulib import.  And to avoid requiring multiple
builds of autoconf/automake, it was suggested that we bump the required
version of those tools for all binutils-gdb.

For autoconf, the 2.69 version is universally available, so it's an easy
choice.  For automake, different distros and distro versions have
different automake versions.  But 1.15.1 seems to be the most readily
available as a package.  In any case, it's easy to build it from source.

I removed the version checks from AUTOMAKE_OPTIONS and AC_PREREQ,
because I don't think they are useful in our case.  They only specify a
lower bound for the acceptable version of automake/autoconf.  That's
useful if you let the user choose the version of the tool they want to
use, but want to set a minimum version (because you use a feature that
was introduced in that version).  In our case, we force people to use a
specific version anyway.  For the autoconf version, we have the check in
config/override.m4 that enforces the version we want.  It will be one
less thing to update next time we change autotools version.

I hit a few categories of problems that required some changes.  They are
described below along with the chosen solutions.

Problem 1:

  configure.ac:17: warning: AM_INIT_AUTOMAKE: two- and three-arguments forms are deprecated.  For more info, see:
  configure.ac:17: http://www.gnu.org/software/automake/manual/automake.html#Modernize-AM_005fINIT_005fAUTOMAKE-invocation

Solution 1:

  Adjust the code based on the example at that URL.

Problem 2 (in zlib/):

  Makefile.am: error: required file './INSTALL' not found
  Makefile.am:   'automake --add-missing' can install 'INSTALL'
  Makefile.am: error: required file './NEWS' not found
  Makefile.am: error: required file './AUTHORS' not found
  Makefile.am: error: required file './COPYING' not found
  Makefile.am:   'automake --add-missing' can install 'COPYING'

Solution 2:

  Add the foreign option to AUTOMAKE_OPTIONS.

Problem 3:

  doc/Makefile.am:20: error: support for Cygnus-style trees has been removed

Solution 3:

  Remove the cygnus options.

Problem 4:

  Makefile.am:656: warning: 'INCLUDES' is the old name for 'AM_CPPFLAGS' (or '*_CPPFLAGS')

Solution 4:

  Rename "INCLUDES = " to "AM_CPPFLAGS += " (because AM_CPPFLAGS is
  already defined earlier).

Problem 5:

  doc/Makefile.am:71: warning: suffix '.texinfo' for Texinfo files is discouraged; use '.texi' instead
  doc/Makefile.am: warning: Oops!
  doc/Makefile.am:     It appears this file (or files included by it) are triggering
  doc/Makefile.am:     an undocumented, soon-to-be-removed automake hack.
  doc/Makefile.am:     Future automake versions will no longer place in the builddir
  doc/Makefile.am:     (rather than in the srcdir) the generated '.info' files that
  doc/Makefile.am:     appear to be cleaned, by e.g. being listed in CLEANFILES or
  doc/Makefile.am:     DISTCLEANFILES.
  doc/Makefile.am:     If you want your '.info' files to be placed in the builddir
  doc/Makefile.am:     rather than in the srcdir, you have to use the shiny new
  doc/Makefile.am:     'info-in-builddir' automake option.

Solution 5:

  Rename .texinfo files to .texi.

Problem 6:

  doc/Makefile.am: warning: Oops!
  doc/Makefile.am:     It appears this file (or files included by it) are triggering
  doc/Makefile.am:     an undocumented, soon-to-be-removed automake hack.
  doc/Makefile.am:     Future automake versions will no longer place in the builddir
  doc/Makefile.am:     (rather than in the srcdir) the generated '.info' files that
  doc/Makefile.am:     appear to be cleaned, by e.g. being listed in CLEANFILES or
  doc/Makefile.am:     DISTCLEANFILES.
  doc/Makefile.am:     If you want your '.info' files to be placed in the builddir
  doc/Makefile.am:     rather than in the srcdir, you have to use the shiny new
  doc/Makefile.am:     'info-in-builddir' automake option.

Solution 6:

  Remove the hack at the bottom of doc/Makefile.am and use
  the info-in-builddir automake option.

Problem 7:

  doc/Makefile.am:35: error: required file '../texinfo.tex' not found
  doc/Makefile.am:35:   'automake --add-missing' can install 'texinfo.tex'

Solution 7:

  Use the no-texinfo.tex automake option.  We also have one in
  texinfo/texinfo.tex, not sure if we should point to that, or move it
  (or a newer version of it added with automake --add-missing) to
  top-level.

Problem 8:

  Makefile.am:131: warning: source file 'config/tc-aarch64.c' is in a subdirectory,
  Makefile.am:131: but option 'subdir-objects' is disabled
  automake: warning: possible forward-incompatibility.
  automake: At least a source file is in a subdirectory, but the 'subdir-objects'
  automake: automake option hasn't been enabled.  For now, the corresponding output
  automake: object file(s) will be placed in the top-level directory.  However,
  automake: this behaviour will change in future Automake versions: they will
  automake: unconditionally cause object files to be placed in the same subdirectory
  automake: of the corresponding sources.
  automake: You are advised to start using 'subdir-objects' option throughout your
  automake: project, to avoid future incompatibilities.

Solution 8:

  Use subdir-objects, that means adjusting references to some .o that will now
  be in config/.

Problem 9:

  configure.ac:375: warning: AC_LANG_CONFTEST: no AC_LANG_SOURCE call detected in body
  ../../lib/autoconf/lang.m4:193: AC_LANG_CONFTEST is expanded from...
  ../../lib/autoconf/general.m4:2601: _AC_COMPILE_IFELSE is expanded from...
  ../../lib/autoconf/general.m4:2617: AC_COMPILE_IFELSE is expanded from...
  ../../lib/m4sugar/m4sh.m4:639: AS_IF is expanded from...
  ../../lib/autoconf/general.m4:2042: AC_CACHE_VAL is expanded from...
  ../../lib/autoconf/general.m4:2063: AC_CACHE_CHECK is expanded from...
  configure.ac:375: the top level

Solution 9:

  Use AC_LANG_SOURCE, or use proper quoting.

Problem 10 (in intl/):

  configure.ac:7: warning: AC_COMPILE_IFELSE was called before AC_USE_SYSTEM_EXTENSIONS
  /usr/share/aclocal/threadlib.m4:36: gl_THREADLIB_EARLY_BODY is expanded from...
  /usr/share/aclocal/threadlib.m4:29: gl_THREADLIB_EARLY is expanded from...
  /usr/share/aclocal/threadlib.m4:318: gl_THREADLIB is expanded from...
  /usr/share/aclocal/lock.m4:9: gl_LOCK is expanded from...
  /usr/share/aclocal/intl.m4:211: gt_INTL_SUBDIR_CORE is expanded from...
  /usr/share/aclocal/intl.m4:25: AM_INTL_SUBDIR is expanded from...
  /usr/share/aclocal/gettext.m4:57: AM_GNU_GETTEXT is expanded from...
  configure.ac:7: the top level

Solution 10:

  Add AC_USE_SYSTEM_EXTENSIONS in configure.ac.

ChangeLog:

	* libtool.m4: Use AC_LANG_SOURCE.
	* configure.ac: Remove AC_PREREQ, use AC_LANG_SOURCE.
	* README-maintainer-mode: Update version requirements.
	* ar-lib: New file.
	* test-driver: New file.
	* configure: Re-generate.

bfd/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11.
	(INCLUDES): Rename to ...
	(AM_CPPFLAGS): ... this.
	* configure.ac: Remove AC_PREREQ.
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9, cygnus, add
	info-in-builddir no-texinfo.tex.
	(info_TEXINFOS): Rename bfd.texinfo to bfd.texi.
	* doc/bfd.texinfo: Rename to ...
	* doc/bfd.texi: ... this.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

binutils/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Remove cygnus, add
	info-in-builddir no-texinfo.tex.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

config/ChangeLog:

	* override.m4 (_GCC_AUTOCONF_VERSION): Bump from 2.64 to 2.69.

etc/ChangeLog:

	* configure.in: Remove AC_PREREQ.
	* configure: Re-generate.

gas/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11, add subdir-objects.
	(TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O): Add config/ prefix.
	* configure.ac (TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O, emfiles,
	extra_objects): Add config/ prefix.
	* doc/as.texinfo: Rename to...
	* doc/as.texi: ... this.
	* doc/Makefile.am: Rename as.texinfo to as.texi throughout.
	Remove DISTCLEANFILES hack.
	(AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add no-texinfo.tex and
	info-in-builddir.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

gdb/ChangeLog:

	* common/common-defs.h (PACKAGE_NAME, PACKAGE_VERSION,
	PACKAGE_STRING, PACKAGE_TARNAME): Undefine.
	* configure.ac: Remove AC_PREREQ, add missing quoting.
	* gnulib/configure.ac: Modernize usage of
	AC_INIT/AM_INIT_AUTOMAKE.  Remove AC_PREREQ.
	* gnulib/update-gnulib.sh (AUTOCONF_VERSION): Bump to 2.69.
	(AUTOMAKE_VERSION): Bump to 1.15.1.
	* configure: Re-generate.
	* config.in: Re-generate.
	* aclocal.m4: Re-generate.
	* gnulib/aclocal.m4: Re-generate.
	* gnulib/config.in: Re-generate.
	* gnulib/configure: Re-generate.
	* gnulib/import/Makefile.in: Re-generate.

gdb/gdbserver/ChangeLog:

	* configure.ac: Remove AC_PREREQ, add missing quoting.
	* configure: Re-generate.
	* config.in: Re-generate.
	* aclocal.m4: Re-generate.

gdb/testsuite/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.

gold/ChangeLog:

	* configure.ac: Remove AC_PREREQ, add missing quoting and usage
	of AC_LANG_SOURCE.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
	* testsuite/Makefile.in: Re-generate.

gprof/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* Makefile.am: Remove DISTCLEANFILES hack.
	(AUTOMAKE_OPTIONS): Remove 1.11, add info-in-builddir.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
	* gconfig.in: Re-generate.

intl/ChangeLog:

	* configure.ac: Add AC_USE_SYSTEM_EXTENSIONS, remove AC_PREREQ.
	* configure: Re-generate.
	* config.h.in: Re-generate.
	* aclocal.m4: Re-generate.

ld/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* Makefile.am: Remove DISTCLEANFILES hack, rename ld.texinfo to
	ld.texi, ldint.texinfo to ldint.texi throughout.
	(AUTOMAKE_OPTIONS): Add info-in-builddir.
	* README: Rename ld.texinfo to ld.texi, ldint.texinfo to
	ldint.texi throughout.
	* gen-doc.texi: Likewise.
	* h8-doc.texi: Likewise.
	* ld.texinfo: Rename to ...
	* ld.texi: ... this.
	* ldint.texinfo: Rename to ...
	* ldint.texi: ... this.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.

libdecnumber/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.
	* aclocal.m4.

libiberty/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.
	* config.in: Re-generate.

opcodes/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11.
	* configure.ac: Remove AC_PREREQ.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.

readline/ChangeLog.gdb:

	* configure: Re-generate.
	* examples/rlfe/configure: Re-generate.

sim/ChangeLog:

	* All configure.ac: Remove AC_PREREQ.
	* All configure: Re-generate.

zlib/ChangeLog.bin-gdb:

	* configure.ac: Modernize AC_INIT call, remove AC_PREREQ.
	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add
	foreign.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
2018-06-19 16:55:06 -04:00
Simon Marchi
37f980dc03 config: Sync with GCC
... and re-generate all possible configure files, since they may depend
on things in config/.

config/ChangeLog:

	Sync with GCC
	2018-06-08  Martin Liska  <mliska@suse.cz>

	* bootstrap-mpx.mk: Remove.

	2018-05-10  Martin Liska  <mliska@suse.cz>

	PR bootstrap/64914
	* bootstrap-ubsan.mk: Define UBSAN_BOOTSTRAP.

	2018-05-09  Joshua Watt <jpewhacker@gmail.com>

        * ax_pthread.m4: Add file.

	2018-05-08  Richard Biener  <rguenther@suse.de>

	PR bootstrap/85571
	* bootstrap-lto-noplugin.mk: Disable compare.
	* bootstrap-lto.mk: Supply contrib/compare-lto for do-compare.

	2018-04-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR bootstrap/85490
	* bootstrap-cet.mk (STAGE4_CFLAGS): New.

	2018-04-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/85485
	* bootstrap-cet.mk (STAGE2_CFLAGS): Remove -mcet.
	(STAGE3_CFLAGS): Likewise.

	2018-04-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/85485
	* cet.m4 (GCC_CET_FLAGS): Replace -mcet with -mshstk.

	2018-04-19  Jakub Jelinek  <jakub@redhat.com>

	* cet.m4 (GCC_CET_FLAGS): Default to --disable-cet, replace
	--enable-cet=default with --enable-cet=auto.

	2018-04-18  David Malcolm  <dmalcolm@redhat.com>

	PR jit/85384
	* acx.m4 (GCC_BASE_VER): Remove \$\$ from sed expression.
2018-06-18 09:33:48 -04:00
Joel Brobecker
e2882c8578 Update copyright year range in all GDB files
gdb/ChangeLog:

        Update copyright year range in all GDB files
2018-01-02 07:38:06 +04:00
Peter Gavin
702d582e2c sim: testsuite: add testsuite for or1k sim
This is the testsuite for the or1k sim, it tests running many of the
basic architecture instructions on the openrisc sim.

sim/testsuite/sim/or1k/ChangeLog:

2017-12-12  Peter Gavin  <pgavin@gmail.com>
	    Stafford Horne <shorne@gmail.com>

	* add.S: New file.
	* alltests.exp: New file.
	* and.S: New file.
	* basic.S: New file.
	* div.S: New file.
	* ext.S: New file.
	* find.S: New file.
	* flag.S: New file.
	* fpu.S: New file.
	* jump.S: New file.
	* load.S: New file.
	* mac.S: New file.
	* mfspr.S: New file.
	* mul.S: New file.
	* or.S: New file.
	* or1k-asm-test-env.h: New file.
	* or1k-asm-test-helpers.h: New file.
	* or1k-asm-test.h: New file.
	* or1k-asm.h: New file.
	* or1k-test.ld: New file.
	* ror.S: New file.
	* shift.S: New file.
	* spr-defs.h: New file.
	* sub.S: New file.
	* xor.S: New file.

sim/testsuite/ChangeLog:

2017-12-12  Stafford Horne  <shorne@gmail.com>
	    Peter Gavin  <pgavin@gmail.com>

	* configure: Regenerated.
2017-12-12 23:49:57 +09:00
Jim Wilson
bf1554384b Fix ldn/stn multiple instructions. Fix testcases with unaligned data.
sim/aarch64/
	* simulator.c (vec_load): Add M argument.  Rewrite to iterate over
	registers based on structure size.
	(LD4, LD3, LD2, LD1_2, LD1_3, LD1_4): Pass new arg to vec_load.
	(LD1_1): Replace with call to vec_load.
	(vec_store): Add new M argument.  Rewrite to iterate over registers
	based on structure size.
	(ST4, ST3, ST2, ST1_2, ST1_3, ST1_4): Pass new arg to vec_store.
	(ST1_1): Replace with call to vec_store.

	sim/testsuite/sim/aarch64/
	* fcvtz.s, fstur.s, ldn_single.s, ldnr.s, mla.s, mls.s, uzp.s: Align
	data.
	* sumulh.s: Delete unnecessary data alignment.
	* stn_single.s: Align data.  Fix unaligned ldr insns.  Adjust cmp
	arguments to match change.
	* ldn_multiple.s, stn_multiple.s: New.
2017-04-22 16:36:01 -07:00
Jim Wilson
b630840c9c Add support for fcvtl and fcvtl2.
sim/aarch64/
	* simulator.c (do_vec_FCVTL): New.
	(do_vec_op1): Call do_vec_FCVTL.

	sim/testsuite/sim/aarch64/
	* fcvtl.s: New.
2017-04-08 12:08:20 -07:00
Jim Wilson
ae27d3fe76 Support the fcmXX zero instructions.
sim/aarch64/
	* simulator.c (do_scalar_FCMGE_zero): New.
	(do_scalar_FCMLE_zero, do_scalar_FCMGT_zero, do_scalar_FCMEQ_zero)
	(do_scalar_FCMLT_zero): Likewise.
	(do_scalar_vec): Add calls to new functions.

	sim/testsuite/sim/aarch64/
	* fcmXX.s: New.
2017-04-08 07:10:38 -07:00
Jim Wilson
f124168208 Fix bug with cmn/adds where C flag was incorrectly set.
sim/aarch64/
	* simulator.c (set_flags_for_add32): Cast result to uint32_t in carry
	flag check.

	sim/testsuite/sim/aarch64/
	* adds.s: Add checks for values -2 and 1, where C is not set.
2017-03-25 20:32:02 -07:00
Jim Wilson
8ecbe595e6 Fix umulh and smulh bugs. Fix bugs in last week's sumov.s testsuite.
sim/aarch64/
	* simulator.c (mul64hi): Shift carry left by 32.
	(smulh): Change signum to negate.  If negate, invert result, and add
	carry bit if low part of multiply result is zero.

	sim/testsuite/sim/aarch64/
	* sumov.s: Correct compare test values.
	* sumulh.s: New.
2017-03-03 13:10:45 -08:00
Jim Wilson
152e1e1bc9 Add missing smov support, and clean up existing umov support.
sim/aarch64/
	* simulator.c (do_vec_SMOV_into_scalar): New.
	(do_vec_UMOV_into_scalar): Renamed from do_vec_MOV_into_scalar.
	Rewritten.
	(do_vec_UMOV): Merged into do_vec_UMOV_into_scalar and deleted.
	(do_vec_op1): Move do_vec_TRN call and do_vec_UZP call.  Add
	do_vec_SMOV_into_scalar call.  Delete do_vec_MOV_into_scalar and
	do_vec_UMOV calls.  Add do_vec_UMOV_into_scalar call.

	sim/testsuite/sim/aarch64/
	* sumov.s: New.
2017-02-25 20:06:36 -08:00
Jim Wilson
ac189e7bf8 Add missing cnt (popcount) instruction support.
sim/aarch64/
	* simulator.c (popcount): New.
	(do_vec_CNT): New.
	(do_vec_op1): Add do_vec_CNT call.

	sim/testsuite/sim/aarch64/
	* cnt.s: New.
2017-02-25 20:04:09 -08:00
Jim Wilson
2e7e5e2890 Fix for aarch64 sim sxtl/uxtl insns, plus another fix for addv.
sim/aarch64/
	* simulator.c (do_vec_ADDV): Mov val declaration inside each case,
	with type set to input type size.
	(do_vec_xtl): Change bias from 3 to 4 for byte case.

	sim/testsuite/sim/aarch64/
	* bit.s: Change cmp immediates to account for addv bug fix.
	* cmtst.s, ldn_single.s, stn_single.s: Likewise.
	* xtl.s: New.
2017-02-19 13:16:56 -08:00
Jim Wilson
742e3a7781 Add self to aarch64 maintainers. Fix mla instruction.
sim/
	* MAINTAINTERS (aarch64): Add myself.

	sim/aarch64/
	* simulator.c (do_vec_MLA): Rewrite switch body.

	sim/testsuite/sim/aarch64/
	* mla.s: New.
2017-02-14 15:23:12 -08:00
Jim Wilson
bf25e9a0f1 Fix bit/bif instructions.
sim/aarch64/
	* simulator.c (do_vec_bit): Change loop limits from 16 and 8 to 4 and
	2.  Move test_false if inside loop.  Fix logic for computing result
	stored to vd.

	sim/testsuite/sim/aarch64
	* bit.s: New.
2017-02-14 14:35:57 -08:00
Jim Wilson
e8f42b5e36 Add ldn/stn single support, fix ldnr support.
sim/aarch64/
	* simulator.c: (LDn_STn_SINGLE_LANE_AND_SIZE): New.
	(do_vec_LDn_single, do_vec_STn_single): New.
	(do_vec_LDnR): Add and set new nregs var.  Replace switch on nregs with
	loop over nregs using new var n.  Add n times size to address in loop.
	Add n to vd in loop.
	(do_vec_load_store): Add comment for instruction bit 24.  New var
	single to hold instruction bit 24.  Add new code to use single.  Move
	ldnr support inside single if statements.  Fix ldnr register counts
	inside post if statement.  Change HALT_NYI calls to HALT_UNALLOC.

	sim/testsuite/sim/aarch64/
	* ldn_single.s: New.
	* ldnr.s: New.
	* stn_single.s: New.
2017-02-14 14:31:03 -08:00
Jim Wilson
fbf32f638c Add support for cmtst.
sim/aarch64/
	* simulator.c (do_vec_compare): Add case 0x23 for CMTST.

	sim/testsuite/sim/aarch64/
	* cmtst.s: New.
2017-01-23 17:26:53 -08:00
Jim Wilson
05b3d79d26 Fixes for addv and xtn2 instructions.
sim/aarch64/
	* simulator.c (do_vec_ADDV): Call aarch64_set_vec_u64 instead of
	aarch64_set_reg_u64.  In case 2, call HALT_UNALLOC if not full.  In
	case 3, call HALT_UNALLOC unconditionally.
	(do_vec_XTN): Delete shifts.  In case 2, change index from i + 4 to
	i + 2.  Delete if on bias, change index to i + bias * X.

	sim/testsuite/sim/aarch64/
	* addv.s: New.
	* xtn.s: New.
2017-01-17 16:11:09 -08:00
Jim Wilson
a4fb5981b7 Fix problems with the implementation of the uzp1 and uzp2 instructions.
sim/aarch64/
	* simulator.c (do_vec_UZP): Rewrite.
	sim/testsuite/sim/aarch64/
	* uzp.s: New.
2017-01-09 15:44:57 -08:00
Jim Wilson
c0386d4d54 Five fixes, for fcsel, fcvtz, fminnm, mls, and non-widening mul.
sim/aarch64/
	* cpustate.c: Include math.h.
	(aarch64_set_FP_float): Use signbit to check for signed zero.
	(aarch64_set_FP_double): Likewise.
	* simulator.c (do_vec_MOV_immediate, case 0x8): Add missing break.
	(do_vec_mul): In all DO_VEC_WIDENING_MUL calls, make second and fourth
	args same size as third arg.
	(fmaxnm): Use isnan instead of fpclassify.
	(fminnm, dmaxnm, dminnm): Likewise.
	(do_vec_MLS): Reverse order of subtraction operands.
	(dexSimpleFPCondSelect): Call aarch64_get_FP_double or
	aarch64_get_FP_float to get source register contents.
	(UINT_MIN, ULONG_MIN, FLOAT_UINT_MAX, FLOAT_UINT_MIN,
	DOUBLE_UINT_MAX, DOUBLE_UINT_MIN, FLOAT_ULONG_MAX, FLOAT_ULONG_MIN,
	DOUBLE_ULONG_MAX, DOUBLE_ULONG_MIN): New.
	(do_fcvtzu): Use ULONG instead of LONG, and UINT instead of INT in
	raise_exception calls.

	sim/testsuite/sim/aarch64/
	* fcsel.s: New.
	* fcvtz.s: New.
	* fminnm.s: New.
	* mls.s: New.
	* mul.s: New.
2017-01-04 16:07:50 -08:00
Joel Brobecker
61baf725ec update copyright year range in GDB files
This applies the second part of GDB's End of Year Procedure, which
updates the copyright year range in all of GDB's files.

gdb/ChangeLog:

        Update copyright year range in all GDB files.
2017-01-01 10:52:34 +04:00
Jim Wilson
87903eafb0 Fix bugs with float compare and Inf operands.
sim/aarch64/
	* simulator.c (set_flags_for_float_compare): Add code to handle Inf.
	Add comment to document NaN issue.
	(set_flags_for_double_compare): Likewise.

	sim/testsuite/sim/aarch64/
	* fcmp.s: New.
2016-12-21 12:33:12 -08:00
Jim Wilson
963201cf5d Fix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes.
sim/aarch64
	* simulator.c (NEG, POS): Move before set_flags_for_add64.
	(set_flags_for_add64): Replace with a modified copy of
	set_flags_for_sub64.

	sim/testsuite/sim/aarch64
	* testutils.inc (pass): Move .Lpass to start.
	(fail): Move .Lfail to start.  Return 1 instead of 0.
	(start): Moved .Lpass and .Lfail to here.
	* adds.s: New.
	* fstur.s: New.
	* tbnz.s: New.
2016-12-13 08:44:31 -08:00
Mike Frysinger
22be3fbeac sim: drop --enable-sim-cflags option
No other sub directory provides such a configuration option, so
drop it from the sim dir as well.  This cleans up a good bit of
code in the process.

If people want to use custom flags for just the sim, they can
still run configure+make by hand in the sim subdir and use the
normal CFLAGS settings.
2016-01-10 02:54:59 -05:00
Joel Brobecker
6847703472 Change copyright owner to FSF in sim/testsuite/sim/mips/hilo-hazard-4.s
sim/testsuite/sim/mips/ChangeLog:

        * hilo-hazard-4.s: Change copyright ownder to FSF.
2016-01-06 09:41:15 +04:00
Nick Clifton
296ebfbb91 Fix the execution of the MSP430 simulator testsuite.
ld	* emulparams/msp430elf.sh (RAM_START): Move to 0x500 - above the
	MSP430 hardware multiply address range.
	* scripttempl/elf32msp430.sc (__romdatastart): Define.
	(__romdatacopysize): Define.
	* scripttempl/elf32msp430_3.sc: Likewise.

tests	* testutils.inc (__pass): Use the LMA addresses of the _passmsg
	symbol.
	(__fail): Likewise.
2016-01-05 16:43:58 +00:00
Mike Frysinger
8d7d784e23 sim: parse_args: polish getopt error message
The cris sim hit a few failures after the recent getopt logic, and the
expected output showed a few ways we can improve things to better match
other utils.
2016-01-04 05:08:26 -05:00
Mike Frysinger
1ac72f0659 sim: convert to bfd_endian
Rather than re-invent endian defines, as well as maintain our own list
of OS & arch-specific includes, punt all that logic in favor of the bfd
ones already set up and maintained elsewhere.  We already rely on the
bfd library, so leveraging the endian aspect should be fine.
2016-01-03 00:18:07 -05:00
Joel Brobecker
618f726fcb GDB copyright headers update after running GDB's copyright.py script.
gdb/ChangeLog:

        Update year range in copyright notice of all files.
2016-01-01 08:43:22 +04:00
Mike Frysinger
34cf511206 sim: cris: migrate from WITH_DEVICES to WITH_HW
The cris port was using the device framework to handle two addresses when
the --cris-900000xx flag was specified.  That can be implemented using the
newer hardware framework instead which allows us to drop the device logic
entirely, as well as delete the tconfig.h file.  Basically we create a new
cris_900000xx device model and move the read logic out of devices.c and
into that.  The rest of the devices logic was callback to the hardware
framework already.
2015-12-25 06:10:03 -05:00
Mike Frysinger
d4a587a4ed sim: cris: set up sane default path to rvdummy
Much like we autodetect the path to the run program when there is none
set explicitly, do the same for the rvdummy program.  Otherwise the
default make check fails to execute the helper properly.
2015-12-25 05:51:46 -05:00
Mike Frysinger
269362117d sim: make LMA loading the default for all targets
Most targets already default to loading code via their LMA, but for
a few, this means the default changes from loading VMA to LMA.  It's
better to have the different targets be consistent, and allows some
code clean up.
2015-12-24 21:50:17 -05:00
Nick Clifton
2e8cf49e13 Add an AArch64 simulator to GDB.
sim	* configure.tgt: Add aarch64 entry.
	* configure: Regenerate.
	* sim/aarch64/configure.ac: New configure template.
	* sim/aarch64/aclocal.m4: Generate.
	* sim/aarch64/config.in: Generate.
	* sim/aarch64/configure: Generate.
	* sim/aarch64/cpustate.c: New file - functions for accessing
	AArch64 registers.
	* sim/aarch64/cpustate.h: New header.
	* sim/aarch64/decode.h: New header.
	* sim/aarch64/interp.c: New file - interface between GDB and
	simulator.
	* sim/aarch64/Makefile.in: New makefile template.
	* sim/aarch64/memory.c: New file - functions for simulating
	aarch64 memory accesses.
	* sim/aarch64/memory.h: New header.
	* sim/aarch64/sim-main.h: New header.
	* sim/aarch64/simulator.c: New file - aarch64 simulator
	functions.
	* sim/aarch64/simulator.h: New header.

include/gdb * sim-aarch64.h: New file.

sim/test * configure: Regenerate.
	* sim/aarch64: New directory.
2015-11-24 08:47:59 +00:00
Mike Frysinger
5809534fe1 sim: mcore: add a fail testcase 2015-11-15 07:55:48 -05:00
Mike Frysinger
1bd1b71421 sim: m32c: add a basic testsuite 2015-11-15 00:56:09 -05:00
Mike Frysinger
9bea4d16a6 sim: testsuite: support basic vars in flags
Sometimes in tests, we need supplemental files like linker scripts or
board helper files.  There's no way to set those flags in the tests
currently and relative paths don't work (breaks out of tree builds).

Update the main option parser to replace some strings on the fly.  Now
tests can do things like:

Long term we'll want to switch the framework to use the dejagnu helpers
like dg-xxx that gcc & gdb utilize.  But that'll require more rework.
2015-11-15 00:43:48 -05:00
Mike Frysinger
1057567ea7 sim: m32c: move test code to testsuite
Various target code belongs in the testsuite/ subdir, so move the m32c
code to match all the other targets.
2015-11-10 00:19:49 -05:00
James Bowman
8173c2a3c4 sim: ft32: test coverage for link parameters and PM write port
Adds test coverage for recent features.
2015-10-12 20:23:26 -04:00
Mike Frysinger
3f946aa825 sim: bfin: handle negative left saturated shifts as ashifts [BZ #18407]
When handling left saturated ashifts with negative immediates, they
should be treated as right ashifts.  This matches hardware behavior.

Reported-by: Igor Rayak <igorr@gitatechnologies.com>
2015-10-11 03:42:09 -04:00
Andrew Bennett
8e394ffc7a [PATCH] Add micromips support to the MIPS simulator
2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 	      Ali Lown  <ali.lown@imgtec.com>

	sim/common/
	* sim-bits.h (EXTEND6): New macro.
	(EXTEND12): New macro.
	(EXTEND25): New macro.

	sim/mips/
	* Makefile.in (tmp-micromips): New rule.
	(tmp-mach-multi): Add support for micromips.
	* configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
	that works for both mips64 and micromips64.
	(mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
	micromips32.
	Add build support for micromips.
	* dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
	do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
	do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
	do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
	do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
	do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
	do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
	do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
	Refactored instruction code to use these functions.
	* dsp2.igen: Refactored instruction code to use the new functions.
	* interp.c (decode_coproc): Refactored to work with any instruction
	encoding.
	(isa_mode): New variable
	(RSVD_INSTRUCTION): Changed to 0x00000039.
	* m16.igen (BREAK16): Refactored instruction to use do_break16.
	(JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
	* micromips.dc: New file.
	* micromips.igen: New file.
	* micromips16.dc: New file.
	* micromipsdsp.igen: New file.
	* micromipsrun.c: New file.
	* mips.igen (do_swc1): Changed to work with any instruction encoding.
	(do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
	do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo
	do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu
	do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu
	do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub
	do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo
	do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc, do_scd
	do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu, do_tgeu, do_tlt
	do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt, do_add_fmt
	do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1, do_cvt_d_fmt
	do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl, do_cvt_s_pu
	do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt, do_luxc1_32
	do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b, do_mov_fmt, do_movtf
	do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt, do_mtc1b, do_mul_fmt
	do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps, do_plu_ps, do_pul_ps
	do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt, do_prefx, do_sdc1
	do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt, do_swc1, do_swxc1
	do_trunc_fmt): New functions, refactored from existing instructions.
	Refactored instruction code to use these functions.
	(RSVD): Changed to use new reserved instruction.
	(loadstore_ea, not_word_value, unpredictable, check_mt_hilo, check_mf_hilo,
	check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32, do_sdc1, do_suxc1_32,
	check_fmt_p, check_fpu, do_load_double, do_store_double):  Added micromips32
	and micromips64 models.
	Added include for micromips.igen and micromipsdsp.igen
	Add micromips32 and micromips64 models.
	(DecodeCoproc): Updated to use new macro definition.
	* mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
	do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
	do_seb, do_seh do_rdhwr, do_wsbh): New functions.
	Refactored instruction code to use these functions.
	* sim-main.h (CP0_operation): New enum.
	(DecodeCoproc): Updated macro.
	(IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
	MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16, MICROMIPS_DELAYSLOT_SIZE_32,
	ISA_MODE_MIPS32 and ISA_MODE_MICROMIPS): New defines.
	(sim_state): Add isa_mode field.

	sim/testsuite/sim/mips/
       * basic.exp (run_micromips_test, run_sim_tests): New functions
	Add support for micromips tests.
	* hilo-hazard-4.s: New file.
	* testutils.inc (_dowrite): Changed reserved instruction encoding.
	(writemsg): Moved the la and li instructions before the data they are
	assigned to, which prevents a bug where MIPS32 relocations are used instead
	of micromips relocations when building for micromips.
2015-09-25 15:52:18 +01:00
H.J. Lu
72f4393d8c Remove leading/trailing white spaces in ChangeLog 2015-07-24 04:16:47 -07:00
Hans-Peter Nilsson
a9d9677441 Do unset_currtarget_info ldscript for all simulator testsuites.
sim/testsuite:
	* sim-defs.exp (sim_init): Unset target ldscript here.

sim/testsuite/sim/mips:
	* basic.exp: Don't unset target ldscript here.
2015-04-13 01:56:04 +02:00
Mike Frysinger
20cc975360 sim: moxie: fix running after nrun conversion
The nrun conversion was slightly incorrect in how it stopped when an
exception occurred.  We still set cpu.asregs.exception, but nothing
was checking it anymore.  Convert all of that to sim_engine_halt.

To keep things from regressing again, add a basic testsuite too.
2015-04-05 04:37:44 -04:00
Mike Frysinger
024305f7f2 sim: mn10300: add a basic testsuite 2015-04-05 03:52:08 -04:00
Mike Frysinger
aad84fa6ae sim: m68hc11: add a basic testsuite 2015-04-05 03:17:44 -04:00
Mike Frysinger
eed64ce675 sim: iq2000: add a basic testsuite 2015-04-05 02:28:44 -04:00
Mike Frysinger
e56dbbb92f sim: lm32: add a basic testsuite 2015-04-05 01:58:00 -04:00
Mike Frysinger
541ebcee67 sim: d10v: convert to nrun
A lot of cpu state is stored in global variables, as is memory handling.
The sim_size support needs unwinding at some point.  But at least this
is an improvement on the status quo.
2015-03-30 02:20:23 -04:00
Mike Frysinger
e8713c0f02 sim: d10v: link in missing testsuite
Looks like historical restructuring in this dir lost the d10v-elf subdir
and no one noticed in the meantime.  Re-add it to the testsuite.

There are some failures, but better some tests get run than none at all.
2015-03-30 01:06:57 -04:00
Mike Frysinger
4daf7a7c3a sim: cr16: add _start symbol to tests [BZ #12385]
The current cr16 testsuite sets up _START, but the linker looks for the
_start symbol.  Add the latter as an alias to the former.
2015-03-29 21:02:03 -04:00
Mike Frysinger
191ec03314 sim: microblaze: start a testsuite
Since the sim doesn't have any debug support in it, we can only exit
cleanly.  But this is still better than nothing.

Change the default microblaze sim to not dump the debug load output
when running.  No other does this, and it breaks the testsuite.
2015-03-29 16:45:49 -04:00
Mike Frysinger
744b9a190b sim; testsuite: allow tests to set no output
If a test doesn't write anything at all to stdout, the current test
framework can't support that.  Even if you put a blank output line:
	# output:
the setup happily clobbers that with a default pass/fail string.

Tweak the parsing logic so we only set the output to pass/fail when
the test has no output marker.
2015-03-29 16:41:59 -04:00
Mike Frysinger
6dae8a88bf sim: testsuite: make subdir unconditional
Since the testsuite subdir has to handle dynamic arch values already,
there's no real value in requiring arches to opt in to it.  Most have
a testsuite now anyways, and we're requiring it in the future.
2015-03-29 11:51:13 -04:00
Mike Frysinger
36cb69e0ed sim: mcore: add a basic testsuite 2015-03-29 04:14:27 -04:00
Mike Frysinger
4f5cce88bf sim: avr: fix _start testsuite symbol
Make sure we use the symbol the linker expects by default, and we export
it so it can be found.
2015-03-29 04:14:27 -04:00
Mike Frysinger
eca5fe422e sim: avr: start a basic testsuite
Just enough to know the sim isn't totally broken.
2015-03-28 04:28:46 -04:00
James Bowman
f46e4eb78b sim: ft32: new port
FT32 is a new high performance 32-bit RISC core developed by FTDI for
embedded applications.
2015-03-28 02:12:33 -04:00
Joel Brobecker
32d0add0a6 Update year range in copyright notice of all files owned by the GDB project.
gdb/ChangeLog:

        Update year range in copyright notice of all files.
2015-01-01 13:32:14 +04:00
Mike Frysinger
f32d1b7f58 sim: msp430: start a test framework
The current sim lacks any sort of tests.  Start a basic framework and
add a simple one to test the add insn.
2014-03-10 23:59:59 -04:00
Mike Frysinger
1a8a700e3a sim: convert old style prototypes
Most of these prototypes have been killed off, but we have a few left
in the sim tree.  Clean them up so we can enable the -W flag for it.
2014-03-04 02:54:50 -05:00
Joel Brobecker
ecd75fc8ee Update Copyright year range in all files maintained by GDB. 2014-01-01 07:54:24 +04:00
Mike Frysinger
daff015bcd sim: bfin: tests: make run-tests.sh executable
I meant for this script to be +x, but missed when doing the initial CVS
commit.  It wasn't possible to fix w/CVS, but it is w/git, so do it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

2012-12-03  Mike Frysinger  <vapier@gentoo.org>

	* run-tests.sh: Add +x file mode.
2013-12-07 02:03:33 -05:00
Alan Modra
bf3d9781ec Regenerate sim configure files to pick up support for powerpc64le in
libtool.m4.
2013-09-23 00:32:27 +00:00
Mike Frysinger
19b7bc4bd8 sim: bfin: run-tests.sh: fix typo in usage exit 2013-06-24 01:59:10 +00:00
Mike Frysinger
7f5884f775 sim: bfin: se_all32bitopcodes: skip debug insns under the sim
Since the sim has a few fake debug insns that the hardware does not, we
need to check for those before attempting to run them.  Otherwise we'll
randomly trigger the sim debug asserts/aborts/halts insns.  On the
hardware, these are proper invalid insns, and the table catches that.
2013-06-24 01:52:33 +00:00
Mike Frysinger
531d5282c0 sim: bfin: speed up all insn testcases slightly
The main body of the "all insn" test is executed once per tested insn, and
we test millions of insns here.  Any shrinkage we can do in this loop will
speed things up nicely (since it's multiplied per tested insn).

To that end, simplify the end-of-table test into one less insn, and omit
the SSYNC when we build for the sim.  When we build to run on the hardware,
this insn matters, but the sim doesn't have write store buffers in the chip
that might get in the way (memory writes are atomic).
2013-06-24 01:44:55 +00:00
Mike Frysinger
88924e5fa2 sim: bfin: trim trailing whitespace 2013-06-23 06:23:54 +00:00
Mike Frysinger
b6857b1e6c sim: bfin: tweak run-tests for parallel usage 2013-06-17 04:58:56 +00:00
Mike Frysinger
9fb7353ff0 sim: bfin: add helpful info for generating test tables 2013-06-17 04:47:26 +00:00
Mike Frysinger
7a56db5f46 sim: bfin: drop RET[ENI] setup
Since these insns run in usermode, there should be no need to setup
RET[ENI] to safe values.  They won't be dereferenced, and any insn
that returns via them are valid only in supervisor mode.  Since this
is in the main exception code path, saving any insn at all is good
as it gets multiplied quickly (as in O(n^2) times).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-17 04:45:54 +00:00