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114 Commits

Author SHA1 Message Date
Andrew Cagney
7ef2d4e783 * Makefile.in (simops.h, table.c): Delete targets. 
(tmp-gencode, gencode.o, gencode): Delete targets.
(simops.h): New file.
($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h.
* gencode.c: Delete file.
 2001-12-02 19:27:29 +00:00
J.T. Conklin
d4424adaef * Makefile.in (simops.o): Add simops.h to dependency list. 2001-04-15 19:57:10 +00:00
Andrew Cagney
1e6cd1593b Link with libintl, needed by libopcodes. 2001-03-14 21:51:31 +00:00
Jonathan Larmour
42acc51e30 * Makefile.in (gencode): Link with libopcodes in build tree rather 
than building source files from there.
 2001-02-01 06:56:29 +00:00
Nick Clifton
896ad91016 Remove illegal instruciton pattern, since it is the same as the breakpoint 
pattern.
 2000-05-30 18:36:57 +00:00
Andrew Cagney
eb2d80b469 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
Frank Ch. Eigler
b9791fcdd6 * merge from internal tree 
2000-04-14  Gary Thomas  <gthomas@redhat.com>

	* v850.igen: Define 'br *' as illegal since this is the only
	way to provide a breakpoint on some v850 family processors.
 2000-05-08 23:07:39 +00:00
Frank Ch. Eigler
de616bc738 * more compatibility with v850 hardware 
2000-03-24  Frank Ch. Eigler  <fche@redhat.com>

	* v850.igen (ilgop): New insn pattern for four-byte breakpoints.
 2000-03-25 00:17:21 +00:00
Stan Shebs
d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Stan Shebs
cd0fc7c3eb import gdb-1999-05-10 1999-05-11 13:35:55 +00:00
Stan Shebs
c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs
071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Andrew Cagney
a6a5d34927 Fix --enable-build-warnings=-Werror failures. 
v850/simops.c, d10v/simops.c, v850/Makefile.in, d10v/Makefile.in:
Include targ-vals.h instead of syscall.h. Replace SYS_* with
TARGET_SYS_*.  Add dependency.
z8k/support.c: Include <errno.h>
v850/simops.c: Replace long with portable signed32.
mips/interp.c: Make sim_monitor global - needed by sky.
 1998-11-25 09:58:04 +00:00
Tom Tromey
5da9ce07eb * configure: Regenerated to track ../common/aclocal.m4 changes. 
* config.in: Ditto.
	* acconfig.h: New file.
	* configure.in: Reverted change of Apr 24; use sinclude again.
 1998-04-26 22:03:55 +00:00
Tom Tromey
ead653821c * configure: Regenerated to track ../common/aclocal.m4 changes. 
* config.in: Ditto.
	* configure.in: Don't call sinclude.
 1998-04-24 22:02:29 +00:00
Andrew Cagney
e625962d8e Delete function sim_stop. 1998-03-10 05:05:44 +00:00
Andrew Cagney
0e701ac37b Add generic sim-info.c:sim_info() function using module mechanism. 
Clean up compile probs in mips/vr5400.
 1998-02-28 02:51:06 +00:00
Andrew Cagney
fbb8b6b9ab For sim_fetch_register / sim_store_register: Add LENGTH parameter, 
return actual size of register, 0 if not applicable, -1 of legacy
implementation.
 1998-02-17 04:06:38 +00:00
Andrew Cagney
412c4e940e Add config support for the size of the target address and OF cell. 1998-01-31 14:07:23 +00:00
Andrew Cagney
9ec6741b17 igen: Fix SMP simulator generator support. 
Use the bfd-processor name in the sim-engine switch.
	Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
	Update
mips:	Fill in bfd-processor field of model records so that
	they match ../bfd/archures.
 1998-01-31 06:23:41 +00:00
Doug Evans
462cfbc4eb * aclocal.m4: Recognize --enable-maintainer-mode. 
*/configure: Regenerated.
 1998-01-20 06:37:00 +00:00
Nick Clifton
61c550e0bd Renamed v850eq -> v850ea 1997-12-12 19:12:11 +00:00
Nick Clifton
4098c12318 Reverrt breakpoint back to its old value. 1997-12-05 17:30:44 +00:00
Doug Evans
6e51f990a2 Regenerate configure files. 1997-12-04 17:26:06 +00:00
Nick Clifton
b65b4d8b06 Fixed sanitization, 
Changed pattern for break insn.
 1997-12-04 01:29:25 +00:00
Doug Evans
486740ce01 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). 1997-11-18 23:40:40 +00:00
Andrew Cagney
89d0973831 Add support for 16 byte quantities to sim-endian macro H2T. 
Add model-filter field to option, include, model anf function igen records
 1997-10-28 07:10:36 +00:00
Felix Lee
b28ad90b4d * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and 
SIM_ENGINE_RESTART_HOOK.
 1997-09-26 19:24:45 +00:00
Andrew Cagney
7a3fb4e6ea * config/v850/tm-v850.h (BREAKPOINT): Use 1 word DIVH insn with 
RRRRR=0 for simulator breakpoint. Previous breakpoint insn was two
words.
 1997-09-25 07:01:21 +00:00
Andrew Cagney
92f91d1ff0 Remove need to update <targ>/Makefile.in when adding optional options 
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
 1997-09-23 01:25:26 +00:00
Andrew Cagney
8d332f9c1a Enable --alignment option, stop sim-options.c hardwiring the alignment. 1997-09-22 09:34:28 +00:00
Andrew Cagney
794e9ac96a Simplify logic behind the generic configuration option --enable-sim-alignment. 1997-09-22 02:49:57 +00:00
Andrew Cagney
b45caf050c Add support for --enable-sim-alignment to simulator common aclocal.m4 
Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
 1997-09-22 00:24:46 +00:00
Andrew Cagney
a276b6f057 Clean up tracing for Bcond & jmp insns. 
Fix computation of disp16 and disp22.
Clean up tracing of sld* insns.
 1997-09-19 06:39:21 +00:00
Andrew Cagney
bd4c35cc6d Fix cmov immed. 1997-09-19 02:20:02 +00:00
Andrew Cagney
60fe0e06a8 Fix cmov insn. 1997-09-19 00:50:19 +00:00
Felix Lee
3e906c081a sanitization fixes. typoes, missing fences, "start" instead of "end", etc. 1997-09-18 06:03:52 +00:00
Andrew Cagney
a72f8fb439 Clean up more tracing. 
FIX interrupt delivery - was zapping PSW before it had been saved.
FIX interrupt return, was one instruction out.
 1997-09-17 08:14:23 +00:00
Andrew Cagney
6aead89a5f Fix tracing for: "ctret", "bsw", "hsw" 
Fix bugs in: "bsh", "callt", "stsr".
 1997-09-17 05:31:00 +00:00
Andrew Cagney
fb1fd47514 Smooth some of ALU tracing's rough edges. 
Fix switch insn.
 1997-09-16 14:00:15 +00:00
Andrew Cagney
3f33acd039 Use trace_one_insn in trace functions. Buffer up trace data so that 
it is displayed in a single block.
 1997-09-16 07:03:41 +00:00
Andrew Cagney
c7db488f71 Restrict ldsr (load system register) to modifying just non-reserved PSW bits. 
For v850eq, include PSW[US] in bits that can be modified.
 1997-09-16 04:49:24 +00:00
Andrew Cagney
721478d51b Add v850e version of breakpoint instruction. 1997-09-16 02:15:55 +00:00
Jim Wilson
5262de2167 * simops.c (Multiply64): Don't store into register zero. 1997-09-16 01:45:23 +00:00
Andrew Cagney
4dda50b052 For instructions moved into v850.igen was computing (wrong) NIA when 
this wasn't needed.
 1997-09-15 23:09:26 +00:00
Andrew Cagney
bda6163995 Fix sanitization for v850 V v850e V v850eq 1997-09-15 14:42:51 +00:00
Andrew Cagney
658303f7d4 For v850eq start up with US bit set. 
Let sim_analyze_program determine the architecture.
Fix various sanitizations.
 1997-09-15 08:18:20 +00:00
Andrew Cagney
410230cf6d Check reserved bits before executing instructions. 
Make v850[eq] the the default simulator.
Report illegal instructions.
Include v850e instructions in v850eq.
 1997-09-12 05:56:38 +00:00
Andrew Cagney
93e7a1b5b7 Add profiling support to v850*. 1997-09-12 02:44:03 +00:00
Andrew Cagney
cad7297e80 o Wordwrap usage messages from sim-options 
o	Clarify how to use alias options
o	use in sim-watch (better usage message)
o	Don't pass something on the stack into the
	watch-point interrupt hander.
 1997-09-10 22:47:12 +00:00