pseudo registers are either from raw registers or memory, so
gdbarch methods pseudo_register_read and pseudo_register_read_value
should have regcache object which only have read methods. In other
words, we should disallow writing to regcache in these two gdbarch
methods. In order to apply this restriction, this patch adds a new
class readable_regcache, derived from reg_buffer, and it only has
raw_read and cooked_read methods. regcache is derived from
readable_regcache. This patch also passes readable_regcache instead of
regcache to gdbarch methods pseudo_register_read and
pseudo_register_read_value.
This patch moves raw_read* and cooked_read* methods to readable_regcache,
which is straightforward. One thing not straightforward is that I split
regcache::xfer_part to readable_regcache::read_part and regcache::write_part,
because readable_regcache can only have methods to read.
readable_regcache is an abstract base class, and it has a pure virtual
function raw_update, because I don't want readable_regcache know where
these raw registers are from. They can be from either the target
(readwrite regcache) or the regcache itself (readonly regcache).
gdb:
2018-02-21 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_pseudo_register_read_value): Change
parameter type to 'readable_regcache *'.
* amd64-tdep.c (amd64_pseudo_register_read_value): Likewise.
* arm-tdep.c (arm_neon_quad_read): Likewise.
(arm_pseudo_read): Likewise.
* avr-tdep.c (avr_pseudo_register_read): Likewise.
* bfin-tdep.c (bfin_pseudo_register_read): Likewise.
* frv-tdep.c (frv_pseudo_register_read): Likewise.
* gdbarch.c: Re-generated.
* gdbarch.h: Re-generated.
* gdbarch.sh (pseudo_register_read): Change parameter type to
'readable_regcache *'.
(pseudo_register_read_value): Likewise.
* h8300-tdep.c (pseudo_from_raw_register): Likewise.
(h8300_pseudo_register_read): Likewise.
* hppa-tdep.c (hppa_pseudo_register_read): Likewise.
* i386-tdep.c (i386_mmx_regnum_to_fp_regnum): Likewise.
(i386_pseudo_register_read_into_value): Likewise.
(i386_pseudo_register_read_value): Likewise.
* i386-tdep.h (i386_pseudo_register_read_into_value): Update
declaration.
* ia64-tdep.c (ia64_pseudo_register_read): Likewise.
* m32c-tdep.c (m32c_raw_read): Likewise.
(m32c_read_flg): Likewise.
(m32c_banked_register): Likewise.
(m32c_banked_read): Likewise.
(m32c_sb_read): Likewise.
(m32c_part_read): Likewise.
(m32c_cat_read): Likewise.
(m32c_r3r2r1r0_read): Likewise.
(m32c_pseudo_register_read): Likewise.
* m68hc11-tdep.c (m68hc11_pseudo_register_read): Likewise.
* mep-tdep.c (mep_pseudo_cr32_read): Likewise.
(mep_pseudo_cr64_read): Likewise.
(mep_pseudo_register_read): Likewise.
* mips-tdep.c (mips_pseudo_register_read): Likewise.
* msp430-tdep.c (msp430_pseudo_register_read): Likewise.
* nds32-tdep.c (nds32_pseudo_register_read): Likewise.
* regcache.c (regcache::raw_read): Move it to readable_regcache.
(regcache::cooked_read): Likewise.
(regcache::cooked_read_value): Likewise.
(regcache_cooked_read_signed):
(regcache::cooked_read): Likewise.
* regcache.h (readable_regcache): New class.
(regcache): Inherit readable_regcache. Move some methods to
readable_regcache.
* rl78-tdep.c (rl78_pseudo_register_read): Change
parameter type to 'readable_regcache *'.
* rs6000-tdep.c (do_regcache_raw_read): Remove.
(e500_pseudo_register_read): Change parameter type to
'readable_regcache *'.
(dfp_pseudo_register_read): Likewise.
(vsx_pseudo_register_read): Likewise.
(efpr_pseudo_register_read): Likewise.
* s390-tdep.c (s390_pseudo_register_read): Likewise.
* sh-tdep.c (sh_pseudo_register_read): Likewise.
* sh64-tdep.c (pseudo_register_read_portions): Likewise.
(sh64_pseudo_register_read): Likewise.
* sparc-tdep.c (sparc32_pseudo_register_read): Likewise.
* sparc64-tdep.c (sparc64_pseudo_register_read): Likewise.
* spu-tdep.c (spu_pseudo_register_read_spu): Likewise.
(spu_pseudo_register_read): Likewise.
* xtensa-tdep.c (xtensa_register_read_masked): Likewise.
(xtensa_pseudo_register_read): Likewise.
This patch adds a new class reg_buffer, and regcache inherits it. Class
reg_buffer is a very simple class, which has the buffer for register
contents and status only. It doesn't have any methods to set contents and
status, and it is expected that its children classes can inherit it and
add different access methods.
Another reason I keep class reg_buffer so simple is that I think
reg_buffer can be even reused in other classes which need to record the
registers contents and status, like frame cache for example.
gdb:
2018-02-21 Yao Qi <yao.qi@linaro.org>
* regcache.c (regcache::regcache): Call reg_buffer ctor.
(regcache::arch): Move it to reg_buffer::arch.
(regcache::register_buffer): Likewise.
(regcache::assert_regnum): Likewise.
(regcache::num_raw_registers): Likewise.
* regcache.h (reg_buffer): New class.
(regcache): Inherit reg_buffer.
Add a pair of MIPS16 branch tests to verify correct R_MIPS16_PC16_S1
relocation generation for cross-section references in a single source.
This complements commit c9775dde32 ("MIPS16: Add R_MIPS16_PC16_S1
branch relocation support").
gas/
* testsuite/gas/mips/mips16-branch-reloc-4.d: New test.
* testsuite/gas/mips/mips16-branch-reloc-5.d: New test.
* testsuite/gas/mips/mips16-branch-reloc-4.s: New test source.
* testsuite/gas/mips/mips16-branch-reloc-5.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
The `M' and `m' MIPS16 operand codes are functionally the same, denoting
a 7-bit register list that is encoded the same way for both SAVE and
RESTORE. Use `m' for both instructions then, making `M' available for a
different use.
opcodes/
* mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
(mips16_opcodes): Replace `M' with `m' for "restore".
include/
* opcode/mips.h: Remove `M' operand code.
Literal movement code may grow auto litpool so big that it won't be
possible to jump around it. Limit the size of auto litpools by 1/2 of
the jump range.
gas/
2018-02-20 Max Filippov <jcmvbkbc@gmail.com>
* config/tc-xtensa.c (struct litpool_frag): Add new field
literal_count.
(MAX_AUTO_POOL_LITERALS, MAX_EXPLICIT_POOL_LITERALS)
(MAX_POOL_LITERALS): New macro definitions.
(auto_litpool_limit): Initialize to 0.
(md_parse_option): Set auto_litpool_limit in the presence of
--auto-litpools option.
(xtensa_maybe_create_literal_pool_frag): Zero-initialize
literal_count field.
(xg_find_litpool): New function. Make sure that found literal
pool size is within the limit.
(xtensa_move_literals): Extract literal pool search code into
the new function.
* testsuite/gas/xtensa/all.exp: Add auto-litpools-2 test.
* testsuite/gas/xtensa/auto-litpools-2.d: New file.
* testsuite/gas/xtensa/auto-litpools-2.s: New file.
* testsuite/gas/xtensa/auto-litpools.d: Fix up changed
addresses.
* testsuite/gas/xtensa/auto-litpools.s: Change literal value so
that objdump doesn't get out of sync.
Fixes:
/home/emaisin/src/binutils-gdb/gdb/remote-sim.c:385:34: error: format string is not a string literal [-Werror,-Wformat-nonliteral]
vfprintf_filtered (gdb_stdout, format, args);
^~~~~~
/home/emaisin/src/binutils-gdb/gdb/remote-sim.c:394:34: error: format string is not a string literal [-Werror,-Wformat-nonliteral]
vfprintf_filtered (gdb_stdout, format, ap);
^~~~~~
/home/emaisin/src/binutils-gdb/gdb/remote-sim.c:402:34: error: format string is not a string literal [-Werror,-Wformat-nonliteral]
vfprintf_filtered (gdb_stderr, format, ap);
^~~~~~
/home/emaisin/src/binutils-gdb/gdb/remote-sim.c:413:11: error: format string is not a string literal [-Werror,-Wformat-nonliteral]
verror (format, args);
^~~~~~
4 errors generated.
gdb/ChangeLog:
* remote-sim.c (gdb_os_printf_filtered, gdb_os_vprintf_filtered,
gdb_os_evprintf_filtered, gdb_os_error): Add ATTRIBUTE_PRINTF.
As suggested in long ago in a galaxy far, far away [1], I tried
turning it on and it seems to work, as is evidenced by the Mesa
package in Debian/ia64. Please enable it with the following patch.
[1] https://sourceware.org/ml/binutils/2007-07/msg00241.html
bfd * elfnn-ia64.c (elf_backend_can_gc_sections): Enable.
In gdb.btrace/buffer-size.exp we explicitly ask for the BTS recording format.
This may lead to spurious fails on systems where PT is being used by some other
process at the same time.
Set both PT and BTS buffer sizes to 1 and check that whatever recording format
is used will use a 4KB buffer.
testsuite/
* gdb.btrace/buffer-size.exp: Do not force BTS.
Documentation for .arch_extension says it accepts the same architectural
extensions as those accepted by -mcpu. Given the name and the fact that
-march for obvious reason also accept the same extensions, I believe
it's worth mentioning that it accepts the same extensions as both
-march and -mcpu. This commit addresses that.
2018-02-20 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* doc/c-arm.texi (.arch_extension): Mention extensions it accepts are
also the same as -march.
Extend the documentation of 'info line' command to:
1. Make 'info line' with no argument more obvious, and make it clearer
what this does.
2. Cover what happens when a secod 'info line' with no argument is
issued.
3. Extend the example output for 'info line ...' to include
symbolic addresses.
gdb/doc/ChangeLog:
* gdb.texinfo (Machine Code): Additional information about "info
line" command.
Revert commit 58807c48a5 ("_bfd_mips_elf_final_link: Notify user about
wrong .reginfo size") now that the size of the `.reginfo' section has
been truly fixed in `_bfd_mips_elf_section_processing', meaning that the
offending condition can be asserted again.
bfd/
Revert
2018-01-12 Vlad Ivanov <vlad@ivanov.email>
* elfxx-mips.c (_bfd_mips_elf_final_link): Notify user when
.reginfo section has wrong size.
Use the SEC_FIXED_SIZE flag to actually fix the size of `.reginfo' and
`.MIPS.abiflags' sections in `_bfd_mips_elf_always_size_sections', as
originally intended, removing link failures such as:
ld: final link failed: Section has no contents
or:
ld: final link failed: Bad value
or:
ld: foo: .reginfo section size should be 24 bytes, actual size is 32
and assertion failures like:
ld: BFD (GNU Binutils) 2.30.51.20180131 assertion fail .../bfd/elfxx-mips.c:14322
in link scenarios involving a linker script that either creates an
output `.reginfo' or `.MIPS.abiflags' section from scratch or produces
either section from different sections. If such an output section's
size turns out to be incorrect according to the psABI, then the section
is either truncated or padded out to the correct size, as relevant.
This allows people to handle these sections in a link in an unusual way,
while still addressing the issue covered by commit 58807c48a5
("_bfd_mips_elf_final_link: Notify user about wrong .reginfo size").
The original arrangement, coming from an unindentified change made to
what was called `mips_elf_always_size_sections' back then, between
commit 02650bd0a9 ("This adds ABI flags to MIPS/ELF object files.")
and commit 252b5132c7 ("19990502 sourceware import"), also missing
from BFD ChangeLog files, assumed that the output section size is not
going to change after return from `bfd_elf_size_dynamic_sections', the
caller of that function, called in turn from `ldemul_before_allocation'
via `gld${EMULATION_NAME}_before_allocation' in ld/emultempl/elf32.em,
and ultimately from `lang_process'. This is because later on in
`lang_process' processing `lang_size_sections' is called , happily
recalculating the section size, and it has actually already been the
case at the time of commit 252b5132c7 ("19990502 sourceware import"),
so the assumption was clearly incorrect right from the beginning.
bfd/
* elfxx-mips.c (_bfd_mips_elf_always_size_sections): Set
SEC_FIXED_SIZE and SEC_HAS_CONTENTS flags for `.reginfo' and
`.MIPS.abiflags' sections.
(_bfd_mips_elf_final_link): Avoid reading beyond `.reginfo'
section's end.
ld/
* testsuite/ld-mips-elf/reginfo-0.d: New test.
* testsuite/ld-mips-elf/reginfo-0r.d: New test.
* testsuite/ld-mips-elf/reginfo-1.d: New test.
* testsuite/ld-mips-elf/reginfo-1r.d: New test.
* testsuite/ld-mips-elf/reginfo-2.d: New test.
* testsuite/ld-mips-elf/reginfo-2r.d: New test.
* testsuite/ld-mips-elf/mips-abiflags-0.d: New test.
* testsuite/ld-mips-elf/mips-abiflags-0r.d: New test.
* testsuite/ld-mips-elf/mips-abiflags-1.d: New test.
* testsuite/ld-mips-elf/mips-abiflags-1r.d: New test.
* testsuite/ld-mips-elf/mips-abiflags-2.d: New test.
* testsuite/ld-mips-elf/mips-abiflags-2r.d: New test.
* testsuite/ld-mips-elf/reginfo-0.ld: New test linker script.
* testsuite/ld-mips-elf/reginfo-1.ld: New test linker script.
* testsuite/ld-mips-elf/mips-abiflags-0.ld: New test linker
script.
* testsuite/ld-mips-elf/mips-abiflags-1.ld: New test linker
script.
* testsuite/ld-mips-elf/reginfo-1.s: New test source.
* testsuite/ld-mips-elf/reginfo-2.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Define a SEC_FIXED_SIZE section flag for target backends to use for
output sections whose size has been fixed in the psABI. The size of
such sections will not be changed anyhow by the generic linker and it is
up to the target backend to get their size right.
bfd/
* section.c (SEC_FIXED_SIZE): New macro.
* bfd-in2.h: Regenerate.
ld/
* ldlang.c (insert_pad): Do not change output section's size if
SEC_FIXED_SIZE is set in the flags.
(size_input_section): Likewise.
(lang_size_sections_1): Likewise.
(lang_reset_memory_regions): Likewise.
Remove the SEC_HAS_GOT_REF section flag no longer in use since commit
a252afa4cd ("Fix linking of PIC code on PA"),
<https://sourceware.org/ml/binutils/2003-08/msg00467.html>, to make the
bit position available for reuse.
bfd/
* section.c (SEC_HAS_GOT_REF): Remove macro.
* bfd-in2.h: Regenerate.
Bit 7 of BXNS is a fixed bit which distinguish it from BLXNS. Yet it is
not set in the disassembler entry mask. This commit fixes that.
2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
opcodes/
* arm-dis.c (thumb_opcodes): Fix BXNS mask.
Commit 325ba6fb34 excluded degenerate zero length PT_LOAD segments,
but that only fixed part of the problem, which was that the load
segment limits were not calculated properly.
PR 22845
* elf.c (IS_TBSS): Define.
(_bfd_elf_map_sections_to_segments): Use IS_TBSS.
(assign_file_positions_for_non_load_sections): Revert last change.
Properly calculate load segment limits to compare against relro limits.
ld-elf/ehdr_start fails with -z separate-code. Since there is no data
LOAD segment before code LOAD segment:
There are 2 program headers, starting at offset 64
Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
LOAD 0x200000 0x0000000000600000 0x0000000000600000 0x000010 0x000010 R E 0x200000
LOAD 0x400000 0x0000000000800000 0x0000000000800000 0x000008 0x000008 R 0x200000
Section to Segment mapping:
Segment Sections...
00 .text
01 .rodata
the program header isn't included in any LOAD segment. As the result,
reference to __ehdr_start is resolved to zero. Pass --build-id to ld
to add a data LOAD segment before code LOAD segment to put the program
header in the data LOAD segment.
PR ld/22845
* testsuite/ld-elf/ehdr_start.d: Pass --build-id to ld.
-z separate-code creates separate code LOAD segment, aligns it to the
maximum page size and places .plt section before .text section. But
ld-elf/eh4 passes -Ttext 0x400 to linker to place .text section at
address 0x400, which is impossible for linker to accomplish:
$ ld -shared -Ttext 0x400 -z separate-code -o x.so eh4.o
ld: section .eh_frame LMA [0000000000200000,000000000020006b] overlaps section .plt LMA [0000000000200000,000000000020001f]
Since ld-elf/eh4 also checks exact addresses, this patch passes
-z max-page-size=0x200000 -z noseparate-code to ld.
PR ld/22845
* ld-elf/eh4.d: Pass -z max-page-size=0x200000 -z noseparate-code
to ld.
Implement the '.nop SIZE[, CONTROL]' assembler directive, which emits
SIZE bytes filled with no-op instructions. SIZE is absolute expression.
The optional CONTROL byte controls how no-op instructions should be
generated. If the comma and @var{control} are omitted, CONTROL is
assumed to be zero.
For Intel 80386 and AMD x86-64 targets, CONTROL byte specifies the size
limit of a single no-op instruction. The valid values of CONTROL byte
are between 0 and 8 for 16-bit mode, between 0 and 10 for 32-bit mode,
between 0 and 11 for 64-bit mode. When 0 is used, the no-op size limit
is set to the maximum supported size.
2 new relax states, rs_space_nop and rs_fill_nop, are added to enum
_relax_state, which are similar to rs_space and rs_fill, respectively,
but they fill with no-op instructions, instead of a single byte. A
target backend must override the default md_generate_nops to generate
proper no-op instructions. Otherwise, an error of unimplemented .nop
directive will be issued whenever .nop directive is used.
* NEWS: Mention .nop directive.
* as.h (_relax_state): Add rs_space_nop and rs_fill_nop.
* read.c (potable): Add .nop.
(s_nop): New function.
* read.h (s_nop): New prototype.
* write.c (cvt_frag_to_fill): Handle rs_space_nop and
rs_fill_nop.
(md_generate_nops): New function.
(relax_segment): Likewise.
(write_contents): Use md_generate_nops for rs_fill_nop.
* config/tc-i386.c (alt64_11): New.
(alt64_patt): Likewise.
(md_convert_frag): Handle rs_space_nop.
(i386_output_nops): New function.
(i386_generate_nops): Likewise.
(i386_align_code): Call i386_output_nops.
* config/tc-i386.h (i386_generate_nops): New.
(md_generate_nops): Likewise.
* doc/as.texinfo: Document .nop directive.
* testsuite/gas/i386/i386.exp: Run .nop directive tests.
* testsuite/gas/i386/nop-1.d: New file.
* testsuite/gas/i386/nop-1.s: Likewise.
* testsuite/gas/i386/nop-2.d: Likewise.
* testsuite/gas/i386/nop-2.s: Likewise.
* testsuite/gas/i386/nop-3.d: Likewise.
* testsuite/gas/i386/nop-3.s: Likewise.
* testsuite/gas/i386/nop-4.d: Likewise.
* testsuite/gas/i386/nop-4.s: Likewise.
* testsuite/gas/i386/nop-5.d: Likewise.
* testsuite/gas/i386/nop-5.s: Likewise.
* testsuite/gas/i386/nop-6.d: Likewise.
* testsuite/gas/i386/nop-6.s: Likewise.
* testsuite/gas/i386/nop-bad-1.l: Likewise.
* testsuite/gas/i386/nop-bad-1.s: Likewise.
* testsuite/gas/i386/x86-64-nop-1.d: Likewise.
* testsuite/gas/i386/x86-64-nop-2.d: Likewise.
* testsuite/gas/i386/x86-64-nop-3.d: Likewise.
* testsuite/gas/i386/x86-64-nop-4.d: Likewise.
* testsuite/gas/i386/x86-64-nop-5.d: Likewise.
* testsuite/gas/i386/x86-64-nop-6.d: Likewise.
Fixes a failure triggered by -z separate-code. p_memsz is tested
rather than p_filesz for objcopy --only-keep-debug where p_filesz is
set to zero.
PR 22845
* elf.c (assign_file_positions_for_non_load_sections): Ignore
degenerate zero size PT_LOAD segments when finding one overlapping
the PT_GNU_RELRO segment.
"-z separate-code" generates different addresses. Update these tests
to accept any addresses.
* testsuite/ld-x86-64/bnd-ifunc-1.d: Updated.
* testsuite/ld-x86-64/ilp32-4.d: Likewise.
Add -z noseparate-code -z max-page-size=0x200000 since these tests
check for exact addresses and don't expect extra PT_LOAD segment. But
don't add them to nacl targets since they generate different addresses.
* testsuite/ld-x86-64/x86-64.exp: Add -z noseparate-code
-z max-page-size=0x200000, excluding NaCl target.
This patch adds a new class allocate_on_obstack, and let dwarf2_per_objfile
inherit it, so that dwarf2_per_objfile is automatically allocated on
obstack, and "delete dwarf2_per_objfile" doesn't de-allocate any space.
gdb:
2018-02-16 Yao Qi <yao.qi@linaro.org>
* block.c (block_namespace_info): Inherit allocate_on_obstack.
(block_initialize_namespace): Use new.
* dwarf2read.c (dwarf2_per_objfile): Inherit allocate_on_obstack.
(dwarf2_free_objfile): Use delete.
* gdbtypes.c (type_pair): Inherit allocate_on_obstack.
(copy_type_recursive): Use new.
* gdb_obstack.h (allocate_on_obstack): New.
