Commit Graph

13355 Commits

Author SHA1 Message Date
Alan Modra
82e66161e6 DT_TEXTREL vs IFUNC
If you should somehow link non-pic objects into a PIE or shared
library, resulting in an object with DT_TEXTREL (text relocations)
set, and your executable or shared library also contains GNU indirect
functions, then you're in trouble.  To apply dynamic relocations
ld.so will make the text segment writable.  On most systems this will
make the text segment non-executable, which will then result in a
segfault when ld.so tries to run ifunc resolvers when applying
relocations against ifuncs.

This patch teaches PowerPC ld to detect the situation, and warn.

	* elf64-ppc.c (struct ppc_link_hash_table): Add
	local_ifunc_resolver and maybe_local_ifunc_resolver.
	(ppc_build_one_stub): Set flags on emitting dynamic
	relocation to ifunc.
	(ppc64_elf_relocate_section): Likewise.
	(ppc64_elf_finish_dynamic_symbol): Likewise.
	(ppc64_elf_finish_dynamic_sections): Error on DT_TEXTREL with
	local dynamic relocs to ifuncs.
	* elf32-ppc.c (struct ppc_elf_link_hash_table): Add
	local_ifunc_resolver and maybe_local_ifunc_resolver.
	(ppc_elf_relocate_section): Set flag on emitting dynamic
	relocation to ifuncs.
	(ppc_elf_finish_dynamic_symbol): Likewise.
	(ppc_elf_finish_dynamic_sections): Error on DT_TEXTREL with local
	dynamic relocs to ifuncs.
2017-03-18 08:38:15 +10:30
GDB Administrator
b4fcfd3b4d Automatic date update in version.in 2017-03-17 00:00:34 +00:00
GDB Administrator
e189bfe660 Automatic date update in version.in 2017-03-16 00:00:45 +00:00
GDB Administrator
cc7e96c25d Automatic date update in version.in 2017-03-15 00:00:36 +00:00
GDB Administrator
9c7272f083 Automatic date update in version.in 2017-03-14 00:00:40 +00:00
Nick Clifton
f955cccff3 Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12.
PR binutils/21202
include	* elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to
	R_AARCH64_TLSDESC_LD64_LO12.
	(R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to
	R_AARCH64_TLSDESC_ADD_LO12_NC.

bfd	* reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to
	BFD_RELOC_AARCH64_TLSDESC_LD64_LO12.
	(BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to
	BFD_RELOC_AARCH64_TLSDESC_ADD_LO12.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc
	names.
	(IS_AARCH64_TLSDESC_RELOC): Likewise.
	(elfNN_aarch64_howto_table): Likewise.
	(aarch64_tls_transition_without_check): Likewise.
	(aarch64_reloc_got_type): Likewise.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_tls_relax): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

gas	* config/tc-aarch64.c (reloc_table): Rename
	BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to
	BFD_RELOC_AARCH64_TLSDESC_LD64_LO12.  Rname
	BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to
	BFD_RELOC_AARCH64_TLSDESC_ADD_LO12.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.
	* testsuite/gas/aarch64/tls.d: Update regexp.

ld	* testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 09:58:04 +00:00
GDB Administrator
b9d62f893f Automatic date update in version.in 2017-03-13 00:00:21 +00:00
GDB Administrator
d5bb792ca1 Automatic date update in version.in 2017-03-12 00:00:28 +00:00
Alan Modra
4aef764338 Remove bogus ATTRIBUTE_UNUSED
* elf32-ppc.c: Remove ATTRIBUTE_UNUSED throughout when function
	parameter is in fact used.  Whitespace fixes.
	* elf64-ppc.c: Likewise.
2017-03-11 23:40:10 +10:30
GDB Administrator
a08f8d99b8 Automatic date update in version.in 2017-03-11 00:00:23 +00:00
GDB Administrator
f9f791a1b1 Automatic date update in version.in 2017-03-10 00:00:28 +00:00
Sam Thursfield
f03265d9cd Fix compile time warnings about using possibly uninitialised variables in rs6000-core.c.
* rs6000-core.c (CORE_NEW): Simplify macro when
	AIX_CORE_DUMPX_CORE and BFD64 are true to avoid compile warning.
2017-03-09 16:01:06 +00:00
GDB Administrator
c7341d5a6b Automatic date update in version.in 2017-03-09 00:00:31 +00:00
GDB Administrator
50dbe6e1bc Automatic date update in version.in 2017-03-08 00:00:42 +00:00
Alan Modra
b1b07054c0 PowerPC64 abort due to dynamic relocs on hidden undefweak
ppc64_elf_relocate_section lacked a check which meant that it emitted
dynamic relocs against a hidden undefweak symbol for which no dynamic
relocs had been allocated.

	PR 21224
	PR 20519
	* elf64-ppc.c (ppc64_elf_relocate_section): Add missing
	dyn_relocs check.
2017-03-07 12:32:31 +10:30
GDB Administrator
bb98f85480 Automatic date update in version.in 2017-03-07 00:00:39 +00:00
GDB Administrator
62e755d208 Automatic date update in version.in 2017-03-06 00:00:34 +00:00
Alan Modra
2e0ce1c84d Align eh_frame FDEs according to their encoding
bfd/
	* elf-bfd.h (struct eh_cie_fde): Add u.cie.per_encoding_aligned8.
	* elf-eh-frame.c (size_of_output_cie_fde): Don't align here.
	(next_cie_fde_offset): New function.
	(_bfd_elf_parse_eh_frame): Set u.cie.per_encoding_aligned8.
	(_bfd_elf_discard_section_eh_frame): Align zero terminator to
	four bytes.  Align CIEs to four or eight bytes depending on
	per_encoding_aligned8.  Align FDEs according to their encoding.
	Pad last FDE to output section alignment.
	(_bfd_elf_write_section_eh_frame): Adjust to suit.  Remove
	assertion.
	* elf64-ppc.c (glink_eh_frame_cie): Delete padding.
	(ppc64_elf_size_stubs): Pad glink eh_frame as per elf-eh-frame.c.
	(ppc64_elf_finish_dynamic_sections): Adjust to suit.
ld/
	* testsuite/ld-elf/eh3.d: Adjust for eh_frame alignment change.
	* testsuite/ld-elf/eh6.d: Likewise.
	* testsuite/ld-alpha/tlsbin.dd: Likewise.
	* testsuite/ld-alpha/tlsbin.td: Likewise.
	* testsuite/ld-alpha/tlsbinr.dd: Likewise.
	* testsuite/ld-alpha/tlspic.dd: Likewise.
	* testsuite/ld-alpha/tlspic.rd: Likewise.
	* testsuite/ld-alpha/tlspic.sd: Likewise.
	* testsuite/ld-alpha/tlspic.td: Likewise.
	* testsuite/ld-mips-elf/eh-frame1-n64.d: Likewise.
	* testsuite/ld-mips-elf/eh-frame2-n64.d: Likewise.
	* testsuite/ld-mips-elf/eh-frame3.d: Likewise.
	* testsuite/ld-x86-64/pr20830a.d: Likewise.
	* testsuite/ld-x86-64/pr21038a.d: Likewise.
	* testsuite/ld-x86-64/pr21038b.d: Likewise.
	* testsuite/ld-x86-64/pr21038c.d: Likewise.
2017-03-05 14:49:54 +10:30
GDB Administrator
0792e0e119 Automatic date update in version.in 2017-03-05 00:00:22 +00:00
GDB Administrator
921ea8830c Automatic date update in version.in 2017-03-04 00:00:25 +00:00
Nick Clifton
d20928fac9 Fix thinko in previous changelog entry.
PR ld/21212
	* elf.c (rewrite_elf_program_header): Do not issue a warning for
	empty segments which have a zero filesz, but a non-zero memsz.
2017-03-03 10:22:16 +00:00
GDB Administrator
b565cf21c8 Automatic date update in version.in 2017-03-03 00:00:23 +00:00
Nick Clifton
f98450c6ee Disable warning message about a program header with no associated sections when that header's file size is non-zero.
PR ld/21212
	* elf.c (rewrite_elf_program_header): Do not issue a warning for
	empty segments which have a non-zero filesz.
2017-03-02 14:47:29 +00:00
Alan Modra
673cff9b8b PowerPC VLE typo fix
* elf32-ppc.c (ppc_elf_vle_split16): Correct insn mask typo.
2017-03-02 10:40:06 +10:30
GDB Administrator
ecd78df270 Automatic date update in version.in 2017-03-02 00:00:42 +00:00
GDB Administrator
a7e8b06b89 Automatic date update in version.in 2017-03-01 00:01:00 +00:00
Alan Modra
3de43e7beb PowerPC addpcis fix again
In the last patch I said "The patch also fixes overflow checking".
In fact, there wasn't anything wrong with the previous code.  So,
revert that change.  The new checks are OK too, so this is just a
tidy.

	* elf64-ppc.c (ppc64_elf_ha_reloc): Revert last change.
	(ppc64_elf_relocate_section): Likewise.
2017-02-28 23:49:28 +10:30
Alan Modra
4ef97a1b45 Nios2 dynobj handling fixes
A number of places in elf32-nios.c created dynamic sections but didn't
set the hash table dynobj.  That meant we could have duplicate dynamic
sections connected to a number of bfds, so size_dynamic_sections
didn't properly discard or allocate contents.

Also, the entire set of dynamic sections was created in check_relocs
on seeing GOT relocs, when only .got related sections are needed,
probably done to hide segfaults later in finish_dynamic_sections.

The patch fixes these issues and makes the assembler emit errors when
nios2 lacks the necessary pc-relative relocs for subtraction
expressions, rather than silently generating bad code.
eg. ld-elf/merge.  I've also tidied uses of elf32_nios2_hash_table and
elf_hash_table.

bfd/
	PR 20995
	* elf32-nios2.c (nios2_elf32_relocate_section): Use htab
	rather than elf32_nios2_hash_table or elf_hash_table.
	(create_got_section): Likewise.
	(nios2_elf32_finish_dynamic_symbol): Likewise.
	(nios2_elf32_adjust_dynamic_symbol): Likewise.
	(nios2_elf32_size_dynamic_sections): Likewise.
	(nios2_elf32_check_relocs): Delete dynobj, sgot, and srelgot
	vars.  Use htab equivalents directly instead.  Don't create
	all dynamic sections on needing just the GOT.  Use a goto
	rather than a fall-through with reloc test.  Ensure
	htab->dynobj is set when making dynamic sreloc section.
	(nios2_elf32_finish_dynamic_sections): Delete dynobj, use htab
	equivalent directly instead.  Don't segfault on looking for
	.dynamic when dynamic sections have not been created.  Don't
	segfault on .got.plt being discarded.
	(nios2_elf32_size_dynamic_sections): Delete plt and got vars.
	Don't set "relocs" on .rela.plt.  Do handle .sbss.  Delete
	fixme and another not so relevant comment.
	(nios2_elf_add_symbol_hook): Delete dynobj var.  If not
	already set, set hash table dynobj on creating .sbss.
gas/
	* config/tc-nios2.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
ld/
	* testsuite/ld-elf/merge.d: xfail for nios.
2017-02-28 13:20:21 +10:30
Alan Modra
7ba71655a4 PowerPC addpcis fix
This came up because I was looking at ld/tmpdir/addpcis.o and noticed
the odd addends on REL16DX_HA.  They ought to both be -4.  The error
crept in due REL16DX_HA howto being pc-relative (as indeed it should
be), and code at gas/write.c:1001 after this comment
	      /* Make it pc-relative.  If the back-end code has not
		 selected a pc-relative reloc, cancel the adjustment
		 we do later on all pc-relative relocs.  */
*not* cancelling the pc-relative adjustment.  So I've made a dummy
non-relative split reloc so that the generic code handles this, rather
than attempting to add hacks later in md_apply_fix which would not be
very robust.  Having the new internal reloc also makes it easy to
support

 addpcis rx,sym@ha

as an equivalent to

 addpcis rx,(sym-0f)@ha
0:

The patch also fixes overflow checking, which must test whether the
addi will overflow too since @l relocs don't have any overflow check.

Lastly, since I was poking at md_apply_fix, I arranged to have the
generic gas/write.c code emit errors for subtraction expressions where
we lack reloc support.

include/
	* elf/ppc64.h (R_PPC64_16DX_HA): New.  Expand fake reloc comment.
	* elf/ppc.h (R_PPC_16DX_HA): Likewise.
bfd/
	* reloc.c (BFD_RELOC_PPC_16DX_HA): New.
	* elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_16DX_HA>): New howto.
	(ppc64_elf_reloc_type_lookup): Translate new bfd reloc.
	(ppc64_elf_ha_reloc): Correct overflow test on REL16DX_HA.
	(ppc64_elf_relocate_section): Likewise.
	* elf32-ppc.c (ppc_elf_howto_raw <R_PPC_16DX_HA>): New howto.
	(ppc_elf_reloc_type_lookup): Translate new bfd reloc.
	(ppc_elf_check_relocs): Handle R_PPC_16DX_HA to pacify gcc.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis.
	(md_apply_fix): Remove fx_subsy check.  Move code converting to
	pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA.  Remove code
	emiiting errors on seeing fx_pcrel set on unexpected relocs, as
	that is done now by the generic code via..
	* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define.
	(TC_VALIDATE_FIX_SUB): Define.
ld/
	* testsuite/ld-powerpc/addpcis.d: Define ext1 and ext2 at
	limits of addpcis range.
2017-02-28 11:59:47 +10:30
Alan Modra
afbf7e8e3a Don't make dynamic .data.rel.ro SEC_READONLY
I'd made this dynamic section read-only so a flag test distinguished
it from .dynbss, but like any other .data.rel.ro section it really
should be marked read-write.  (It is read-only after relocation, not
before.)  When using the standard linker scripts this usually doesn't
matter since the output section is among other read-write sections and
not page aligned.  However, it might matter in the extraordinary case
of the dynamic section being the only .data.rel.ro section with the
output section just happening to be page aligned and a multiple of a
page in size.  In that case the output section would be read-only, and
live it its own read-only PT_LOAD segment, which is incorrect.

	* elflink.c (_bfd_elf_create_dynamic_sections): Don't make
	dynamic .data.rel.ro read-only.
	* elf32-arm.c (elf32_arm_finish_dynamic_symbol): Compare section
	rather than section flags when deciding where copy reloc goes.
	* elf32-cris.c (elf_cris_finish_dynamic_symbol): Likewise.
	* elf32-hppa.c (elf32_hppa_finish_dynamic_symbol): Likewise.
	* elf32-i386.c (elf_i386_finish_dynamic_symbol): Likewise.
	* elf32-metag.c (elf_metag_finish_dynamic_symbol): Likewise.
	* elf32-microblaze.c (microblaze_elf_finish_dynamic_symbol): Likewise.
	* elf32-nios2.c (nios2_elf32_finish_dynamic_symbol): Likewise.
	* elf32-or1k.c (or1k_elf_finish_dynamic_symbol): Likewise.
	* elf32-ppc.c (ppc_elf_finish_dynamic_symbol): Likewise.
	* elf32-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
	* elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise.
	* elf32-tilepro.c (tilepro_elf_finish_dynamic_symbol): Likewise.
	* elf64-ppc.c (ppc64_elf_finish_dynamic_symbol): Likewise.
	* elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
	* elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Likewise.
	* elfnn-riscv.c (riscv_elf_finish_dynamic_symbol): Likewise.
	* elfxx-mips.c (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): Likewise.
	* elfxx-tilegx.c (tilegx_elf_finish_dynamic_symbol): Likewise.
2017-02-28 11:59:47 +10:30
Maciej W. Rozycki
0e39210161 MIPS/BFD: Also handle `jalr $0, $25' with R_MIPS_JALR
Interpret the `jalr $0, $25' instruction encoding with an R_MIPS_JALR
relocation attached as an alias to `jr $25' and convert the jump to an
equivalent branch where possible, consequently covering the MIPSr6
architecture for the purpose of this optimization too.

	bfd/
	* elfxx-mips.c (mips_elf_perform_relocation): Also handle the
	`jalr $0, $25' instruction encoding.

	gas/
	* testsuite/gas/mips/jalr4.s: Add `jalr $0, $25' instructions.
	* testsuite/gas/mips/jalr4.d: Adjust accordingly.  Remove MIPSr6
	encoding patterns.
	* testsuite/gas/mips/jalr4-n64.d: Likewise.
	* testsuite/gas/mips/mipsr6@jalr4.d: New test.
	* testsuite/gas/mips/mipsr6@jalr4-n32.d: New test.
	* testsuite/gas/mips/mipsr6@jalr4-n64.d: New test.

	ld/
	* testsuite/ld-mips-elf/jalr4.dd: Adjust for `jalr $0, $25'
	instructions.
	* testsuite/ld-mips-elf/jalr4-r6.dd: New test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2017-02-28 00:22:36 +00:00
GDB Administrator
279a558a4d Automatic date update in version.in 2017-02-28 00:00:25 +00:00
Nick Clifton
bd757ca7bf Fix segfault in microblaze linker when garbage collection removes a symbol scheduled for a slot in the PLT.
PR ld/21180
	* elf32-microblaze.c (microblaze_elf_finish_dynamic_symbol): Avoid
	generating a seg-fault when encountering a symbol that has been
	deleted by garbage collection.
2017-02-27 11:33:05 +00:00
GDB Administrator
a0aa382843 Automatic date update in version.in 2017-02-27 00:00:24 +00:00
GDB Administrator
a8a0c93848 Automatic date update in version.in 2017-02-26 00:00:33 +00:00
Alan Modra
034fed0bbc ARC naughtiness causing assertion fail at elf-strtab.c:302
This patch fixes a number of issues in the ARC backend.

- The ARC size_dynamic_sections was trashing dynamic section contents,
  in particular the .gnu.version_d contents.  Those versions
  definitions are therefore lost so they do not drain from the strtab,
  resulting in assertion failures.
- The code attempting to set DT_TEXTREL was completely bogus.
- The ARC finish_dynamic_sections would segfault on trying to set
  sh_entsize for .rela.plt if that section had been discarded.
- arc_create_dynamic_sections wouldn't have ever created dynamics
  sections, which was just as well since the places it was called were
  way too late to create dynamic sections.  Its usefulness then
  devolved down to finding just one dynamic section.  All the others
  packaged into a struct were unused.
- .interp wasn't set for PIEs.

	* elf32-arc.c (struct dynamic_sections): Delete.
	(enum dyn_section_types): Delete.
	(dyn_section_names): Delete.
	(arc_create_dynamic_sections): Delete.
	(elf_arc_finish_dynamic_sections): Don't call the above.  Don't
	segfault on discarded .rela.plt section.
	(elf_arc_size_dynamic_sections): Formatting.  Don't call
	arc_create_dynamic_sections.  Don't allocate memory for sections
	handled by the generic linker.  Correct code finding relocs in
	read-only sections.  Set SEC_EXCLUDE on zero size .got,
	.got.plt, and .dynbss sections.  Do set .interp for pies.
2017-02-25 18:41:03 +10:30
GDB Administrator
7cc1440654 Automatic date update in version.in 2017-02-25 00:00:32 +00:00
Andrew Waterman
d0f744f970 bfd: RISC-V: relax to gp in more cases.
bfd/ChangeLog:

2017-02-24  Andrew Waterman  <andrew@sifive.com>

	* elfnn-riscv.c (GP_NAME): New macro.
	(riscv_global_pointer_value): Use it.
	(_bfd_riscv_relax_lui): If symbol and global pointer are in same
	output section, consider only that section's alignment.
2017-02-24 09:30:32 -08:00
GDB Administrator
e091dff9db Automatic date update in version.in 2017-02-24 00:00:33 +00:00
Maciej W. Rozycki
5d58c73379 MIPS/BFD: Remove duplicate NewABI JALR relocation handling
Remove separate original NewABI JALR relocation handling, introduced
with commit d06471104a ("relax jalr $t9 [R_MIPS_JALR symbol] to bal
symbol"), <https://sourceware.org/ml/binutils/2003-03/msg00394.html>,
and only used by LD with the `--relax' option specified, and rely solely
on `mips_elf_perform_relocation' code, which has been introduced with
commit 1367d393bb ("On the RM9000 convert jal to bal if in range"),
<https://www.sourceware.org/ml/binutils/2004-12/msg00088.html> and since
made more complete, across all the three ABIs.

Also remove the `--relax' option, now irrelevant, from the tests added
with the former commit.

	bfd/
	* elfxx-mips.h (_bfd_mips_relax_section): Remove prototype.
	* elfxx-mips.c (_bfd_mips_relax_section): Remove function.
	* elf64-mips.c (bfd_elf64_bfd_relax_section): Remove macro.
	* elfn32-mips.c (bfd_elf32_bfd_relax_section): Likewise.

	ld/
	* testsuite/ld-mips-elf/relax-jalr-n32.d: Remove `--relax'
	option.
	* testsuite/ld-mips-elf/relax-jalr-n32-shared.d: Likewise.
	* testsuite/ld-mips-elf/relax-jalr-n64.d: Likewise.
	* testsuite/ld-mips-elf/relax-jalr-n64-shared.d: Likewise.
2017-02-23 23:49:14 +00:00
Maciej W. Rozycki
c1556ecd78 MIPS/BFD: Discard ineligible JALR relocations right away
Discard R_MIPS_JALR and R_MICROMIPS_JALR relocations associated with
jumps that cannot be converted to an equivalent branch right away in
`mips_elf_calculate_relocation' rather than letting them through to
`mips_elf_perform_relocation'.  This includes cross-mode jumps which
need to flip the ISA bit or jumps to a misaligned location that cannot
be encoded with a branch, in addition to preemptible symbol references
already handled.

Cross-mode jumps are actually already rejected as the conversion is made
in `mips_elf_perform_relocation', so in this case this change only saves
some processing.  Jumps to a misaligned location are however converted,
with bits causing misalignment lost, making resulting code functionally
different even if the lone effect is avoiding an address error exception
with an instruction fetch at the jump destination requested.

Add test cases suitable, also including GAS verification to confirm that
the JALR relocations explicitly requested have indeed been output in the
intermediate objects used.

	bfd/
	* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_JALR>
	<R_MICROMIPS_JALR>: Discard relocation if `cross_mode_jump_p'
	or misaligned.

	gas/
	* testsuite/gas/mips/jalr4.d: New test.
	* testsuite/gas/mips/jalr4-n32.d: New test.
	* testsuite/gas/mips/jalr4-n64.d: New test.
	* testsuite/gas/mips/jalr4.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/jalr4.dd: New test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2017-02-23 23:45:14 +00:00
Alan Modra
5499c7c71c Correct VLE 16D and SDAREL relocations
PR 20744
bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Correct dst_mask on all VLE
	16D relocations.
	(ppc_elf_vle_split16): Correct field mask and shift for 16D relocs.
	(ppc_elf_relocate_section): Correct calculation for VLE SDAREL
	relocs.
ld/
	* testsuite/ld-powerpc/vle-reloc-2.s: Use r6 for last insn of
	each group.
	* testsuite/ld-powerpc/vle-reloc-2.d: Update for above change
	and sdarel reloc fix.
2017-02-23 12:33:51 +10:30
GDB Administrator
d8260425e6 Automatic date update in version.in 2017-02-23 00:00:41 +00:00
Maciej W. Rozycki
902e9fc76a PR ld/20828: Move symbol version processing ahead of GC symbol sweep
Complement commit b531344c34 ("PR ld/20828: Reorder the symbol sweep
stage of section GC") and commit 81ff47b3a5 ("PR ld/20828: Fix linker
script symbols wrongly forced local with section GC") and move symbol
version processing ahead of the symbol sweep stage of section GC, all in
`bfd_elf_size_dynamic_sections', so that version symbols created stay in
the global scope and are not output as local symbols to the dynamic
symbol table in the presence of corresponding symbol definitions pulled
from a DSO involved in a link.

Consolidate the whole of symbol version processing into a single block
from all parts scattered across the function and rearranging the local
variables used as necessary, however leaving the setting of dynamic
entries associated with the DT_VERDEF, DT_VERDEFNUM, DT_VERNEED and
DT_VERNEEDNUM tags and the SEC_EXCLUDE flag for unused `.gnu.version'
section in the original places.

With the rearrangement of code blocks `Elf_Internal_Verneed *t' would
shadow the previous definition of `struct bfd_elf_version_tree *t', so
rename the former variable to `vn'.

	bfd/
	PR ld/20828
	* elflink.c (bfd_elf_size_dynamic_sections): Move symbol version
	processing ahead of the call to `elf_gc_sweep_symbol'.

	ld/
	PR ld/20828
	* testsuite/ld-elf/pr20828-d.sd: New test.
	* testsuite/ld-elf/pr20828-e.sd: New test.
	* testsuite/ld-elf/pr20828-v.od: New test.
	* testsuite/ld-elf/pr20828-v.ver: New test version script.
	* testsuite/ld-elf/pr20828-v.ld: New test linker script.
	* testsuite/ld-elf/pr20828.ld: Add `.gnu.version' and
	`.gnu.version_d'.
	* testsuite/ld-elf/shared.exp: Run the new tests.
2017-02-22 18:16:28 +00:00
Nick Clifton
758d96d834 Align .gnu_debuglink sections on a 4-byte boundary.
PR binutils/21193
	* opncls.c (bfd_create_gnu_debuglink_section): Give the newly
	created section 4-byte alignment.
2017-02-22 17:28:33 +00:00
GDB Administrator
e025ae6880 Automatic date update in version.in 2017-02-22 00:00:36 +00:00
Alan Modra
6528b6eba8 PowerPC ld segfault on script discarding dynamic sections
bfd/
	* elf64-ppc.c (ppc64_elf_finish_dynamic_sections): Don't segfault
	on .got or .plt output section being discarded by script.
	* elf32-ppc.c (ppc_elf_finish_dynamic_sections): Likewise.  Move
	vxworks splt temp.
gold/
	* powerpc.cc (Target_powerpc::make_iplt_section): Check that
	output_section exists before attempting add_output_section_data.
	(Target_powerpc::make_brlt_section): Likewise.
2017-02-22 08:44:41 +10:30
Alan Modra
24f1a75169 Alpha DT_RELA
* elf64-alpha.c (elf64_alpha_size_dynamic_sections): Only emit
	DT_RELA, DT_RELASZ, and DT_RELAENT when DT_RELASZ is non-zero.
2017-02-21 11:49:37 +10:30
GDB Administrator
262062fffd Automatic date update in version.in 2017-02-21 00:00:31 +00:00
Alan Modra
644877806e Alpha executables segfault when linked with -z,now
PR 21181
	* elflink.c (bfd_elf_final_link): Make DT_REL/DT_RELA zero
	if DT_RELSZ/DT_RELASZ is zero.
2017-02-20 19:35:31 +10:30