This patch changes selftest.c to use std::vector rather than VEC.
I think this is a small net plus.
2016-10-12 Tom Tromey <tom@tromey.com>
* selftest.c: Include <vector>, not "vec.h".
(self_test_function_ptr): Remove.
(tests): Now a std::vector.
(register_self_test, run_self_tests): Update.
This converts tid_range_parser and get_number_or_range to be classes.
The various tid_range_parser_* and get_number_or_range_* functions
become methods on the respective classes. Then it updates the users
to follow.
The rationale for the change is that this provides better
encapsulation. For example, this forced me to think of a better
interface between tid_range_parser and get_number_or_range, since the
former peeked into the latter's internals a bit too much. That ended
up resulting mostly in these two not-just-straight-1-1 changes:
void
-tid_range_parser_skip (struct tid_range_parser *parser)
+tid_range_parser::skip_range ()
{
...
- tid_range_parser_init (parser, parser->range_parser.end_ptr,
- parser->default_inferior);
+ m_range_parser.skip_range ();
+ init (m_range_parser.string (), m_default_inferior);
}
and:
/* If we successfully parsed a thread number or finished parsing a
thread range, switch back to assuming the next TID is
inferior-qualified. */
- if (parser->range_parser.end_ptr == NULL
- || parser->range_parser.string == parser->range_parser.end_ptr)
+ if (!m_range_parser.in_range ())
{
For the same reason (encapsulation), this moves the enum
tid_range_state definition to within the tid_parser class's scope,
since that is private implementation detail.
While at it, switch to use "bool" for booleans.
gdb/ChangeLog:
2016-10-13 Pedro Alves <palves@redhat.com>
Tom Tromey <tom@tromey.com>
* tid-parse.h (tid_range_parser): New class.
(enum tid_range_state): Move into tid_range_parser's scope.
Remove TID_RANGE_ prefix from all values.
(tid_range_parser_get_tid, tid_range_parser_get_tid_range)
(tid_range_parser_star_range, tid_range_parser_finished)
(tid_range_parser_skip, tid_range_parser_qualified): Don't
declare.
(tid_is_in_list): Update comment.
* tid-parse.c (tid_range_parser::tid_range_parser): New.
(init, finished, get_string, skip, tid_is_qualified)
(get_tid_or_range, get_tid_range, get_tid, star_range): Rename;
turn into methods.
(tid_is_in_list): Adjust.
* cli/cli-utils.h (number_or_range_parser): New class.
(init_number_or_range, get_number_or_range)
(number_range_setup_range): Don't declare.
* cli/cli-utils.c
(number_or_range_parser::number_or_range_parser): New.
(init_number_or_range, get_number_or_range)
(number_range_setup_range): Rename; turn into methods.
(number_is_in_list): Adjust.
* breakpoint.c (map_breakpoint_numbers): Adjust. Use bool.
(trace_pass_command, get_tracepoint_by_number): Adjust.
* breakpoint.h (get_tracepoint_by_number): Adjust.
* inferior.c (detach_inferior_command, kill_inferior_command)
(remove_inferior_command): Adjust.
* linespec.c (decode_line_2): Adjust.
* memattr.c (mem_enable_command, mem_disable_command)
(mem_delete_command): Adjust.
* printcmd.c (map_display_numbers): Adjust.
* reverse.c (delete_bookmark_command, bookmarks_info): Adjust.
* thread.c (thread_apply_command): Adjust.
I noticed that testing aarch64-elf gdb with a physical board
ran into issues with gdb.python/py-value.exp. Further investigation showed
that we were actually trying to dereference a NULL pointer (argv) when trying
to access argv[0].
Being bare-metal, argv is not guaranteed to be valid. So we need to make sure
argv is sane before accessing argv[0].
The following patch fixes up the test program to check for a NULL argv and also
improves the testcase a bit so it doesn't have to work with a hardcoded argc
value.
Regression-tested on x86-64 Ubuntu 16.04.
gdb/testsuite/ChangeLog:
2016-10-12 Luis Machado <lgustavo@codesourcery.com>
* gdb.python/py-value.c (main): Check if argv is NULL before using it.
* gdb.python/py-value.exp (test_value_in_inferior): Don't use hardcoded
argc values.
Add 1 to argc so we guarantee distinct initial/modified argc values.
Add support for Newlib as an OS/ABI. The only thing that is specific to it
relatively to "generic" baremetal target is location of PC register in jump
buffer for longjump support.
Sniffer uses .ivt section to decide if ELF file is for ARC Newlib or not.
gdb/ChangeLog:
* arc-newlib-tdep.c: New file.
* configure.tgt: Add newlib support for ARC.
Standard get_longjmp_target implementation, similar to what is in arm-tdep.c.
Actual value of jb_pc should be set in init_osabi methods of particular OS/ABI
implementations.
gdb/ChangeLog:
* arc-tdep.h (struct gdbarch_tdep) <jb_pc>: New field.
* arc-tdep.c (arc_get_longjmp_target): New function.
(arc_gdbarch_init): Set get_longjmp_target if jb_pc is non-negative.
(arc_dump_tdep): Print jb_pc.
We don't track FP registers in aarch64 prologue analyzer, so this causes
an internal error when FP registers are saved by "stp" instruction in
prologue (stp d8, d9, [sp,#128]),
tbreak _Unwind_RaiseException^M
aarch64-tdep.c:335: internal-error: CORE_ADDR aarch64_analyze_prologue(gdbarch*, CORE_ADDR, CORE_ADDR, aarch64_prologue_cache*): Assertion `inst.operands[0].type == AARCH64_OPND_Rt' failed.^M
A problem internal to GDB has been detected,
This patch teaches GDB to track FP registers (D registers) in prologue
analyzer.
gdb:
2016-10-12 Yao Qi <yao.qi@linaro.org>
PR tdep/20682
* aarch64-tdep.c: Replace 32 with AARCH64_D_REGISTER_COUNT.
(aarch64_analyze_prologue): Extend array 'regs' for D registers.
Assert that operand 0 and 1 can be X or D registers. Update
register number for D registers. Update registers in frame
cache.
* aarch64-tdep.h (AARCH64_D_REGISTER_COUNT): New macro.
gcc-6.2.1
gdb compile failed, gdb/testsuite/gdb.arch/powerpc-prologue.c: In function 'main':
gdb/testsuite/gdb.arch/powerpc-prologue.c:32:3: warning: implicit declaration of function 'optimized_1' [-Wimplicit-function-declaration]
optimized_1 ();
^~~~~~~~~~~
gdb/testsuite/ChangeLog
2016-10-11 Jan Kratochvil <jan.kratochvil@redhat.com>
* gdb.arch/powerpc-prologue.c (optimized_1): New declaration.
See https://sourceware.org/ml/binutils/2016-07/msg00091.html
This patch stop --gc-sections elf_gc_sweep_symbol localizing symbols
that ought to remain global.
The difficulty with always descending into output section statements
is that symbols defined by the script in such statements don't have
a bfd section when lang_do_assignments runs early in the link process.
There are two approaches to curing this problem. Either we can
create the bfd section early, or we can use a special section. This
patch takes the latter approach and uses bfd_und_section. (Creating
bfd sections early results in changed output section order, and thus
lots of testsuite failures. You can't create all output sections
early to ensure proper ordering as KEEP then stops empty sections
from being stripped.)
The wrinkle with this approach is that some code that runs at
gc-sections time needs to be made aware of the odd defined symbols
using bfd_und_section.
bfd/
* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Handle symbols
defined temporarily with bfd_und_section.
* elflink.c (_bfd_elf_gc_keep): Don't set SEC_KEEP for bfd_und_section.
* elfxx-mips.c (mips_elf_local_pic_function_p): Exclude defined
symbols with bfd_und_section.
ld/
* ldlang.c (lang_do_assignments_1): Descend into output section
statements that do not yet have bfd sections. Set symbol section
temporarily for symbols defined in such statements to the undefined
section. Don't error on data or reloc statements until final phase.
* ldexp.c (exp_fold_tree_1 <etree_assign>): Handle bfd_und_section
in expld.section.
* testsuite/ld-mmix/bpo-10.d: Adjust.
* testsuite/ld-mmix/bpo-11.d: Adjust.
Turned out that by moving the binary start to 256M I've hit a case with
potentially a lot of aliasing in the branch target buffer between
binaries and shared libs. So moving on.
Tested on s390x. No regressions.
ld/ChangeLog:
2016-10-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* emulparams/elf64_s390.sh: Move binary start to 16M.
* testsuite/ld-s390/tlsbin_64.dd: Adjust testcases accordingly.
* testsuite/ld-s390/tlsbin_64.rd: Likewise.
The CFI* testcases fail on MIPS64 because the augmentation string does
not match the regexp. This is because MIPS64 doesn't use the default of
4 for DWARF2_FDE_RELOC_SIZE which ends up as "b" in the augmentation
string. MIPS64 uses the address size which is 8 resulting in "c".
Adding c to the regexp fixes a couple of them. Others also need
adjustments in the FDE header lines due to different
sizes/offsets.
gas/ChangeLog:
2016-10-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* testsuite/gas/cfi/cfi-common-1.d: Adjust regexps for mips64.
* testsuite/gas/cfi/cfi-common-2.d: Likewise.
* testsuite/gas/cfi/cfi-common-3.d: Likewise.
* testsuite/gas/cfi/cfi-common-4.d: Likewise.
* testsuite/gas/cfi/cfi-common-5.d: Likewise.
* testsuite/gas/cfi/cfi-common-7.d: Likewise.
* testsuite/gas/cfi/cfi-common-8.d: Likewise.
* testsuite/gas/cfi/cfi-common-9.d: Likewise.
* testsuite/gas/cfi/cfi-mips-1.d: Likewise.
This patch shares "enum arm_breakpoint_kinds", and use ARM_BP_KIND_THUMB2
in GDB.
gdb:
2016-10-10 Yao Qi <yao.qi@linaro.org>
* arch/arm.h (enum arm_breakpoint_kinds): New.
* arm-tdep.c (arm_remote_breakpoint_from_pc): Use
ARM_BP_KIND_THUMB2.
gdb/gdbserver:
2016-10-10 Yao Qi <yao.qi@linaro.org>
* linux-aarch32-low.c (enum arm_breakpoint_kinds): Remove.
This patch renames local 'arch' by 'gdbarch' in m32c_gdbarch_init, so
that I can use macros in the following patch.
gdb:
2016-10-10 Yao Qi <yao.qi@linaro.org>
* m32c-tdep.c (m32c_gdbarch_init): Rename local 'arch' by
'gdbarch'.
v850 has two functions to install to gdbarch_breakpoint_from_pc,
and it selects one according to info.bfd_arch_info->mach. However,
we can select the kind/length of breakpoint instruction inside
v850_breakpoint_from_pc by gdbarch_bfd_arch_info (gdbarch)->mach.
This patch is to do that, and remove v850_dbtrap_breakpoint_from_pc.
gdb:
2016-08-30 Yao Qi <yao.qi@linaro.org>
* v850-tdep.c (v850_breakpoint_from_pc): Use the right
breakpoint instruction.
(v850_dbtrap_breakpoint_from_pc): Remove.
(v850_gdbarch_init): Update.
I noticed a while ago that the rx-elf gas gprel test regressed for no
apparent reason. It turns out that the problem was rx-parse.y using
BFD_RELOC_RX_* values, which may change when other targets add new
relocs. If rx-parse.o doesn't depend on bfd.h, it won't be recompiled.
* Makefile.am (EXTRA_as_new_SOURCES): Add config/rl78-parse.y and
config/rx-parse.y. Move config/bfin-parse.y.
(bfin-parse.@OBJEXT@, rl78-parse.@OBJEXT@, rx-parse.@OBJEXT@): Delete.
($(srcdir)/config/rl78-defs.h): New rule.
* Makefile.in: Regenerate.
0a69eedb (Clean up the XML files for ARM) moves arm-*.xml files to
arm/ directory, so need update gdb.xml/tdesc-regs.exp accordingly.
gdb/testsuite:
2016-10-07 Yao Qi <yao.qi@linaro.org>
* gdb.xml/tdesc-regs.exp: Set regdir to "arm/".
The gdb.decode_line python function is documented to support the same location
expressions as the "break" command. It currently expects a linespec location.
Instead of creating a linespec location directly, create the location via
string_to_event_location_basic.
This simple commit consolidates the API of
target_supports_multi_process. Since both GDB and gdbserver use the
same function prototype, all that was needed was to move create this
prototype on gdb/target/target.h and turn the macros declared on
gdb/{,gdbserver/}target.h into actual functions.
Regtested (clean pass) on the BuildBot.
gdb/ChangeLog:
2016-10-06 Sergio Durigan Junior <sergiodj@redhat.com>
* target.c (target_supports_multi_process): New function, moved
from...
* target.h (target_supports_multi_process): ... here. Remove
macro.
* target/target.h (target_supports_multi_process): New prototype.
gdb/gdbserver/ChangeLog:
2016-10-06 Sergio Durigan Junior <sergiodj@redhat.com>
* target.c (target_supports_multi_process): New function, moved
from...
* target.h (target_supports_multi_process): ... here. Remove
macro.
Fixes this failure when building in C mode. I think it's relevant for master
as well, since it's a good practice to include (or forward-declare) what you
use.
In file included from ../../binutils-gdb/gdb/gdbarch.h:38:0,
from ../../binutils-gdb/gdb/defs.h:653,
from ../../binutils-gdb/gdb/dictionary.c:23:
../../binutils-gdb/gdb/frame.h:710:48: warning: ‘struct ui_out’ declared inside parameter list will not be visible outside of this definition or declaration
extern void print_stack_frame_to_uiout (struct ui_out *uiout,
gdb/ChangeLog:
* frame.h: Forward-declare struct ui_out.
Fix a regression from commit f8b73d13b7 ("Target-described register
support for MIPS"),
<https://sourceware.org/ml/gdb-patches/2007-05/msg00340.html>,
<https://sourceware.org/ml/gdb-patches/2007-06/msg00256.html>, which
caused Floating Point Control Registers (FCRs) to be shown as 64-bit
with 64-bit targets.
This came from the legacy register format where all raw registers
matched the width of the architecture regardless of their actual size.
The correct size was then set in `mips_register_type' for cooked
registers presented to the user, which in the case of FCRs meant the
cooked size was always forced to 32 bits, reflecting their actual
hardware size, even though the raw format carried them in 64-bit
quantities on 64-bit targets. The upper 32 bits carried in the raw FCR
format have always been don't-cares, not actually retrieved from
hardware and never written back.
With the introduction of XML register descriptions the layout of
previously defined raw registers has been preserved, so as to keep
existing register handling code unchanged and make it easier for GDB and
`gdbserver' to interact with each other whether neither, either or both
parties talking over RSP support XML register descriptions. For the
XML-described case however `mips_register_type' is not used in raw to
cooked register conversion, so any special cases coded there are not
taken into account.
Instead a new function, `mips_pseudo_register_type', has been introduced
to handle size conversion, however lacking the special case for FCRs for
the Linux and the now defunct IRIX target. The correct size has been
maintained for embedded targets however, due to the bundling of FCRs
with the embedded registers under the `rawnum >= MIPS_EMBED_FP0_REGNUM +
32' condition.
Add the missing case to `mips_pseudo_register_type' then, referring to
the FCR indices explicitly, and observing that between
`MIPS_EMBED_FP0_REGNUM + 32' and `MIPS_FIRST_EMBED_REGNUM' there is an
unused register slot whose contents are ignored so with the removal of
embedded FCRs from under that condition we don't have to care about it
and we can refer to the embedded registers starting from
MIPS_FIRST_EMBED_REGNUM instead.
Add a test case too so that we have means to check automatically that
the correct user-visible size of FCRs is maintained.
gdb/
* mips-tdep.c (mips_pseudo_register_type): Make FCRs always
32-bit.
gdb/testsuite/
* gdb.arch/mips-fcr.exp: New test.
* gdb.arch/mips-fcr.c: Source for the new test.
Rearrange comments throughout `mips_pseudo_register_type', placing them
ahead the condtionals they apply to consistently.
gdb/
* mips-tdep.c (mips_pseudo_register_type): Rearrange comments
throughout.
Correct a commit 2151ccc56c ("Always organize test artifacts in a
directory hierarchy") regression causing:
Running .../gdb/testsuite/gdb.base/solib-disc.exp ...
gdb compile failed, Assembler messages:
Fatal error: can't create .../gdb/testsuite/gdb.base/so-disc-shr.c.o: No such file or directory
by using `standard_output_file' to construct output file names
throughout.
gdb/testsuite/
* gdb.base/solib-disc.exp: Use `standard_output_file'
throughout.
Commit a038fa3e14 stack: check frame_unwind_caller_id adds a frame_id check to
frame_info and treats a missing frame_id as NOT_AVAILABLE_ERROR. This causes a
regression in gdb.dwarf2/dw2-undefined-ret-addr.exp.
Treat a missing frame_id as OPTIMIZED_OUT_ERROR instead.
See also https://sourceware.org/ml/gdb-patches/2016-07/msg00273.html.
