PR ld/20636
* elf-bfd.h (struct elf_backend_data): Delete
elf_backend_count_output_relocs callback and add
elf_backend_update_relocs.
* elf32-arm.c (elf32_arm_count_output_relocs): Deleted.
(emit_relocs): Deleted.
(elf32_arm_emit_relocs): Deleted.
(elf_backend_emit_relocs): Updated not to use the old functions.
(elf32_arm_update_relocs): New function.
(elf_backend_update_relocs): New define.
* elflink.c (bfd_elf_final_link): Add additional_reloc_count to the
relocation count. Call elf_backend_emit_relocs.
(_bfd_elf_size_reloc_section): Do not call
elf_backend_count_output_relocs.
* elfxx-target.h (elf_backend_count_output_relocs): Deleted.
(elf_backend_update_relocs): New define.
2016-09-28 Christophe Lyon <christophe.lyon@linaro.org>
PR ld/20608
bfd/
* elf32-arm.c (arm_type_of_stub): Handle the case when the pre-PLT
Thumb-ARM stub is too far.
ld
* testsuite/ld-arm/arm-elf.exp: Handle new testcase.
* testsuite/ld-arm/farcall-mixed-app2.d: New file.
* testsuite/ld-arm/farcall-mixed-app2.r: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.s: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.sym: Likewise.
PR ld/20595
ld * testsuite/ld-arm/unwind-4.d: Add -q option to linker command
line and -r option to objdump command line. Match emitted relocs
to make sure that superflous relocs are not generated.
bfd * elf-bfd.h (struct elf_backend_data): Add
elf_backend_count_output_relocs callback to count relocations in
the final output.
* elf-arm.c (elf32_arm_add_relocation): Deleted.
(elf32_arm_write_section): Move additional relocation to emit_relocs.
(elf32_arm_count_output_relocs): New function.
(emit_relocs): New function.
(elf32_arm_emit_relocs): New function.
(elf32_arm_vxworks_emit_relocs): New function.
(elf_backend_emit_relocs): Updated to use the new functions.
(elf_backend_count_output_relocs): New define.
* bfd/elflink.c (bfd_elf_final_link): Do not add additional_reloc_count
to the relocation count.
(_bfd_elf_link_size_reloc_section): Use callback to count the
relocations which will be in output.
(_bfd_elf_default_count_output_relocs): New function.
* bfd/elfxx-target.h (elf_backend_count_output_relocs): New define.
bfd/
2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf32-arm.c (elf32_arm_gc_mark_extra_sections): Only mark section
not already marked.
ld/
2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/ld-arm/cmse-veneers.s: Add a test for ARMv8-M Security
Extensions entry functions in absolute section.
* testsuite/ld-arm/cmse-veneers.rd: Adapt expected output accordingly.
bfd/
* elf32-arm.c (cmse_entry_fct_p): Store instruction encoding in an
array of bytes and use bfd_get_16 to interpret its encoding according
to endianness of target.
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (struct elf32_arm_params): Define.
(bfd_elf32_arm_set_target_relocs): Rename into ...
(bfd_elf32_arm_set_target_params): This. Use a struct
elf32_arm_params to pass all parameters but the bfd and bfd_link_info.
* bfd-in2.h: Regenerate.
* elf32-arm.c (bfd_elf32_arm_set_target_relocs): Rename into ...
(bfd_elf32_arm_set_target_params): This. Pass all values via a struct
elf32_arm_params rather than as individual parameters.
ld/
* emultempl/armelf.em (params): New static variable.
(thumb_entry_symbol, byteswap_code, target1_is_rel, target2_type,
fix_v4bx, use_blx, vfp11_denorm_fix, stm32l4xx_fix, fix_cortex_a8,
no_enum_size_warning, no_wchar_size_warning, pic_veneer,
merge_exidx_entries, fix_arm1176, cmse_implib): move as part of the
above new structure.
(arm_elf_before_allocation): Access static variable from the params
structure.
(gld${EMULATION_NAME}_finish): Likewise.
(arm_elf_create_output_section_statements): Likewise and pass the
address of that structure to bfd_elf32_arm_set_target_relocs instead
of the static variables.
(PARSE_AND_LIST_ARGS_CASES): Access static variable from the params
structure.
bfd/
* elf32-arm.c (elf32_arm_get_stub_entry): Assert that we don't access
passed the end of htab->stub_group array.
(elf32_arm_create_or_find_stub_sec): Likewise.
(elf32_arm_create_stub): Likewise.
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (bfd_elf32_arm_set_target_relocs): Add a new parameter for
the input import library bfd.
* bfd-in2.h: Regenerate.
* elf32-arm.c (struct elf32_arm_link_hash_table): New in_implib_bfd
and new_cmse_stub_offset fields.
(stub_hash_newfunc): Initialize stub_offset and stub_template_size to
-1.
(elf32_arm_add_stub): Likewise for stub_offset.
(arm_new_stubs_start_offset_ptr): New function.
(arm_build_one_stub): Only allocate a stub_offset if it is -1. Allow
empty SG veneers to have zero relocations.
(arm_size_one_stub): Only initialize stub size and template
information for non empty veneers. Do not update veneer section size
if veneer already has an offset.
(elf32_arm_create_stub): Return the stub entry pointer or NULL instead
of a boolean indicating success or failure.
(cmse_scan): Change stub_changed parameter into an integer pointer
parameter cmse_stub_created to count the number of stub created and
adapt to change of return value in elf32_arm_create_stub.
(cmse_entry_fct_p): New function.
(arm_list_new_cmse_stub): Likewise.
(set_cmse_veneer_addr_from_implib): Likewise.
(elf32_arm_size_stubs): Define cmse_stub_created, pass its address to
cmse_scan instead of that of cmse_stub_changed to compute the number
of stub created and use it to initialize stub_changed. Call
set_cmse_veneer_addr_from_implib after all cmse_scan. Adapt to change
of return value in elf32_arm_create_stub. Use
arm_stub_section_start_offset () if not NULL to initialize size of
secure gateway veneers section. Initialize stub_offset of Cortex-A8
erratum fix to -1. Use ret to hold return value.
(elf32_arm_build_stubs): Use arm_stub_section_start_offset () if not
NULL to initialize size of secure gateway veneers section. Adapt
comment to stress the importance of zeroing veneer section content.
(bfd_elf32_arm_set_target_relocs): Add new in_implib_bfd parameter to
initialize eponymous field in struct elf32_arm_link_hash_table.
ld/
* emultempl/armelf.em (in_implib_filename): Declare and initialize new
variable.
(arm_elf_create_output_section_statements): Open import input library
file for writing and pass resulting in_implib_bfd to
bfd_elf32_arm_set_target_relocs.
(PARSE_AND_LIST_PROLOGUE): Define OPTION_IN_IMPLIB option.
(PARSE_AND_LIST_LONGOPTS): Define --in-implib option.
(PARSE_AND_LIST_OPTIONS): Add help message for --in-implib option.
(PARSE_AND_LIST_ARGS_CASES): Handle new OPTION_IN_IMPLIB case.
* ld.texinfo (--cmse-implib): Update to mention --in-implib.
(--in-implib): Document new option.
* NEWS: Likewise.
* testsuite/ld-arm/arm-elf.exp
(Secure gateway import library generation): add --defsym VER=1 to gas
CLI.
(Secure gateway import library generation: errors): Likewise.
(Input secure gateway import library): New test.
(Input secure gateway import library: no output import library):
Likewise.
(Input secure gateway import library: not an SG input import library):
Likewise.
(Input secure gateway import library: earlier stub section base):
Likewise.
(Input secure gateway import library: later stub section base):
Likewise.
(Input secure gateway import library: veneer comeback): Likewise.
(Input secure gateway import library: entry function change):
Likewise.
* testsuite/ld-arm/cmse-implib.s: Add input import library testing.
* testsuite/ld-arm/cmse-implib.rd: Update accordingly.
* testsuite/ld-arm/cmse-new-implib.out: New file.
* testsuite/ld-arm/cmse-new-implib.rd: Likewise.
* testsuite/ld-arm/cmse-new-implib-no-output.out: Likewise.
* testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out: Likewise.
* testsuite/ld-arm/cmse-new-earlier-later-implib.out: Likewise.
* testsuite/ld-arm/cmse-new-comeback-implib.rd: Likewise.
* testsuite/ld-arm/cmse-new-wrong-implib.out: Likewise.
bfd/
* elf32-arm.c (CMSE_PREFIX): Define macro.
(elf32_arm_stub_cmse_branch_thumb_only): Define stub sequence.
(cmse_branch_thumb_only): Declare stub.
(struct elf32_arm_link_hash_table): Define cmse_stub_sec field.
(elf32_arm_get_plt_info): Add globals parameter. Use it to return
FALSE if there is no PLT.
(arm_type_of_stub): Adapt to new elf32_arm_get_plt_info signature.
(elf32_arm_final_link_relocate): Likewise.
(elf32_arm_gc_sweep_hook): Likewise.
(elf32_arm_gc_mark_extra_sections): Mark sections holding ARMv8-M
secure entry functions.
(arm_stub_is_thumb): Add case for arm_stub_cmse_branch_thumb_only.
(arm_dedicated_stub_output_section_required): Change to a switch case
and add a case for arm_stub_cmse_branch_thumb_only.
(arm_dedicated_stub_output_section_required_alignment): Likewise.
(arm_stub_dedicated_output_section_name): Likewise.
(arm_stub_dedicated_input_section_ptr): Likewise and remove
ATTRIBUTE_UNUSED for htab parameter.
(arm_stub_required_alignment): Likewise.
(arm_stub_sym_claimed): Likewise.
(arm_dedicated_stub_section_padding): Likewise.
(cmse_scan): New function.
(elf32_arm_size_stubs): Call cmse_scan for ARM M profile targets.
Set stub_changed to TRUE if such veneers were created.
(elf32_arm_swap_symbol_in): Add detection code for CMSE special
symbols.
include/
* arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
(ARM_SET_SYM_CMSE_SPCL): Likewise.
ld/
* ld.texinfo (Placement of SG veneers): New concept entry.
* testsuite/ld-arm/arm-elf.exp
(Secure gateway veneers: no .gnu.sgstubs section): New test.
(Secure gateway veneers: wrong entry functions): Likewise.
(Secure gateway veneers (ARMv8-M Baseline)): Likewise.
(Secure gateway veneers (ARMv8-M Mainline)): Likewise.
* testsuite/ld-arm/cmse-veneers.s: New file.
* testsuite/ld-arm/cmse-veneers.d: Likewise.
* testsuite/ld-arm/cmse-veneers.rd: Likewise.
* testsuite/ld-arm/cmse-veneers.sd: Likewise.
* testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out: Likewise.
* testsuite/ld-arm/cmse-veneers-wrong-entryfct.out: Likewise.
2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
* elf32-arm.c (THUMB32_MOVT): New veneer macro.
(THUMB32_MOVW): Likewise.
(elf32_arm_stub_long_branch_thumb2_only_pure): New.
(DEF_STUBS): Define long_branch_thumb2_only_pure.
(arm_stub_is_thumb): Add new veneer stub.
(arm_type_of_stub): Use new veneer.
(arm_stub_required_alignment): Add new veneer.
2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
* testsuite/ld-arm/farcall-thumb2-purecode.d: New test result.
* testsuite/ld-arm/farcall-thumb2-purecode.s: New test.
* testsuite/ld-arm/arm-elf.exp: Run it.
2016-07-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb2_bl): New function.
(arm_type_of_stub): Declare thumb2 variable together and change type
to bfd_boolean. Use using_thumb2_bl () to determine whether
THM_MAX_FWD_BRANCH_OFFSET or THM2_MAX_FWD_BRANCH_OFFSET should be
checked for BL range.
(elf32_arm_final_link_relocate): Use using_thumb2_bl () to determine
the bit size of BL offset.
ld/
* testsuite/ld-arm/arm-elf.exp (Thumb-2 BL): Assemble for ARMv7.
(Thumb-2 BL on ARMv6-M): New testcase.
* testsuite/ld-arm/thumb2-bl.d: Do not try to match testcase filename.
* testsuite/ld-arm/thumb2-bl.s: Do not select architecture.
bfd * elfnn-aarch64.c (is_aarch64_mapping_symbol): New function.
Returns TRUE for AArch64 mapping symbols.
(elfNN_aarch64_backend_symbol_processing): New function. Marks
mapping symbols as precious in object files so that they will not
be stripped.
(elf_backend_symbol_processing): Define.
* elf32-arm.c (is_arm_mapping_symbol): New function. Returns TRUE
for ARM mapping symbols.
(elf32_arm_backend_symbol_processing): Make use of the new function.
* elf32-arm.c (elf32_arm_backend_symbol_processing): New
function. Marks mapping symbols in object files as precious, so
that strip will not remove them.
(elf_backend_symbol_processing): Define.
2016-06-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
Tony Wang <tony.wang@arm.com>
bfd/
* elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
sequence.
(stub_long_branch_thumb2_only): Define stub.
(arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
(arm_stub_long_branch_thumb2_only): Likewise.
(arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
capable targets.
ld/
* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile):
Assemble for ARMv6-M.
(Thumb2-Thumb2 farcall M profile): New testcase.
* testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file.
* testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to
reflect the use of Thumb-2 veneers for Thumb-2 capable targets.
* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
2016-06-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb_only): Force review of arch check logic for
new architecture.
(using_thumb2): Try Tag_THUMB_ISA_use first and check
for exact arch value then. Force review of arch check logic for new
architecture.
(arch_has_arm_nop): Update and fix arch check logic. Force review of
that logic for new architecture.
(arch_has_thumb2_nop): Remove.
(elf32_arm_tls_relax): Use using_thumb2 instead of above function.
(elf32_arm_final_link_relocate): Likewise but using thumb2.
2016-05-23 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (arm_dedicated_stub_section_padding): New function.
(elf32_arm_size_stubs): Declare stub_type in a more outer scope and
account for padding for stub section requiring one.
(elf32_arm_build_stubs): Add comment to stress the importance of
zeroing veneer section content.
2016-05-23 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (bfd_elf32_arm_keep_private_stub_output_sections): Declare
bfd hook.
* bfd-in2.h: Regenerate.
* elf32-arm.c (arm_dedicated_stub_output_section_required): New
function.
(arm_dedicated_stub_output_section_required_alignment): Likewise.
(arm_dedicated_stub_output_section_name): Likewise.
(arm_dedicated_stub_input_section_ptr): Likewise.
(elf32_arm_create_or_find_stub_sec): Add stub type parameter and
function description comment. Add support for dedicated output stub
section to given stub types.
(elf32_arm_add_stub): Add a stub type parameter and pass it down to
elf32_arm_create_or_find_stub_sec.
(elf32_arm_create_stub): Pass stub type down to elf32_arm_add_stub.
(elf32_arm_size_stubs): Pass stub type when calling
elf32_arm_create_or_find_stub_sec for Cortex-A8 erratum veneers.
(bfd_elf32_arm_keep_private_stub_output_sections): New function.
ld/
* emultempl/armelf.em (arm_elf_before_allocation): Call
bfd_elf32_arm_keep_private_stub_output_sections before generic
before_allocation function.
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (enum elf32_arm_stub_type): New max_stub_type
enumerator.
(arm_stub_sym_claimed): New function.
(elf32_arm_create_stub): Use veneered symbol name and section if
veneer needs to claim its symbol, and keep logic unchanged otherwise.
(arm_stub_claim_sym): New function.
(arm_map_one_stub): Call arm_stub_claim_sym if veneer needs to claim
veneered symbol, otherwise create local symbol as before.
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (elf32_arm_size_stubs): Use new macros
ARM_GET_SYM_BRANCH_TYPE and ARM_SET_SYM_BRANCH_TYPE to respectively get
and set branch type of a symbol.
(bfd_elf32_arm_process_before_allocation): Likewise.
(elf32_arm_relocate_section): Likewise and fix identation along the
way.
(allocate_dynrelocs_for_symbol): Likewise.
(elf32_arm_finish_dynamic_symbol): Likewise.
(elf32_arm_swap_symbol_in): Likewise.
(elf32_arm_swap_symbol_out): Likewise.
gas/
* config/tc-arm.c (arm_adjust_symtab): Use ARM_SET_SYM_BRANCH_TYPE to
set branch type of a symbol.
gdb/
* arm-tdep.c (arm_elf_make_msymbol_special): Use
ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.
include/
* arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
enumerator.
(NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
(ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
(ARM_SYM_BRANCH_TYPE): Replace by ...
(ARM_GET_SYM_BRANCH_TYPE): This and ...
(ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
BFD_ASSERT is defined or not.
ld/
* emultempl/armelf.em (gld${EMULATION_NAME}_finish): Use
ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.
opcodes/
* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
branch type of a symbol.
(print_insn): Likewise.
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (elf32_arm_size_stubs): Add an output section parameter.
* bfd-in2.h: Regenerated.
* elf32-arm.c (struct elf32_arm_link_hash_table): Add an output section
parameter to add_stub_section callback.
(elf32_arm_create_or_find_stub_sec): Get output section from link_sec
and pass it down to add_stub_section.
(elf32_arm_add_stub): Set section to stub_sec if NULL before using it
for error message.
(elf32_arm_size_stubs): Add output section parameter to
add_stub_section function pointer parameter.
ld/
* emultempl/armelf.em (elf32_arm_add_stub_section): Add output_section
parameter and rename input_section parameter to after_input_section.
Append input stub section to the output section if after_input_section
is NULL.
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (elf32_arm_create_stub): New function.
(elf32_arm_size_stubs): Use elf32_arm_create_stub for stub creation.
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (enum elf32_arm_stub_type): Delete
arm_stub_a8_veneer_lwm enumerator.
(arm_stub_a8_veneer_lwm): New unsigned constant to replace
aforementioned enumerator.
(struct elf32_arm_stub_hash_entry): Delete target_addend
field and add source_value.
(struct a8_erratum_fix): Delete addend field and add target_offset.
(stub_hash_newfunc): Initialize source_value field amd remove
initialization for target_addend.
(arm_build_one_stub): Stop special casing Thumb relocations: promote
the else to being always executed, moving the
arm_stub_a8_veneer_b_cond specific code in it. Remove
stub_entry->target_addend from points_to computation.
(cortex_a8_erratum_scan): Store in a8_erratum_fix structure the offset
to target symbol from start of section rather than the offset from the
stub address.
(elf32_arm_size_stubs): Set stub_entry's source_value and target_value
fields from struct a8_erratum_fix's offset and target_offset
respectively.
(make_branch_to_a8_stub): Rename target variable to loc. Compute
veneered_insn_loc and loc using stub_entry's source_value.
PR 19938
bfd * elf-bfd.h (struct elf_backend_data): Rename
elf_backend_set_special_section_info_and_link to
elf_backend_copy_special_section_fields.
* elfxx-target.h: Likewise.
* elf.c (section_match): Ignore the SHF_INFO_LINK flag when
comparing section flags.
(copy_special_section_fields): New function.
(_bfd_elf_copy_private_bfd_data): Copy the EI_ABIVERSION field.
Perform two scans over special sections. The first one looks for
a direct mapping between the output section and an input section.
The second scan looks for a possible match based upon section
characteristics.
* elf32-arm.c (elf32_arm_copy_special_section_fields): New
function. Handle setting the sh_link field of SHT_ARM_EXIDX
sections.
* elf32-i386.c (elf32_i386_set_special_info_link): Rename to
elf32_i386_copy_solaris_special_section_fields.
* elf32-sparc.c (elf32_sparc_set_special_section_info_link):
Rename to elf32_sparc_copy_solaris_special_section_fields.
* elf64-x86-64.c (elf64_x86_64_set_special_info_link): Rename to
elf64_x86_64_copy_solaris_special_section_fields.
binutils* readelf.c (get_solaris_segment_type): New function.
(get_segment_type): Call it.
We operate on the pointer's target as a set of bytes, and this avoids doing
arithmetic on void * which is undefined in ISO C.
bfd/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* elf32-arm.c (put_thumb2_insn): Change argument type to bfd_byte *.
2016-04-06 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (elf32_arm_size_stubs): Move error_ret_free_local to be
a fall through from error_ret_free_internal. Free local_syms in
error_ret_free_local if allocated from bfd_elf_get_elf_syms ().
PR ld/19455
* elf32-arm.c (elf32_arm_create_dynamic_sections): Set the ELF
class of the linker stub bfd.
(elf32_arm_check_relocs): Skip check for pic format after
processing a vxWorks R_ARM_ABS12 reloc.
* elflink.c (bfd_elf_final_link): Check for ELFCLASSNONE when
reporting a class mismatch.
* testsuite/ld-arm/vxworks1-lib.dd: Update for current
disassmebler output.
* testsuite/ld-arm/vxworks1-lib.rd: Likewise.
* testsuite/ld-arm/vxworks1.dd: Likewise.
* testsuite/ld-arm/vxworks1.rd: Likewise.
* testsuite/ld-arm/vxworks1.ld: Set the output format.
bfd/ChangeLog:
* elf32-arm.c ((elf32_arm_special_sections): Remove catch of noread
section using '.text.noread' pattern.
gas/ChangeLog:
* config/obj-elf.c (obj_elf_change_section) : Allow arm section with
SHF_ARM_NOREAD section flag.
* config/tc-arm.h (md_elf_section_letter) : Implement this hook to
handle letter 'y'.
(arm_elf_section_letter) : Declare it.
* config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set
SHF_ARM_NOREAD section flag.
* doc/c-arm.texi (ARM section attribute 'y'): Document it.
gas/testsuite/ChangeLog:
* gas/arm/section-execute-only.s: New test case.
* gas/arm/section-execute-only.d: Expected output.
ld/testsuite/ChangeLog:
* ld-arm/thumb1-noread-not-present-mixing-two-section.s: Add 'y'
attribute usage.
* ld-arm/thumb1-noread-present-one-section.s: Likewise.
* ld-arm/thumb1-noread-present-two-section.s: Likewise.
* ld-arm/thumb1-input-section-flag-match.s: Likewise.
binutils/ChangeLog:
* readelf.c (get_elf_section_flags): Display y letter for section
with SHF_ARM_NOREAD section flag in readelf section output.
(process_section_headers): Add y letter in readelf section output
key mapping for ARM architecture.
bfd * elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind when
address in first unwind entry does not match start of section.
tests * ld-arm/arm-elf.exp: New test.
* ld-arm/unwind-mix.d: New file.
* ld-arm/unwind-mix1.s: New file.
* ld-arm/unwind-mix2.s: New file.
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
(tag_cpu_arch_combine): Adjust comment in v4t_plus_v6_m with regards
to merging with ARMv8-M Baseline.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Baseline Tag_CPU_arch
value.
gas/
* config/tc-arm.c (arm_ext_v6t2_v8m): New feature for instructions
shared between ARMv6T2 and ARMv8-M.
(move_or_literal_pool): Check mov.w/mvn and movw availability against
arm_ext_v6t2 and arm_ext_v6t2_v8m respectively instead of checking
arm_arch_t2.
(do_t_branch): Error out for wide conditional branch instructions if
targetting ARMv8-M Baseline.
(non_v6t2_wide_only_insn): Add the logic for new wide-only instructions
in ARMv8-M Baseline.
(wide_insn_ok): New function.
(md_assemble): Use wide_insn_ok instead of non_v6t2_wide_only_insn and
adapt error message for unsupported wide instruction to ARMv8-M
Baseline.
(insns): Reorganize instructions shared by ARMv8-M Baseline and
ARMv6t2 architecture.
(arm_cpus): Set feature bit ARM_EXT2_V6T2_V8M for marvell-pj4 and
marvell-whitney cores.
(arm_archs): Define armv8-m.base architecture.
(cpu_arch_ver): Define ARM_ARCH_V8M_BASE architecture version.
(aeabi_set_public_attributes): Add logic to set Tag_CPU_arch to 17 for
ARMv8-M Mainline. Set Tag_DIV_use for ARMv8-M Baseline as well.
gas/testsuite/
* gas/arm/archv8m-base.d: New file.
* gas/arm/attr-march-armv8m.base.d: Likewise.
* gas/arm/armv8m.base-idiv.d: Likewise.
* gas/arm/any-armv8m.d: Adapt to deal with ARMv8-M Baseline.
include/elf/
* arm.h (TAG_CPU_ARCH_V8M_BASE): Declare.
include/opcode/
* arm.h (ARM_EXT2_V6T2_V8M): New extension bit.
(ARM_AEXT2_V8A): New architecture extension bitfield.
(ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
(ARM_AEXT_V8M_BASE): New architecture extension bitfield.
(ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M.
(ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension
bitfield.
(ARM_ARCH_V6KT2): Likewise.
(ARM_ARCH_V6ZT2): Likewise.
(ARM_ARCH_V6KZT2): Likewise.
(ARM_ARCH_V7): Likewise.
(ARM_ARCH_V7A): Likewise.
(ARM_ARCH_V7VE): Likewise.
(ARM_ARCH_V7R): Likewise.
(ARM_ARCH_V7M): Likewise.
(ARM_ARCH_V7EM): Likewise.
(ARM_ARCH_V8A): Likewise.
(ARM_ARCH_V8M_BASE): New architecture bitfield.
(ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M.
(ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension
bitfield and reindent.
(ARM_ARCH_V7A_MP_SEC): Likewise.
(ARM_ARCH_V7R_IDIV): Likewise.
(ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTOV1): Likewise.
opcodes/
* arm-dis.c (arm_opcodes): Guard movw, movt cbz, cbnz, clrex, ldrex,
ldrexb, ldrexh, strex, strexb, strexh shared by ARMv6T2 and ARMv8-M by
ARM_EXT2_V6T2_V8M instead of ARM_EXT_V6T2.
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
(tag_cpu_arch_combine): Adjust v4t_plus_v6_m and comb array to account
for new TAG_CPU_ARCH_V4T_PLUS_V6_M value. Deal with NULL values in
comb array.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Mainline Tag_CPU_arch
value.
(arm_attr_tag_THUMB_ISA_use): Add ARMv8-M Mainline Tag_THUMB_ISA_use
value.
gas/
* config/tc-arm.c (arm_ext_m): Include ARMv8-M.
(arm_ext_v8m): New feature for ARMv8-M.
(arm_ext_atomics): New feature for ARMv8 atomics.
(do_tt): New encoding function for TT* instructions.
(insns): Add new entries for ARMv8-M specific instructions and
reorganize the ones shared by ARMv8-M Mainline and ARMv8-A.
(arm_archs): Define armv8-m.main architecture.
(cpu_arch_ver): Define ARM_ARCH_V8M_MAIN architecture version and
clarify the ordering rule.
(aeabi_set_public_attributes): Use TAG_CPU_ARCH_* macro to refer to
Tag_CPU_arch values for ARMv7e-M detection. Add logic to keep setting
Tag_CPU_arch to ARMv8-A for -march=all. Also set Tag_CPU_arch_profile
to 'A' if extension bit for atomic instructions is set, unless it is
ARMv8-M. Set Tag_THUMB_ISA_use to 3 for ARMv8-M. Set Tag_DIV_use to 0
for ARMv8-M Mainline.
gas/testsuite/
* gas/arm/archv8m.s: New file.
* gas/arm/archv8m-main.d: Likewise.
* gas/arm/attr-march-armv8m.main.d: Likewise.
* gas/arm/any-armv8m.s: Likewise.
* gas/arm/any-armv8m.d: Likewise.
include/elf/
* arm.h (TAG_CPU_ARCH_V8M_MAIN): Declare.
(MAX_TAG_CPU_ARCH): Define to TAG_CPU_ARCH_V8M_MAIN.
(TAG_CPU_ARCH_V4T_PLUS_V6_M): Define to unused value 15.
include/opcode/
* arm.h (ARM_EXT2_ATOMICS): New extension bit.
(ARM_EXT2_V8M): Likewise.
(ARM_EXT_V8): Adjust comment with regards to atomics and remove
mention of legacy use for that bit.
(ARM_AEXT2_V8_1A): New architecture extension bitfield.
(ARM_AEXT2_V8_2A): Likewise.
(ARM_AEXT_V8M_MAIN): Likewise.
(ARM_AEXT2_V8M): Likewise.
(ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield.
(ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A.
(ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A.
(ARM_ARCH_V8M_MAIN): New architecture feature bitfield.
(ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield
and reindent.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTOV1): Likewise.
(ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of
feature bits.
(ARM_ARCH_V8_1A_SIMD): Likewise.
(ARM_ARCH_V8_1A_CRYPTOV1): Likewise.
opcodes/
* arm-dis.c (arm_opcodes): Guard lda, ldab, ldaex, ldaexb, ldaexh, stl,
stlb, stlh, stlex, stlexb and stlexh by ARM_EXT2_ATOMICS instead of
ARM_EXT_V8.
(thumb32_opcodes): Add entries for wide ARMv8-M instructions.
bfd * elf-bfd.h: Add callback to count additional relocations.
* elf32-arm.c (_arm_elf_section_data): Add new counter.
(insert_cantunwind_after): Increment relocations counter.
(elf32_arm_fix_exidx_coverage): Remove exidx entries and add
terminating CANTUNWIND entry only in final builds.
(elf32_arm_add_relocation): New function.
(elf32_arm_write_section): Add relocations in relocatable builds.
(elf32_arm_count_additional_relocs): New function.
(elf_backend_count_additional_relocs): New define.
* bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of
.rel section.
* bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define.
ld * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call
elf32_arm_fix_exidx_coverage for relocatable builds.
ld/testsuite
* ld-arm/arm-elf.exp: New test.
* ld-arm/unwind-rel.d: New file.
* ld-arm/unwind-rel1.s: New file.
* ld-arm/unwind-rel2.s: New file.
* ld-arm/unwind-rel3.s: New file.
include/elf
* arm.h: Add arm SHF_ARM_NOREAD section flag.
bfd * bfd-in2.h: Regenerate.
* section.c: Add SEC_ELF_NOREAD.
* elf32-arm.c (elf32_arm_post_process_headers): Only set
PF_X attribute if a segment only contains section with
SHF_ARM_NOREAD flag.
(elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
(elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
to bfd flag.
(elf32_arm_lookup_section_flags): New function to allow
INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
(elf32_arm_special_sections): Add special sections array
to catch section prefix by '.text.noread' pattern.
ld/testsuite
* ld-arm/arm-elf.exp: New tests.
* ld-arm/thumb1-input-section-flag-match.d: New
* ld-arm/thumb1-input-section-flag-match.s: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
* ld-arm/thumb1-noread-present-one-section.d: New
* ld-arm/thumb1-noread-present-one-section.s: New
* ld-arm/thumb1-noread-present-two-section.d: New
* ld-arm/thumb1-noread-present-two-section.s: New
binutils
* readelf.c (get_elf_section_flags): Add support for ARM specific
section flags.
To support thumb1 execute-only code we need to support four new
relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC,
R_ARM_THM_ALU_ABS_G2_NC and R_ARM_THM_ALU_ABS_G3_NC).
These relocations allow the static linker to finalize construction
of symbol address.
Typical sequence of code to get address of the symbol foo is then
the following :
movs r3, #:upper8_15:#foo
lsls r3, #8
adds r3, #:upper0_7:#foo
lsls r3, #8
adds r3, #:lower8_15:#foo
lsls r3, #8
adds r3, #:lower0_7:#foo
This will give following sequence of text and relocations after
assembly :
4: 2300 movs r3, #0
4: R_ARM_THM_ALU_ABS_G3_NC foo
6: 021b lsls r3, r3, #8
8: 3300 adds r3, #0
8: R_ARM_THM_ALU_ABS_G2_NC foo
a: 021b lsls r3, r3, #8
c: 3300 adds r3, #0
c: R_ARM_THM_ALU_ABS_G1_NC foo
e: 021b lsls r3, r3, #8
10: 3300 adds r3, #0
10: R_ARM_THM_ALU_ABS_G0_NC foo
