(md_begin): Initialize mips_isa based on TARGET_CPU. Don't sanity
check macros. Set text alignment and GP size here.
(md_assemble): Don't set text alignment and GP size here.
(append_insn): Don't insert NOPs for load delays if mips_isa >= 2.
Use the right mask and shift for WRITE_FPR_T and WRITE_FPR_S. Add
a NOP after a branch likely.
(mips_emit_delays): Don't insert NOPS for load delays if mips_isa
>= 2.
(macro): Support r6000 and r4000 macros.
(mips_ip): Check insn ISA level against mips_isa before using it.
Added 'x' case for ignored register.
(md_parse_option): Handle -mipsN and -mcpu=XX.
(md_parse_option): New macro, converted from function.
* tc-i386.c (md_parse_option): Function deleted.
(comment_chars) [OBJ_ELF]: Include "/".
(line_comment_chars) [OBJ_ELF || TE_I386AIX]: Don't include "/".
(md_assemble): Cast 0xe9 to char explicitly, to avoid compiler warning.
(md_assemble, md_estimate_size_before_relax, md_create_long_jump): Call reloc
for fix_new type, or use correct enumerator, instead of always using NO_RELOC.
(i386_operand): Change "ifndef I386COFF" to "ifdef OBJ_AOUT" for
tests for valid section.
(md_convert_frag) [BFD_ASSEMBLER]: Compensate for frag start address.
(md_apply_fix_1) [BFD_ASSEMBLER]: For pc-relative reloc with
symbol, compensate for location of reloc.
(reloc, BFD_RELOC_32, BFD_RELOC_32_PCREL) [!BFD_ASSEMBLER]: Define to return
zero.
(obj_elf_weak): New function.
(obj_pseudo_table): Handle ".weak".
(obj_elf_section): If section directive includes a string, ignore
it for now. Accept "progbits" flag.
(obj_elf_type): Accept `@' before flag name.
if .set nobopt or .set volatile.
(gp_reference): .lit8 and .lit4 are accessed via the GP register.
(macro): Added cases M_LI_S, M_LI_SS. Fixed M_LI_D and M_LI_DD.
(mips_ip): Added cases 'F', 'L', 'f', 'l' for floating point.
* config/obj-ecoff.c: Renamed some variables to avoid shadow
warnings.
davidj@ICSI.Berkeley.EDU (David Johnson): Don't accept symbolic
names for 'E' and 'G' argument types (coprocessor registers) and
don't warn if $1 is used on the coprocessor.
debug section is new, allocate an extra 12 bytes at its start. If
".stabs" type is N_SO, fill in filename symbol field of that first
entry. Return early if "goof", to simplify later code slightly.
(adjust_stab_sections): New function.
(elf_frob_file): Apply adjust_stab_sections to each section.
* obj-elf.c (obj_elf_section, obj_elf_previous): No longer static.
* obj-elf.h (obj_elf_section, obj_elf_previous): Declare.
* tc-sparc.c (md_pseudo_table): Call them for "pushsection"
and "popsection", and call cons for "uaword" and "uahalf".
* obj-elf.c (obj_elf_version): Use English in error messages.
* tc-sparc.c (md_apply_fix, case BFD_RELOC_64): New case,
parallel to BFD_RELOC_32.
(tc_gen_reloc): Accept BFD_RELOC_64.
pseudo-op with a poc_handler field of NULL, ignore it and treat it
as an instruction instead.
* config/tc-m88k.c (md_pseudo_table): Add "set" with a NULL
poc_handler field.
* configure.in (case ${generic_target}): Add i[34]86-*-sysv4*
case to set obj_format=elf. Must go before i386-*-sysv* case that
sets obj_format=coffbsd. Add *-*-sysv4* to *-*-elf and
*-*-solaris case, and move to before *-sysv* case that wants to
set obj_format to coff.
* config/tc-i386.c (i386_operand): Change all 'exp.X_op' to
'exp->X_op'.
* config/tc-i386.c (md_apply_fix): Fix valp to be 'valueT *' for
BFD_ASSEMBLER case.
up opcodes as pseudo-ops even if they don't start with '.'.
* config/tc-m88k.h (NO_PSEUDO_DOT): Define.
* config/tc-m88k.c (md_assemble): Removed special pseudo-op
handling.
(md_apply_fix): Set fx_offset to the upper 16 bits of the reloc.
Output the low 16 bits for RELOC_HI16, not the high 16 bits.
* config/obj-coffbfd.c (do_relocs_for): If TC_M88K, set the
r_offset field of the reloc to the fixup offset.
(fixup_segments): If TC_M88K, don't warn about fixup overflows.
* doc/as.texinfo: Minor updates.