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1875 Commits

Author SHA1 Message Date
Doug Evans
8406c876c5 * Makefile.in (M32R_OBJS): Delete extract.o. 
(extract.o): Delete.
	(stamp-arch): Depend on $(CGEN_ARCH_SCM).
	(stamp-cpu): Don't build extract.c.
	* cpu.c,cpu.h,decode.c,decode.h,sem-switch.c,sem.c: Rebuild.
	* mloop.in (extract16): Update type of `insn' arg.
	Delete call to d->extract.
	(extract32): Ditto.

	* Makefile.in (M32RX_OBJS): Delete extractx.o.
	(extractx.o): Delete.
	(stamp-xcpu): Don't build extractx.c.
	* cpux.c,cpux.h,decodex.c,decodex.h,semx-switch.c: Rebuild.
	* mloopx.in (extractx16): Update type of `insn' arg.
	Delete call to d->extract.  Delete arg pbb_p.  All callers updated.
	(extract-simple,full-exec-simple,fast-exec-simple): Delete.
	(extractx32): Ditto.
 1998-11-19 00:12:00 +00:00
Doug Evans
916b11527e * Make-common.in (cgen-utils.o): Depend on cgen-engine.h. 
(CGEN_ARCH_SCM): New variable.
	* cgen-engine.h (EXTRACT_[ML]SB0_{INT,UINT}): New macros.
	(EXTRACT_INT,EXTRACT_UINT): New macros.
	(SEM_SEM_ARG): New macro.
	(SEM_NEXT_VPC): New arg `pc'.
	* cgen-sim.h (EXTRACT_SIGNED,EXTRACT_UNSIGNED): Delete.
	(sim_disassemble_insn): Update prototype.
	* cgen-trace.c (current_insn,insn_fields): New static locals.
	(trace_insn): Set them.
	* cgen-utils.scm: #include cgen-engine.h.
	(sim_disassemble_insn): New arg insn_fields.
	Handle variable length insns.
	* genmloop.sh: Only emit pbb decls if -pbb.
	(${cpu}_scache_lookup): New arg `vpc'.
	(scache support): Fetch pc before entering loop.
 1998-11-18 23:45:32 +00:00
Doug Evans
2c05443851 * gennltvals.sh: Add fr30 support. 
* nltvals.def: Rebuild.
 1998-11-18 22:41:50 +00:00
Andrew Cagney
78dee4ee05 Re-do type system so that GCC's explicit attribute/mode types are used 
(when available).
Update sim-bits and sim-alu tests in sim/testsuite/common.
 1998-11-17 23:59:30 +00:00
Frank Ch. Eigler
ca0669a326 * sun build fix for thinko (?) 1998-11-16 08:52:06 +00:00
Frank Ch. Eigler
92fa45795d * Personal prototype "gx" translation-based JIT engine for M32R. 
[ChangeLog]
start-sanitize-gxsim
1998-11-13  Frank Ch. Eigler  <fche@elastic.org>
	* configure.in: Added "--enable-sim-gx" option.
	* configure: Regenerated.
end-sanitize-gxsim
[common/ChangeLog]
1998-11-13  Frank Ch. Eigler  <fche@elastic.org>
start-sanitize-gxsim
	* Make-common.im: Build sim-gx.o and sim-gx-run.o.
	* sim-gx.c: New file: target-independent gx routines.
	* sim-gx.h: Declarations for gx structs and routines.
	* sim-gx-run.c: New file: target-independent gx driver.
	* sim-base.h: Add gx block vector to state struct.
end-sanitize-gxsim
	* aclocal.m4: Add tests for dlopen family.
 1998-11-14 04:35:47 +00:00
Frank Ch. Eigler
fca5abc13a * sanitize fix for do-shifts.S 1998-11-14 04:32:00 +00:00
Frank Ch. Eigler
78cec885d7 * test case for PR 18230, over from d30v branch 
1998-11-12  Frank Ch. Eigler  <fche@cygnus.com>
        * br-djsr.S: New test for new R62-update timing.
 1998-11-12 11:39:05 +00:00
Andrew Cagney
d1cbd70abb Add configury for mips-lsi-elf target (32 bit MIPS16). 
Fix numerous problems with PENDING_* code.
In old gencode simulator, don't double tick each cycle.
Add BREAK instruction to MIPS16 gencode simulator.
 1998-11-12 06:42:34 +00:00
Doug Evans
847b31bdab * sim-hload.c (sim_load): Pass `prog_name' to sim_load_file, not NULL. 1998-11-11 22:02:57 +00:00
Andrew Cagney
7d88afe63e div(-0) sets both I/SI and D/SD (PR16522) 1998-11-11 08:18:55 +00:00
Doug Evans
ca40ecdcec remove cgen support from Makefile.in, moved to cgen dir 1998-11-07 02:47:22 +00:00
Frank Ch. Eigler
edba5926c8 * Patch for PR 18196, brought over from d30v branch. 
[d30v/ChangeLog]
1998-11-06  Frank Ch. Eigler  <fche@cygnus.com>
	* d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
[testsuite/d30v-elf/ChangeLog]
1998-11-06  Frank Ch. Eigler  <fche@cygnus.com>
	* do-shifts.S: Add test for large mvfacc shifts.
 1998-11-06 08:45:57 +00:00
Doug Evans
47a2144503 lose fr30 for now 1998-11-06 00:17:34 +00:00
Dave Brolley
168c5ef4ef Wed Nov 4 19:11:43 1998 Dave Brolley <brolley@cygnus.com> 
* configure.in: Added case for fr30-*-*.
	* configure: Regenerated.
 1998-11-05 20:25:22 +00:00
Frank Ch. Eigler
1995094e7f * r5900 sim test case fix 
Thu Nov  5 10:37:40 EST 1998  Frank Ch. Eigler <fche@cygnus.com>

	* t-prot3w.s: Correct test of prot3w insn.
 1998-11-05 15:42:02 +00:00
Frank Ch. Eigler
210a903baf * build fix 
Thu Nov  5 10:29:42 EST 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* r5900.igen (r59fp_opdiv): Correct erroneous FGR[FD] reference.
 1998-11-05 09:42:06 +00:00
Andrew Cagney
dd0f610960 PR 16522 
Fix RSQRT.S instruction, add test case.
 1998-11-05 09:42:05 +00:00
Doug Evans
8de434bf89 * sim-main.h: Delete inclusion of config.h, include sim-basics.h 
before cgen-types.h.
	* tconfig.in: Guard against multiple inclusion.
	* cpu.h: Delete decls moved to genmloop.sh.
	* cpux.h: Ditto.
 1998-11-05 07:56:02 +00:00
Doug Evans
8c7dc9ffc8 * genmloop.sh (eng.hin): Rename HAVE_PARALLEL_EXEC to 
HAVE_PARALLEL_INSNS, define as 0 or 1.  Emit decls of fns in mloop.cin.
	* cgen-engine.h: Typedefs of IADDR,CIA,SEM_ARG,SEM_PC moved ...
	* cgen-sim.h: ... to here.
 1998-11-05 07:53:37 +00:00
Doug Evans
d4df1e3023 add some comments 1998-11-04 19:27:20 +00:00
Frank Ch. Eigler
fd0e83b604 * adding missing ChangeLog header line 1998-11-02 11:51:27 +00:00
Frank Ch. Eigler
0ec51df9ef * build fix for tx39 sim; caused by sky->devo merge 
* dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
	interrupt level number to match changed SignalExceptionInterrupt
	macro.
 1998-10-30 09:49:18 +00:00
Frank Ch. Eigler
2fee67aeb8 * Updated sanitization 
- remove memories of old sim/testsuite/sky directory
- add new dir sim/testsuite/mips64el-elf to "always-keep" list
 1998-10-30 07:03:14 +00:00
Felix Lee
baa791ae9b * lib/sim-defs.exp (sim_run): download target program to remote 
host, if necessary.  for unix-driven win32 testing.
 1998-10-30 00:39:44 +00:00
Michael Snyder
eeb89805cb fix minor typo. 1998-10-29 18:24:04 +00:00
Frank Ch. Eigler
271f091db7 * Test cases for PR 18015. 
Thu Oct 29 12:07:06 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* t-psrlvw.s (test_psrlvw): Add test for sign-extension in insn.
	* t-padsbh.s: New test.
	* t-mult1.s: New test.
	* Makefile.in: Run them.
 1998-10-29 17:28:18 +00:00
Frank Ch. Eigler
fd6e6422c8 * sky->devo merge, continued -- left out the r5900 TLB last time! 
* includes a small PR 17224 tweak
 1998-10-29 13:44:37 +00:00
Frank Ch. Eigler
0d51822e3b * monster sky->devo merge -- sky sim test suites 1998-10-29 12:59:50 +00:00
Frank Ch. Eigler
afacff5074 * sky->devo merge; dummy test suite directory for mips64el-skyb-elf target. 1998-10-29 12:07:51 +00:00
Frank Ch. Eigler
3ac7980b23 * Fixes for PR 18015, from customer. 
Thu Oct 29 11:06:30 EST 1998  Frank Ch. Eigler <fche@cygnus.com>
	* r5900.igen: Fix PSRLVW, MULTU1, PADSBH instructions,
	as per customer patch.
 1998-10-29 09:30:11 +00:00
Doug Evans
3afece8646 * sim-if.c (sim_do_command): Handle "sim info reg {bbpsw,bbpc}". 
Bring over from branch.
 1998-10-28 22:45:11 +00:00
Drew Moseley
84e42e1daf For cygwin hosts, we need to use the return value from the read 
routine as the number of bytes to process.  This apparently is due to
text-mode vs binary-mode.  If the mounts are done text-mode, then the
size returnedby fstat() may be different than the number of bytes
"read" in text mode.
 1998-10-28 21:16:44 +00:00
Andrew Cagney
b9a9cde40b Unify (well almost) --enable-build-warnings configuration option 
across GDB and SIM directories.
 1998-10-28 02:01:32 +00:00
Frank Ch. Eigler
fe146542dd * Fix for testcase for checking PR 17362. 
Tue Oct 27 15:20:16 EST 1998  Frank Ch. Eigler <fche@cygnus.com>

	* t-prot3w.s: Test changed spec of prot3w insn.
 1998-10-27 21:49:15 +00:00
Frank Ch. Eigler
fda83b6795 * MONSTER sky -> devo merge 
* ChangeLog / ChangeLog.sky entries were merged with original time stamps;
  a few were moved between the files
 1998-10-27 12:48:08 +00:00
Doug Evans
9c5da58d59 * sim-main.h: #include cpu-opc.h. 
* arch.c,arch.h,decode.c,extract.c,model.c,sem.c: Regenerate
	to get #include cleanup.
	* decodex.c,extractx.c,modelx.c: Ditto.
 1998-10-19 23:33:40 +00:00
Doug Evans
48ffd442f6 * Makefile.in (SIM_EXTRA_DEPS): Replace cgen headers with 
CGEN_INCLUDE_DEPS.
	(M32RBF_INCLUDE_DEPS): Define.
	(m32r .o's): Depend on it.
	(mloop.c): Update call to genmloop.sh.
	* cpu.h,cpuall.h: Regenerate.
	* sim-main.h: Delete inclusion of cpu.h,decode.h, moved to cpuall.h.
	#include cgen-scache.h,cgen-cpu.h.
	* tconfig.in (WITH_FOO semantic macros): Delete.
	* Makefile.in (M32RXF_INCLUDE_DEPS): Define.
	(m32rx .o's): Depend on it.
	(mloopx.c): Update call to genmloop.sh.
	* cpux.h: Regenerate.
 1998-10-19 21:14:14 +00:00
Doug Evans
b35179cb0b * Make-common.in (CGEN_INCLUDE_DEPS): Define. 
(sim-core.o): Delete duplicate dependence on $(SIM_EXTRA_DEPS).
	(sim-cpu.o,sim-endian.o,sim-hw.o): Ditto.
	(cgen-run.o,cgen-scache.o,cgen-trace.o,cgen-utils.o): Delete
	explicit cgen header dependencies, require SIM_EXTRA_DEPS to include
	CGEN_INCLUDE_DEPS.
	* cgen-cpu.h: New file.
	* cgen-engine.h: New file.
	* cgen-scache.h: New file.
	* cgen-sim.h: Delete portions moved to new files.
	* genmloop.sh: Generate two files eng.hin,mloop.cin explicitly,
	rather than sending result to stdout.
 1998-10-19 21:00:59 +00:00
Doug Evans
3b5f425750 * interp.c: #include "itable.h" if WITH_IGEN. 
(get_insn_name): New function.
	(sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
	* sim-main.h (MAX_INSNS,INSN_NAME): Delete.
 1998-10-10 01:07:15 +00:00
Doug Evans
bb51b65d68 Add pseudo-basic-block execution support. 
* Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o.
	(SIM_EXTRA_DEPS): Add include/opcode/cgen.h.
	(INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h.
	(mloop.c): Build pseudo-basic-block version.  Depend on stamp-cpu.
	(stamp-decode): Delete, build decode files with other cpu files.
	* arch.c,arch.h,cpuall.h: Regenerate.
	* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
	* sem-switch.c,sem.c: Regenerate.
	* m32r-sim.h (M32R_MISC_PROFILE): New members load_regs,
	load_regs_pending.
	* m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register.
	(m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set,
	m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get,
	m32rbf_h_accum_set): Likewise.
	(m32r_model_{init,update}_insn_cycles): Delete.
	(m32rbf_model_insn_{before,after}): New fns.
	(m32r_model_record_cti,m32r_model_record_cycles): Delete.
	(m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete.
	(m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete.
	(check_load_stall): New fn.
	(m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns.
	(m32rbf_model_test_u_exec): New fn.
	* mloop.in: Rewrite, use pbb support.
	* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete.
	(sim_fetch_register,sim_store_register): Delete.
	* sim-main.h (CIA_GET,CIA_SET): Fix.
	(SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete.
	* tconfig.in (WITH_SCACHE_PBB): Define.
	(WITH_SCACHE_PBB_M32RBF): Define.
	* traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_....
	(m32r_trap): Pass pc to sim_engine_halt.
	* configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384.
	* configure: Regenerate.
start-sanitize-m32rx
	* Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o.
	(mloopx.c): Build pseudo-basic-block version.  Depend on stamp-xcpu.
	(semx.o): Delete.
	(extractx.o): Add.
	(stamp-xdecode): Delete, build decode files with other cpu files.
	* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate.
	* readx.c: Delete.
	* semx.c: Delete.
	* extractx.c: New file.
	* semx-switch.c: New file.
	* m32r-sim.h (BRANCH_NEW_PC): Delete.
	(SEM_SKIP_INSN): New macro.
	* m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register.
	(m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set,
	m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get,
	m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise.
	(m32rxf_model_insn_{before,after}): New fns.
	(m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete.
	(m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete.
	(check_load_stall): New fn.
	(m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns.
	* mloopx.in: Rewrite, use pbb support.
	* tconfig.in (WITH_SCACHE_PBB_M32RXF): Define.
	(WITH_SEM_SWITCH_FULL): Change from 0 to 1.
end-sanitize-m32rx
 1998-10-09 23:43:28 +00:00
Doug Evans
0b517b9cf2 * Make-common.in (sim-reg.o): New rule. 
(cgen-run.o): New rule.
	* cgen-ops.h: Delete many BI macros.  Change all UBI -> BI.
	* cgen-run.c (prime_cpu): New function.
	* cgen-scache.c: Add pseudo-basic-block (pbb) scaching support.
	(scache_option_handler, case OPTION_PROFILE_SCACHE): Handle explicitly
	mentioned cpu.
	(scache_flush_cpu,scache_lookup,scache_lookup_or_alloc): New fns.
	* cgen-sim.h (CGEN_INSN_VIRTUAL_TYPE): New enum.
	(CGEN_INSN_VIRTUAL_P): New macro.
	(SEM_PC): New typedef.
	(SEMANTIC_FN): Change type of result to SEM_PC.
	(SEM_SET_FULL_CODE,SEM_SET_FAST_CODE,SEM_SET_CODE): New macros.
	(IDESC_CTI_P,IDESC_SKIP_P): New macros.
	(SCACHE_MAP): New typedef.
	(CPU_SCACHE): Add pbb support.
	(scace_lookup,scache_lookup_or_alloc,scache_flush_cpu): Declare.
	(SEM_BRANCH_INIT_EXTRACT,SEM_BRANCH_INIT,SEM_BRANCH_FINI): New macros.
	(CGEN_CPU): New members running_p,insn_count,{fast,full}_engine_fn,
	max_slice_insns.
	(INSN_NAME): Delete.
	(cgen_insn_name): Declare.
	(sim_engine_invalid_insn): Renamed from sim_engine_illegal_insn.
	* cgen-trace.c (trace_buf): Shrink from 1024 to 256 bytes.
	(first_insn_p): Make static.
	(trace_insn): Handle virtual insns specially.
	(cgen_trace_printf): Ensure we haven't overflowed the buffer.
	* cgen-types.h (UBI): Delete.
	(MODE_TYPE): New enum.
	(HOSTINT,HOSTUINT,HOSTPTR): Delete.
	* cgen-utils.c (mode_names): Delete UBI.  Add INT,UINT,PTR.
	(cgen_virtual_opcode_table): New global.
	(cgen_insn_name): New function.
	(sim_disassemble_insn): Ignore virtual insns.
	* genmloop.sh: Delete top level loop generation.  Add pbb support.
	* sim-cpu.h (CPU_INSN_NAME_FN): New typedef.
	(sim_cpu_base): New members max_insns,insn_name,model_data.
	(CPU_PC_GET,CPU_PC_SET): New macros.
	(sim_pc_get,sim_pc_set): Declare.
	* sim-model.c (model_set): Call model init fn.
	* sim-model.h (MODEL_FN): New typedef.
	(INSN_TIMING): New member model_fn.
	(MODEL): New members num,init.
	* sim-profile.c (sim_profile_print_bar): Renamed from print_bar.
	All callers updated.
	(profile_insn_init): New fn.
	(profile_print_insn): Update, INSN_NAME -> CPU_INSN_NAME.
	Exit early if insn profiling not supported.
	(profile_print_memory): Update, MAX_MODES -> MODE_TARGET_MAX.
	(profile_install): Record profile_insn_init as init fn.
	(profile_uninstall): Free PROFILE_INSN_COUNT if non-null.
	* sim-profile.h: Update, MAX_MODES -> MODE_TARGET_MAX.
	(PROFILE_DATA): Delete member exec_time.
	Change insn_count to pointer to array, rather than the array.
	(sim_profile_print_bar): Declare.
 1998-10-09 22:43:05 +00:00
Doug Evans
99bc9a6984 cgen-run.c: new mainloop for cgen 
sim-reg.c: generic sim_fetch/store_register interface fns
 1998-10-07 23:55:42 +00:00
Nick Clifton
1ee490ca0b Fix PR 17387: ignore auto increment for loads where the destination register 
and the address register are the same.
 1998-09-30 17:15:14 +00:00
Doug Evans
ff8c385ab3 * m32r-sim.h (GET_H_SM): New macro. 
(UART params): Update to msa2000.
	* devices.c (device_io_read_buffer): Update to msa2000.
	* m32r.c (m32rb_h_cr_get,m32rb_h_cr_set): Handle bbpc,bbpsw.
	(m32rb_h_psw_get,m32rb_h_psw_set): New functions.
	* arch.c,arch.h,cpu.c,cpu.h,sem-switch.c,sem.c: Regenerate.
	* m32rx.c (m32rx_h_cr_get,m32rx_h_cr_set): Handle bbpc,bbpsw.
	(m32rx_h_psw_get,m32rx_h_psw_set): New functions.
	* cpux.c,cpux.h,readx.c,semx.c: Regenerate.
PR 15938.
 1998-09-15 22:16:08 +00:00
Nick Clifton
043333a61a define SIM_HAVE_BIENDIAN 1998-09-14 16:58:00 +00:00
Doug Evans
4d87923eb3 * r5900.igen (plzcw): Make `i' signed. 
PR 17191.
 1998-09-10 19:00:46 +00:00
Doug Evans
190659a22d * m32r-sim.h (m32r_trap): Update prototype. 
* traps.c (m32r_trap): New arg `pc'.
	* sem.c,sem-switch.c: Regenerated.
	* cpux.h,readx.c,semx.c: Regenerated.
 1998-09-09 22:34:09 +00:00
Doug Evans
3efbfbebdc * sim/sky/pr17191.s: New file. 
* sim/sky/pr17191.brn: New file.
	* sim/sky/t-macros.inc: New file.
 1998-09-09 21:50:10 +00:00
Ron Unrau
323f833daf Branch merge for GDB: 
* sim-main.h: track COP0 registers
        * interp.c (sim_{fetch,store}_register): read/write COP0 registers
        * sky-gdb.[ch]: add sim pipeorder command
 1998-09-09 17:30:31 +00:00
Frank Ch. Eigler
9ade226a42 * Patch for PR 17142, brought over from sky branch. 
Fri Sep  4 10:37:57 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* r5900.igen (mtsab): Correct typo in input register.
	* sim-main.h (TMP_*): New macros for accessing local 128-bit
	temporary for multimedia instructions.
	* r5900.igen (*): Convert most instructions to use new TMP
	macros to store output result during computation.
 1998-09-08 11:09:45 +00:00
Frank Ch. Eigler
78b871ec81 * Build fixes for tx39 sim hosted on strange Linux boxen. 
[common/ChangeLog]
Tue Sep  1 15:36:52 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* sim-config.h: Remove reference to linux kernel header.
[mips/ChangeLog]
Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904sio.c: Include sim-assert.h.
 1998-09-01 13:19:57 +00:00
Ken Raeburn
83e29d5263 Change sanitization of vrXXXX to cygnus, so redact might work on it. 
This means using keep-vr4320 without keep-cygnus probably won't work.
 1998-08-26 17:29:06 +00:00
Joyce Janczyn
cf83964e6f Regress yesterday's change to jmp instn implementation in mn10300.igen. 1998-08-26 13:37:56 +00:00
Joyce Janczyn
ef4d20e915 Regress yesterday's change to jmp instruction -- it has deceiving syntax. 
Also tidy up some code to match documentation and fix div, divu by 0.
 1998-08-26 13:31:38 +00:00
Joyce Janczyn
59587664ab * mn10300.igen (OP_F0F4): Need to load contents of register AN0 
for jmp.
 1998-08-25 20:49:35 +00:00
Frank Ch. Eigler
36e838d13b * eCos tx3904sio sim - devo part 2/2 
Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904sio.c: New file: tx3904 serial I/O module.
	* configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
	Reorganize target-specific sim-hardware checks.
	* configure: rebuilt.
	* interp.c (sim_open): For tx39 target boards, set
	OPERATING_ENVIRONMENT, add tx3904sio devices.
	* tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
	ROM executables.  Install dv-sockser into sim-modules list.
	* dv-tx3904irc.c: Compiler warning clean-up.
	* dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
	frequent hw-trace messages.
 1998-08-25 14:16:58 +00:00
Frank Ch. Eigler
8d6ed1b768 * eCos tx3904sio sim - devo part 1/2 
Tue Aug 25 12:45:27 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-sockser.c (sockser_addr): Make variable non-static.
 1998-08-25 13:58:35 +00:00
Joyce Janczyn
c1802bfd60 * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA. 1998-08-24 15:52:43 +00:00
Joyce Janczyn
fb37fdcb89 * sim-hw.{c,h} (sim_hw_parse): Return struct hw pointer. 1998-08-24 15:48:45 +00:00
Ken Raeburn
aeeb756dee fix broken sanitization 1998-08-18 18:58:10 +00:00
Ken Raeburn
3d759c53c9 sanitize-vr5400 -> sanitize-cygnus, for 98r2 1998-08-12 10:50:35 +00:00
Ron Unrau
d333eeedde * sim-main.h: track COP2 register definitions, define VIO_BASE 
* interp.c (sim_{fetch,store}_register): read/write VU0/1 control regs
        * sky-gdb.c: use VIO_BASE
        * sky-pke.h: move GDB_COMM area
 1998-08-06 20:02:47 +00:00
Doug Evans
d68bc3cb16 Rename cpu m32r to m32rb to distinguish from architecture name. 
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
	(stamp-cpu): Ditto.
	* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
	* tconfig.in (WANT_CPU_M32RB): Ditto.
	* m32r.c (WANT_CPU_M32RB): Ditto.
	(*): m32r_ cpu fns renamed to m32rb_.
	* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
	* arch.h,arch.c: Regenerate.
	* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
	* sem-switch.c,sem.c: Regenerate.

	* sim-if.c (sim_open): Don't allocate memory on top of any user
	specified memory.
	(h_gr_get,h_gr_set): Delete.
	* sim-main.h (h_gr_get,h_gr_set): Delete.
	* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
	a_m32r_h_gr_[gs]et.
 1998-08-04 02:52:16 +00:00
Doug Evans
13ccace0ca * Makefile.in (INCLUDE_DEPS): Add include/opcode/cgen.h. 
* sim-if.c (sim_open): Open opcode table.
	(sim_close): Close it.
 1998-08-03 19:58:36 +00:00
Doug Evans
39813256da * cgen-sim.h (cgen_state): New member opcode_table. 
* cgen-utils.c (sim_disassemble_insn): Use it.
 1998-08-03 18:45:06 +00:00
Ron Unrau
b8140a08bf * sim-main.h: shadow NUM_CORE_REGS from tm-txvu.h 
* interp.c: use NUM_CORE_REGS
        * sky-gdb.c (set_fifo_breakpoints): use VIF interrupt bit for break
        * sky-pke.c (pke_issue): use interrupt bit for break points
 1998-07-31 22:02:12 +00:00
Jeff Holcomb
acf38b4e4a fix sanitization 1998-07-31 05:23:28 +00:00
Jeff Law
e1160daac2 Fix sanitize misspellings. 1998-07-29 18:28:29 +00:00
Andrew Cagney
8d3580d090 Fix incorrect calculation of conditional field when being extracted 
from a previous decode.
 1998-07-29 00:14:29 +00:00
Doug Evans
d846a17c70 Add support for new versions of mulwhi,mulwlo,macwhi,macwlo that 
accept an accumulator choice.
	* cpux.c,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
 1998-07-28 20:09:10 +00:00
Doug Evans
fe63ffef0a New testcases for PR 16547 (new instructions added). 1998-07-28 18:43:52 +00:00
Andrew Cagney
f6b7bfcfa0 Add note about limitations of insn_field_cmp(). 1998-07-28 08:58:23 +00:00
Andrew Cagney
07c2bd1455 Problems with conditional instruction-table fields (N!M, N=M, ...). 
Was restricting `M' to opcode fields in the current word.
 1998-07-28 08:08:54 +00:00
Jeff Law
3e20223154 * am33.igen: Detect cases where two operands must not match in 
non-DSP instructions.
 1998-07-27 18:05:43 +00:00
Andrew Cagney
60f9cd07d0 For vr* processors start using vr.igen. 
Sanitize out README.Cygnus.
 1998-07-25 07:49:29 +00:00
Andrew Cagney
e1b20d3048 Add new file vr.igen which is a merge of vr5400.igen and vr4320.igen. 
Hack sanitize so that it doesn't sanitize vrXXX when either of
keep-vr5400 or keep-vr4320 are specified.
Move two basic vr4100 instructions from mips.igen to vr.igen.
 1998-07-25 06:45:18 +00:00
Joyce Janczyn
a2f93b6758 Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com> 
* op_utils.c (do_syscall): Rewrite to use common/syscall.c.
	(syscall_read_mem, syscall_write_mem): New functions for syscall
	callbacks.
	* mn10300_sim.h: Add prototypes for syscall_read_mem and
	syscall_write_mem.
	* mn10300.igen: Change C++ style comments to C style comments.
	Check for divide by zero in div and divu ops.
 1998-07-24 22:22:35 +00:00
Doug Evans
431e4f86ad * m32r.c: Include cgen-mem.h. 
* traps.c (m32r_trap): Tweak for -Wall.
	* m32rx.c: Include cgen-mem.h.
	* semx.c: Regenerate, get -Wall cleanups.
 1998-07-24 20:03:56 +00:00
Doug Evans
63542cbcc0 * cgen-mem.h (DECLARE_SETT): Fix return type. 1998-07-24 19:44:04 +00:00
Jeff Law
6d254a2d5f * am33.igen (translate_xreg): New function. Use it as needed. 1998-07-24 18:50:12 +00:00
Doug Evans
f3ccb5a785 * sim-model.c (model_option_handler): Remove unused variable `n'. 1998-07-24 17:16:02 +00:00
Doug Evans
fa653bc01e * Makefile.in (clean,mostlyclean): Change leading spaces to a tab. 1998-07-24 16:44:43 +00:00
Ian Lance Taylor
965f532708 remove d30v sanitization 1998-07-24 04:38:45 +00:00
Jeff Law
4b6651c925 * am33.igen: Add some missing instructions. 
Missed a few last week... Grrr.
 1998-07-23 16:31:41 +00:00
Jeff Law
6ae1456eb5 * am33.igen: Autoincrement loads/store fixes. 1998-07-23 16:06:50 +00:00
Doug Evans
7422fa0cc8 * cpu.h,extract.c: Regenerate. pc-rel calcs done on f_dispNN now. 
* cpux.h,readx.c,semx.c: Ditto.
 1998-07-21 23:54:10 +00:00
Doug Evans
cac4e5a481 * cgen-utils.c: Include bfd.h. 
(sim_disassemble_insn): Update call to CGEN_EXTRACT_FN.
 1998-07-21 23:26:53 +00:00
Jeff Law
0a78550778 * am33.igen: Add most am33 DSP instructions. 1998-07-21 15:50:14 +00:00
Jillian Ye
27de7e18c4 Forward fit sky-branch updates to devo. 1998-07-17 18:43:30 +00:00
Jeff Holcomb
7034215bc6 fix sanitization; add trap.S 1998-07-14 23:00:31 +00:00
Jeff Law
4b987239ea Fix goof. 1998-07-14 03:59:11 +00:00
Jeff Law
080ee2ba75 * am33.igen: Fix Z bit for remaining addc/subc instructions. 
Do not sign extend immediate for mov imm,XRn.
        More random mul, mac & div fixes.
        Remove some unused variables.
        Sign extend 24bit displacement in memory addresses.
Whee, more fixes.
 1998-07-09 19:41:47 +00:00
Jeff Law
4e86afb85f * mn10300.igen: Fix Z bit for addc and subc instructions. 
Minor fixes in multiply/divide patterns.

start-sanitize-am33
        * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn.  Various
        fixes to 2 register multiply, divide and mac instructions.  Set
        Z,N correctly for sat16.  Sign extend 24 bit immediate for add,
        and sub instructions.

        * am33.igen: Add remaining non-DSP instructions.
end-sanitize-am33
 1998-07-09 19:04:22 +00:00
Jeff Law
1f0ba346eb * am33.igen: Add remaining non-DSP instructions. 
Lots of work still remains.  PSW handing is probably broken badly and the
mul/mac classes of instructions are probably not handled correctly.
 1998-07-09 16:09:24 +00:00
Jeff Law
9c55817e66 * am33.igen (translate_rreg): New function. Use it as appropriate. 1998-07-09 00:24:57 +00:00
Jeff Law
377e53bb6b * am33.igen: More am33 instructions. Fix "div". 1998-07-08 22:33:35 +00:00
Andrew Cagney
9483af2c61 Add a printf fmt style version of sim_events_schedule. 
This allows the caller to specify extra trace information that is
only evaluated when tracing is enabled.
 1998-07-08 08:00:36 +00:00
Jeff Law
d2b02ab22d * mn10300.igen: Add am33 support. 1998-07-06 22:02:02 +00:00
Jeff Law
135431cd7e * Makefile.in: Use multi-sim to support both a mn10300 and am33 
simulator.
 1998-07-06 21:57:22 +00:00