Commit Graph

108142 Commits

Author SHA1 Message Date
Przemyslaw Wirkus
1cad938de5 aarch64: [SME] Add ZERO instruction
This patch is adding ZERO (a list of 64-bit element ZA tiles)
instruction.

gas/ChangeLog:

	* config/tc-aarch64.c (parse_sme_list_of_64bit_tiles):
	New parser.
	(parse_operands): Handle OPND_SME_list_of_64bit_tiles.
	* testsuite/gas/aarch64/sme-4-illegal.d: New test.
	* testsuite/gas/aarch64/sme-4-illegal.l: New test.
	* testsuite/gas/aarch64/sme-4-illegal.s: New test.
	* testsuite/gas/aarch64/sme-4.d: New test.
	* testsuite/gas/aarch64/sme-4.s: New test.

include/ChangeLog:

	* opcode/aarch64.h (enum aarch64_opnd): New operand
	AARCH64_OPND_SME_list_of_64bit_tiles.

opcodes/ChangeLog:

	* aarch64-opc.c (print_sme_za_list): New printing function.
	(aarch64_print_operand): Handle OPND_SME_list_of_64bit_tiles.
	* aarch64-opc.h (enum aarch64_field_kind): New bitfield
	FLD_SME_zero_mask.
	* aarch64-tbl.h (struct aarch64_opcode): New ZERO instruction.
	aarch64-asm-2.c: Regenerate.
	aarch64-dis-2.c: Regenerate.
	aarch64-opc-2.c: Regenerate.
2021-11-17 19:56:42 +00:00
Przemyslaw Wirkus
7bb5f07c8a aarch64: [SME] Add MOV and MOVA instructions
This patch is adding new MOV (alias) and MOVA SME instruction.

gas/ChangeLog:

	* config/tc-aarch64.c (enum sme_hv_slice): new enum.
	(struct reloc_entry): Added ZAH and ZAV registers.
	(parse_sme_immediate): Immediate parser.
	(parse_sme_za_hv_tiles_operand): ZA tile parser.
	(parse_sme_za_hv_tiles_operand_index): Index parser.
	(parse_operands): Added ZA tile parser calls.
	(REGNUMS): New macro. Regs with suffix.
	(REGSET16S): New macro. 16 regs with suffix.
	* testsuite/gas/aarch64/sme-2-illegal.d: New test.
	* testsuite/gas/aarch64/sme-2-illegal.l: New test.
	* testsuite/gas/aarch64/sme-2-illegal.s: New test.
	* testsuite/gas/aarch64/sme-2.d: New test.
	* testsuite/gas/aarch64/sme-2.s: New test.
	* testsuite/gas/aarch64/sme-2a.d: New test.
	* testsuite/gas/aarch64/sme-2a.s: New test.
	* testsuite/gas/aarch64/sme-3-illegal.d: New test.
	* testsuite/gas/aarch64/sme-3-illegal.l: New test.
	* testsuite/gas/aarch64/sme-3-illegal.s: New test.
	* testsuite/gas/aarch64/sme-3.d: New test.
	* testsuite/gas/aarch64/sme-3.s: New test.
	* testsuite/gas/aarch64/sme-3a.d: New test.
	* testsuite/gas/aarch64/sme-3a.s: New test.

include/ChangeLog:

	* opcode/aarch64.h (enum aarch64_opnd): New enums
	AARCH64_OPND_SME_ZA_HV_idx_src and
	AARCH64_OPND_SME_ZA_HV_idx_dest.
	(struct aarch64_opnd_info): New ZA tile vector struct.

opcodes/ChangeLog:

	* aarch64-asm.c (aarch64_ins_sme_za_hv_tiles):
	New inserter.
	* aarch64-asm.h (AARCH64_DECL_OPD_INSERTER):
	New inserter ins_sme_za_hv_tiles.
	* aarch64-dis.c (aarch64_ext_sme_za_hv_tiles):
	New extractor.
	* aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR):
	New extractor ext_sme_za_hv_tiles.
	* aarch64-opc.c (aarch64_print_operand):
	Handle SME_ZA_HV_idx_src and SME_ZA_HV_idx_dest.
	* aarch64-opc.h (enum aarch64_field_kind): New enums
	FLD_SME_size_10, FLD_SME_Q, FLD_SME_V and FLD_SME_Rv.
	(struct aarch64_operand): Increase fields size to 5.
	* aarch64-tbl.h (OP_SME_BHSDQ_PM_BHSDQ): New qualifiers
	aarch64-asm-2.c: Regenerate.
	aarch64-dis-2.c: Regenerate.
	aarch64-opc-2.c: Regenerate.
2021-11-17 19:32:17 +00:00
Przemyslaw Wirkus
971eda7341 aarch64: [SME] Add SME instructions
Patch is adding new SME matrix instructions. Please note additional
instructions will be added in following patches.

gas/ChangeLog:

	* config/tc-aarch64.c (parse_sme_zada_operand):
	New parser.
	* config/tc-aarch64.c (parse_reg_with_qual):
	New reg parser.
	* config/tc-aarch64.c (R_ZA): New egister type.
	(parse_operands): New parser.
	* testsuite/gas/aarch64/sme-illegal.d: New test.
	* testsuite/gas/aarch64/sme-illegal.l: New test.
	* testsuite/gas/aarch64/sme-illegal.s: New test.
	* testsuite/gas/aarch64/sme.d: New test.
	* testsuite/gas/aarch64/sme.s: New test.
	* testsuite/gas/aarch64/sme-f64.d: New test.
	* testsuite/gas/aarch64/sme-f64.s: New test.
	* testsuite/gas/aarch64/sme-i64.d: New test.
	* testsuite/gas/aarch64/sme-i64.s: New test.

include/ChangeLog:

	* opcode/aarch64.h (enum aarch64_opnd): New operands
	AARCH64_OPND_SME_ZAda_2b, AARCH64_OPND_SME_ZAda_3b and
	AARCH64_OPND_SME_Pm.
	(enum aarch64_insn_class): New instruction class sme_misc.

opcodes/ChangeLog:

	* aarch64-opc.c (aarch64_print_operand):
	Print OPND_SME_ZAda_2b and OPND_SME_ZAda_3b operands.
	(verify_constraints): Handle OPND_SME_Pm.
	* aarch64-opc.h (enum aarch64_field_kind):
	New bit fields FLD_SME_ZAda_2b, FLD_SME_ZAda_3b and FLD_SME_Pm.
	* aarch64-tbl.h (OP_SME_ZADA_PN_PM_ZN_S): New qualifier set.
	(OP_SME_ZADA_PN_PM_ZN_D): New qualifier.
	(OP_SME_ZADA_PN_PM_ZN_ZM): New qualifier.
	(OP_SME_ZADA_S_PM_PM_S_S): New qualifier.
	(OP_SME_ZADA_D_PM_PM_D_D): New qualifier.
	(OP_SME_ZADA_S_PM_PM_H_H): New qualifier.
	(OP_SME_ZADA_S_PM_PM_B_B): New qualifier.
	(OP_SME_ZADA_D_PM_PM_H_H): New qualifier.
	(SME_INSN): New instruction macro.
	(SME_F64_INSN): New instruction macro.
	(SME_I64_INSN): New instruction macro.
	(SME_INSNC): New instruction macro.
	(struct aarch64_opcode): New SME instructions.
	aarch64-asm-2.c: Regenerate.
	aarch64-dis-2.c: Regenerate.
	aarch64-opc-2.c: Regenerate.
2021-11-17 19:29:05 +00:00
Przemyslaw Wirkus
57f02370a1 aarch64: [SME] Add +sme option to -march
This series of patches (tagged [SME]) add support for the Scalable
Matrix Extension. Patch introduces new command line options: +sme, +sme-f64 and
+sme-i64 to -march command line options.

gas/ChangeLog:

	* NEWS: Updated docs.
	* config/tc-aarch64.c: New SME command line options.
	* doc/c-aarch64.texi: Update docs.

include/ChangeLog:

	* opcode/aarch64.h (AARCH64_FEATURE_SME): New flag.
	(AARCH64_FEATURE_SME_F64): New flag.
	(AARCH64_FEATURE_SME_I64): New flag.

opcodes/ChangeLog:

	* aarch64-tbl.h (SME): New feature object.
2021-11-17 19:16:48 +00:00
Jeremy Drake
ef6379e16d Set the default DLL chracteristics to 0 for Cygwin based targets.
* emultempl/pep.em (DEFAULT_DLL_CHARACTERISTICS): Set to 0 for
	Cygwin targets.
	* emultempl/pep.em (DEFAULT_DLL_CHARACTERISTICS): Likewise.
2021-11-17 16:24:53 +00:00
Nick Clifton
ee9e412f14 Fix the linker script parser so that it will recognise the PT_GNU_RELRO segment type, and the linker itself so that it will gracefully handle being unable to assign any sections to such a segment.
PR 28452
bfd	* elf.c (assign_file_positions_for_non_load_sections): Replace
	assertion with a warning message.

ld	* ldgram.y: Add support for PT_GNU_RELRO and PT_GNU_PROPERTY.
	* ldgram.c: Regenerate.
2021-11-17 15:59:16 +00:00
Andreas Arnez
0df670bbe0 [gdb/build, s390x] Fix build after gdbarch_tdep changes
Commit 345bd07cce ("gdb: fix gdbarch_tdep ODR violation") changes a
declaration in s390-tdep.h from

   struct gdbarch_tdep { ... };

to

   struct s390_gdbarch_tdep : gdbarch_tdep { ... };

and now requires that gdbarch_tdep has been declared before.  Which is
usually the case, except when compiling s390-linux-nat.c, where
s390-tdep.h is included before gdbarch.h.  Thus the s390x build errors out
with the compiler complaining about a missing class name after the colon.

Fix this in s390-linux-nat.c, by including gdbarch.h before s390-tdep.h.
2021-11-17 15:31:11 +01:00
Luis Machado
1aed145ad6 Expose the BTI BTYPE more explicitly in the registers
Augment the register description XML to expose the BTI BTYPE field contained
in the CPSR register. It will be displayed like so:

cpsr           0x60001000          [ EL=0 BTYPE=0 SSBS C Z ]
2021-11-17 10:55:44 -03:00
H.J. Lu
c9dcc18f8d elfedit: Add --output-abiversion option to update ABIVERSION
* NEWS: Mention --output-abiversion.
	* elfedit.c (input_elf_abiversion): New.
	(output_elf_abiversion): Likewise.
	(update_elf_header): Update EI_ABIVERSION.
	(command_line_switch): Add OPTION_INPUT_ABIVERSION and
	OPTION_OUTPUT_ABIVERSION.
	(options): Add --input-abiversion and --output-abiversion.
	(usage): Likewise.
	(main): Handle --input-abiversion and --output-abiversion.
	* doc/binutils.texi: Document --input-abiversion and
	--output-abiversion.
	* testsuite/binutils-all/elfedit.exp: Run elfedit-6.
	* testsuite/binutils-all/elfedit-6.d: New file.
2021-11-17 05:15:48 -08:00
Nelson Chu
65e4a99a26 RISC-V: Support rvv extension with released version 1.0.
2021-11-17  Jim Wilson  <jimw@sifive.com>
            Kito Cheng  <kito.cheng@sifive.com>
            Nelson Chu  <nelson.chu@sifive.com>

This patch is porting from the following riscv github,
https://github.com/riscv/riscv-binutils-gdb/tree/rvv-1.0.x

And here is the vector spec,
https://github.com/riscv/riscv-v-spec

bfd/
	* elfxx-riscv.c (riscv_implicit_subsets): Added imply rules
	of v, zve and zvl extensions.
	(riscv_supported_std_ext): Updated verison of v to  1.0.
	(riscv_supported_std_z_ext): Added zve and zvl extensions.
	(riscv_parse_check_conflicts): The zvl extensions need to
	enable either v or zve extension.
	(riscv_multi_subset_supports): Check the subset list to know
	if the INSN_CLASS_V and INSN_CLASS_ZVEF instructions are supported.
gas/
	* config/tc-riscv.c (enum riscv_csr_class): Added CSR_CLASS_V.
	(enum reg_class): Added RCLASS_VECR and RCLASS_VECM.
	(validate_riscv_insn): Check whether the rvv operands are valid.
	(md_begin): Initialize register hash for rvv registers.
	(macro_build): Added rvv operands when expanding rvv pseudoes.
	(vector_macro): Expand rvv macros into one or more instructions.
	(macro): Likewise.
	(my_getVsetvliExpression): Similar to my_getVsetvliExpression,
	but used for parsing vsetvli operands.
	(riscv_ip): Parse and encode rvv operands.  Besides, The rvv loads
	and stores with EEW 64 cannot be used when zve32x is enabled.
	* testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Updated -march
	to rv32ifv_zkr.
	* testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/priv-reg.s: Added rvv csr testcases.
	* testsuite/gas/riscv/priv-reg-version-1p10.d: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p11.d: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/march-imply-v.d: New testcase.
	* testsuite/gas/riscv/vector-insns-fail-zve32xf.d: Likewise.
	* testsuite/gas/riscv/vector-insns-fail-zve32xf.l: Likewise.
	* testsuite/gas/riscv/vector-insns-fail-zvl.d: Likewise.
	* testsuite/gas/riscv/vector-insns-fail-zvl.l: Likewise.
	* testsuite/gas/riscv/vector-insns-vmsgtvx.d: Likewise.
	* testsuite/gas/riscv/vector-insns-vmsgtvx.s: Likewise.
	* testsuite/gas/riscv/vector-insns-zero-imm.d: Likewise.
	* testsuite/gas/riscv/vector-insns-zero-imm.s: Likewise.
	* testsuite/gas/riscv/vector-insns.d: Likewise.
	* testsuite/gas/riscv/vector-insns.s: Likewise.
include/
	* opcode/riscv-opc.h: Defined mask/match encodings and csrs for rvv.
	* opcode/riscv.h: Defined rvv immediate encodings and fields.
	(enum riscv_insn_class): Added INSN_CLASS_V and INSN_CLASS_ZVEF.
	(INSN_V_EEW64): Defined.
	(M_VMSGE, M_VMSGEU): Added for the rvv pseudoes.
opcodes/
	* riscv-dis.c (print_insn_args): Dump the rvv operands.
	* riscv-opc.c (riscv_vecr_names_numeric): Defined rvv registers.
	(riscv_vecm_names_numeric): Likewise.
	(riscv_vsew): Likewise.
	(riscv_vlmul): Likewise.
	(riscv_vta): Likewise.
	(riscv_vma): Likewise.
	(match_vs1_eq_vs2): Added for rvv Vu operand.
	(match_vd_eq_vs1_eq_vs2): Added for rvv Vv operand.
	(riscv_opcodes): Added rvv v1.0 instructions.
2021-11-17 20:18:11 +08:00
Sergei Trofimovich
486f9e20e0 gdb/nat/linux-osdata.c: fix build on gcc-12 (string overfow)
On gcc-12 build fails as:

    ../../gdbserver/../gdb/nat/linux-osdata.c: In function 'void linux_xfer_osdata_processes(buffer*)':
    ../../gdbserver/../gdb/nat/linux-osdata.c:330:39: error:
      '__builtin___sprintf_chk' may write a terminating nul past the end of the destination [-Werror=format-overflow=]
      330 |                 sprintf (core_str, "%d", i);
          |                                       ^

It's an off-by-one case in an infeasible scenario for negative
huge core count. The change switches to std::string for memory
handling.

Tested by running 'info os processes' and checking CPU cores column.
2021-11-17 08:13:18 +00:00
Aaron Merey
aa95b2d438 gdb: Add aliases for read_core_file_mappings callbacks
Add aliases read_core_file_mappings_loop_ftype and
read_core_file_mappings_pre_loop_ftype.  Intended for use with
read_core_file_mappings.

Also add build_id parameter to read_core_file_mappings_loop_ftype.
2021-11-16 22:29:51 -05:00
Mike Frysinger
c2aad00a74 sim: testsuite: add support for $pwd replacements
Extend the common test framework to support $pwd replacements in
settings.  This allows replacing the custom cris @exedir@ with it.
2021-11-16 20:21:59 -05:00
Mike Frysinger
927f25ebac sim: cris: replace @srcdir@ test extension with $srcdir/$subdir
The common framework supports $srcdir & $subdir replacements already,
so replace the custom @srcdir@ logic with those.  Since the replace
happens in slurp_options that cris already uses, we don't have any
logic to port over there.  We have to duplicate that into the cris
slurp_rv helper though.
2021-11-16 20:16:18 -05:00
Mike Frysinger
b31ff1f79b sim: cris: drop custom "dynamic" test field
This tag is used to force tests to be built dynamically (i.e. without
-static linking).  This is because cris-sim.exp in dejagnu turns on
static linking in ldflags.

The default configs and runtest flags shouldn't load these boards.
If these settings are still needed, we should figure out a different
way of suppressing the stock settings wholesale.  We want these to
all pass out of the box with little to no configuration so that they
can run in a multitarget build.

With dropping "dynamic", it'll be easier to merge the custom cris
test logic with the common sim test logic.
2021-11-16 20:06:44 -05:00
Mike Frysinger
5ec501b574 sim: testsuite: add more silent build rules
site.exp is still verbose, but that comes from automake, so have
to get it fixed upstream.
2021-11-16 19:33:57 -05:00
GDB Administrator
3963eb1ff0 Automatic date update in version.in 2021-11-17 00:00:05 +00:00
Sergei Trofimovich
e97436b1b7 sim: cr16: fix build on gcc-12 (NULL comparison)
On gcc-12 build fails as:

    sim/cr16/interp.c: In function 'lookup_hash':
    sim/cr16/interp.c:89:25: error:
      the comparison will always evaluate as 'true'
      for the address of 'mnimonic' will never be NULL [-Werror=address]
       89 |   if ((h->ops->mnimonic != NULL) &&
          |                         ^~

'mnimonic' is a sharr array within ops. It can never be NULL.

While at it renamed 'mnimonic' to 'mnemonic'.
2021-11-16 23:32:00 +00:00
Simon Marchi
7f74204ad9 gdb: fix length of array view returned by some value_contents functions
In commit 50888e42dc ("gdb: change functions returning value contents
to use gdb::array_view"), I believe I made a mistake with the length of
the array views returned by some functions.  All functions return a view
of `TYPE_LENGTH (value_type (type))` length.  This is not correct when
the value's enclosing type is larger than the value's type.  In that
case, the value's contents buffer is of the size of the enclosing type,
and the value's actual contents is a slice of that (as returned by
value_contents).  So, functions value_contents_all_raw,
value_contents_for_printing and value_contents_for_printing_const are
not correct.  Since they are meant to return the value's contents buffer
as a whole, they should have the size of the enclosing type.

There is nothing that uses the returned array view size at the moment,
so this didn't cause a problem.  But it became apparent when trying to
adjust some callers.

Change-Id: Ib4e8837e1069111d2b2784d3253d5f3002419e68
2021-11-16 16:27:33 -05:00
Fangrui Song
a7fd118627 readelf: Support SHT_RELR/DT_RELR for -r
The -r output for SHT_RELR looks like:

Relocation section '.relr.dyn' at offset 0x530 contains 4 entries:
  7 offsets
00000000000028c0
00000000000028c8
0000000000003ad0
0000000000003ad8
0000000000003ae0
0000000000003ae8
0000000000003af0

For --use-dynamic, the header looks like

    'RELR' relocation section at offset 0x530 contains 32 bytes:

include/
    * elf/common.h (DT_ENCODING): Bump to 38.
    * elf/external.h (Elf32_External_Relr): New.
    (Elf64_External_Relr): New.
binutils/
    * readelf.c (enum relocation_type): New.
    (slurp_relr_relocs): New.
    (dump_relocations): Change is_rela to rel_type.
    Dump RELR.
    (dynamic_relocations): Add DT_RELR.
    (process_relocs): Check SHT_RELR and DT_RELR.
    (process_dynamic_section): Store into dynamic_info for
    DT_RELR/DT_RELRENT/DT_RELRSZ.
2021-11-16 13:04:33 -08:00
Simon Marchi
830070c66d gdbsupport: remove FUNCTION_NAME
__func__ is standard C++11:

    https://en.cppreference.com/w/cpp/language/function

Also, in C++11, __func__ expands to the demangled function name, so the
mention in the comment above FUNCTION_NAME doesn't apply anymore.
Finally, in places where FUNCTION_NAME is used, I think it's enough to
print the function name, no need to print the whole signature.
Therefore, I propose to just remove FUNCTION_NAME and update users to
use the standard __func__.

Change-Id: I778f28155422b044402442dc18d42d0cded1017d
2021-11-16 15:37:00 -05:00
Andrew Burgess
8579fd136a gdb/gdbsupport: make xstrprintf and xstrvprintf return a unique_ptr
The motivation is to reduce the number of places where unmanaged
pointers are returned from allocation type routines.  All of the
callers are updated.

There should be no user visible changes after this commit.
2021-11-16 17:45:45 +00:00
Andrew Burgess
2bb7589ddf gdbsupport: move xfree into its own file
In the next commit I'd like to reference gdb_unique_ptr within the
common-utils.h file.  However, this requires that I include
gdb_unique_ptr.h, which requires that xfree be defined.

Interestingly, gdb_unique_ptr.h doesn't actually include anything that
defines xfree, but I was finding that when I added a gdb_unique_ptr.h
include to common-utils.h I was getting a dependency cycle; before my
change xfree was defined when gdb_unique_ptr.h was processed, while
after my change it was not, and this made g++ unhappy.

To break this cycle, I propose to move xfree into its own header file,
gdb-xfree.h, which I'll then include into gdb_unique_ptr.h and
common-utils.cc.
2021-11-16 17:45:44 +00:00
Andrew Burgess
a6e7fea128 gdb: throw OPTIMIZED_OUT_ERROR rather than GENERIC_ERROR
While reviewing this patch:

  https://sourceware.org/pipermail/gdb-patches/2021-November/183227.html

I spotted that the patch could be improved if we threw
OPTIMIZED_OUT_ERROR rather than GENERIC_ERROR in a few places.

This commit updates error_value_optimized_out and
require_not_optimized_out to throw OPTIMIZED_OUT_ERROR.

I ran the testsuite and saw no regressions.  This doesn't really
surprise me, we don't usually write code like:

  catch (const gdb_exception_error &ex)
    {
      (if ex.error == GENERIC_ERROR)
        ...
      else
        ...
    }

There are a three places where we write something like:

  catch (const gdb_exception_error &ex)
    {
      (if ex.error == OPTIMIZED_OUT_ERROR)
        ...
    }

In frame.c:unwind_pc, stack.c:info_frame_command_core, and
value.c:value_optimized_out, but if we are hitting these cases then
it's not significantly changing GDB's behaviour.
2021-11-16 17:35:03 +00:00
Tom Tromey
b7c9d393d6 Remove config.cache in gdbserver's "distclean"
PR gdb/28586 points out that "make distclean" fails to delete
config.cache from gdbserver/.  This patch fixes the bug, and removes a
duplicate "Makefile" deletion that was also pointed out in the PR.
2021-11-16 09:13:24 -07:00
Tom de Vries
2cb973527e [gdb/testsuite] Remove inferior output in gdb.base/foll-vfork.exp
Test-case gdb.base/foll-vfork.exp has inferior output that is not needed, but
which makes the regexp matching more difficult (see commit 1f28b70def
"[gdb/testsuite] Fix regexp in gdb.base/foll-vfork.exp").

Remove the inferior output, and revert commit 1f28b70def to make the matching
more restrictive.

Tested on x86_64-linux.
2021-11-16 16:46:43 +01:00
H.J. Lu
d7e3e62702 x86: Don't allow KMOV in TLS code sequences
Don't allow KMOV in TLS code sequences which require integer MOV
instructions.

	PR target/28595
	* config/tc-i386.c (match_template): Don't allow KMOV in TLS
	code sequences.
	* testsuite/gas/i386/i386.exp: Run inval-tls and x86-64-inval-tls
	tests.
	* testsuite/gas/i386/inval-tls.l: New file.
	* testsuite/gas/i386/inval-tls.s: Likewise.
	* testsuite/gas/i386/x86-64-inval-tls.l: Likewise.
	* testsuite/gas/i386/x86-64-inval-tls.s: Likewise.
2021-11-16 07:34:46 -08:00
Mike Frysinger
3b2934856f sim: run: support concise env var settings
Support the same syntax as other common utilities where env vars can
be specified before the program to be run without an explicit option.

This behavior can be suppressed by using the -- marker.
2021-11-16 03:34:28 -05:00
Mike Frysinger
35818ade96 sim: nrun: add --env-{set,unset,clear} command line options
Provide explicit control over the program's environment with the
basic set/unset/clear options.  These are a bit clunky to use,
but they're functional.

The env set operation is split out into a separate function as it'll
be used in the next commit.

With these in place, we can adjust the custom cris testsuite to use
the now standard options and not its one-off hack.
2021-11-16 03:34:00 -05:00
Mike Frysinger
85588c9ab9 sim: syscall: hoist argc/argn/argnlen to common code
Now that the callback framework supports argv & envp, we can move
the Blackfin implementation of these syscalls to the common code.
2021-11-16 02:13:42 -05:00
Mike Frysinger
fab6939b01 sim: syscall: fix argvlen & argv implementation
Now that we have access to the argv & envp strings, finish implementing
these syscalls.  Delete unused variables, fix tbuf by incrementing the
pointer instead of setting to the length, and make sure we don't write
more data than the bufsize says is available.
2021-11-16 02:09:46 -05:00
Mike Frysinger
8cfc9a1895 sim: callback: expose argv & environ
Pass the existing strings data to the callbacks so that common
libgloss syscalls can be implemented (which we'll do shortly).
2021-11-16 01:13:39 -05:00
Mike Frysinger
54f7a83a62 sim: keep track of program environment strings
We've been passing the environment strings to sim_create_inferior,
but most ports don't do anything with them.  A few will use ad-hoc
logic to stuff the stack for user-mode programs, but that's it.

Let's formalize this across the board by storing the strings in the
normal sim state.  This will allow (in future commits) supporting
more functionality in the run interface, and to unify some of the
libgloss syscalls.
2021-11-16 00:58:41 -05:00
Mike Frysinger
38f9e52086 sim: iq2000: fix some missing prototypes warnings
Turns out some of these were hiding real bugs like not passing the
pc variable down.
2021-11-16 00:49:13 -05:00
jiawei
fc5c1c28b3 RISC-V: Scalar crypto instruction and entropy source CSR testcases.
Add testcases for Scalar Crypto extension, with total testcase contain all
instructions in k-ext/k-ext-64 and sub-extension testcase for zbk* zk*. Also
add testcase for new CSR name 'seed' which is the Entropy Source in zkr.

In fact these whole testcases can be combined into one file, after we have
supported the .option arch +-= directives.

gas/
	* testsuite/gas/riscv/k-ext-64.d: New testcase for crypto instructions.
	* testsuite/gas/riscv/k-ext-64.s: Likewise.
	* testsuite/gas/riscv/k-ext.d: Likewise.
	* testsuite/gas/riscv/k-ext.s: Likewise.
	* testsuite/gas/riscv/zbkb-32.d: Likewise.
	* testsuite/gas/riscv/zbkb-32.s: Likewise.
	* testsuite/gas/riscv/zbkb-64.d: Likewise.
	* testsuite/gas/riscv/zbkb-64.s: Likewise.
	* testsuite/gas/riscv/zbkc-32.d: Likewise.
	* testsuite/gas/riscv/zbkc-64.d: Likewise.
	* testsuite/gas/riscv/zbkc.s: Likewise.
	* testsuite/gas/riscv/zbkx-32.d: Likewise.
	* testsuite/gas/riscv/zbkx-64.d: Likewise.
	* testsuite/gas/riscv/zbkx.s: Likewise.
	* testsuite/gas/riscv/zknd-32.d: Likewise.
	* testsuite/gas/riscv/zknd-32.s: Likewise.
	* testsuite/gas/riscv/zknd-64.d: Likewise.
	* testsuite/gas/riscv/zknd-64.s: Likewise.
	* testsuite/gas/riscv/zkne-32.d: Likewise.
	* testsuite/gas/riscv/zkne-32.s: Likewise.
	* testsuite/gas/riscv/zkne-64.d: Likewise.
	* testsuite/gas/riscv/zkne-64.s: Likewise.
	* testsuite/gas/riscv/zknh-32.d: Likewise.
	* testsuite/gas/riscv/zknh-32.s: Likewise.
	* testsuite/gas/riscv/zknh-64.d: Likewise.
	* testsuite/gas/riscv/zknh-64.s: Likewise.
	* testsuite/gas/riscv/zksed-32.d: Likewise.
	* testsuite/gas/riscv/zksed-64.d: Likewise.
	* testsuite/gas/riscv/zksed.s: Likewise.
	* testsuite/gas/riscv/zksh-32.d: Likewise.
	* testsuite/gas/riscv/zksh-64.d: Likewise.
	* testsuite/gas/riscv/zksh.s: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-zkr.d: New testcase for zkr
	csr check.
	* testsuite/gas/riscv/priv-reg-fail-zkr.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Updated march to
	rv32if_zkr.
	* testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p10.d: Added Crypto seed csr.
	* testsuite/gas/riscv/priv-reg-version-1p11.d: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/priv-reg.s: Likewise.
2021-11-16 11:48:23 +08:00
jiawei
3d1cafa0c6 RISC-V: Scalar crypto instructions and operand set.
Add instructions in k-ext, some instruction in zbkb, zbkc is reuse from
zbb,zbc, we just change the class attribute to make them both support.
The 'aes64ks1i' and 'aes64ks2' instructions are present in both the Zknd
and Zkne extensions on rv64.  Add new operand letter 'y' to present 'bs'
symbol and 'Y' to present 'rnum' symbolc  for zkn instructions.  Also add
a new Entropy Source CSR define 'seed' located at address 0x015.

bfd/
	* elfxx-riscv.c (riscv_multi_subset_supports): Added support for
	crypto extension.
gas/
	*config/tc-riscv.c (enum riscv_csr_class): Added CSR_CLASS_ZKR.
	(riscv_csr_address): Checked for CSR_CLASS_ZKR.
	(validate_riscv_insn): Added y and Y for bs and rnum operands.
	(riscv_ip): Handle y and Y operands.
include/
	* opcode/riscv-opc.h: Added encodings of crypto instructions.
	Also defined new csr seed, which address is 0x15.
	* opcode/riscv.h: Defined OP_* and INSN_CLASS_* for crypto.
opcodes/
	* riscv-dis.c (print_insn_args): Recognized new y and Y operands.
	* riscv-opc.c (riscv_opcodes): Added crypto instructions.
2021-11-16 11:47:55 +08:00
jiawei
dfdba09776 RISC-V: Minimal support of scalar crypto extension.
Minimal support of scalar crypto extension, add "k" in the
riscv_supported_std_ext, to make the order check right with
"zk" behind "zb".

bfd/
	* elfxx-riscv.c (riscv_implicit_subsets): Added implicit
	rules for zk* extensions.
	(riscv_supported_std_ext): Added entry for k.
	(riscv_supported_std_z_ext): Added entries for zk*.
2021-11-16 11:47:50 +08:00
Simon Marchi
333f35b631 gdb: rework "set debuginfod" commands
As discussed here [1], do some re-work in the "set debuginfod commands".

First, use "set debuginfod enabled on/off/ask" instead of "set
debuginfod on/off/ask".  This is more MI-friendly, and it gives an
output that makes more sense in "info set", for example.

Then, make the show commands not call "error" when debuginfod support is
not compiled in.  This makes the commands "show" and "show debuginfod"
stop early, breaking gdb.base/default.exp:

    Running /home/smarchi/src/binutils-gdb/gdb/testsuite/gdb.base/default.exp ...
    FAIL: gdb.base/default.exp: info set
    FAIL: gdb.base/default.exp: show

 - Make the "debuginfod enabled" setting default to "off" when debuginfod
   support is not compiled in, and "ask" otherwise.
 - Make the setter of "debuginfod enabled" error out when debuginfod
   support is not compiled in, so that "debuginfod enabled" will always
   remain "off" in that case.
 - Make the setter of "debuginfod verbose" work in any case.  I don't
   see the harm in letting the user change that setting, since the user will
   hit an error if they try to enable the use of debuginfod.
 - I would do the same for the "debuginfod urls" setter, but because
   this one needs to see the DEBUGINFOD_URLS_ENV_VAR macro, provided by
   libdebuginfod, I made that one error out as well if debuginfod
   support is not compiled it (otherwise, I would have left it like
   "debuginfod verbose".  Alternatively, we could hard-code
   "DEBUGINFOD_URLS" in the code (in fact, it was prior to this patch,
   but I think it was an oversight, as other spots use
   DEBUGINFOD_URLS_ENV_VAR), or use a dummy string to store the setting,
   but I don't really see the value in that.

Rename debuginfod_enable to debuginfod_enabled, just so it matches the
setting name.

[1] https://sourceware.org/pipermail/gdb-patches/2021-October/182937.html

Change-Id: I45fdb2993f668226a5639228951362b7800f09d5
Co-Authored-By: Aaron Merey <amerey@redhat.com>
2021-11-15 21:47:27 -05:00
Simon Marchi
aa70a99eb0 gdb: adjust gdbarch_tdep calls in nat files
Commit 345bd07cce ("gdb: fix gdbarch_tdep ODR violation") forgot to
update the gdbarch_tdep calls in the native files other than x86-64
Linux.  This patch updates them all (to the best of my knowledge).
These are the files I was able to build-test:

  aarch64-linux-nat.c
  amd64-bsd-nat.c
  arm-linux-nat.c
  ppc-linux-nat.c
  windows-nat.c
  xtensa-linux-nat.c

And these are the ones I could not build-test:

  aix-thread.c
  arm-netbsd-nat.c
  ppc-fbsd-nat.c
  ppc-netbsd-nat.c
  ia64-tdep.c (the part that needs libunwind)
  ppc-obsd-nat.c
  rs6000-nat.c

If there are still some build problems related to gdbarch_tdep in them,
they should be pretty obvious to fix.

Change-Id: Iaa3d791a850e4432973757598e634e3da6061428
2021-11-15 21:39:16 -05:00
Simon Marchi
39cdfdb261 gdb: remove unused variables in xtensa-linux-nat.c
While build-testing this file, the compiler complained about these two
unused variables, remove them.

Change-Id: I3c54f779f12c16ef6184af58aca75eaad042ce4e
2021-11-15 21:38:44 -05:00
Simon Marchi
2d2bb0d3f2 gdb: add arc-newlib-tdep.c to ALL_TARGET_OBS
This file is currently not compiled in an --enable-targets=all build,
but it should be.  Add it to ALL_TARGET_OBS.

Update the gdbarch_tdep call that commit 345bd07cce ("gdb: fix
gdbarch_tdep ODR violation") forgot to update.

Change-Id: I86248a01493eea5e70186e9c46a298ad3994b034
2021-11-15 21:21:29 -05:00
Jim Wilson
a66ddb5899 Update my email address.
I've left SiFive and have a new gmail account because it is convenient
to use with git send-email.  I'm planning to use this for my RISC-V
work.  My tuliptree address still works, it just isn't as convenient.

	binutils:
	* MAINTAINERS (RISC-V): Update my address.
2021-11-15 16:51:05 -08:00
GDB Administrator
00855fe7cd Automatic date update in version.in 2021-11-16 00:00:06 +00:00
Tom de Vries
636ae5bb4b [gdb] Don't use gdb_stdlog for inferior-events
The test-case gdb.base/foll-vfork.exp contains:
...
if [gdb_debug_enabled] {
    untested "debug is enabled"
    return 0
}
...

To understand what it does, I disabled this bit and ran with GDB_DEBUG=infrun,
like so:
...
$ cd $build/gdb/testsuite
$ make check GDB_DEBUG=infrun RUNTESTFLAGS=gdb.base/foll-vfork.exp
...
and ran into:
...
(gdb) PASS: gdb.base/foll-vfork.exp: exec: \
  vfork parent follow, through step: set follow-fork parent
next^M
33        if (pid == 0) {^M
(gdb) FAIL: gdb.base/foll-vfork.exp: exec: \
  vfork parent follow, through step: step
...

The problem is that the test-case expects:
...
(gdb) PASS: gdb.base/foll-vfork.exp: exec: \
  vfork parent follow, through step: set follow-fork parent
next^M
[Detaching after vfork from child process 28169]^M
33        if (pid == 0) {^M
(gdb) PASS: gdb.base/foll-vfork.exp: exec: \
  vfork parent follow, through step: step
...
but the "Detaching" line has been redirected to
$outputs/gdb.base/foll-vfork/gdb.debug.

I looked at the documentation of "set logging debugredirect [on|off]":
...
  By default, GDB debug output will go to both the terminal and the logfile.
  Set debugredirect if you want debug output to go only to the log file.
...
and my interpretation of it was that "debug output" did not match the
"messages" description of inferior-events:
...
The set print inferior-events command allows you to enable or disable printing
of messages when GDB notices that new inferiors have started or that inferiors
have exited or have been detached.
...

Fix the discrepancy by not using gdb_stdlog for inferior-events.

Update the gdb.base/foll-vfork.exp test-case to not require
gdb_debug_enabled == 0.

Tested on x86_64-linux.

Tested test-case gdb.base/foll-vfork.exp with and without GDB_DEBUG=infrun.
2021-11-15 22:55:02 +01:00
Roland McGrath
d029b54d9c ld: Fix testsuite failures under --enable-textrel-check=error
ld/
	* testsuite/ld-aarch64/dt_textrel.d: Pass explicit -z notext in
	case ld was configured with --enable-textrel-check=error.
	* testsuite/ld-aarch64/pr22764.d: Likewise.
	* testsuite/ld-aarch64/pr20402.d: Likewise.
2021-11-15 11:09:17 -08:00
Luis Machado
37989733d8 Extend the prologue analyzer to handle the bti instruction
Handle the BTI instruction in the prologue analyzer. The patch handles all
the variations of the BTI instruction.
2021-11-15 16:00:01 -03:00
Simon Marchi
345bd07cce gdb: fix gdbarch_tdep ODR violation
I would like to be able to use non-trivial types in gdbarch_tdep types.
This is not possible at the moment (in theory), because of the one
definition rule.

To allow it, rename all gdbarch_tdep types to <arch>_gdbarch_tdep, and
make them inherit from a gdbarch_tdep base class.  The inheritance is
necessary to be able to pass pointers to all these <arch>_gdbarch_tdep
objects to gdbarch_alloc, which takes a pointer to gdbarch_tdep.

These objects are never deleted through a base class pointer, so I
didn't include a virtual destructor.  In the future, if gdbarch objects
deletable, I could imagine that the gdbarch_tdep objects could become
owned by the gdbarch objects, and then it would become useful to have a
virtual destructor (so that the gdbarch object can delete the owned
gdbarch_tdep object).  But that's not necessary right now.

It turns out that RISC-V already has a gdbarch_tdep that is
non-default-constructible, so that provides a good motivation for this
change.

Most changes are fairly straightforward, mostly needing to add some
casts all over the place.  There is however the xtensa architecture,
doing its own little weird thing to define its gdbarch_tdep.  I did my
best to adapt it, but I can't test those changes.

Change-Id: Ic001903f91ddd106bd6ca09a79dabe8df2d69f3b
2021-11-15 11:29:39 -05:00
Clément Chigot
eae06bb301 COFF: avoid modifications over C_FILE filename aux entries.
Commit e86fc4a5bc ("PR 28447: implement multiple parameters for .file
on XCOFF") introduces C_FILE entries which can store additional
information.
However, some modifications are needed by them but not by the original
C_FILE entries, usually representing the filename.
This patch ensures that filename entries are kept as is, in order to
protect targets not supporting the additional entries.

	* coffgen.c (coff_write_symbol): Protect filename entries
	(coff_write_symbols): Likewise.
	(coff_print_symbol): Likewise.
2021-11-15 23:07:11 +10:30
Eric Botcazou
f9402ccaa9 Deal with full path in .file 0 directive
Gas uses the directory part, if present, of the .file 0 directive to set
entry 0 of the directory table in DWARF 5, which represents the "current
directory".

Now Gas also uses the file part of the same directive to set entry 0 of the
file table, which represents the "current compilation file".  But the latter
need not be located in the former so GCC will use a full path in the file
part when it is passed a full path:

gcc -c /full/path/test.c -save-temps

yields:

 .file 0 "/current/directory" "/full/path/test.c"

in the assembly file and:

 The Directory Table (offset 0x22, lines 2, columns 1):
  Entry Name
  0     (indirect line string, offset: 0x25): /current/directory
  1     (indirect line string, offset: 0x38): /full/path

 The File Name Table (offset 0x30, lines 2, columns 2):
  Entry Dir     Name
  0     0       (indirect line string, offset: 0x43): /full/path/test.c

in the object file.  Note the full path and the questionable Dir value in
the 0 entry of the file table.
2021-11-15 12:56:10 +01:00
Mike Frysinger
e6c46d0772 sim: cris: make error message test a little more flexible
The point of this test is to just make sure the usage text is shown,
not the exact details of the usage text.  So shorten the output test
to match the beginning.  This fixes breakage when the output changed
slightly to include [--].
2021-11-15 03:34:36 -05:00