Adds two new external authors to etc/update-copyright.py to cover
bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then
updates copyright messages as follows:
1) Update cgen/utils.scm emitted copyrights.
2) Run "etc/update-copyright.py --this-year" with an extra external
author I haven't committed, 'Kalray SA.', to cover gas testsuite
files (which should have their copyright message removed).
3) Build with --enable-maintainer-mode --enable-cgen-maint=yes.
4) Check out */po/*.pot which we don't update frequently.
The newer update-copyright.py fixes file encoding too, removing cr/lf
on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and
embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
Currently, the get_disassembler() implementations for riscv, csky, and
rl78--and mep_print_insn() for mep--access ELF variants of union fields
without first checking that the bfd actually represents an ELF. This
causes undefined behavior and crashes when disassembling non-ELF files
(the "binary" BFD, for example). Fix that.
The result of running etc/update-copyright.py --this-year, fixing all
the files whose mode is changed by the script, plus a build with
--enable-maintainer-mode --enable-cgen-maint=yes, then checking
out */po/*.pot which we don't update frequently.
The copy of cgen was with commit d1dd5fcc38ead reverted as that commit
breaks building of bfp opcodes files.
This patch changes rl78 to let disassble.c:disassembler select
disassembler. rl78_get_disassembler doesn't handle the case
that abfd is NULL, so this patch also fix it.
gdb:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* rl78-tdep.c (rl78_gdbarch_init): Don't call
set_gdbarch_print_insn.
opcodes:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* rl78-dis.c (rl78_get_disassembler): If parameter abfd
is NULL, set cpu to E_FLAG_RL78_ANY_CPU.
Nowadays, memory error in rl78 disassembly is not handled, so if I
start a fresh GDB, and disassemble,
(gdb) set architecture rl78
The target architecture is assumed to be rl78
(gdb) disassemble 0x0,+4
Dump of assembler code from 0x0 to 0x4:
0x00000000: nop
0x00000001: nop
0x00000002: nop
0x00000003: nop
the output is wrong. This patch adds code to call dis->memory_error_func
on memory error, and longjmp to print_insn_rl78_common. With this
patch applied,
(gdb) set architecture rl78
The target architecture is assumed to be rl78
(gdb) disassemble 0,+4
Dump of assembler code from 0x0 to 0x4:
0x00000000: Cannot access memory at address 0x0
opcodes:
2016-12-12 Yao Qi <yao.qi@linaro.org>
* rl78-dis.c: Include <setjmp.h>.
(struct private): New.
(rl78_get_byte): Check return value of read_memory_func, and
call memory_error_func and OPCODES_SIGLONGJMP on error.
(print_insn_rl78_common): Call OPCODES_SIGJMP.
* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
instructions that can support stack pointer operations.
* rl78-decode.c: Regenerate.
* rl78-dis.c: Fix display of stack pointer in MOVW based
instructions.
* testsuite/gas/rl78/sp-relative-movw.s: New test.
* testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly.
* testsuite/gas/rl78/rl78.exp: Run the new test.
PR binutils/19158
opcodes * rl78-decode.opc: Add 's' print operator to instructions that
access system registers.
* rl78-decode.c: Regenerate.
* rl78-dis.c (print_insn_rl78_common): Decode all system
registers.
tests * gas/rl78/pr19158.s: New test source file.
* gas/rl78/pr19158.d: New test case.
* gas/rl78/rl78.exp: Run the new test.
* rl78-decode.opc: Add 'a' attribute to instructions that support
[HL+0] addressing.
* rl78-decode.c: Regenerate.
* rl78-dis.c (print_insn_rl78): Display the offset in [HL+0]
addresses.
operands, so that data addresses can be corrected when not
ES-overridden.
* rl78-decode.c: Regenerate.
* rl78-dis.c (print_insn_rl78): Make order of modifiers
irrelevent. When the 'e' specifier is used on an operand and no
ES prefix is provided, adjust address to make it absolute.
