(insns): Re-arrange instructions by archtitecture. Pld instruction
is part of ARMv5E.
(tinsns): blx and bkpt are part of ARMv5T.
(do_fp_{ctrl,ldst,ldstm,dyadic,monadic,cmp,from_reg,to_reg}): Rename
to do_fpa_*. All callers changed.
* tc-arm.c (insns): Add two temporary instructions to handle
ldrd/strd.
* ld.texinfo (Options): Document new option, -nostdlib.
* lexsup.c (OPTION_NOSTDLIB): New definition.
(ld_options): Add entry for "nostdlib".
(parse_args): Handle OPTIONS_NOSTDLIB.
* ldfile.c (ldfile_add_library_path): Don't add directories
to the search path if they weren't specified on the command line
and -nostdlib was specified.
* ld.h (ld_config_type): New member only_cmd_line_lib_dirs.
* gdb.c++/overload.exp: Select overloadfnarg(void) or overloadfnarg(),
depending on what the symbol table contains.
* gdb.c++/derivation.exp: Accept both "foo(void)" and "foo()" in
the output of the ptype command. Similarly, accept both "const &"
and "const&".
2001-10-31 Chris Demetriou <cgd@demetriou.com>
* elf32-mips.c (_bfd_mips_elf_hi16_reloc): Handle PC-relative
relocations properly.
[ gas/ChangeLog ]
2001-10-31 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (HAVE_32BIT_ADDRESSES): If compiling embedded
PIC code, assume pointers the same size as GPRs.
(macro): In M_LA_AB handling for embedded PIC code, support
"la $treg,foo-bar($breg)". In load/store handling
(label ld_st) support "<op> $treg,<sym>-<local_sym>($breg)"
which is used by the compiler for switch statements.
In load/store double multi-instruction macro handling
(label ldd_std) add a comment that no special handling
is currently done for embedded PIC.
(mips_ip): In 'o' (16-bit offset) case, only accept 16
bit offsets.
[ gas/testsuite/ChangeLog ]
2001-10-31 Chris Demetriou <cgd@broadcom.com>
* gas/mips/empic.s: Undo damage inflicted on 2000-12-02.
* gas/mips/empic.d: Likewise.
* gas/mips/elempic.d: Likewise (it was copied into other files).
* gas/mips/telempic.d: Likewise.
* gas/mips/tempic.d: Likewise.
* gas/mips/empic2.s: New test to check new 'la' and 'lw' (and
related ops) syntax, test loads with large offsets.
* gas/mips/emcic2.d: Likewise.
* gas/mips/mips.exp: Run the new test on ELF platforms.
(REGISTER_NAME): New define.
(i386_register_name): New prototype.
* i386-tdep.c (i386_register_names): New variable.
(i386_register_name): New function.
* config/i386/tm-i386os9k.h, config/i386/tm-ptx.h,
config/i386/tm-symmetry.h: Undefine REGISTER_NAME instead of
REGISTER_NAMES.
symbol `STORAGE' to allow to choose the storage class of
the local datastructures.
* gdb.base/miscexprs.exp: Handle setting a `-DSTORAGE=...'
compiler directive.
loaded DLL matches the on-disk case since the debugging API does not seem to
ensure this. Calculate max name length here.
(handle_load_dll): Move max name length calculation to register_loaded_dll.
* tc-arm.c (ARM_EXT_LONGMUL, ARM_EXT_HALFWORD, ARM_EXT_THUMB): Delete.
(ARM_2UP, ARM_ALL, ARM_3UP, ARM_6UP): Delete.
(FPU_CORE, FPU_FPA10, FPA_FPA11, FPU_ALL, FPA_MEMMULTI): Delete.
(ARM_EXT_V{1,2,2S,3,3M,4,4T,5T,5ExP}): New defines.
(ARM_EXT_V{5,5E}): Synchronize with above.
(ARM_ARCH_V*): Define a complete set in terms of above features.
(ARM_{1,2,3,250,6,7,8,9,STRONG}): Define in terms of architecture.
(FPU_FPA_EXT_V[12]): Define.
(FPU_ARCH_FPE, FPU_ARCH_FPA): Define in terms of above.
(FPU_ANY): Define.
(FPU_DEFAULT): Default to FPA.
(CPU_DEFAULT): For XScale, this is now just ARM_ARCH_XSCALE; for
Thumb, this is now ARM_ARCH_V5T.
(insns): Rework for new feature defines.
(tinsns): Likewise.
(opcode_select, do_ldst, md_begin, md_parse_option): Likewise.
