2
0
mirror of https://sourceware.org/git/binutils-gdb.git synced 2025-01-18 12:24:38 +08:00
Commit Graph

285 Commits

Author SHA1 Message Date
Alan Modra
f40bb390bb PowerPC64: align plt_branch stubs
plt_branch stubs are similar to plt_call stubs in that they branch
via bctr.  Align them too.

bfd/
	* elf64-ppc.c (ppc_size_one_stub): Align plt_branch stubs as for
	plt_call stubs.
ld/
	* testsuite/ld-powerpc/elfv2exe.d: Adjust for plt_branch changes.
	* testsuite/ld-powerpc/notoc.d: Likewise.
	* testsuite/ld-powerpc/notoc.wf: Likewise.
	* testsuite/ld-powerpc/notoc3.d: Likewise.
	* testsuite/ld-powerpc/pr23937.d: Likewise.
2022-06-28 13:02:26 +09:30
Alan Modra
0d8fb090a7 PowerPC64 .branch_lt address
.branch_lt is really an extension of .plt, as is .iplt.  We'd like all
of the PLT sections to be fixed relative to .TOC. after stub sizing,
because changes in offset to PLT entries might mean a change in stub
sizes.  When -z relro, the relro layout does this by laying out
sections from the end of the relro segment.  So for example, a change
in .eh_frame (which happens after stub sizing) will keep the same GOT
to PLT offset when -z relro.  Not so when -z norelro, because then the
usual forward layout of section is done and .got is more aligned than
.branch_lt.

	* emulparams/elf64ppc.sh: Set .branch_lt address fixed relative
	to .got.
	* testsuite/ld-powerpc/elfv2exe.d: Adjust to suit.
2022-06-27 12:28:59 +09:30
Alan Modra
99f647e200 Trailing spaces in objdump -r header
git commit 202be274a4 went a little wild in removing trailing spaces
in gas/testsuite/gas/i386/{secidx.d,secrel.d}, causing
x86_64-w64-mingw32  +FAIL: i386 secrel reloc
x86_64-w64-mingw32  +FAIL: i386 secidx reloc

I could have just replaced the trailing space, but let's fix the
objdump output instead.  Touches lots of testsuite files.
2022-05-31 11:25:09 +09:30
Alan Modra
7a9361c00d PowerPC32 treatment of absolute symbols
As already done for PowerPC64, fix dynamic relocs for absolute symbols.
The patch also tidies the dynamic reloc handling code in check_relocs,
removing leftover comments and code from when check_relocs was called
as each object file was read in.

bfd/
	* elf32-ppc.c (ppc_elf_check_relocs): Set isym and ifunc earlier.
	Rearrange tests for dynamic relocs, handling absolute symbols.
	(allocate_dynrelocs): Don't allocate dynamic relocs for locally
	defined absolute symbols.
	(ppc_elf_size_dynamic_sections): Similarly.
	(ppc_elf_relocate_section): Similarly.
ld/
	* testsuite/ld-powerpc/abs32-pie.d,
	* testsuite/ld-powerpc/abs32-pie.r,
	* testsuite/ld-powerpc/abs32-reloc.s,
	* testsuite/ld-powerpc/abs32-shared.d,
	* testsuite/ld-powerpc/abs32-shared.r,
	* testsuite/ld-powerpc/abs32-static.d,
	* testsuite/ld-powerpc/abs32-static.r: New tests.
	* testsuite/ld-powerpc/powerpc.exp: Run them.
2022-05-04 14:41:56 +09:30
Alan Modra
42952a9605 PowerPC64 extended instructions in powerpc_macros
The extended instructions implemented in powerpc_macros aren't used by
the disassembler.  That means instructions like "sldi r3,r3,2" appear
in disassembly as "rldicr r3,r3,2,61", which is annoying since many
other extended instructions are shown.

Note that some of the instructions moved out of the macro table to the
opcode table won't appear in disassembly, because they are aliases
rather than a subset of the underlying raw instruction.  If enabled,
rotrdi, extrdi, extldi, clrlsldi, and insrdi would replace all
occurrences of rotldi, rldicl, rldicr, rldic and rldimi.  (Or many
occurrences in the case of clrlsldi if n <= b was added to the extract
functions.)

The patch also fixes a small bug in opcode sanity checking.

include/
	* opcode/ppc.h (PPC_OPSHIFT_SH6): Define.
opcodes/
	* ppc-opc.c (insert_erdn, extract_erdn, insert_eldn, extract_eldn),
	(insert_crdn, extract_crdn, insert_rrdn, extract_rrdn),
	(insert_sldn, extract_sldn, insert_srdn, extract_srdn),
	(insert_erdb, extract_erdb, insert_csldn, extract_csldb),
	(insert_irdb, extract_irdn): New functions.
	(ELDn, ERDn, ERDn, RRDn, SRDn, ERDb, CSLDn, CSLDb, IRDn, IRDb):
	Define and add associated powerpc_operands entries.
	(powerpc_opcodes): Add "rotrdi", "srdi", "extrdi", "clrrdi",
	"sldi", "extldi", "clrlsldi", "insrdi" and corresponding record
	(ie. dot suffix) forms.
	(powerpc_macros): Delete same from here.
gas/
	* config/tc-ppc.c (insn_validate): Don't modify value passed
	to operand->insert for PPC_OPERAND_PLUS1 when calculating mask.
	Handle PPC_OPSHIFT_SH6.
	* testsuite/gas/ppc/prefix-reloc.d: Update.
	* testsuite/gas/ppc/simpshft.d: Update.
ld/
	* testsuite/ld-powerpc/elfv2so.d: Update.
	* testsuite/ld-powerpc/notoc.d: Update.
	* testsuite/ld-powerpc/notoc3.d: Update.
	* testsuite/ld-powerpc/tlsdesc2.d: Update.
	* testsuite/ld-powerpc/tlsget.d: Update.
	* testsuite/ld-powerpc/tlsget2.d: Update.
	* testsuite/ld-powerpc/tlsopt5.d: Update.
	* testsuite/ld-powerpc/tlsopt6.d: Update.
2022-03-16 09:59:07 +10:30
Alan Modra
a03c7c40b7 A more elegant pr28827-1 testcase
Use .irpc macros in pr28827-1.s

	* testsuite/ld-powerpc/pr28827-1.s: Make the testcase more
	elegant.  Comment.
2022-02-07 09:36:19 +10:30
Alan Modra
0acf434a23 Tweak assembler invocation for pr28827-1 test
PR 28827
	* testsuite/ld-powerpc/pr28827-1.d: Pass -a64 to gas.
2022-02-05 18:21:34 +10:30
Alan Modra
9810db10f7 PR28827 testcase
This testcase triggers a stub sizing error with the patches applied
for PR28743 (commit 2f83249c13 and c804c6f98d).

	PR 28827
	* testsuite/ld-powerpc/pr28827-1.s,
	* testsuite/ld-powerpc/pr28827-1.d: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run it.
2022-02-05 17:37:19 +10:30
Alan Modra
3a3a4c1fe4 PowerPC64 treatment of absolute symbols
Supporting -static-pie on PowerPC64 requires the linker to properly
treat SHN_ABS symbols for cases like glibc's _nl_current_LC_CTYPE_used
absolute symbol.  I've been slow to fix the linker on powerpc because
there is some chance that this will break some shared libraries or
PIEs.

bfd/
	* elf64-ppc.c (ppc64_elf_check_relocs): Consolidate local sym
	handling code.  Don't count dyn relocs against non-dynamic
	absolute symbols.
	(dec_dynrel_count): Adjust to suit.
	(ppc64_elf_edit_toc): Don't remove entries for absolute symbols
	when pic.
	(allocate_got): Don't allocate space for got relocs against
	non-dynamic absolute syms.
	(ppc64_elf_layout_multitoc): Likewise.
	(got_and_plt_relr): Likewise.
	(ppc64_elf_size_dynamic_sections): Likewise for local got.
	(got_and_plt_relr_for_local_syms): Likewise.
	(ppc64_elf_size_stubs): Don't allocate space for relr either.
	(ppc64_elf_relocate_section): Don't write relocs against non-dynamic
	absolute symbols.  Don't optimise got and toc code sequences
	loading absolute symbol entries.
ld/
	* testsuite/ld-powerpc/abs-reloc.s,
	* testsuite/ld-powerpc/abs-static.d,
	* testsuite/ld-powerpc/abs-static.r,
	* testsuite/ld-powerpc/abs-pie.d,
	* testsuite/ld-powerpc/abs-pie.r,
	* testsuite/ld-powerpc/abs-shared.d,
	* testsuite/ld-powerpc/abs-shared.r,
	* testsuite/ld-powerpc/abs-pie-relr.d,
	* testsuite/ld-powerpc/abs-pie-relr.r,
	* testsuite/ld-powerpc/abs-shared-relr.d,
	* testsuite/ld-powerpc/abs-shared-relr.r: New tests.
	* testsuite/ld-powerpc/powerpc.exp: Run them.
2022-02-03 13:40:41 +10:30
Alan Modra
9ff8aa7d41 Re: PR28827, assertion building LLVM 9 on powerpc64le-linux-gnu
In trying to find a testcase for PR28827, I managed to hit a linker
error in bfd_set_section_contents with a .branch_lt input section
being too large for the output .branch_lt.

bfd/
	PR 28827
	* elf64-ppc.c (ppc64_elf_size_stubs): Set section size to
	maxsize past STUB_SHRINK_ITER before laying out.  Remove now
	unnecessary conditional setting of maxsize at start of loop.
ld/
	* testsuite/ld-powerpc/pr28827-2.d,
	* testsuite/ld-powerpc/pr28827-2.lnk,
	* testsuite/ld-powerpc/pr28827-2.s: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run it.
2022-01-31 14:09:34 +10:30
Alan Modra
ef5684c2bd Update PowerPC64 symtocbase test
Using a symbol other than .TOC. with @tocbase is an extension to the
ABI.  It is never valid to use a symbol without a definition in the
binary, and symbols on these expressions cannot be overridden.  Make
this explicit by using ".hidden" in the testcase.

	* testsuite/ld-powerpc/symtocbase-1.s: Align data.  Make function
	entry symbol hidden.
	* testsuite/ld-powerpc/symtocbase-2.s: Likewise.
	* testsuite/ld-powerpc/symtocbase.d: Adjust expected output.
2022-01-28 17:00:55 +10:30
Clément Chigot
3c5038247c XCOFF: add support for TLS relocations on hidden symbols
This patch adds support for TLS relocation targeting C_HIDEXT symbols.
In gas, TLS relocations, except R_TLSM and R_TLMSL, must keep the value
of their target symbol.
In ld, it simply ensures that internal TLS symbols are added to the
linker hash table for xcoff_reloc_type_tls.

It also improves the tests made by both.

bfd/ChangeLog:

	* coff-rs6000.c (xcoff_howto_table): Fix name of R_TLSML.
	(xcoff_reloc_type_tls): Replace the error when h is NULL by
	an assert.
	(xcoff_complain_overflow_unsigned_func): Adjust comments.
	* coff64-rs6000.c (xcoff64_howto_table): Fix name of R_TLSML.
	* xcofflink.c (xcoff_link_add_symbols_to_hash_table): New
	function.
	(xcoff_link_add_symbols): Add C_HIDEXT TLS symbols to the linker
	hash table.

gas/ChangeLog:

	* config/tc-ppc.c (md_apply_fix): Enable support for TLS
	relocation over internal symbols.
	* testsuite/gas/ppc/aix.exp: Replace xcoff-tlms by xcoff-tls.
	* testsuite/gas/ppc/xcoff-tlsm-32.d: Removed.
	* testsuite/gas/ppc/xcoff-tlsm-64.d: Removed.
	* testsuite/gas/ppc/xcoff-tlsm.s: Removed.
	* testsuite/gas/ppc/xcoff-tls-32.d: New test.
	* testsuite/gas/ppc/xcoff-tls-64.d: New test.
	* testsuite/gas/ppc/xcoff-tls.s: New test.

ld/ChangeLog:

	* testsuite/ld-powerpc/aix52.exp: Improve aix-tls-reloc test.
	* testsuite/ld-powerpc/aix-tls-reloc.s: Likewise.
	* testsuite/ld-powerpc/aix-tls-reloc-32.d: Removed.
	* testsuite/ld-powerpc/aix-tls-reloc-64.d: Removed.
	* testsuite/ld-powerpc/aix-tls-reloc-32.dd: New test.
	* testsuite/ld-powerpc/aix-tls-reloc-32.dt: New test.
	* testsuite/ld-powerpc/aix-tls-reloc-64.dd: New test.
	* testsuite/ld-powerpc/aix-tls-reloc-64.dt: New test.
2022-01-10 09:14:57 +01:00
Alan Modra
a2c5833233 Update year range in copyright notice of binutils files
The result of running etc/update-copyright.py --this-year, fixing all
the files whose mode is changed by the script, plus a build with
--enable-maintainer-mode --enable-cgen-maint=yes, then checking
out */po/*.pot which we don't update frequently.

The copy of cgen was with commit d1dd5fcc38ead reverted as that commit
breaks building of bfp opcodes files.
2022-01-02 12:04:28 +10:30
Alan Modra
7aba54da42 PowerPC64 @notoc in non-power10 code
R_PPC64_REL24_P9NOTOC is a variant of R_PPC64_REL24_NOTOC for use on
@notoc cals from non-power10 code in the rare case that using such a
construct is useful.  R_PPC64_REL24_P9NOTOC will be emitted by gas
rather than R_PPC64_REL24_NOTOC when @notoc is used in a branch
instruction if power10 instructions are not enabled at that point.
The new relocation tells the linker to not use power10 instructions on
any stub emitted for that branch, unless overridden by
--power10-stubs=yes.

The current linker heuristic of only generating power10 instructions
for stubs if power10-only relocations are detected, continues to be
used.

include/
	* elf/ppc64.h (R_PPC64_REL24_P9NOTOC): Define.
bfd/
	* reloc.c (BFD_RELOC_PPC64_REL24_P9NOTOC): Define.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add entry for new reloc.
	(ppc64_elf_reloc_type_lookup): Handle it.
	(enum ppc_stub_type): Delete.
	(enum ppc_stub_main_type, ppc_stub_sub_type): New.
	(struct ppc_stub_type): New.
	(struct ppc_stub_hash_entry): Use the above new type.
	(struct ppc_link_hash_table): Update stub_count.
	(is_branch_reloc, ppc64_elf_check_relocs),
	(toc_adjusting_stub_needed): Handle new reloc.
	(stub_hash_newfunc, select_alt_stub, ppc_merge_stub),
	(ppc_type_of_stub, plt_stub_size, build_plt_stub),
	(build_tls_get_addr_head, build_tls_get_addr_tail),
	(ppc_build_one_stub, ppc_size_one_stub, ppc64_elf_size_stubs),
	(ppc64_elf_build_stubs, ppc64_elf_relocate_section): Handle new
	reloc.  Modify stub handling to suit new scheme.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-ppc.c (ppc_elf_suffix): When power10 is not enabled
	return BFD_RELOC_PPC64_REL24_P9NOTOC for @notoc.
	(fixup_size, ppc_force_relocation, ppc_fix_adjustable): Handle
	BFD_RELOC_PPC64_REL24_P9NOTOC.
ld/
	* testsuite/ld-powerpc/callstub-2.s: Add .machine power10.
2021-11-15 12:20:13 +10:30
Alan Modra
c09c8b4202 Revert: PowerPC: Don't generate unused section symbols
Blindly following x86 broke linux kernel builds.

bfd/
	* elf32-ppc.c (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): Define as true.
	* elf64-ppc.c (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): Likewise.
gas/
	* testsuite/gas/ppc/power4.d: Adjust for section sym change.
	* testsuite/gas/ppc/test1elf32.d: Likewise.
	* testsuite/gas/ppc/test1elf64.d: Likewise.
ld/
	* testsuite/ld-powerpc/tlsexe.r: Adjust for section sym change.
	* testsuite/ld-powerpc/tlsexe32.r: Likewise.
	* testsuite/ld-powerpc/tlsexe32no.r: Likewise.
	* testsuite/ld-powerpc/tlsexeno.r: Likewise.
	* testsuite/ld-powerpc/tlsexenors.r: Likewise.
	* testsuite/ld-powerpc/tlsexers.r: Likewise.
	* testsuite/ld-powerpc/tlsexetoc.r: Likewise.
	* testsuite/ld-powerpc/tlsexetocrs.r: Likewise.
	* testsuite/ld-powerpc/tlsget.d: Likewise.
	* testsuite/ld-powerpc/tlsget.wf: Likewise.
	* testsuite/ld-powerpc/tlsget2.d: Likewise.
	* testsuite/ld-powerpc/tlsget2.wf: Likewise.
	* testsuite/ld-powerpc/tlsso.r: Likewise.
	* testsuite/ld-powerpc/tlsso32.r: Likewise.
	* testsuite/ld-powerpc/tlstocso.r: Likewise.
2021-07-24 17:59:52 +09:30
Alan Modra
13ffdac36f PowerPC undefweak testcase
Test for commit 4916030821 and b293661219.

	* testsuite/ld-powerpc/empty.s: New file.
	* testsuite/ld-powerpc/undefweak.d,
	* testsuite/ld-powerpc/undefweak.s: New testcase.
	* testsuite/ld-powerpc/powerpc.exp: Run it.
2021-05-05 10:35:31 +09:30
Nick Clifton
2335639744 Adjust readelf's output so that section symbols without a name as shown with their section name.
binutils* readelf.c (print_dynamic_symbol): Print the section name for
	section symbols without a name of their own.
	* testsuite/binutils-all/mips/global-local-symtab-sort-n64t.d:
	Adjust expected output to allow for named section symbols.
	* testsuite/binutils-all/mips/global-local-symtab-sort-o32t.d:
	Likewise.
	* testsuite/binutils-all/readelf.s-64: Likewise.
	* testsuite/binutils-all/readelf.ss-64-unused: Likewise.
	* testsuite/binutils-all/readelf.ss-tmips: Likewise.
	* testsuite/binutils-all/readelf.ss-unused: Likewise.

ld	* testsuite/ld-aarch64/variant_pcs-now.d: Adjust expected output
	to allow for named section symbols.
	* testsuite/ld-aarch64/variant_pcs-r.d: Likewise.
	* testsuite/ld-aarch64/variant_pcs-shared.d: Likewise.
	* testsuite/ld-alpha/tlsbin.rd: Likewise.
	* testsuite/ld-alpha/tlsbinr.rd: Likewise.
	* testsuite/ld-alpha/tlspic.rd: Likewise.
	* testsuite/ld-arm/rodata-merge-map.sym: Likewise.
	* testsuite/ld-arm/script-type.sym: Likewise.
	* testsuite/ld-cris/libdso-2.d: Likewise.
	* testsuite/ld-cris/pr16044.d: Likewise.
	* testsuite/ld-elf/sec64k.exp: Likewise.
	* testsuite/ld-ia64/tlsbin.rd: Likewise.
	* testsuite/ld-ia64/tlspic.rd: Likewise.
	* testsuite/ld-mips-elf/global-local-symtab-sort-n64t.d: Likewise.
	* testsuite/ld-mips-elf/global-local-symtab-sort-o32t.d: Likewise.
	* testsuite/ld-mmix/bspec1.d: Likewise.
	* testsuite/ld-mmix/bspec2.d: Likewise.
	* testsuite/ld-mmix/local1.d: Likewise.
	* testsuite/ld-mmix/local3.d: Likewise.
	* testsuite/ld-mmix/local5.d: Likewise.
	* testsuite/ld-mmix/local7.d: Likewise.
	* testsuite/ld-mmix/undef-3.d: Likewise.
	* testsuite/ld-powerpc/tlsso.r: Likewise.
	* testsuite/ld-powerpc/tlsso32.r: Likewise.
	* testsuite/ld-powerpc/tlstocso.r: Likewise.
	* testsuite/ld-s390/tlsbin.rd: Likewise.
	* testsuite/ld-s390/tlsbin_64.rd: Likewise.
	* testsuite/ld-s390/tlspic.rd: Likewise.
	* testsuite/ld-s390/tlspic_64.rd: Likewise.
	* testsuite/ld-sparc/gotop32.rd: Likewise.
	* testsuite/ld-sparc/gotop64.rd: Likewise.
	* testsuite/ld-sparc/tlssunbin32.rd: Likewise.
	* testsuite/ld-sparc/tlssunbin64.rd: Likewise.
	* testsuite/ld-sparc/tlssunnopic32.rd: Likewise.
	* testsuite/ld-sparc/tlssunnopic64.rd: Likewise.
	* testsuite/ld-sparc/tlssunpic32.rd: Likewise.
	* testsuite/ld-sparc/tlssunpic64.rd: Likewise.
	* testsuite/ld-tic6x/common.d: Likewise.
	* testsuite/ld-tic6x/shlib-1.rd: Likewise.
	* testsuite/ld-tic6x/shlib-1b.rd: Likewise.
	* testsuite/ld-tic6x/shlib-1r.rd: Likewise.
	* testsuite/ld-tic6x/shlib-1rb.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1b.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1r.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise.
	* testsuite/ld-tic6x/shlib-noindex.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1b.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1r.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1rb.rd: Likewise.

gas	* testsuite/gas/aarch64/dwarf.d: Adjust expected output to allow
	for named section symbols.
	* testsuite/gas/arm/thumbver.d: Likewise.
	* testsuite/gas/bfin/loop_temps.d: Likewise.
	* testsuite/gas/elf/section2.e-arc: Likewise.
	* testsuite/gas/elf/section2.e-arm: Likewise.
	* testsuite/gas/elf/section2.e-csky: Likewise.
	* testsuite/gas/elf/section2.e-m32r: Likewise.
	* testsuite/gas/elf/section2.e-mips: Likewise.
	* testsuite/gas/elf/section2.e-msp430: Likewise.
	* testsuite/gas/elf/section2.e-riscv: Likewise.
	* testsuite/gas/elf/section2.e-rl78: Likewise.
	* testsuite/gas/elf/section2.e-rx: Likewise.
	* testsuite/gas/elf/section2.e-score: Likewise.
	* testsuite/gas/elf/section2.e-tic6x: Likewise.
	* testsuite/gas/elf/section2.e-unused: Likewise.
	* testsuite/gas/elf/section2.e-v850: Likewise.
	* testsuite/gas/elf/section2.e-xtensa: Likewise.
	* testsuite/gas/ia64/alias-ilp32.d: Likewise.
	* testsuite/gas/ia64/alias.d: Likewise.
	* testsuite/gas/ia64/global.d: Likewise.
	* testsuite/gas/microblaze/relax_size.elf: Likewise.
	* testsuite/gas/microblaze/relax_size2.elf: Likewise.
	* testsuite/gas/mips/global-local-symtab-sort-n64t.d: Likewise.
	* testsuite/gas/mips/global-local-symtab-sort-o32t.d: Likewise.
	* testsuite/gas/mmix/bspec-1.d: Likewise.
	* testsuite/gas/mmix/byte-1.d: Likewise.
	* testsuite/gas/mmix/comment-1.d: Likewise.
	* testsuite/gas/mmix/loc-1.d: Likewise.
	* testsuite/gas/mmix/loc-2.d: Likewise.
	* testsuite/gas/mmix/loc-3.d: Likewise.
	* testsuite/gas/mmix/loc-4.d: Likewise.
	* testsuite/gas/mmix/loc-5.d: Likewise.
	* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
2021-04-21 10:34:32 +01:00
Cl?ment Chigot
c5df7e442e Rework the R_NEG support on both gas and ld for the PowerPC AIX targets, in order to manage C++ exceptions built with GCC.
bfd	PR binutils/21700
	* reloc.c (BFD_RELOC_PPC_NEG): New relocation.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* coff-rs6000.c (_bfd_xcoff_reloc_type_lookup): Add
	BFD_RELOC_PPC_NEG handler.
	(xcoff_reloc_type_neg): Correctly substract addend.
	* coff64-rs6000.c (xcoff64_howto_table): Add R_NEG_32
	howto.
	(xcoff64_rtype2howto): Add handler for R_NEG_32.
	(xcoff64_reloc_type_lookup): Add BFD_RELOC_PPC_NEG handler.
	* xcofflink.c (xcoff_need_ldrel_p): Check output section
	for R_POS-like relocations. New argument added.
	(xcoff_mark): Adapt to new xcoff_need_ldrel_p argument.
	(xcoff_link_input_bfd): Likewise.

gas	* config/tc-ppc.c (ppc_get_csect_to_adjust): New function.
	(ppc_fix_adjustable): Manage fx_subsy part.
	(tc_gen_reloc): Create second relocation when both
	fx_addsy and fx_subsy are provided.
	* config/tc-ppc.h (RELOC_EXPANSION_POSSIBLE): New define.
	(MAX_RELOC_EXPANSION): Likewise.
	(TC_FORCE_RELOCATION_SUB_SAME): Likewise
	(UNDEFINED_DIFFERENCE_OK): Likewise
	* testsuite/gas/all/gas.exp: Skip difference between two
	undefined symbols test.

ld	* testsuite/ld-powerpc/aix52.exp: Add new test.
	* testsuite/ld-powerpc/aix-neg-reloc-32.d: New test.
	* testsuite/ld-powerpc/aix-neg-reloc-64.d: New test.
	* testsuite/ld-powerpc/aix-neg-reloc.ex: New test.
	* testsuite/ld-powerpc/aix-neg-reloc.s: New test.
2021-04-20 14:40:43 +01:00
Alan Modra
c3f72de4f5 PowerPC disassembly of pcrel references
This adds some annotation to Power10 pcrel instructions, displaying
the target address (ie. pc + D34 field) plus a symbol if there is one
at exactly that target address.  pld from the .got or .plt will also
look up the entry and display it, symbolically if there is a dynamic
relocation on the entry.

include/
	* dis-asm.h (struct disassemble_info): Add dynrelbuf and dynrelcount.
binutils/
	* objdump.c (struct objdump_disasm_info): Delete dynrelbuf and
	dynrelcount.
	(find_symbol_for_address): Adjust for dynrelbuf and dynrelcount move.
	(disassemble_section, disassemble_data): Likewise.
opcodes/
	* ppc-dis.c (struct dis_private): Add "special".
	(POWERPC_DIALECT): Delete.  Replace uses with..
	(private_data): ..this.  New inline function.
	(disassemble_init_powerpc): Init "special" names.
	(skip_optional_operands): Add is_pcrel arg, set when detecting R
	field of prefix instructions.
	(bsearch_reloc, print_got_plt): New functions.
	(print_insn_powerpc): For pcrel instructions, print target address
	and symbol if known, and decode plt and got loads too.
gas/
	* testsuite/gas/ppc/prefix-pcrel.d: Update expected output.
	* testsuite/gas/ppc/prefix-reloc.d: Likewise.
	* gas/testsuite/gas/ppc/vsx_32byte.d: Likewise.
ld/
	* testsuite/ld-powerpc/inlinepcrel-1.d: Update expected output.
	* testsuite/ld-powerpc/inlinepcrel-2.d: Likewise.
	* testsuite/ld-powerpc/notoc2.d: Likewise.
	* testsuite/ld-powerpc/notoc3.d: Likewise.
	* testsuite/ld-powerpc/pcrelopt.d: Likewise.
	* testsuite/ld-powerpc/startstop.d: Likewise.
	* testsuite/ld-powerpc/tlsget.d: Likewise.
	* testsuite/ld-powerpc/tlsget2.d: Likewise.
	* testsuite/ld-powerpc/tlsld.d: Likewise.
	* testsuite/ld-powerpc/weak1.d: Likewise.
	* testsuite/ld-powerpc/weak1so.d: Likewise.
2021-04-09 16:56:43 +09:30
Clément Chigot
1b2cb8e2ee aix: implement TLS relocation for gas and ld
Add support for TLS in XCOFF. Amongst the things done by this commit:
 - Update XCOFF auxialiary header to match new version and allow TLS
   sections.
 - Add TLS sections (.tdata and .tbss) support in gas and ld.
 - Add support for the TLS relocations in gas and ld.
   Two different types BFD_RELOC are created for PPC and PPC64 as
   the size is a pointer, thus distinct in 32 or 64bit.

The addresses given by ld to .tdata and .tbss is a bit special. In
XCOFF, these addresses are actually offsets from the TLS pointer
computed at runtime. AIX assembly and linker does the same. In
top of that, the .tdata must be before .data (this is mandatory for AIX
loader). Thus, the aix ld script is recomputing "." before .data to restore
its original value. There might be a simpler way, but this one is working.

Optimisation linked to TLS relocations aren't yet implemented.

bfd/
	* reloc.c (BFD_RELOC_PPC_TLS_LE, BFD_RELOC_PPC_TLS_IE,
	BFD_RELOC_PPC_TLS_M, BFD_RELOC_PPC_TLS_ML, BFD_RELOC_PPC64_TLS_GD,
	BFD_RELOC_PPC64_TLS_LD, BFD_RELOC_PPC64_TLS_LE,
	BFD_RELOC_PPC64_TLS_IE, BFD_RELOC_PPC64_TLS_M,
	BFD_RELOC_PPC64_TLS_ML): New relocations.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* coff-rs6000.c (xcoff_calculate_relocation): Call
	xcoff_reloc_type_tls for TLS relocations.
	(xcoff_howto_table): Implement TLS relocations.
	(_bfd_xcoff_reloc_type_lookup): Add cases TLS relocations.
	(xcoff_reloc_type_tls): New function.
	* coff64-rs6000.c (xcoff_calculate_relocation): Likewise.
	(xcoff_howto_table): Likewise.
	(_bfd_xcoff_reloc_type_lookup): Likewise.
	* coffcode.h (sec_to_styp_flags): Handle TLS sections.
	(styp_to_sec_flags): Likewise.
	(coff_compute_section_file_positions): Avoid file offset
	optimisation for .data when the previous section is .tdata.
	(coff_write_object_contents): Handle TLS sections.
	* coffswap.h (coff_swap_aouthdr_out): Add support for
	new fields in aouthdr.
	* libxcoff.h (xcoff_reloc_type_tls): Add prototype.
	* xcofflink.c (xcoff_link_add_symbols): Handle XMC_UL.
	(xcoff_need_ldrel_p): Add cases for TLS relocations.
	(xcoff_create_ldrel): Add l_symndx for TLS sections.
gas/
	* config/tc-ppc.c (ppc_xcoff_text_section, ppc_xcoff_data_section,
	(ppc_xcoff_bss_section, ppc_xcoff_tdata_section,
	(ppc_xcoff_tbss_section): New variables.
	(ppc_text_subsegment, ppc_text_csects, ppc_data_subgments,
	(ppc_data_csects): Removed.
	(ppc_xcoff_section_is_initialized, ppc_init_xcoff_section,
	ppc_xcoff_parse_cons): New functions.
	(md_being): Initialize XCOFF sections.
	(ppc_xcoff_suffix): Add support for TLS relocations
	(fixup_size, md_apply_fix): Add support for new BFD_RELOC.
	(ppc_change_csect): Handle XMC_TL, XMC_UL.  Correctly, add XMC_BS
	to .bss section.  Handle new XCOFF section variables.
	(ppc_comm): Likewise.
	(ppc_toc): Likewise.
	(ppc_symbol_new_hook): Likewise.
	(ppc_frob_symbol): Likewise.
	(ppc_fix_adjustable): Add tbss support.
	* config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): New define.
	(ppc_xcoff_parse_cons): Add prototype.
	(struct ppc_xcoff_section): New structure.
ld/
	* emultempl/aix.em: Ensure .tdata section is removed
	if empty, even with -r flag.
	* scripttempl/aix.sc: Handle TLS sections.
	* testsuite/ld-powerpc/aix52.exp: Add new tests.
	* testsuite/ld-powerpc/aix-tls-reloc-32.d: New test.
	* testsuite/ld-powerpc/aix-tls-reloc-64.d: New test.
	* testsuite/ld-powerpc/aix-tls-reloc.ex: New test.
	* testsuite/ld-powerpc/aix-tls-reloc.s: New test.
	* testsuite/ld-powerpc/aix-tls-section-32.d: New test.
	* testsuite/ld-powerpc/aix-tls-section-64.d: New test.
	* testsuite/ld-powerpc/aix-tls-section.ex: New test.
	* testsuite/ld-powerpc/aix-tls-section.s: New test.
include/
	* coff/internal.h (struct internal_aouthdr): Add new fields.
	* coff/rs6000.h (AOUTHDRÃ): Add new fields.
	* coff/rs6k64.h (struct external_filehdr): Likewise.
	* coff/xcoff.h (_TDATA), _TBSS): New defines
	(RS6K_AOUTHDR_TLS_LE, RS6K_AOUTHDR_RAS, RS6K_AOUTHDR_ALGNTDATA,
	RS6K_AOUTHDR_SHR_SYMTAB, RS6K_AOUTHDR_FORK_POLICY,
	RS6K_AOUTHDR_FORK_COR): New defines.
	(XMC_TU): Removed.
	(XMC_UL): New define.
2021-03-12 22:47:33 +10:30
Clément Chigot
4a403be0c1 aix: implement R_TOCU and R_TOCL relocations
Implement support for largetoc on XCOFF.
R_TOCU and R_TOCL are referenced by the new BFD defines:
BFD_RELOC_PPC_TOC16_HI and BFD_RELOC_PPC_TOC16_LO.
A new toc storage class is added XMC_TE.

In order to correctly handle R_TOCU, the logic behind
xcoff_reloc_type_toc is changed to compute the whole TOC offset
instead of just the difference between the "link" offset and the
"assembly" offset.

In gas, add a function to transform addis format used by AIX
"addis RT, D(RA)" into the ELF format "addis RT, RA, SI".

bfd/
	* reloc.c (BFD_RELOC_PPC_TOC16_HI, BFD_RELOC_PPC_TOC16_LO):
	New relocations.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* coff-rs6000.c (xcoff_calculate_relocation): Call
	xcoff_reloc_type_toc for R_TOCU and R_TOCL.
	(xcoff_howto_table): Remove src_mask for TOC relocations.
	Add R_TOCU and R_TOCL howtos.
	(_bfd_xcoff_reloc_type_lookup): Add cases for
	BFD_RELOC_PPC_TOC16_HI and BFD_RELOC_PPC_TOC16_LO.
	(xcoff_reloc_type_toc): Compute the whole offset.
	Implement R_TOCU and R_TOCL.
	* coff64-rs6000.c (xcoff64_calculate_relocation):
	Likewise.
	(xcoff64_howto_table): Likewise.
	(xcoff64_reloc_type_lookup): Likewise.
gas/
	* config/tc-ppc.c (ppc_xcoff_suffix): New function.
	(MAP, MAP32, MAP64): New macros for XCOFF.
	(ppc_xcoff_fixup_addis): New function.
	(ppc_is_toc_sym): Handle XMC_TE.
	(fixup_size): Add cases for BFD_RELOC_PPC_TOC16_HI and
	BFD_RELOC_PPC_TOC16_LO.
	(md_assemble): Call ppc_xcoff_fixup_addis for XCOFF.
	(ppc_change_csect): Handle XMC_TE.
	(ppc_tc): Enable .tc symbols to have only a XMC_TC or XMC_TE
	storage class.
	(ppc_symbol_new_hook): Handle XMC_TE.
	(ppc_frob_symbol): Likewise.
	(ppc_fix_adjustable): Likewise.
	(md_apply_fix): Handle BFD_RELOC_PPC_TOC16_HI and
	BFD_RELOC_PPC_TOC16_LO.
ld/
	* scripttempl/aix.sc: Add .te to .data section.
	* testsuite/ld-powerpc/aix52.exp: Add test structure for AIX7+.
	Add aix-largetoc-1 test.
	* testsuite/ld-powerpc/aix-largetoc-1-32.d: New test.
	* testsuite/ld-powerpc/aix-largetoc-1-64.d: New test.
	* testsuite/ld-powerpc/aix-largetoc-1.ex: New test.
	* testsuite/ld-powerpc/aix-largetoc-1.s: New test.
2021-03-12 22:47:23 +10:30
Alan Modra
b80e421f91 PR27451, -z start_stop_gc for powerpc64
PowerPC64 has its own gc_mark_dynamic_ref.

bfd/
	PR 27451
	* elf64-ppc.c (ppc64_elf_gc_mark_dynamic_ref): Ignore synthesized
	linker defined start/stop symbols when start_stop_gc.
ld/
	* testsuite/ld-powerpc/startstop.d,
	* testsuite/ld-powerpc/startstop.r,
	* testsuite/ld-powerpc/startstop.s: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run it.
2021-03-02 21:49:56 +10:30
Alan Modra
f5b9c288a3 PowerPC64 undefined weak visibility vs GOT optimisation
Undefined weak symbols with non-default visibility are seen as local
by SYMBOL_REFERENCES_LOCAL.  This stops a got indirect to relative
optimisation for them, so that pies and dlls don't get non-zero values
when loading somewhere other than the address they are linked at
(which always happens).  The optimisation could be allowed for pdes,
but I thought it best not to allow it there too.

bfd/
	* elf64-ppc.c (ppc64_elf_relocate_section): Don't optimise got
	indirect to pc-relative or toc-relative for undefined symbols.
ld/
	* testsuite/ld-powerpc/weak1.d,
	* testsuite/ld-powerpc/weak1.r,
	* testsuite/ld-powerpc/weak1.s,
	* testsuite/ld-powerpc/weak1so.d,
	* testsuite/ld-powerpc/weak1so.r: New tests.
	* testsuite/ld-powerpc/powerpc.exp: Run them.
2021-03-02 21:47:42 +10:30
Alan Modra
4bd7c90276 PowerPC: Don't generate unused section symbols
PowerPC version of git commit d1bcae833b.

bfd/
	* elf32-ppc.c: Delete outdated comment.
	(TARGET_KEEP_UNUSED_SECTION_SYMBOLS): Define.
	* elf64-ppc.c (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): Define.
gas/
	* testsuite/gas/ppc/power4.d: Adjust for removal of section sym.
	* testsuite/gas/ppc/test1elf32.d: Likewise.
	* testsuite/gas/ppc/test1elf64.d: Likewise.
ld/
	* testsuite/ld-powerpc/relbrlt.s: Make symbols global.
	* testsuite/ld-powerpc/relbrlt.d: Adjust to suit.
	* testsuite/ld-powerpc/tlsget.d: Adjust for reordered stubs.
	* testsuite/ld-powerpc/tlsget.wf: Likewise.
	* testsuite/ld-powerpc/tlsget2.d: Likewise.
	* testsuite/ld-powerpc/tlsget2.wf: Likewise.
	* testsuite/ld-powerpc/tlsexe.r: Adjust for removed section syms.
	* testsuite/ld-powerpc/tlsexe32.r: Likewise.
	* testsuite/ld-powerpc/tlsexe32no.r: Likewise.
	* testsuite/ld-powerpc/tlsexeno.r: Likewise.
	* testsuite/ld-powerpc/tlsexenors.r: Likewise.
	* testsuite/ld-powerpc/tlsexers.r: Likewise.
	* testsuite/ld-powerpc/tlsexetoc.r: Likewise.
	* testsuite/ld-powerpc/tlsexetocrs.r: Likewise.
	* testsuite/ld-powerpc/tlsso.r: Likewise.
	* testsuite/ld-powerpc/tlsso32.r: Likewise.
	* testsuite/ld-powerpc/tlstocso.r: Likewise.
2021-01-20 16:12:06 +10:30
Alan Modra
250d07de5c Update year range in copyright notice of binutils files 2021-01-01 10:31:05 +10:30
Alan Modra
e4d9e5422f PowerPC paranioa testing of symbol merging involving comdat groups
Ensures we don't mistreat st_other localentry bits.

	* testsuite/ld-powerpc/group1.d,
	* testsuite/ld-powerpc/group1.s,
	* testsuite/ld-powerpc/group1.sym,
	* testsuite/ld-powerpc/group2.d,
	* testsuite/ld-powerpc/group2.s,
	* testsuite/ld-powerpc/group2.sym,
	* testsuite/ld-powerpc/group3.s,
	* testsuite/ld-powerpc/group3.sym: New test files.
	* testsuite/ld-powerpc/powerpc.exp: Run new tests.
2020-11-18 23:49:31 +10:30
Alan Modra
7cc340055d PR26882, --enable-textrel-check=warning test failures on powerpc
PR 26882
	* testsuite/ld-powerpc/dotsym3.d: Add "-z notext" to ld options.
	* testsuite/ld-powerpc/dotsym4.d: Likewise.
	* testsuite/ld-powerpc/ppc476-shared.d: Likewise.
	* testsuite/ld-powerpc/ppc476-shared2.d: Likewise.
	* testsuite/ld-powerpc/powerpc.exp: Likewise for various tests.
	* testsuite/ld-undefined/weak-fundef.s: Add BLPLT variant.
	* testsuite/ld-undefined/weak-undef.exp: Define BLPLT for ppc32.
2020-11-17 20:59:53 +10:30
Alan Modra
f243e458cd PR26656 testcases
* testsuite/ld-powerpc/tlsget.d,
	* testsuite/ld-powerpc/tlsget.s,
	* testsuite/ld-powerpc/tlsget.wf,
	* testsuite/ld-powerpc/tlsget2.d.
	* testsuite/ld-powerpc/tlsget2.wf: New testcases.
	* testsuite/ld-powerpc/powerpc.exp: Run them.
2020-09-28 19:36:35 +09:30
Alan Modra
3cd7c7d7ef PPC64_OPT_LOCALENTRY is incompatible with tail calls
The save of r2 in __glink_PLTresolve is the culprit.  Remove it,
unless we know we need it for --plt-localentry.  --plt-localentry
should not be used with power10 pc-relative code that makes tail
calls.

The patch also removes use of r2 as a scratch reg in the ELFv2
__glink_PLTresolve.  Using r2 isn't a problem, this is just reducing
the number of scratch regs.

bfd/
	* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
	(LD_R0_0R11, ADD_R11_R0_R11): Define.
	(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
	code detected.
	(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
	(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
	and only emit for has_plt_localentry0.  Don't use r2 in the stub.
ld/
	* testsuite/ld-powerpc/elfv2so.d,
	* testsuite/ld-powerpc/notoc2.d,
	* testsuite/ld-powerpc/tlsdesc.wf,
	* testsuite/ld-powerpc/tlsdesc2.d,
	* testsuite/ld-powerpc/tlsdesc2.wf,
	* testsuite/ld-powerpc/tlsopt5.d,
	* testsuite/ld-powerpc/tlsopt5.wf,
	* testsuite/ld-powerpc/tlsopt6.d,
	* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
2020-09-26 19:03:02 +09:30
Alan Modra
252dcdf432 PowerPC TPREL_HA/LO optimisation
ppc64 ld optimises sequences like the following
	addis 3,13,wot@tprel@ha
	lwz 3,wot@tprel@l(3)
to
	nop
	lwz 3,wot@tprel(13)
when "wot" is located near enough to the thread pointer.
However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on
an addis rt,13,imm instruction, and while ld checked for that on the
high-part instruction it didn't disable the optimisation on the
low-part instruction.  This patch fixes that problem, disabling the
tprel optimisation globally if high-part instructions don't pass
sanity checks.  The optimisation is also enabled for ppc32, where
before ld.bfd had the code in the wrong place and ld.gold had it in a
block only enabled for ppc64.

bfd/
	* elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for
	high part tprel16 relocs.
	(ppc_elf_tls_optimize): Sanity check high part tprel16 relocs.
	Clear do_tls_opt on odd instructions.
	(ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later.
	Don't sanity check them here.
	* elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for
	high part tprel16 relocs.
	(ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs.
	Clear do_tls_opt on odd instructions.
	(ppc64_elf_relocate_section): Don't sanity check TPREL16_HA.
ld/
	* testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation.
	* testsuite/ld-powerpc/tlsexe32.d: Likewise.
	* testsuite/ld-powerpc/tlsldopt32.d: Likewise.
	* testsuite/ld-powerpc/tlsmark32.d: Likewise.
	* testsuite/ld-powerpc/tlsopt4_32.d: Likewise.
	* testsuite/ld-powerpc/tprel.s,
	* testsuite/ld-powerpc/tprel.d,
	* testsuite/ld-powerpc/tprel32.d: New tests.
	* testsuite/ld-powerpc/tprelbad.s,
	* testsuite/ld-powerpc/tprelbad.d: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run them.
gold/
	* powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors.
	(Target_powerpc::Scan::local): Sanity check tprel high relocs.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Control tprel optimisation
	with tprel_opt_ and enable for 32-bit.
2020-08-24 21:15:06 +09:30
Alan Modra
0dbd452ad2 PowerPC64 inline PLT call tests
* testsuite/ld-powerpc/inline.s,
	* testsuite/ld-powerpc/inline-1.d,
	* testsuite/ld-powerpc/inline-2.d,
	* testsuite/ld-powerpc/inline-3.d,
	* testsuite/ld-powerpc/inline-4.d,
	* testsuite/ld-powerpc/inlinepcrel.s,
	* testsuite/ld-powerpc/inlinepcrel-1.d,
	* testsuite/ld-powerpc/inlinepcrel-2.d,
	* testsuite/ld-powerpc/inlinepcrel-3.d: New tests.
	* testsuite/ld-powerpc/powerpc.exp: Run them.
2020-08-16 23:00:34 +09:30
Nick Clifton
39326c35dd Fix problem running a few PowerPC linker tests when the .data section is retained.
* testsuite/ld-powerpc/powerpc.exp (ppcelftests): Use section name
	.PPC.EMB.apuinfo instead of section number 2 in apuinfo tests.
2020-07-20 14:57:38 +01:00
Alan Modra
e10a07b32d Power10 stub selection
This patch better supports mixing of power10 and non-power10 code,
as might be seen in a cpu-optimized library using ifuncs to select
functions optimized for a given cpu.  Using -Wl,--no-power10-stubs
isn't that good in this situation since non-power10 notoc stubs are
slower and larger than the power10 variants, which you'd like to use
on power10 code paths.

With this change, power10 pc-relative code that makes calls marked
@notoc uses power10 stubs if stubs are necessary, and other calls use
non-power10 instructions in stubs.  This will mean that if gcc is
generating code for -mcpu=power10 but with pc-rel disabled then you'll
get the older stubs even on power10 (unless you force with
-Wl,--power10-stubs).  That shouldn't be too big a problem: stubs that
use r2 are reasonable.  It's just the ones that set up addressing
using "mflr 12; bcl 20,31,.+4; mflr 11; mtlr 12" that should be
avoided if possible.

bfd/
	* elf64-ppc.c (struct ppc_link_hash_table): Add has_power10_relocs.
	(select_alt_stub): New function.
	(ppc_get_stub_entry): Use it here.
	(ppc64_elf_check_relocs): Set had_power10_relocs rather than
	power10_stubs.
	(ppc64_elf_size_stubs): Clear power10_stubs here instead.  Don't
	merge notoc stubs with other varieties when power10_stubs is "auto".
	Instead dup the stub hash table entry.
	(plt_stub_size, ppc_build_one_stub, ppc_size_one_stub): Adjust
	tests of power10_stubs.
ld/
	* emultempl/ppc64elf.em (power10-stubs): Accept optional "auto" arg.
	* ld.texi (power10-stubs): Update.
	* testsuite/ld-powerpc/callstub-1.d: Force --power10-stubs.
	* testsuite/ld-powerpc/callstub-2.d: Relax branch offset comparison.
	* testsuite/ld-powerpc/callstub-4.d: New test.
	* testsuite/ld-powerpc/notoc.d: Force --no-power10-stubs.
	* testsuite/ld-powerpc/notoc3.d,
	* testsuite/ld-powerpc/notoc3.s,
	* testsuite/ld-powerpc/notoc3.wf: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run new tests.  Pass
	--no-power10-stubs for notoc link.
2020-07-19 12:27:47 +09:30
Alan Modra
d3b10ee787 PowerPC64 ld --no-power10-stubs
Needed for libraries that use ifuncs or other means to support
cpu-optimized versions of functions, some power10, some not, and those
functions make calls using linkage stubs.

bfd/
	* elf64-ppc.h (struct ppc64_elf_params): Add power10_stubs.
	* elf64-ppc.c (struct ppc_link_hash_table): Delete
	power10_stubs.
	(ppc64_elf_check_relocs): Adjust setting of power10_stubs.
	(plt_stub_size, ppc_build_one_stub, ppc_size_one_stub): Adjust
	uses of power10_stubs.
ld/
	* emultempl/ppc64elf.em (params): Init new field.
	(enum ppc64_opt): Add OPTION_POWER10_STUBS and OPTION_NO_POWER10_STUBS.
	(PARSE_AND_LIST_LONGOPTS): Support --power10-stubs and
	--no-power10-stubs.
	(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Likewise.
	* testsuite/ld-powerpc/callstub-3.d: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run it.
2020-07-10 11:14:38 +09:30
Alan Modra
babcb2ea89 powerpc-aix5.2 tests
git commit bbd0c8e204 broke many of these tests, and there have been
other changes that caused failures too.

	* testsuite/lib/ld-lib.exp (ar_simple_create): Pass options before
	ar command.
	* testsuite/ld-powerpc/aix52.exp: Run for rs6000-aix5.2.  Update
	match files.
	* testsuite/ld-powerpc/aix-abs-branch-1.dd: Update.
	* testsuite/ld-powerpc/aix-core-sec-1.hd: Update.
	* testsuite/ld-powerpc/aix-gc-1-32.dd: Update.
	* testsuite/ld-powerpc/aix-gc-1-64.dd: Update.
	* testsuite/ld-powerpc/aix-glink-1-32.dd: Update.
	* testsuite/ld-powerpc/aix-glink-1-64.dd: Update.
	* testsuite/ld-powerpc/aix-glink-2-32.dd: Update.
	* testsuite/ld-powerpc/aix-glink-2-64.dd: Update.
	* testsuite/ld-powerpc/aix-no-dup-syms-1-rel.rd: Update.
	* testsuite/ld-powerpc/aix-ref-1-32.od: Update.
	* testsuite/ld-powerpc/aix-ref-1-64.od: Update.
	* testsuite/ld-powerpc/aix-toc-1-32.dd: Update.
	* testsuite/ld-powerpc/aix-toc-1-64.dd: Update.
	* testsuite/ld-powerpc/aix-weak-3-32.dd: Update.
	* testsuite/ld-powerpc/aix-weak-3-64.dd: Update.
	* testsuite/ld-powerpc/aix-abs-branch-1.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-abs-branch-1-32.nd,
	* testsuite/ld-powerpc/aix-abs-branch-1-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-abs-reloc-1.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-abs-reloc-1-32.nd,
	* testsuite/ld-powerpc/aix-abs-reloc-1-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-abs-reloc-1.od: Delete, replace with..
	* testsuite/ld-powerpc/aix-abs-reloc-1-32.od,
	* testsuite/ld-powerpc/aix-abs-reloc-1-64.od: ..these new files.
	* testsuite/ld-powerpc/aix-export-1-all.dd: Delete, replace with..
	* testsuite/ld-powerpc/aix-export-1-all-32.dd,
	* testsuite/ld-powerpc/aix-export-1-all-64.dd: ..these new files.
	* testsuite/ld-powerpc/aix-export-1-full.dd: Delete, replace with..
	* testsuite/ld-powerpc/aix-export-1-full-32.dd,
	* testsuite/ld-powerpc/aix-export-1-full-64.dd: ..these new files.
	* testsuite/ld-powerpc/aix-export-2.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-export-2-32.nd,
	* testsuite/ld-powerpc/aix-export-2-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-gc-1.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-gc-1-32.nd,
	* testsuite/ld-powerpc/aix-gc-1-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-glink-3.dd: Delete, replace with..
	* testsuite/ld-powerpc/aix-glink-3-32.dd,
	* testsuite/ld-powerpc/aix-glink-3-64.dd: ..these new files.
	* testsuite/ld-powerpc/aix-lineno-1a.dd: Delete, replace with..
	* testsuite/ld-powerpc/aix-lineno-1a-32.dd,
	* testsuite/ld-powerpc/aix-lineno-1a-64.dd: ..these new files.
	* testsuite/ld-powerpc/aix-lineno-1a.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-lineno-1a-32.nd,
	* testsuite/ld-powerpc/aix-lineno-1a-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-lineno-1b.dd: Delete, replace with..
	* testsuite/ld-powerpc/aix-lineno-1b-32.dd,
	* testsuite/ld-powerpc/aix-lineno-1b-64.dd: ..these new files.
	* testsuite/ld-powerpc/aix-lineno-1b.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-lineno-1b-32.nd,
	* testsuite/ld-powerpc/aix-lineno-1b-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso.dnd: Delete, replace with..
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-32.dnd,
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-64.dnd: ..these new files.
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso.drd: Delete, replace with..
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-32.drd,
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-64.drd: ..these new files.
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-32.nd,
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso.rd: Delete, replace with..
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-32.rd,
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-64.rd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-dso.dnd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-dso-32.dnd,
	* testsuite/ld-powerpc/aix-weak-1-dso-64.dnd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-dso.hd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-dso-32.hd,
	* testsuite/ld-powerpc/aix-weak-1-dso-64.hd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-dso.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-dso-32.nd,
	* testsuite/ld-powerpc/aix-weak-1-dso-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-gcdso.dnd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-gcdso-32.dnd,
	* testsuite/ld-powerpc/aix-weak-1-gcdso-64.dnd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-gcdso.hd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-gcdso-32.hd,
	* testsuite/ld-powerpc/aix-weak-1-gcdso-64.hd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-gcdso.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-gcdso-32.nd,
	* testsuite/ld-powerpc/aix-weak-1-gcdso-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-2a.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-2a-32.nd,
	* testsuite/ld-powerpc/aix-weak-2a-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-2b.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-2b-32.nd,
	* testsuite/ld-powerpc/aix-weak-2b-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-2c.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-2c-32.nd,
	* testsuite/ld-powerpc/aix-weak-2c-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-2c.od: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-2c-32.od,
	* testsuite/ld-powerpc/aix-weak-2c-64.od: ..these new files.
2020-07-08 15:56:28 +09:30
Alan Modra
7193487fa8 Use is_xcoff_format in ld testsuite
* testsuite/ld-checks/checks.exp: Use is_xcoff_format.
	* testsuite/ld-powerpc/powerpc.exp: Likewise.
	* testsuite/ld-scripts/print-memory-usage.exp: Likewise.
	* testsuite/ld-srec/srec.exp: Likewise.
	* testsuite/ld-undefined/require-defined.exp: Likewise.
	* testsuite/ld-scripts/expr2.d: Likewise.
	* testsuite/ld-scripts/section-match-1.d: Only run for ELF.
	* testsuite/ld-elfvers/vers.exp: Delete dead code.
	* testsuite/ld-elfvsb/elfvsb.exp: Likewise.
	* testsuite/ld-elfweak/elfweak.exp: Likewise.
2020-07-07 18:26:34 +09:30
Nick Clifton
0942c7ab94 Change readelf's display of symbol names (when not in --wide mode) so that if they are going to be truncated then "[...]" is displayed at the end. Add a comment line option to disable this enhancement and restore the old behaviour.
PR 26028
binutils* readelf.c (print_symbol): Handle truncation of symbol names.
	(options): Add -T/--silent-truncation option.
	(parse_args): Handle the option.
	(print_dynamic_symbol): Correct calculation of width available to
	display symbol name.
	* doc/binutils.texi: Document the -T option to readelf.
	* NEWS: Mention the new feature.

gas	* testsuite/gas/ia64/group-2.d: Add -T option to readelf
	command line.
	* testsuite/gas/ia64/unwind.d: Likewise.
	* testsuite/gas/mmix/bspec-1.d: Likewise.
	* testsuite/gas/mmix/bspec-2.d: Likewise.
	* testsuite/gas/mmix/comment-1.d: Likewise.
	* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.

ld	* testsuite/ld-powerpc/powerpc.exp: Add -T option to readelf
	command line when running some tests.
	* testsuite/ld-arm/arm-elf.exp: Likewise.
	* testsuite/ld-mips-elf/mips-elf.exp: Likewise.
	* testsuite/ld-mmix/local1.d: Likewise.
	* testsuite/ld-mmix/local3.d: Likewise.
	* testsuite/ld-mmix/local5.d: Likewise.
	* testsuite/ld-mmix/local7.d: Likewise.
	* testsuite/ld-powerpc/powerpc.exp: Likewise.
2020-07-02 11:30:52 +01:00
Alan Modra
e2c8dab6ae tcl global directive outside proc body does nothing (ld)
* testsuite/config/default.exp: Remove global directive outside
	proc body.
	* testsuite/ld-bootstrap/bootstrap.exp: Likewise.
	* testsuite/ld-elf/compress.exp: Likewise.
	* testsuite/ld-elf/elf.exp: Likewise.
	* testsuite/ld-elf/exclude.exp: Likewise.
	* testsuite/ld-elf/frame.exp: Likewise.
	* testsuite/ld-elf/indirect.exp: Likewise.
	* testsuite/ld-elf/linux-x86.exp: Likewise.
	* testsuite/ld-elf/shared.exp: Likewise.
	* testsuite/ld-elf/tls.exp: Likewise.
	* testsuite/ld-elf/tls_common.exp: Likewise.
	* testsuite/ld-elfcomm/elfcomm.exp: Likewise.
	* testsuite/ld-elfweak/elfweak.exp: Likewise.
	* testsuite/ld-frv/fdpic.exp: Likewise.
	* testsuite/ld-frv/tls.exp: Likewise.
	* testsuite/ld-gc/gc.exp: Likewise.
	* testsuite/ld-i386/i386.exp: Likewise.
	* testsuite/ld-i386/no-plt.exp: Likewise.
	* testsuite/ld-ifunc/ifunc.exp: Likewise.
	* testsuite/ld-mips-elf/mips-elf-flags.exp: Likewise.
	* testsuite/ld-nios2/nios2.exp: Likewise.
	* testsuite/ld-plugin/lto.exp: Likewise.
	* testsuite/ld-plugin/plugin.exp: Likewise.
	* testsuite/ld-powerpc/export-class.exp: Likewise.
	* testsuite/ld-scripts/align.exp: Likewise.
	* testsuite/ld-scripts/crossref.exp: Likewise.
	* testsuite/ld-scripts/defined.exp: Likewise.
	* testsuite/ld-scripts/overlay-size.exp: Likewise.
	* testsuite/ld-scripts/provide.exp: Likewise.
	* testsuite/ld-scripts/weak.exp: Likewise.
	* testsuite/ld-selective/selective.exp: Likewise.
	* testsuite/ld-sh/rd-sh.exp: Likewise.
	* testsuite/ld-size/size.exp: Likewise.
	* testsuite/ld-srec/srec.exp: Likewise.
	* testsuite/ld-x86-64/mpx.exp: Likewise.
	* testsuite/ld-x86-64/no-plt.exp: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Likewise.
2020-06-04 16:11:19 +09:30
Alan Modra
94ba9882d5 Power10 VSX 32-byte storage access
bfd/
	* elf64-ppc.c (xlate_pcrel_opt): Handle lxvp and stxvp.
opcodes/
	* ppc-opc.c (insert_xtp, extract_xtp): New functions.
	(XTP, DQXP, DQXP_MASK): Define.
	(powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
	(prefix_opcodes): Add plxvp and pstxvp.
gas/
	* testsuite/gas/ppc/vsx_32byte.d,
	* testsuite/gas/ppc/vsx_32byte.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.
ld/
	* testsuite/ld-powerpc/pcrelopt.s: Add lxvp and stxvp.
	* testsuite/ld-powerpc/pcrelopt.d: Update.
2020-05-11 21:08:37 +09:30
Alan Modra
7c1f422735 PowerPC Rename powerxx to power10
Now that ISA3.1 is out we can finish with the powerxx silliness.

bfd/
	* elf64-ppc.c: Rename powerxx to power10 throughout.
gas/
	* config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
	renaming.
	* testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
	place of -mfuture/-Mfuture.
	* testsuite/gas/ppc/prefix-pcrel.d: Likewise.
	* testsuite/gas/ppc/prefix-reloc.d: Likewise.
gold/
	* powerpc.cc: Rename powerxx to power10 throughout.
include/
	* elf/ppc64.h: Update comment.
	* opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX.
ld/
	* testsuite/ld-powerpc/callstub-1.d: Use -mpower10/-Mpower10 in
	place of -mfuture/-Mfuture.
	* testsuite/ld-powerpc/notoc2.d: Likewise.
	* testsuite/ld-powerpc/powerpc.exp: Likewise.
	* testsuite/ld-powerpc/tlsgd.d: Likewise.
	* testsuite/ld-powerpc/tlsie.d: Likewise.
	* testsuite/ld-powerpc/tlsld.d: Likewise.
opcodes/
	* ppc-dis.c (ppc_opts): Add "power10" entry.
	(print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
	* ppc-opc.c (POWER10): Rename from POWERXX.  Update all uses.
2020-05-11 21:08:36 +09:30
Alan Modra
2efec98b28 PowerPC64: remove empty .rela.dyn (.rela.branch_lt)
Stripping .rela.branch_lt is easy enough but messes with the
testsuite due to stub symbols (that use section id) changing.  Tests
that run on more than one target variant can be tricky to fix, this
renaming happened to work.

bfd/
	* elf64-ppc.c (ppc64_elf_size_stubs): Strip relbrlt too.
ld/
	* testsuite/ld-powerpc/tlsopt5.s: Rename foo to aaaaa.
	* testsuite/ld-powerpc/tlsopt5.d: Adjust to suit.
	* testsuite/ld-powerpc/tlsopt6.d: Likewise.
2020-04-20 08:14:42 +09:30
Christophe Lyon
aef397a154 Non-contiguous memory regions support: Fix testcases after previous commit
2020-03-18  Christophe Lyon  <christophe.lyon@linaro.org>

	* testsuite/ld-arm/non-contiguous-arm4.d: Fix expected output.
	* testsuite/ld-powerpc/non-contiguous-powerpc.d: Likewise.

Change-Id: I8870800177e1ff79cdd05af13613ec53ef95681f
2020-03-18 12:38:30 +00:00
Christophe Lyon
abf874aafe Add support for non-contiguous memory regions
2020-01-06  Christophe Lyon  <christophe.lyon@linaro.org>

	bfd/
	* bfd-in2.h: Regenerate.
	* section.c (asection): Add already_assigned field.
	(BFD_FAKE_SECTION): Add default initializer for it.
	* ecoff.c (bfd_debug_section): Initialize already_assigned field.
	* elf32-arm.c (arm_build_one_stub): Add support for
	non_contiguous_regions.
	* elf32-csky.c (csky_build_one_stub): Likewise.
	* elf32-hppa.c (hppa_build_one_stub): Likewise.
	* elf32-m68hc11.c (m68hc11_elf_build_one_stub): Likewise.
	* elf32-m68hc12.c (m68hc12_elf_build_one_stub): Likewise.
	* elf32-metag.c (metag_build_one_stub): Likewise.
	* elf32-nios2.c (nios2_build_one_stub): Likewise.
	* elf64-ppc.c (ppc_build_one_stub): Likewise.
	(ppc_size_one_stub): Likewise.
	* elfnn-aarch64.c (aarch64_build_one_stub): Likewise.
	* elflink.c (elf_link_input_bfd): Likewise.

	include/
	* bfdlink.h (bfd_link_info): Add non_contiguous_regions and
	non_contiguous_regions_warnings fields.

	ld/
	* ldlang.c (lang_add_section): Add support for
	non_contiguous_regions.
	(size_input_section): Likewise.
	(lang_size_sections_1): Likewise.
	(process_insert_statements): Likewise.
	* ldlex.h (option_values): Add OPTION_NON_CONTIGUOUS_REGIONS and
	OPTION_NON_CONTIGUOUS_REGIONS_WARNINGS.
	* lexsup.c (ld_options): Add entries for
	--enable-non-contiguous-regions and
	--enable-non-contiguous-regions-warnings.
	(parse_args): Handle it.
	* NEWS: Add --enable-non-contiguous-regions and
	--enable-non-contiguous-regions-warnings.
	* ld.texi: Add --enable-non-contiguous-regions and
	--enable-non-contiguous-regions-warnings documentation.
	* emultempl/armelf.em (elf32_arm_add_stub_section): Add
	SEC_LINKER_CREATED flag.
	* emultempl/xtensaelf.em (ld_build_required_section_dependence):
	Emit an error when --enable-non-contiguous-regions is used.
	* testsuite/ld-elf/non-contiguous.d: New.
	* testsuite/ld-elf/non-contiguous.ld: New.
	* testsuite/ld-elf/non-contiguous.s: New.
	* testsuite/ld-arm/arm-elf.exp: Run the new tests.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm.s: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm.d: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm.ld: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm2.d: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm3.d: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm4.d: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm4.ld: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm5.d: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm5.ld: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm6.d: New.
	* testsuite/ld-arm/arm-elf/non-contiguous-arm6.ld: New.
	* testsuite/ld-powerpc/powerpc.exp: Run new tests.
	* testsuite/ld-powerpc/non-contiguous-powerpc.d: New.
	* testsuite/ld-powerpc/non-contiguous-powerpc.ld: New.
	* testsuite/ld-powerpc/non-contiguous-powerpc.sd: New.
	* testsuite/ld-powerpc/non-contiguous-powerpc64.d: New.
2020-03-13 14:44:45 +00:00
Alan Modra
a804e4760a PowerPC64 tls_get_addr_desc static support
This provides a linker generated __tls_get_addr_desc wrapper function
preserving registers around a __tls_get_addr call.  The idea being to
support __tls_get_addr_desc without requiring a glibc update.

bfd/
	* elf64-ppc.c (struct ppc_link_hash_table): Add tga_group.
	(ppc64_elf_archive_symbol_lookup): Extract __tls_get_addr_opt for
	__tls_get_addr_desc.
	(ppc64_elf_size_stubs): Add section for linker generated
	__tls_get_addr_desc wrapper function.  Loop at least once if
	generating this function.
	(emit_tga_desc, emit_tga_desc_eh_frame): New functions.
	(ppc64_elf_build_stubs): Generate __tls_get_addr_desc.
ld/
	* testsuite/ld-powerpc/tlsdesc3.d,
	* testsuite/ld-powerpc/tlsdesc3.wf,
	* testsuite/ld-powerpc/tlsdesc4.d,
	* testsuite/ld-powerpc/tlsdesc4.s,
	* testsuite/ld-powerpc/tlsdesc4.wf: New tests.
	* testsuite/ld-powerpc/powerpc.exp: Run them.
2020-01-22 17:14:08 +10:30
Alan Modra
9e7028aa1e PowerPC64 __tls_get_addr_desc
This implements register saving and restoring in the __tls_get_addr
call stub, so that when glibc supports the optimized tls call stub gcc
can generate code that assumes only r0, r12 and of course r3 are
changed on a __tls_get_addr call.  When gcc expects __tls_get_addr
calls to preserve registers the call will be to __tls_get_addr_desc,
which will be translated by the linker to a call to __tls_get_addr_opt.

bfd/
	* elf64-ppc.h (struct ppc64_elf_params): Add no_tls_get_addr_regsave.
	* elf64-ppc.c (struct ppc_link_hash_table): Add tga_desc and
	tga_desc_fd.
	(is_tls_get_addr): Match tga_desc and tga_desc_df too.
	(STDU_R1_0R1, ADDI_R1_R1): Define.
	(tls_get_addr_prologue, tls_get_addr_epilogue): New functions.
	(ppc64_elf_tls_setup): Set up tga_desc and tga_desc_fd.  Indirect
	tga_desc_fd to opt_fd, and tga_desc to opt.  Set
	no_tls_get_addr_regsave.
	(branch_reloc_hash_match): Add hash3 and hash4.
	(ppc64_elf_tls_optimize): Handle tga_desc_fd and tga_desc too.
	(ppc64_elf_size_dynamic_sections): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	(plt_stub_size, build_plt_stub): Likewise.  Size regsave
	__tls_get_addr stub.
	(build_tls_get_addr_stub): Build regsave __tls_get_addr stub and
	eh_frame.
	(ppc_size_one_stub): Handle tga_desc_fd and tga_desc too.  Size
	eh_frame for regsave __tls_get_addr.
gas/
	* config/tc-ppc.c (parse_tls_arg): Handle tls arg for
	__tls_get_addr_desc and __tls_get_addr_opt.
ld/
	* emultempl/ppc64elf.em (ppc64_opt, PARSE_AND_LIST_LONGOPTS),
	(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Support
	--tls-get-addr-regsave and --no-tls-get-addr-regsave.
	(params): Init new field.
	* ld.texi (--tls-get-addr-regsave, --no-tls-get-addr-regsave):
	Document.
	* testsuite/ld-powerpc/tlsdesc.s,
	* testsuite/ld-powerpc/tlsdesc.d,
	* testsuite/ld-powerpc/tlsdesc.wf,
	* testsuite/ld-powerpc/tlsdesc2.d,
	* testsuite/ld-powerpc/tlsdesc2.wf,
	* testsuite/ld-powerpc/tlsexenors.d,
	* testsuite/ld-powerpc/tlsexenors.r,
	* testsuite/ld-powerpc/tlsexers.d,
	* testsuite/ld-powerpc/tlsexers.r,
	* testsuite/ld-powerpc/tlsexetocnors.d,
	* testsuite/ld-powerpc/tlsexetocrs.d,
	* testsuite/ld-powerpc/tlsexetocrs.r,
	* testsuite/ld-powerpc/tlsopt6.d,
	* testsuite/ld-powerpc/tlsopt6.wf: New.
	* testsuite/ld-powerpc/powerpc.exp: Run new tests.
2020-01-22 17:14:08 +10:30
Alan Modra
b9ca1af69e Don't touch r11 in __tls_get_addr stub
This modifies the special __tls_get_addr stub that checks for a
tlsdesc style __tls_index entry and returns early.  Not using r11
isn't much benefit at the moment but a followup patch will preserve
regs around the first call to __tls_get_addr when the __tls_index
entry isn't yet set up for an early return.

bfd/
	* elf64-ppc.c (LD_R11_0R3, CMPDI_R11_0, STD_R11_0R1, LD_R11_0R1),
	(MTLR_R11): Don't define.
	(LD_R0_0R3, CMPDI_R0_0): Define.
	(build_tls_get_addr_stub): Don't use r11 in stub.
ld/
	* testsuite/ld-powerpc/tlsexe.d: Match new __tls_get_addr stub.
	* testsuite/ld-powerpc/tlsexeno.d: Likewise.
	* testsuite/ld-powerpc/tlsexetoc.d: Likewise.
	* testsuite/ld-powerpc/tlsexetocno.d: Likewise.
	* testsuite/ld-powerpc/tlsopt5.d: Likewise.
2020-01-20 18:58:05 +10:30
Alan Modra
e1c6cf618c PR25384, PowerPC64 ELFv1 copy relocs against function symbols
Function symbols of course don't normally want .dynbss copies but
with some old versions of gcc they are needed to copy the function
descriptor.  This patch restricts the cases where they are useful to
compilers using dot-symbols, and enables the warning regardless of
whether a PLT entry is emitted in the executable.  PLTs in shared
libraries are affected by a .dynbss copy in the executable.

bfd/
	PR 25384
	* elf64-ppc.c (ELIMINATE_COPY_RELOCS): Update comment.
	(ppc64_elf_adjust_dynamic_symbol): Don't allow .dynbss copies
	of function symbols unless dot symbols are present.  Do warn
	whenever one is created, regardles of whether a PLT entry is
	also emitted for the function symbol.
ld/
	* testsuite/ld-powerpc/ambiguousv1b.d: Adjust expected output.
	* testsuite/ld-powerpc/funref.s: Align func_tab.
	* testsuite/ld-powerpc/funref2.s: Likewise.
	* testsuite/ld-powerpc/funv1.s: Add dot symbols.
2020-01-15 12:29:21 +10:30
Alan Modra
b3adc24a07 Update year range in copyright notice of binutils files 2020-01-01 18:42:54 +10:30
Alan Modra
6446511295 PowerPC local got test
This is the one that causes ld segfaults between 2019-10-04 and
2019-10-07.  Bug introduced with f749f26eea, fixed by 93370e8e7b.

	* testsuite/ld-powerpc/localgot.s,
	* testsuite/ld-powerpc/localgot.d: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run it.
2019-10-09 00:20:19 +10:30
Alan Modra
c3614cffc8 PowerPC TLS tests
This patch adds some --no-tls-optimize tests and performs some of the
existing dynamic tests with tls markers in order to catch any
regression in PLT counting.

	* testsuite/ld-powerpc/tlsexe.r: Adjust for added TLSMARK symbol.
	* testsuite/ld-powerpc/tlsexe32.r: Likewise.
	* testsuite/ld-powerpc/tlsso.r: Likewise.
	* testsuite/ld-powerpc/tlsso32.r: Likewise.
	* testsuite/ld-powerpc/tls32no.d,
	* testsuite/ld-powerpc/tls32no.g: New test files.
	* testsuite/ld-powerpc/tlsexe32no.d,
	* testsuite/ld-powerpc/tlsexe32no.g,
	* testsuite/ld-powerpc/tlsexe32no.r: New test files.
	* testsuite/ld-powerpc/tlsexeno.d,
	* testsuite/ld-powerpc/tlsexeno.g,
	* testsuite/ld-powerpc/tlsexeno.r: New test files.
	* testsuite/ld-powerpc/tlsexetocno.d,
	* testsuite/ld-powerpc/tlsexetocno.g: New test files.
	* testsuite/ld-powerpc/tlsno.d,
	* testsuite/ld-powerpc/tlsno.g: New test files.
	* testsuite/ld-powerpc/tlstocno.d,
	* testsuite/ld-powerpc/tlstocno.g: New test files.
	* testsuite/ld-powerpc/powerpc.exp: Run new tests.
2019-10-07 13:34:40 +10:30