This was mostly orphaned a while back, but left behind so people could
still run `make headers`. Merge that one target to the top sim dir and
delete all the build logic. This should avoid confusing people further.
It's not 1996 anymore, so stop writing shell code like it is, and
rewrite it with modern POSIX shell standards. This makes it much
more user friendly.
Then regenerate the file with latest newlib sources to verify.
After commit:
commit 10f92414d6
Date: Fri Jan 15 12:14:45 2021 +0100
[gdb/testsuite] Fix gdb.fortran/array-slices.exp with -m32
Some test names now contain the addresses of variables from the
inferior. When running the test in different directories I'm seeing
slightly different values for the addresses. This makes comparing
test results between directories harder than it needs to be.
This commit just gives the tests a descriptive name without including
the addresses.
gdb/testsuite/ChangeLog:
* gdb.fortran/array-slices.exp (run_test): Avoid including
addresses in test names.
Currently
$ as -o x.o x.s
fails when x.s contains DWARF5 ".file 0" or ".loc 0" directives. Update
assembler to automatically enable DWARF5 support so that
$ gcc -S -g -c x.c
$ gcc -c x.s
works.
PR gas/27195
* dwarf2dbg.c (dwarf2_gen_line_info): Set dwarf_level to 5 if
needed.
(dwarf2_directive_filename): Likewise.
(dwarf2_directive_loc): Likewise.
* testsuite/gas/elf/dwarf-5-file0.d: Pass --gdwarf-3.
* testsuite/gas/lns/lns-diag-1.l: Remove the
"Error: file number less than one" errors.
The RISC-V x0 register is hard-coded to zero. As such neither Linux
or FreeBSD supply the value of the register x0 in their core dump
files.
For FreeBSD we take care of this by manually supplying the value of x0
in riscv_fbsd_supply_gregset, however we don't do this for Linux. As
a result after loading a core file on Linux we see this behaviour:
(gdb) p $x0
$1 = <unavailable>
In this commit I make riscv_fbsd_supply_gregset a common function that
can be shared between RISC-V for FreeBSD and Linux, this resolves the
above issue.
There is a similar problem for the two registers `fflags` and `frm`.
These two floating point related CSRs are a little weird. They are
separate CSRs in the RISC-V specification, but are actually sub-fields
of the `fcsr` CSR.
As a result neither Linux or FreeBSD supply the `fflags` or `frm`
registers as separate fields in their core dumps, and so, after
restoring a core dump these register are similarly unavailable.
In this commit I supply `fflags` and `frm` by first asking for the
value of `fcsr`, extracting the two fields, and using these to supply
the values for `fflags` and `frm`.
gdb/ChangeLog:
* riscv-fbsd-tdep.c (riscv_fbsd_supply_gregset): Delete.
(riscv_fbsd_gregset): Use riscv_supply_regset.
(riscv_fbsd_fpregset): Likewise.
* riscv-linux-tdep.c (riscv_linux_gregset): Likewise.
(riscv_linux_fregset): Likewise.
* riscv-tdep.c (riscv_supply_regset): Define new function.
* riscv-tdep.h (riscv_supply_regset): Declare new function.
This changes the initialisation of output sections so that it is
possible to create read-only sections fed only from linker script
BYTE, SHORT, LONG or QUAD. That currently isn't possible even for one
of the well-known ELF sections like .rodata, because once a section is
marked read/write that sticks. On the other hand if we start
read-only, well-known ELF sections end up read/write as appropriate.
For example .tdata will still be SHF_ALLOC + SHF_WRITE + SHF_TLS.
PR 26378
* ldlang.c (map_input_to_output_sections): Start with a read-only
section for data statements.
* testsuite/ld-elf/size-2.d: Adjust to suit.
When running test-case gdb.arch/i386-mpx-sigsegv.exp with target board
unix/-m32, we run into:
...
(gdb) continue^M
Continuing.^M
Saw a #BR! status 1 at 0x8048c2d^M
^M
Program received signal SIGSEGV, Segmentation fault^M
Upper bound violation while accessing address 0x0804c15c^M
Bounds: [lower = 0x00000000, upper = 0x00000000].^M
0x08048a4f in lower (p=0x804c160, a=0x804c180, b=0x804c1a0, c=0x804c1c0, \
d=0x804c1e0, len=1) at i386-mpx-sigsegv.c:79^M
79 value = *(p - len);^M
(gdb) FAIL: gdb.arch/i386-mpx-sigsegv.exp: MPX signal segv Lower: 0
...
The problem is that lower and upper in the Bounds message are 0x0, which is
caused by $_siginfo._sifields._sigfault._addr_bnd.{_lower,_upper} evaluating
to 0x0.
Fix this by copying the si_lower/si_upper fields in
compat_siginfo_from_siginfo.
Tested on x86_64-linux, with target board unix/-m32.
gdb/ChangeLog:
2021-01-18 Tom de Vries <tdevries@suse.de>
PR tdep/27172
* nat/amd64-linux-siginfo.c (cpt_si_lower, cpt_si_upper, SEGV_BNDERR):
New macro.
(compat_siginfo_from_siginfo): Copy cpt_si_lower and cpt_si_upper
for SEGV_BNDERR.
The wait_status variable is only used when the target is in in all-stop
mode. We can therefore move it in the !target_is_non_stop scope. That
lets us remove the assert in the else, that checks that the wait status
is not set. If the variable doesn't exist in that scope, it pretty much
guarantees that it is not set.
gdb/ChangeLog:
* remote.c (remote_target::start_remote): Move wait_status to
narrower scope.
Change-Id: I30979135e3f4f36d04178baa67575c4e58d3b648
Fix a NULL dereference seen when assembling invalid input.
PR 27198
* config/tc-i386.c (need_plt32_p): Return FALSE for NULL symbol.
* testsuite/gas/i386/pr27198.d,
* gas/testsuite/gas/i386/pr27198.err,
* gas/testsuite/gas/i386/pr27198.s: New test.
* gas/testsuite/gas/i386/i386.exp: Run it.
When deciding if a single member comdat group section in file FOO should
be discarded by a linkonce section in file BAR, we check if 2 sections
define the same set of local and global symbols. When only one of the
files doesn't contain the unused section symbols in the symbol table,
such as object files generated by clang or GNU assembler with
commit d1bcae833b
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Thu Jan 7 06:42:00 2021 -0800
ELF: Don't generate unused section symbols
the check will fail since one file has the extra unused section symbols.
We should ignore both undefined and section symbols in the symbol table
when making such a decision.
bfd/
PR ld/27193
* elflink.c (elf_create_symbuf): Also ignore section symbols.
ld/
PR ld/27193
* testsuite/ld-i386/i386.exp: Run PR ld/27193 test.
* testsuite/ld-i386/pr27193.dd: New file.
* testsuite/ld-i386/pr27193a.o.bz2: Likewise.
* testsuite/ld-i386/pr27193b.s: Likewise.
On Fedora 33 x86-64 with glibc 2.32-3, ifuncmain6pie failed with:
./ifuncmain6pie: IFUNC symbol 'foo' referenced in './ifuncmod6.so' is defined in the executable and creates an unsatisfiable circular dependency.
FAIL ifuncmain6pie (exit status: 127)
Remove non-JUMP_SLOT relocations against foo in ifuncmod6.so, which
trigger the circular IFUNC dependency.
* testsuite/ifuncmain6pie.c: Remove non-JUMP_SLOT relocations
against foo in ifuncmod6.so.
* testsuite/ifuncmod6.c: Likewise.
On x86, glibc 2.33 starts to issue a fatal error message when calling
IFUNC function defined in the unrelocated executable from a shared
library.
1. Update x86 ELF linker to always convert IFUNC function defined in
position-dependent executable (PDE) to the normal function. GOT in PDE
will be updated by R_*_IRELATIVE at run-time.
2. Update PR ld/23169 tests not to compare function address of external
IFUNC function in the shared object to avoid calling the IFUNC function
defined in the unrelocated executable.
3. Remove pr23169e tests which call the IFUNC function defined in the
unrelocated position-independent executable from a shared library.
bfd/
PR ld/23169
* elfxx-x86.c (_bfd_x86_elf_link_fixup_ifunc_symbol): Don't
check pointer_equality_needed.
ld/
PR ld/23169
* testsuite/ld-ifunc/ifunc.exp: Replace pr23169c.rd with
pr23169a.rd for pr23169c and pr23169f. Remove pr23169e tests.
* testsuite/ld-ifunc/pr23169a.c (foo): Don't compare function
address.
So that no one need worry about the value of Z_OK.
bfd/
* compress.c (decompress_contents): Tidy inflateEnd result test.
binutils/
* readelf.c (uncompress_section_contents): Tidy inflateEnd result test.
This patch makes undefined unversioned dynamic symbols use
VER_NDX_GLOBAL (version 1) rather than VER_NDX_LOCAL (version 0).
There really isn't much use for an undefined local dynamic symbol, so
we may as well use the logically correct value in .gnu.version.
https://docs.oracle.com/cd/E26505_01/html/E26506/chapter6-54676.html
bfd/
PR 26002
* elflink.c (elf_link_output_extsym): Use version 1 in
.gnu.version for undefined unversioned symbols.
ld/
PR 26002
* testsuite/ld-elfvers/vers6.dsym: Expect "Base" for undefined
unversioned symbols.
* testsuite/ld-elfvers/vers16.dsym: Likewise.
Now that all port tests live under testsuite/sim/*/, and none live
in testsuite/ directly, flatten the structure by moving all of the
dirs under testsuite/sim/ to testsuite/ directly.
We need to stop passing --tool to dejagnu so that it searches all
dirs and not just ones that start with "sim". Since we have no
other dirs in this tree, and no plans to add any, should be fine.
Compare pointers to nullptr, not 0. I also fixed a trailing
whitespace in the same function.
There should be no user visible changes after this commit.
gdb/ChangeLog:
* tui/tui.c (tui_is_window_visible): Compare to nullptr, not 0.
When running test-case gdb.fortran/array-slices.exp with target board
unix/-m32, we run into:
...
(gdb) print /x &array4d^M
$69 = 0xffffb620^M
(gdb) print /x (&array4d) + sizeof (array4d)^M
$70 = 0x95c620^M
(gdb) FAIL: gdb.fortran/array-slices.exp: repack=on: test 9: check sizes match
...
The expressions calculate the start and end of an array, but the calculation
of the end expression has an unexpected result (given that it lies before the
start of the array). By printing "sizeof (array4d)" as a separate
expression:
...
(gdb) print /x sizeof (array4d)
$1 = 0xc40
...
it becomes clear we expected to get 0xffffb620 + 0xc40 == 0xffffc260 instead.
The problem is that using the '&' returns a pointer type:
...
(gdb) p &array4d
$5 = (PTR TO -> ( integer(kind=4) (-3:3,7:10,-3:3,-10:-7) )) 0xffffbe00
...
which has the consequence that the addition is done as pointer arithmetic.
Fix this by using the result of "print /x &array4d" instead of &array4d in the
addition.
Tested on x86_64-linux.
gdb/testsuite/ChangeLog:
2021-01-15 Tom de Vries <tdevries@suse.de>
PR testsuite/26997
* gdb.fortran/array-slices.exp (run_test): Avoid pointer arithmetic
when adding sizeof.
bfd/
* elfnn-riscv.c: Indent, labels and GNU coding standards tidy,
also aligned the code.
gas/
* config/tc-riscv.c: Indent and GNU coding standards tidy,
also aligned the code.
* config/tc-riscv.h: Likewise.
include/
* opcode/riscv.h: Indent and GNU coding standards tidy,
also aligned the code.
opcodes/
* riscv-opc.c (riscv_gpr_names_abi): Aligned the code.
(riscv_fpr_names_abi): Likewise.
(riscv_opcodes): Likewise.
(riscv_insn_types): Likewise.
Error and warning messages usually starting with lower case letter,
and without the period at the end. Besides, add the prefixed "internel:"
at the beginning of the messages when they are caused internally.
Also fix indents and typos.
bfd/
* elfnn-riscv.c (riscv_merge_attributes): Fix typos of messages.
gas/
* config/tc-riscv.c: Error and warning messages tidy.
* testsuite/gas/riscv/priv-reg-fail-fext.l: Updated.
* testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
ld/
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-01.d: Updated.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-02.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-03.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-04.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-05.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-06.d: Likewise.
opcodes/
* riscv-dis.c (parse_riscv_dis_option): Fix typos of message.
The GNU coding standards said the comments should be complete sentences
and end with a period and two spaces. But sometimes it should be more
cleaner when the comments only include a word or codes. Therefore, I made
the following changes after referring to other target/generic codes,
* Try to write sentences in comments, must end with a period and two spaces.
* End with two spaces without a period for codes/instructions only.
* End with one space without a period for a single word/variable only.
Besids, also rewrite/remove some comments which are obsolete or too long,
and fix indents for comments.
bfd/
* elfnn-riscv.c: Comments tidy and improvement.
* elfxx-riscv.c: Likewise.
* elfxx-riscv.h: Likewise.
gas/
* config/tc-riscv.c: Comments tidy and improvement. Also update
comment "fallthru" to "Fall through" that end with a period and
two spaces.
include/
* elf/riscv.h: Comments tidy and improvement.
* opcode/riscv-opc.h: Likewise.
* opcode/riscv.h: Likewise.
opcodes/
* riscv-dis.c: Comments tidy and improvement.
* riscv-opc.c: Likewise.
Now that we've moved all ports to dejagnu & testsuite/sim/, the only
thing the testsuite/configure script has been doing is filling in the
sim_arch field in the testsuite/Makefile. We can simply let the top
sim/configure script do that for us now. This simplifies & speeds up
the build a bit by killing an entire configure script.
This is the only target using a dir directly under testsuite/. All
others use sim/<arch>/ instead. Relocate it so all targets look the
same, and so we can leverage the common test harness.
We drop loop.s in the process because it was never referenced and
was just 2 lines of code.
All other test files are moved & have directives added to the top so
that the test harness can invoke them correctly.
No tests were ever added in here in the ~22 years since it was first
created. Seems unlikely any tests will be added at this rate, and
the sim/mips/ testdir already has some (light) coverage for this
target. So punt the tree.
The frv-elf subdir contained five tests:
* cache: A cache test of some sort.
* exit47: A program to test exit status of 47 from sim.
* grloop: Some basic limited loop test program.
* hello: Standard "hello world" output program.
* loop: An infinite loop program.
The loop.s test is never referenced anywhere, and is all of 2 lines.
Anyone who really needs a while(1); test case and re-implement it
themselves locally.
The cache.s code isn't referenced anywhere because it requires some
custom args to the run program, and when this testcase was added, we
didn't have any support for that. We do now, so we can add a header
to enable that. Turns out the code crashes even with those, so turn
around and mark it xfail. Maybe someone someday will care.
That leaves the small exit47, grloop, and hello tests. Now that the
sim test harness supports testing for custom exit status, we can move
them all to sim/frv/ to maintain test coverage.
The remaining differences between frv-elf & sim/frv are:
* frv-elf/ runs for frv-*-elf while sim/frv/ runs for frv*-*-*.
* frv-elf/ runs "*.s" files while sim/frv/ only has .cgs and such.
On closer inspection, these are also meaningless distinctions:
* There is nothing specific to the tests that require an *-elf
target. Normally that would mean newlib+libgloss type stuff,
but there's no such requirement in frv-elf/.
* The ".s" suffix is the standard "this is an assembly file" suffix.
Since FRV is a CGEN target, we can reuse the existing convention of
".ms" to mean "miscellaneous .s" as in "this is an assembly file,
and run/bucket its test results in the miscellaneous category".
So moving frv-elf/{cache,exit47,grloop,hello}.s to sim/frv/*.ms makes
sense and simplifies things quite a bit for the target while also
slightly increasing the coverage for some tuples.
The m32r-elf subdir contained three tests:
* exit47: A program to test exit status of 47 from sim.
* hello: Standard "hello world" output program.
* loop: An infinite loop program.
There's already a sim/m32r/hello.ms test that does exactly the same
thing as m32r-elf/hello.s, so we can delete that.
The loop.s test is never referenced anywhere, and is all of 2 lines.
Anyone who really needs a while(1); test case and re-implement it
themselves locally.
That leaves the single exit47 test. Now that the sim test harness
supports testing for custom exit status, we can easily move that to
sim/m32r/exit47.ms to maintain test coverage.
The remaining differences between m32r-elf & sim/m32r are:
* m32r-elf/ runs for m32r-*-elf while sim/m32r/ runs for m32r*-*-*.
* m32r-elf/ runs "*.s" files while sim/m32r/ runs "*.ms" files.
On closer inspection, these are also meaningless distinctions:
* There is nothing specific to the tests that require an *-elf
target. Normally that would mean newlib+libgloss type stuff,
but there's no such requirement in m32r-elf/.
* The ".s" suffix is the standard "this is an assembly file"
suffix. Turns out ".ms" is just how sim/m32r/ (and a few other
CGEN based targets) categorize/bucket test cases. It simply
means "miscellaneous .s" as in "this is an assembly file, and
run/bucket its test results in the miscellaneous category".
So moving m32r-elf/exit47.s to sim/m32r/exit47.ms makes sense and
simplifies things quite a bit for the target while also slightly
increasing the coverage for some tuples.
Some tests want to verify they can control the exit status, and
allowing any non-zero value would allow tests to silently fail:
if it crashed & exited 1, or forced all non-zero to 1, then we
wouldn't be able to differentiate with a test exiting with a
status like 47.
Extend the test harness to allow tests to declare their expected
exit status that would be defined as a "pass". This requires a
small tweak to the sim_run API to return the status directly, but
that shouldn't be a big deal as it's only used by sim code.
Since is_trivially_default_constructible was not implemented before gcc-5
it cannot be used with gcc-4.x.
Fix the build by using conditional compilation around that line.
Use the equivalent is_trivially_constructible<T> instead, since
we already have HAVE_IS_TRIVIALLY_CONSTRUCTIBLE for that purpose.
Fixes: 098caef485 ("Refactor struct trad_frame_saved_regs")
gdb:
2021-01-14 Bernd Edlinger <bernd.edlinger@hotmail.de>
* trad-frame.c (trad_frame_alloc_saved_regs): Avoid compile-error
because is_trivially_default_constructible was first implemented with
gcc-5.
Linker should never generate dynamic relocations for relocations in
non-SEC_ALLOC section which has no impact on run-time behavior. Such
relocations should be resolved to 0.
PR ld/26688
* elf32-bfin.c (bfinfdpic_relocate_section): Skip non SEC_ALLOC
section for R_BFIN_FUNCDESC.
Consider the following test-case small.c:
...
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
int main (void) {
int *p = (int *)malloc (sizeof(int) * 4);
memset (p, 0, sizeof(p));
printf ("p[0] = %d; p[3] = %d\n", p[0], p[3]);
return 0;
}
...
On Ubuntu 20.04, we get:
...
$ gcc -O0 -g small.c
$ gdb -batch a.out -ex start -ex step
Temporary breakpoint 1, main () at small.c:6
6 int *p = (int *) malloc(sizeof(int) * 4);
p[0] = 0; p[3] = 0
[Inferior 1 (process $dec) exited normally]
...
but after switching off the on-by-default fcf-protection, we get the desired
behaviour:
...
$ gcc -O0 -g small.c -fcf-protection=none
$ gdb -batch a.out -ex start -ex step
Temporary breakpoint 1, main () at small.c:6
6 int *p = (int *) malloc(sizeof(int) * 4);
7 memset (p, 0, sizeof(p));
...
Using "set debug infrun 1", the first observable difference between the two
debug sessions is that with -fcf-protection=none we get:
...
[infrun] process_event_stop_test: stepped into dynsym resolve code
...
In this case, "in_solib_dynsym_resolve_code (malloc@plt)" returns true because
"in_plt_section (malloc@plt)" returns true.
With -fcf-protection=full, "in_solib_dynsym_resolve_code (malloc@plt)" returns
false because "in_plt_section (malloc@plt)" returns false, because the section
name for malloc@plt is .plt.sec instead of .plt, which is not handled in
in_plt_section:
...
static inline int
in_plt_section (CORE_ADDR pc)
{
return pc_in_section (pc, ".plt");
}
...
Fix this by handling .plt.sec in in_plt_section.
Tested on x86_64-linux.
[ Another requirement to be able to reproduce this is to have a dynamic linker
with a "malloc" minimal symbol, which causes find_solib_trampoline_target to
find it, such that skip_language_trampoline returns the address for the
dynamic linkers malloc. This causes the step machinery to set a breakpoint
there, and to continue, expecting to hit it. Obviously, we execute glibc's
malloc instead, so the breakpoint is not hit and we continue to program
completion. ]
gdb/ChangeLog:
2021-01-14 Tom de Vries <tdevries@suse.de>
PR breakpoints/27151
* objfiles.h (in_plt_section): Handle .plt.sec.
When running test-case gdb.base/style.exp with target board unix/-m32, we run
into (stripped styling from output, shortened file name):
...
(gdb) frame
argv=0xffffc714) at src/gdb/testsuite/gdb.base/style.c:45
45 return some_called_function (); /* break here */
(gdb) FAIL: gdb.base/style.exp: frame when width=20
...
while with native we have instead:
...
(gdb) frame
argv=0x7fffffffd478)
at src/gdb/testsuite/gdb.base/style.c:45
45 return some_called_function (); /* break here */
(gdb) PASS: gdb.base/style.exp: frame when width=20
...
The problem is that due to argv having a different length for -m32, we get a
different layout, and the test-case doesn't accommodate for that.
Fix this by using a different regexp depending on the length of argv.
Tested on x86_64-linux.
gdb/testsuite/ChangeLog:
2021-01-14 Tom de Vries <tdevries@suse.de>
PR testsuite/24590
* gdb.base/style.exp: Handle shorter argv in frame command output.
The Blackfin ELF compiler requires the user to explicitly select a CPU
target else it will fail:
bfin-elf-gcc: error: no processor type specified for linking
Select the sim target for these tests since we should (hopefully) have
access to the simulator. At least, it's more likely than having access
to a real development board.
This makes the pass/fail numbers increase by a lot:
-# of expected passes 398
-# of unexpected failures 6
+# of expected passes 587
+# of unexpected failures 109
It looks like the vast majority of new failures are due to our omission
of COPY relocations:
/* Bfin does not currently have a COPY reloc. */
if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
{
_bfd_error_handler (_("the bfin target does not currently support the generation of copy relocations"));
return FALSE;
}
There doesn't seem to be a way to easily disable tests that cause copy
relocations though, lets just take the hit for now.
* testsuite/config/default.exp [bfin*-elf*] (gcc_B_opt): Append -msim.
The makefile has comments about old versions of bison/yacc generating
warnings, but that doesn't apply to the lexer which comes from flex.
As far as I can tell, the warnings in the Blackfin lexer can be fixed
with defines that have been supported back through flex in 2002. So
lets turn on -Werror for it and see if anyone notices. If they do,
they can report their exact tool versions so we can record that here.
The h8300 sim has its own implementation for memory handling that I'd
like to replace with the common sim memory code. However, it's got a
weird bit of code it calls "eightbit mem" that makes this not as easy
as it would otherwise be. The code has this comment:
/* These define the size of main memory for the simulator.
Note the size of main memory for the H8/300H is only 256k. Keeping it
small makes the simulator run much faster and consume less memory.
The linker knows about the limited size of the simulator's main memory
on the H8/300H (via the h8300h.sc linker script). So if you change
H8300H_MSIZE, be sure to fix the linker script too.
Also note that there's a separate "eightbit" area aside from main
memory. For simplicity, the simulator assumes any data memory reference
outside of main memory refers to the eightbit area (in theory, this
can only happen when simulating H8/300H programs). We make no attempt
to catch overlapping addresses, wrapped addresses, etc etc. */
I've read the H8/300 Programming Manual and the H8/300H Software Manual
and can't find documentation on it. The closest I can find is the bits
about the exception vectors, but that sounds like a convention where the
first 256 bytes of memory are used for a special purpose. The sim will
actually allocate a sep memory buffer of 256 bytes and you address it by
accessing anywhere outside of main memory. e.g. I would expect code to
access it like:
uint32_t *data = (void *)0;
data[0] = reset_exception_vector;
not like the sim expects like:
uint8_t *data = (void *)0x1000000;
data[0] = ...;
The gcc manual has an "eightbit_data" attribute:
Use this attribute on the H8/300, H8/300H, and H8S to indicate that
the specified variable should be placed into the eight-bit data
section. The compiler generates more efficient code for certain
operations on data in the eight-bit data area. Note the eight-bit
data area is limited to 256 bytes of data.
And the gcc code implies that it's accessed via special addressing:
eightbit_data: This variable lives in the 8-bit data area and can
be referenced with 8-bit absolute memory addresses.
I'm fairly certain these are referring to the 8-bit addressing modes
that allow access to 0xff00 - 0xffff with only an 8-bit immediate.
They aren't completely separate address spaces which this eightbit
memory buffer occupies.
But the sim doesn't access its eightbit memory based on specific insns,
it does it purely on the addresses requested.
Unfortunately, much of this code was authored by Michael Snyder, so I
can't ask him :(. I asked Renesas support and they didn't know:
https://renesasrulz.com/the_vault/f/archive-forum/6952/question-about-eightbit-memory
So I've come to the conclusion that this was a little sim-specific hack
done for <some convenience> and has no relation to real hardware. And
as such, let's drop it until someone notices and can provide a reason
for why we need to support it.
