Commit Graph

18 Commits

Author SHA1 Message Date
Alan Modra
827041555a Update year range in copyright notice of binutils files 2019-01-01 22:06:53 +10:30
Alan Modra
724436fccb [GOLD] PowerPC .gnu.attributes support
elfcpp/
	* powerpc.h (Tag_GNU_Power_ABI_FP): Define.
	(Tag_GNU_Power_ABI_Vector, Tag_GNU_Power_ABI_Struct_Return): Define.
gold/
	* powerpc.cc: Include attributes.h.
	(Powerpc_relobj::attributes_section_data_): New variable, with
	accessor and associated constructor and destructor support.
	(Powerpc_dynobj::attributes_section_data_): Likewise.
	(Powerpc_relobj::do_read_symbols): Stash SHT_GNU_ATTRIBUTES section
	contents in attributes_section_data_.
	(Powerpc_dynobj::do_read_symbols): Likewise.
	(Target_powerpc): Add attributes_section_data_, last_fp_, last_ld_,
	last_vec_, and last_struct_ vars.
	(Target_powerpc::merge_object_attributes): New function.
	(Target_powerpc::do_finalize_sections): Iterate over input objects
	merging attributes.  Create output attributes section.
2018-07-06 15:18:51 +09:30
Alan Modra
23cedd1dc9 PowerPC inline PLT call support
In addition to the existing relocs we need two more to mark all
instructions in the call sequence, PLTCALL on the call itself (plus
the toc restore insn for ppc64), and PLTSEQ on others.  All
relocations in a particular sequence have the same symbol.

Example ppc64 ELFv2 assembly:
 .reloc .,R_PPC64_PLTSEQ,puts
	std 2,24(1)
	addis 12,2,puts@plt@ha	# .reloc .,R_PPC64_PLT16_HA,puts
	ld 12,puts@plt@l(12)	# .reloc .,R_PPC64_PLT16_LO_DS,puts
 .reloc .,R_PPC64_PLTSEQ,puts
	mtctr 12
 .reloc .,R_PPC64_PLTCALL,puts
	bctrl
	ld 2,24(1)

Example ppc32 -fPIC assembly:
	addis 12,30,puts+32768@plt@ha # .reloc .,R_PPC_PLT16_HA,puts+0x8000
	lwz 12,12,puts+32768@plt@l    # .reloc .,R_PPC_PLT16_LO,puts+0x8000
 .reloc .,R_PPC_PLTSEQ,puts+32768
	mtctr 12
 .reloc .,R_PPC_PLTCALL,puts+32768
	bctrl

Marking sequences like this allows the linker to convert them to nops
and a direct call if the target symbol turns out to be local.

When the call is __tls_get_addr, each relocation shown above is paired
with an R_PPC*_TLSLD or R_PPC*_TLSGD reloc to additionally mark the
sequence for possible TLS optimization.  The TLSLD or TLSGD relocs are
emitted first.

include/
	* elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
	* elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add PLTSEQ and PLTCALL howtos.
	(is_plt_seq_reloc): New function.
	(ppc_elf_check_relocs): Handle PLTSEQ and PLTCALL relocs.
	(ppc_elf_tls_optimize): Handle inline plt call sequence.
	(ppc_elf_relax_section): Handle PLTCALL reloc.
	(ppc_elf_relocate_section): Nop out inline plt call sequence when
	resolving locally.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_PLTSEQ and
	R_PPC64_PLTCALL entries.  Comment R_PPC64_TOCSAVE.
	(has_tls_get_addr_call): Correct comment.
	(is_branch_reloc): Add PLTCALL.
	(is_plt_seq_reloc): New function.
	(ppc64_elf_check_relocs): Handle PLT16_LO_DS reloc.  Set
	has_tls_reloc for R_PPC64_TLSGD and R_PPC64_TLSLD.  Create plt
	entry for R_PPC64_PLTCALL.
	(ppc64_elf_tls_optimize): Handle inline plt call sequence.
	(ppc_type_of_stub): Handle PLTCALL reloc.
	(toc_adjusting_stub_needed): Likewise.
	(ppc64_elf_relocate_section): Set "can_plt_call" for PLTCALL
	reloc insn.  Nop out inline plt call sequence when resolving
	locally.  Handle __tls_get_addr inline plt call optimization.
elfcpp/
	* powerpc.h (R_POWERPC_PLTSEQ, R_POWERPC_PLTCALL): Define.
gold/
	* powerpc.cc (Target_powerpc::Track_tls::maybe_skip_tls_get_addr_call):
	Handle inline plt sequence relocs.
	(Stub_table::Plt_stub_key::Plt_stub_key): Likewise.
	(Target_powerpc::Scan::reloc_needs_plt_for_ifunc): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.
2018-04-09 17:25:20 +09:30
Alan Modra
219d1afa89 Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
Alan Modra
34e0882b83 [GOLD] PowerPC tls_get_addr_optimize
This implements the special __tls_get_addr_opt call stub for powerpc
gold that returns __thread variable addresses without actually making
a call to __tls_get_addr in most cases.  Shared libraries that are
loaded at program load time (ie. dlopen is not used) have a known
layout for their __thread variables, and thus DTPMOD64/DPTREL64 pairs
describing those variables can be set up by ld.so for the
__tls_get_addr_opt call stub fast exit.
Ref https://sourceware.org/ml/libc-alpha/2015-03/msg00626.html

I really, really wish I'd used a differently versioned __tls_get_addr
symbol than the base symbol to indicate glibc support for the
optimized call, rather than having glibc export __tls_get_addr_opt.  A
lot of the messing around here, flipping symbols from __tls_get_addr
to __tls_get_addr_opt, is caused by that decision.  About the only
benefit is that a user can see at a glance that their disassembled
code is calling __tls_get_addr via the fancy call stub..  Anyway, we
need references to __tls_get_addr to seem like they were to
__tls_get_addr_opt, and in cases like the tsan interceptor, a
definition of __tls_get_addr to seem like one of __tls_get_addr_opt
as well.  That's the reason for Symbol::clear_in_reg and
Symbol_table::clone, and why symbols are substituted in Scan::global
and other places dealing with dynamic linking.

elfcpp/
	* elfcpp.h (DT_PPC_OPT): Define.
	* powerpc.h (PPC_OPT_TLS): Define.
gold/
	* options.h (tls_get_addr_optimize): New option.
	* symtab.h (Symbol::clear_in_reg, clone): New functions.
	(Sized_symbol::clone): New function.
	(Symbol_table::clone): New function.
	* resolve.cc (Symbol::clone, Sized_symbol::clone): New functions.
	* powerpc.cc (Target_powerpc::has_tls_get_addr_opt_,
	tls_get_addr_, tls_get_addr_opt_): New vars.
	(Target_powerpc::tls_get_addr_opt, tls_get_addr,
	is_tls_get_addr_opt, replace_tls_get_addr,
	set_has_tls_get_addr_opt, stk_linker): New functions.
	(Target_powerpc::Track_tls::maybe_skip_tls_get_addr_call): Add
	target param.  Update callers.  Compare symbols rather than names.
	(Target_powerpc::do_define_standard_symbols): Init tls_get_addr_
	and tls_get_addr_opt_.
	(Target_powerpc::Branch_info::mark_pltcall): Translate tls_get_addr
	sym to tls_get_addr_opt.
	(Target_powerpc::Branch_info::make_stub): Likewise.
	(Stub_table::define_stub_syms): Likewise.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.
	(add_3_12_2, add_3_12_13, bctrl, beqlr, cmpdi_11_0, cmpwi_11_0,
	ld_11_1, ld_11_3, ld_12_3, lwz_11_3, lwz_12_3, mr_0_3, mr_3_0,
	mtlr_11, std_11_1): New constants.
	(Stub_table::eh_frame_added_): Delete.
	(Stub_table::tls_get_addr_opt_bctrl_, plt_fde_len_, plt_fde_): New vars.
	(Stub_table::init_plt_fde): New functions.
	(Stub_table::add_eh_frame, replace_eh_frame): Move definition out
	of line.  Init and use plt_fde_.
	(Stub_table::plt_call_size): Return size for tls_get_addr stub.
	Extract alignment code to..
	(Stub_table::plt_call_align): ..this new function.  Adjust all callers.
	(Stub_table::add_plt_call_entry): Set has_tls_get_addr_opt and
	tls_get_addr_opt_bctrl, and align after that.
	(Stub_table::do_write): Write out tls_get_addr stub.
	(Target_powerpc::do_finalize_sections): Emit DT_PPC_OPT
	PPC_OPT_TLS/PPC64_OPT_TLS bit.
	(Target_powerpc::Relocate::relocate): Don't check for or modify
	nop following bl for tls_get_addr stub.
2017-08-29 21:29:37 +09:30
Alan Modra
7ee7ff7015 [GOLD] PowerPC64 localentry:0 plt call optimization
elfcpp/
	* elfcpp.h (DT_PPC64_OPT): Define.
	* powerpc.h (PPC64_OPT_TLS, PPC64_OPT_MULTI_TOC,
	PPC64_OPT_LOCALENTRY): Define.
gold/
	* options.h (General_options): Add plt_localentry.
	* powerpc.cc (Target_powerpc::st_other): New function.
	(Target_powerpc::plt_localentry0_, plt_localentry0_init_,
	has_localentry0_): New vars.
	(Target_powerpc::plt_localentry0, set_has_localentry0,
	is_elfv2_localentry0): New functions.
	(Target_powerpc::Branch_info::mark_pltcall): Don't set tocsave or
	return true for localentry:0 calls.
	(Stub_table::Plt_stub_ent::localentry0_): New var.
	(Stub_table::add_plt_call_entry): Set localentry0_ and has_localentry0_.
	Don't set r2save_ for localentry:0 calls.
	(Output_data_glink::do_write): Save r2 in __glink_PLTresolve for elfv2.
	(Target_powerpc::scan_relocs): Default plt_localentry0_.
	(Target_powerpc::do_finalize_sections): Set DT_PPC64_OPT.
	(Target_powerpc::Relocate::relocate): Don't require nop following
	calls for localentry:0 plt calls, and don't change nop.
2017-06-23 20:39:43 +09:30
Alan Modra
2571583aed Update year range in copyright notice of all files. 2017-01-02 14:08:56 +10:30
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Alan Modra
549dba7104 [GOLD] R_PPC64_ENTRY support
elfcpp/
	* powerpc.h (R_PPC64_ENTRY): Define.
gold/
	* powerpc.cc (add_2_2_12, ld_2_12, lis_2): Define.
	(Target_powerpc::Scan::local, global): Handle R_PPC64_ENTRY.
	(Target_powerpc::Relocate::relocate): Edit code at R_PPC64_ENTRY.
2015-12-07 13:17:00 +10:30
Peter Bergner
a680de9a98 Add assembler, disassembler and linker support for power9.
include/opcode/
	* ppc.h (PPC_OPCODE_POWER9): New define.
	(PPC_OPCODE_VSX3): Likewise.

opcodes/
	* ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries.
	Add PPC_OPCODE_VSX3 to the vsx entry.
	(powerpc_init_dialect): Set default dialect to power9.
        * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd,
        insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1,
        extract_l1 insert_xtq6, extract_xtq6): New static functions.
        (insert_esync): Test for illegal L operand value.
	(DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6,
	XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA,
	XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK,
	XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3,
	PPCVSX3): New defines.
	(powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu,
	fcmpo, ftdiv, ftsqrt>: Use XBF_MASK.
	<mcrxr>: Use XBFRARB_MASK.
	<addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq.,
	bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc.,
	cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first,
	cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx,
	lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll,
	lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw,
	modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last,
	rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx,
	stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx,
	subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh,
	vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
	vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd,
	vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d,
	vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx,
	vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq,
	vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd,
	vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait,
	xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp,
	xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp,
	xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz,
	xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp,
	xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp,
	xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo,
	xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo,
	xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo,
	xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp,
	xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp,
	xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp,
	xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw,
	xxinsertw, xxperm, xxpermr, xxspltib>: New instructions.
	<doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9.
	<tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands.

include/elf/
	* ppc.h (R_PPC_REL16DX_HA): New reloction.
	* ppc64.h (R_PPC64_REL16DX_HA): Likewise.

bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
	(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
	(ppc_elf_addr16_ha_reloc): Likewise.
	(ppc_elf_check_relocs): Likewise.
	(ppc_elf_relocate_section): Likewise.
	(is_insn_dq_form): Handle lxv and stxv instructions.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA.
	(ppc64_elf_ha_reloc): Likewise.
	(ppc64_elf_check_relocs): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
	* reloc.c (BFD_RELOC_PPC_REL16DX_HA): New.

elfcpp/
	* powerpc.h (R_POWERPC_REL16DX_HA): Define.

gas/
	* doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9.
	* doc/c-ppc.texi (PowerPC-Opts):  Likewise.
	* config/tc-ppc.c (md_show_usage): Likewise.
	(md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA.
	(md_apply_fix): Likewise.
	(ppc_handle_align): Handle power9's group ending nop.

gas/testsuite/
	* gas/ppc/altivec3.s: New test.
	* gas/ppc/altivec3.d: Likewise.
	* gas/ppc/vsx3.s: Likewise.
	* gas/ppc/vsx3.d: Likewise.
	* gas/ppc/power9.s: Likewise.
	* gas/ppc/power9.d: Likewise.
	* gas/ppc/ppc.exp: Run them.
	* gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests.
	* gas/ppc/power8.d: Likewise.
	* gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ...
	<lxvd2x, stxvd2x>: ...to this.
	* gas/ppc/vsx.d: Likewise.

gold/
	* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
	(Powerpc_relocate_functions::addr16dx_ha): Likewise.
	(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.

ld/testsuite/
	* ld-powerpc/addpcis.d: New test.
	* ld-powerpc/addpcis.s: New test.
	* ld-powerpc/powerpc.exp: Run it.
2015-11-11 19:52:52 -06:00
Alan Modra
b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Alan Modra
4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Alan Modra
45965137be Support R_PPC64_ADDR64_LOCAL
This adds support for "func@localentry", an expression that returns the
ELFv2 local entry point address of function "func".  I've excluded
dynamic relocation support because that obviously would require glibc
changes.

include/elf/
	* ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
bfd/
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry.
	(ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL.
	(ppc64_elf_check_relocs): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* Add BFD_RELOC_PPC64_ADDR64_LOCAL.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-ppc.c (ppc_elf_suffix): Support @localentry.
	(md_apply_fix): Support R_PPC64_ADDR64_LOCAL.
ld/testsuite/
	* ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files.
	* ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files.
	* ld-powerpc/powerpc.exp: Run new test.
elfcpp/
	* powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
gold/
	* powerpc.cc (Target_powerpc::Scan::local, global): Support
	R_PPC64_ADDR64_LOCAL.
	(Target_powerpc::Relocate::relocate): Likewise.
2014-03-05 19:57:39 +10:30
Alan Modra
b4f7960d53 PowerPC64 ELFv2 support for gold.
elfcpp/
	* powerpc.h (EF_PPC64_ABI): New enum constant.
	(STO_PPC64_LOCAL_BIT, STO_PPC64_LOCAL_MASK): Likewise.
	(ppc64_decode_local_entry): New function.
	(ppc64_encode_local_entry): Likewise.
gold/
	* powerpc.cc (Powerpc_relobj::abiversion, set_abiversion,
	ppc64_local_entry_offset, ppc64_local_entry_offset,
	do_read_symbols): New functions.
	(Powerpc_relobj::e_flags_, st_other_): New vars.
	(Powerpc_relobj::Powerpc_relobj): Call set_abiversion.
	(Powerpc_dynobj::abiversion, set_abiversion): New functions.
	(Powerpc_relobj::e_flags_): New var.
	(Target_powerpc::first_plt_entry_offset, plt_entry_size): Inline
	and adjust for ELFv2.
	(Target_powerpc::abiversion, set_abiversion, stk_toc): New functions.
	(Powerpc_relobj::do_find_special_sections): Check no .opd in ELFv2.
	(Powerpc_dynobj::do_find_special_sections): Likewise.
	(Target_powerpc::do_define_standard_symbols): Define ".TOC.".
	(Target_powerpc::Branch_info::make_stub): Adjust stub destination
	to ELFv2 local entry.
	(Target_powerpc::do_relax): No thread safe barriers needed for
	ELFv2.
	(Output_data_plt_powerpc::initial_plt_entry_size_,
	plt_entry_size): Delete.  Replace all uses with
	first_plt_entry_offset() and plt_entry_size().
	(Output_data_plt_powerpc::Output_data_plt_powerpc): Remove
	reserved_size parm.  Update callers.
	(Output_data_plt_powerpc::entry_count): Update.
	(Output_data_plt_powerpc::first_plt_entry_offset): Make private
	and use Target_powerpc::first_plt_entry_offset().
	(Output_data_plt_powerpc::get_plt_entry_size): Similarly and
	rename to plt_entry_size.
	(Output_data_plt_powerpc::add_ifunc_entry,
	add_local_ifunc_entry): Adjust reloc for ELFv2.
	(glink_eh_frame_fde_64): Rename to glink_eh_frame_fde_64v1.
	(glink_eh_frame_fde_64v2): New.
	(Stub_table::plt_call_size): Support ELFv2 sizing.
	(Output_data_glink::add_eh_frame): Use the new FDE.
	(Output_data_glink::set_final_data_size): Adjust for ELFv2 glink.
	(Stub_table::do_write): Write ELFv2 stubs and glink.
	(Target_powerpc::Relocate::relocate): Replaces nop after call
	with ld 2,24(1) and adjust local offset destination for ELFv2.
2013-10-30 13:45:05 +10:30
Alan Modra
f9c6b9078c Report overflow on PowerPC64 @h and @ha relocations.
This changes the behaviour of @h and @ha on PowerPC64 to report errors
on 32-bit overflow.  The motivation for this change is that on
PowerPC64, most uses of @h and @ha modifiers and their corresponding
relocations are to build up 32-bit offsets.  We'd like to know when
such offsets overflow.  Only rarely do people use @h or @ha with the
high 32-bit modifiers to build a 64-bit constant.  Those uses will now
need to use two new modifiers, @high and @higha, if the constant isn't
known at assembly time.  For now, we won't report overflow at assembly
time..

This also fixes an error when applying some of the HIGHER and HIGHEST
relocations.

include/elf/
	* ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
	R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
	R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New.
	(IS_PPC64_TLS_RELOC): Match new tls relocs.
bfd/
	* reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA,
	BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA,
	BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs.
	Make all _HA and _HI relocs report signed overflow.
	(ppc64_elf_reloc_type_lookup): Handle new relocs.
	(must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise.
	(dec_dynrel_count, ppc64_elf_relocate_section): Likewise.
	(ppc64_elf_relocate_section): Don't apply 0x8000 adjust to
	R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST,
	R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c (SEX16): Don't mask.
	(REPORT_OVERFLOW_HI): Define as zero.
	(ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
	@tprel@high, and @tprel@higha modifiers.
	(md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
	Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
	Handle new relocs.
	(md_apply_fix): Similarly.
elfcpp/
	* powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
	R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
	R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define.
gold/
	* powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs.
	(Target_powerpc::Scan::global, local): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.  Check for overflow
	on all ppc64 @h and @ha relocs.
2013-10-30 13:33:15 +10:30
Alan Modra
6ce7895693 elfcpp/
* powerpc.h: Add more relocs.
	(R_PPC_REL16*): Rename to R_POWERPC_REL16*.
gold/
	* powerpc.cc: Update for renamed R_PPC_REL16 relocs.
	(Output_data_got_powerpc::do_write): Don't rely on base class lookup
	for replace_constant call.
	(Output_data_plt_powerpc::do_print_to_mapfile): New function.
	(Output_data_glink::do_print_to_mapfile): New function.
	(Target_powerpc::Scan::local): Ignore R_PPC64_TOCSAVE.
	(Target_powerpc::Relocate::relocate): Likewise.
2012-08-14 02:22:32 +00:00
Ian Lance Taylor
6e5710cea9 elfcpp:/
* i386.h (R_386_IRELATIVE): Define.
	* powerpc.h (R_POWERPC_IRELATIVE): Define.
	(R_PPC_RELAX32, R_PPC_RELAX32PC): Don't define.
	(R_PPC_RELAX32_PLT, R_PPC_RELAX32PC_PLT): Don't define.
	* sparc.h (R_SPARC_IRELATIVE): Define.
	* x86_64.h (R_X86_64_IRELATIVE): Define.
	(R_X86_64_GNU_VTINHERIT): Rename from R_386_GNU_VTINHERIT.
	(R_X86_64_GNU_VTENTRY): Rename from R_386_GNU_VTENTRY.
gold:/
	* x86_64.cc (Target_x86_64::Scan::local): Use
	R_X86_64_GNU_VTINHERIT instead of R_386_GNU_VTINHERIT and
	R_X86_64_GNU_VTENTRY instead of R_386_GNU_VTENTRY.
	(Target_x86_64::Scan::global): Likewise.
	(Target_x86_64::Relocate::relocate): Likewise.
	(Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc):
	Likewise.
2010-08-04 09:53:38 +00:00
David Edelsohn
8da8e50a53 2008-06-12 David S. Miller <davem@davemloft.net>
* powerpc.h: New file.
        * elfcpp.h (SHT_ORDERED): New enum constant.
        (DT_PPC_GOT, DT_PPC64_GLINK, DT_PPC64_OPD, DT_PPC64_OPDSZ): Same.
2008-06-12 16:58:40 +00:00