When an instruction has operands, the PowerPC disassembler prints
spaces after the opcode so as to line up operands. If the operands
are all optional and all default value, then no operands are printed,
leaving trailing spaces. This patch fixes that.
opcodes/
* ppc-dis.c (print_insn_powerpc): Delay printing spaces after
opcode until first operand is output.
gas/
* testsuite/gas/ppc/476.d: Remove trailing spaces.
* testsuite/gas/ppc/a2.d: Likewise.
* testsuite/gas/ppc/booke.d: Likewise.
* testsuite/gas/ppc/booke_xcoff.d: Likewise.
* testsuite/gas/ppc/e500.d: Likewise.
* testsuite/gas/ppc/e500mc.d: Likewise.
* testsuite/gas/ppc/e6500.d: Likewise.
* testsuite/gas/ppc/htm.d: Likewise.
* testsuite/gas/ppc/power6.d: Likewise.
* testsuite/gas/ppc/power8.d: Likewise.
* testsuite/gas/ppc/power9.d: Likewise.
* testsuite/gas/ppc/vle.d: Likewise.
ld/
* testsuite/ld-powerpc/tlsexe32.d: Remove trailing spaces.
* testsuite/ld-powerpc/tlsopt5.d: Likewise.
* testsuite/ld-powerpc/tlsopt5_32.d: Likewise.
Let's hope no one has section names starting with '/' in scripts. If
they do, this change to fix parsing of '/' in expressiongs will break
their project.
PR 24411
ldlex.l (SYMBOLNAMECHAR1): Don't match '/'.
(<EXPRESSION>"/DISCARD/"): New.
Underscore was specified twice in all these patterns, and backslash
twice in some. Flex warned about the $SYSROOT rule, which is covered
by earlier rules: "ldlex.l:386: warning, rule cannot be matched".
* ldlex.l: Formatting.
(CMDFILENAMECHAR, CMDFILENAMECHAR1): Delete.
(FILENAMECHAR1, SYMBOLNAMECHAR1, FILENAMECHAR, WILDCHAR),
(NOCFILENAMECHAR): Remove duplicate chars. Reorder.
(SYMBOLCHARN): Likewise. Rename to SYMBOLNAMECHAR.
(<INPUTLIST>"$SYSROOT"..): Delete rule.
shrink_dynamic_reloc_sections must remove PLT entry that was created for
an undefined weak symbol in the presence of --export-dynamic option when
relaxation coalesces literals pointing to that symbol. This fixes the
following assertion:
ld: BFD (GNU Binutils) 2.31.1 internal error, aborting at
elf32-xtensa.c:3292 in elf_xtensa_finish_dynamic_sections
2019-03-29 Max Filippov <jcmvbkbc@gmail.com>
bfd/
* elf32-xtensa.c (shrink_dynamic_reloc_sections): Add
info->export_dynamic to the conditional.
ld/
* testsuite/ld-xtensa/relax-undef-weak-pie-export-dynamic.d: New
test definition.
* testsuite/ld-xtensa/xtensa.exp
(relax-undef-weak-pie-export-dynamic): Add new test.
ld/ChangeLog:
2019-02-26 Martin Liska <mliska@suse.cz>
* plugin.c (get_symbols): Add lto_kind_str, lto_resolution_str,
lto_visibility_str and use then to inform about plugin-symbols.
* testsuite/ld-plugin/plugin-12.d: Adjust expected pattern.
Similar to the AArch64 patches the Arm disassembler has the same issues with
out of order sections but also a few short comings.
For one thing there are multiple code blocks to determine mapping symbols, and
they all work slightly different, and neither fully correct. The first thing
this patch does is centralise the mapping symbols search into one function
mapping_symbol_for_insn. This function is then updated to perform a search in
a similar way as AArch64.
Their used to be a value has_mapping_symbols which was used to determine the
default disassembly for objects that have no mapping symbols. The problem with
the approach was that it was determining this value in the same loop that needed
it, which is why this field could take on the states -1, 0, 1 where -1 means
"don't know". However this means that until you actually find a mapping symbol
or reach the end of the disassembly glob, you don't know if you did the right
action or not, and if you didn't you can't correct it anymore.
This is why the two jump-reloc-veneers-* testcases end up disassembling some
insn as data when they shouldn't.
Out of order here refers to an object file where sections are not listed in a
monotonic increasing VMA order.
The ELF ABI for Arm [1] specifies the following for mapping symbols:
1) A text section must always have a corresponding mapping symbol at it's
start.
2) Data sections do not require any mapping symbols.
3) The range of a mapping symbol extends from the address it starts on up to
the next mapping symbol (exclusive) or section end (inclusive).
However there is no defined order between a symbol and it's corresponding
mapping symbol in the symbol table. This means that while in general we look
up for a corresponding mapping symbol, we have to make at least one check of
the symbol below the address being disassembled.
When disassembling different PCs within the same section, the search for mapping
symbol can be cached somewhat. We know that the mapping symbol corresponding to
the current PC is either the previous one used, or one at the same address as
the current PC.
However this optimization and mapping symbol search must stop as soon as we
reach the end or start of the section. Furthermore if we're only disassembling
a part of a section, the search is a allowed to search further than the current
chunk, but is not allowed to search past it (The mapping symbol if there, must
be at the same address, so in practice we usually stop at PC+4).
lastly, since only data sections don't require a mapping symbol the default
mapping type should be DATA and not INSN as previously defined, however if the
binary has had all its symbols stripped than this isn't very useful. To fix
this we determine the default based on the section flags. This will allow the
disassembler to be more useful on stripped binaries. If there is no section
than we assume you to be disassembling INSN.
[1] https://developer.arm.com/docs/ihi0044/latest/elf-for-the-arm-architecture-abi-2018q4-documentation#aaelf32-table4-7
binutils/ChangeLog:
* testsuite/binutils-all/arm/in-order-all.d: New test.
* testsuite/binutils-all/arm/in-order.d: New test.
* testsuite/binutils-all/arm/objdump.exp: Support .d tests.
* testsuite/binutils-all/arm/out-of-order-all.d: New test.
* testsuite/binutils-all/arm/out-of-order.T: New test.
* testsuite/binutils-all/arm/out-of-order.d: New test.
* testsuite/binutils-all/arm/out-of-order.s: New test.
ld/ChangeLog:
* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Update disassembly.
* testsuite/ld-arm/jump-reloc-veneers-long.d: Update disassembly.
opcodes/ChangeLog:
* arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
(mapping_symbol_for_insn): Implement new algorithm.
(print_insn): Remove duplicate code.
The AArch64 linker option to turn on BTI (--force-bti) warns in case there are
input objects which have a missing GNU NOTE section for BTI. This patch is trying
to improve the warnings that come out.
In order to do so, I propose adding a new argument to elf_merge_gnu_properties
and the backend function merge_gnu_properties. This new argument makes sure
that we now pass both the objects along with the properties to which they
belong to. The x86 backend function has also been updated to match this
change.
*** bfd/ChangeLog ***
2019-03-21 Sudakshina Das <sudi.das@arm.com>
* elf-bfd.h (struct elf_backend_data): Add argument to
merge_gnu_properties.
* elf-properties.c (elf_merge_gnu_properties): Add argument to
itself and while calling bed->merge_gnu_properties.
(elf_merge_gnu_property_list): Update the calls for
elf_merge_gnu_properties.
* elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update handling
of --force-bti warning and add argument.
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Add
warning.
* elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Add argument.
* elfxx-x86.h (_bfd_x86_elf_merge_gnu_properties): Likewise in
declaration.
*** ld/ChangeLog ***
2019-03-21 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* testsuite/ld-aarch64/bti-plt-1.s: Add .ifdef for PAC note section.
* testsuite/ld-aarch64/bti-plt-6.d: Update warning.
* testsuite/ld-aarch64/bti-plt-7.d: Likewise.
* testsuite/ld-aarch64/bti-warn.d: New test.
The special case for .init and .fini in update_wild_statements is
ineffective for .init or .fini wildcards inside other output sections.
The special case needs to be on the wildcard, not the output section.
This patch is belt and braces, both fixing update_wild_statements and
the scripts.
* scripttempl/alpha.sc, * scripttempl/armbpabi.sc,
* scripttempl/crisaout.sc, * scripttempl/elf32cr16.sc,
* scripttempl/elf32crx.sc, * scripttempl/elf32xc16x.sc,
* scripttempl/elf32xc16xl.sc, * scripttempl/elf32xc16xs.sc,
* scripttempl/elf64hppa.sc, * scripttempl/elf_chaos.sc,
* scripttempl/elfarc.sc, * scripttempl/elfarcv2.sc,
* scripttempl/elfd30v.sc, * scripttempl/elfm68hc11.sc,
* scripttempl/elfm68hc12.sc, * scripttempl/elfm9s12z.sc,
* scripttempl/elfmicroblaze.sc, * scripttempl/elfxgate.sc,
* scripttempl/elfxtensa.sc, * scripttempl/epiphany_4x4.sc,
* scripttempl/ft32.sc, * scripttempl/i386beos.sc,
* scripttempl/iq2000.sc, * scripttempl/mcorepe.sc,
* scripttempl/mep.sc, * scripttempl/mips.sc, * scripttempl/moxie.sc,
* scripttempl/pe.sc, * scripttempl/pep.sc, * scripttempl/ppcpe.sc,
* scripttempl/tic4xcoff.sc, * scripttempl/tic80coff.sc,
* scripttempl/v850.sc, * scripttempl/v850_rh850.sc,
* scripttempl/visium.sc, * scripttempl/xstormy16.sc: Add KEEP and
SORT_NONE to .init and .fini wildcards.
* scripttempl/elf32xc16x.sc,
* scripttempl/elf32xc16xl.sc,
* scripttempl/elf32xc16xs.sc: Add .fini wildcard.
* scripttempl/elf_chaos.sc: Add .init output section.
* scripttempl/elfd30v.sc: Remove duplicate .init.
* scripttempl/elfm68hc11.sc, * scripttempl/elfm68hc12.sc,
* scripttempl/elfm9s12z.sc, * scripttempl/elfxgate.sc: Remove
duplicate .init, and add .fini wildcard.
* scripttempl/ppcpe.sc (INIT, FINI): Delete.
* ldlang.c (update_wild_statements): Special case .init and
.fini in the wildcard, not the output section.
A number of the fails are due to ld supporting the creation of shared
libraries but not allowing linking against them without using an
option like -Bdynamic.
FAIL: Symbol export class test (final shared object)
FAIL: PROVIDE_HIDDEN test 4
FAIL: PROVIDE_HIDDEN test 6
FAIL: PROVIDE_HIDDEN test 10
FAIL: PROVIDE_HIDDEN test 12
FAIL: Build pr22471b.so
FAIL: Build pr22649-2b.so
FAIL: Build pr22649-2d.so
FAIL: PR ld/20828 dynamic symbols with section GC (plain)
FAIL: PR ld/20828 dynamic symbols with section GC (version script)
FAIL: PR ld/20828 dynamic symbols with section GC (versioned)
FAIL: PR ld/21233 dynamic symbols with section GC (--undefined)
FAIL: PR ld/21233 dynamic symbols with section GC (--require-defined)
FAIL: PR ld/21233 dynamic symbols with section GC (EXTERN)
FAIL: Build pr22150
FAIL: PR ld/14170
FAIL: Link using broken linker script
FAIL: pr17068 link --as-needed lib in group
FAIL: ld-gc/pr20022
* emulparams/elf32lm32fd.sh (DYNAMIC_LINK): Undef.
Generic linker ELF targets using CREATE_OBJECT_SYMBOLS in their
scripts run into a problem. The file symbols are created by
_bfd_generic_link_output_symbols in each object file, in the section
corresponding to the CREATE_OBJECT_SYMBOLS section, typically .text.
If it so happens that the output .text section is stripped due to
being empty, then elf.c:assign_section_numbers won't assign an ELF
section number and swap_out_syms will report "unable to find
equivalent output section" for the object symbols. Fix this by
always keeping an output section with CREATE_OBJECT_SYMBOLS.
* ldlang.c (lang_size_sections_1): Set SEC_KEEP on
create_object_symbols_section.
* testsuite/ld-elf/pr22319.d: Don't xfail dlx.
* testsuite/ld-elf/merge.d: Remove csky from xfails, add moxie.
* testsuite/ld-elf/pr21884.d: Remove csky from xfails.
* testsuite/ld-elf/shared.exp: Add csky to list not xfailing pr22374.
* testsuite/ld-unique/pr21529.d: Remove csky from xfails
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
1) This patch adds new definitions of PAC enabled PLTs
and both BTI and PAC enabled PLTs.
2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT
for the PAC enabled PLTs.
3) This patch adds a new ld command line option: --pac-plt.
In the presence of this option, the linker uses the PAC
enabled PLTs and marks with DT_AARCH64_PAC_PLT.
4) In case both BTI and PAC are enabled the linker should
pick PLTs enabled with both and also use dynamic tags for both.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New.
(PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New.
(setup_plt_values): Account for PAC or PAC and BTI enabled PLTs.
(elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC
and PLT_PAC_PLT.
(elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC.
(get_plt_type): Add case for DT_AARCH64_PAC_PLT.
(elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* readelf.c (get_aarch64_dynamic_type): Add case for
DT_AARCH64_PAC_PLT.
(dynamic_section_aarch64_val): Likewise.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* NEWS: Document --pac-plt.
* emultempl/aarch64elf.em (OPTION_PAC_PLT): New.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT.
* testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests.
* testsuite/ld-aarch64/bti-pac-plt-1.d: New test.
* testsuite/ld-aarch64/bti-pac-plt-2.d: New test.
* testsuite/ld-aarch64/pac-plt-1.d: New test.
* testsuite/ld-aarch64/pac-plt-2.d: New test.
* testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
1) This patch adds a new ld command line option: --force-bti.
In the presence of this option, the linker enables BTI with the
GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning
in case of missing gnu notes for BTI in inputs.
2) It also defines a new set of BTI enabled PLTs. These are used either
when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI
or when the new --force-bti option is used. This required adding new
fields in elf_aarch64_link_hash_table so that we could make the PLT
related information more generic.
3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses
this whenever it picks BTI enabled PLTs.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New.
(aarch64_bti_pac_info): New.
(bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument.
(bfd_elf32_aarch64_set_options): Likewise.
* bfd-in2.h: Regenerate
* elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New.
(PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New.
(elfNN_aarch64_small_plt0_bti_entry): New.
(elfNN_aarch64_small_plt_bti_entry): New.
(elfNN_aarch64_tlsdesc_small_plt_bti_entry): New.
(elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields.
(elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and
tlsdesc_plt_entry_size fields.
(elfNN_aarch64_link_hash_table_create): Initialise the new fields.
(setup_plt_values): New helper function.
(bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and
bti enable type.
(elfNN_aarch64_allocate_dynrelocs): Use new size members instead of
fixed macros.
(elfNN_aarch64_size_dynamic_sections): Likewise and add checks.
(elfNN_aarch64_create_small_pltn_entry): Use new generic pointers
to plt stubs instead of fixed ones and update filling them according
to the need for bti.
(elfNN_aarch64_init_small_plt0_entry): Likewise.
(elfNN_aarch64_finish_dynamic_sections): Likewise.
(get_plt_type, elfNN_aarch64_get_synthetic_symtab): New.
(elfNN_aarch64_plt_sym_val): Update size accordingly.
(elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE
is set.
(bfd_elfNN_get_synthetic_symtab): Define.
(elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti
and mising BTI NOTE SECTION.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* readelf.c (get_aarch64_dynamic_type): New.
(get_dynamic_type): Use above for EM_AARCH64.
(dynamic_section_aarch64_val): New.
(process_dynamic_section): Use above for EM_AARCH64.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* NEWS: Document --force-bti.
* emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New.
(PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI.
* testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below.
* testsuite/ld-aarch64/bti-plt-1.d: New test.
* testsuite/ld-aarch64/bti-plt-1.s: New test.
* testsuite/ld-aarch64/bti-plt-2.s: New test.
* testsuite/ld-aarch64/bti-plt-2.d: New test.
* testsuite/ld-aarch64/bti-plt-3.d: New test.
* testsuite/ld-aarch64/bti-plt-4.d: New test.
* testsuite/ld-aarch64/bti-plt-5.d: New test.
* testsuite/ld-aarch64/bti-plt-6.d: New test.
* testsuite/ld-aarch64/bti-plt-7.d: New test.
* testsuite/ld-aarch64/bti-plt-so.s: New test.
* testsuite/ld-aarch64/bti-plt.ld: New test.
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
This patch implements the following:
1) This extends in the gnu property support in the linker for
AArch64 by defining backend hooks for elf_backend_setup_gnu_properties,
elf_backend_merge_gnu_properties and elf_backend_parse_gnu_properties.
2) It defines AArch64 specific GNU property
GNU_PROPERTY_AARCH64_FEATURE_1_AND and 2 bit for BTI and PAC in it.
3) It also adds support in readelf.c to read and print these new
GNU properties in AArch64.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elf-properties.c (_bfd_elf_link_setup_gnu_properties): Exclude
linker created inputs from merge.
* elfnn-aarch64.c (struct elf_aarch64_obj_tdata): Add field for
GNU_PROPERTY_AARCH64_FEATURE_1_AND properties.
(elfNN_aarch64_link_setup_gnu_properties): New.
(elfNN_aarch64_merge_gnu_properties): New.
(elf_backend_setup_gnu_properties): Define for AArch64.
(elf_backend_merge_gnu_properties): Likewise.
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Define.
(_bfd_aarch64_elf_parse_gnu_properties): Define.
(_bfd_aarch64_elf_merge_gnu_properties): Define.
* elfxx-aarch64.h (_bfd_aarch64_elf_link_setup_gnu_properties): Declare.
(_bfd_aarch64_elf_parse_gnu_properties): Declare.
(_bfd_aarch64_elf_merge_gnu_properties): Declare.
(elf_backend_parse_gnu_properties): Define for AArch64.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* readelf.c (decode_aarch64_feature_1_and): New.
(print_gnu_property_note): Add case for AArch64 gnu notes.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
(GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
(GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* NEWS: Document GNU_PROPERTY_AARCH64_FEATURE_1_BTI and
GNU_PROPERTY_AARCH64_FEATURE_1_PAC.
* testsuite/ld-aarch64/aarch64-elf.exp: Add run commands for new tests.
* testsuite/ld-aarch64/property-bti-pac1.d: New test.
* testsuite/ld-aarch64/property-bti-pac1.s: New test.
* testsuite/ld-aarch64/property-bti-pac2.d: New test.
* testsuite/ld-aarch64/property-bti-pac2.s: New test.
* testsuite/ld-aarch64/property-bti-pac3.d: New test.
There should be no AND properties if some input doesn't have them. We
should set IBT and SHSTK properties for -z ibt and -z shstk if needed.
bfd/
PR ld/24322
* elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Properly
merge GNU_PROPERTY_X86_FEATURE_1_[IBT|SHSTK].
ld/
PR ld/24322
* testsuite/ld-i386/i386.exp: Run PR ld/24322 tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/pr24322a.d: New file.
* testsuite/ld-i386/pr24322b.d: Likewise.
* testsuite/ld-x86-64/pr24322a-x32.d: Likewise.
* testsuite/ld-x86-64/pr24322a.d: Likewise.
* testsuite/ld-x86-64/pr24322b-x32.d: Likewise.
* testsuite/ld-x86-64/pr24322b.d: Likewise.
* testsuite/ld-x86-64/pr24322a.s: Likewise.
* testsuite/ld-x86-64/pr24322b.s: Likewise.
* testsuite/ld-x86-64/pr24322c.s: Likewise.
Skip symbol defined by linker when checking copy reloc on protected
symbol.
bfd/
PR ld/24276
* elf64-x86-64.c (elf_x86_64_check_relocs): Skip symbol defined
by linker when checking copy reloc on protected symbol.
ld/
PR ld/24276
* testsuite/ld-i386/i386.exp: Run PR ld/24276 test.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/pr24276.dso: New file.
* testsuite/ld-i386/pr24276.warn: Likewise.
* testsuite/ld-x86-64/pr24276.dso: Likewise.
* testsuite/ld-x86-64/pr24276.warn: Likewise.
The syntax we ended up with for -m32 -fPIC calls to __tls_get_addr is
rather weird.
bl __tls_get_addr+0x8000(gd0@tlsgd)@plt
This came about by accident, probably due to requiring the arg reloc
before the call reloc.
Of course the @plt really belongs with __tls_get_addr since it affects
the call rather than the call arg, and it isn't a great deal of
trouble to ensure the relocs are emitted in the correct order. This
patch supports a newer syntax, like so:
bl __tls_get_addr+0x8000@plt(gd0@tlsgd)
gas/
* config/tc-ppc.c (parse_tls_arg): New function, extracted..
(md_assembler): ..from here. Call it after parsing other
suffix modifiers too.
ld/
* testsuite/ld-powerpc/tls32.s: Test new @plt syntax.
Big section alignment requirements between source and destination of a
long call can result in making call range bigger than what's reachable
by the call opcode. Add biggest section alignment of sections between
the call site and call destination to the call distance when making
long call relaxation decision.
2019-02-20 Eric Tsai <erictsai@cadence.com>
bfd/
* elf32-xtensa.c (is_resolvable_asm_expansion): Scan output
sections between the call site and call destination and adjust
call distance by the largest alignment.
ld/
* testsuite/ld-xtensa/call_overflow.d: New test definition.
* testsuite/ld-xtensa/call_overflow1.s: New test source.
* testsuite/ld-xtensa/call_overflow2.s: New test source.
* testsuite/ld-xtensa/call_overflow3.s: New test source.
* testsuite/ld-xtensa/xtensa.exp: Add call_overflow test.
... as a follow-up to commit d981640286 "Run more
ld tests when not native", which replaced by a proper solution the following
mess before present in 'ld/configure.host':
-*-*-gnu*)
- # When creating static executables, we ought to use crt0.o instead of crt1.o,
- # <http://www.gnu.org/software/hurd/open_issues/binutils.html#static>,
- # but the testing infrastructure is not prepared for that. This is not
- # relevant for most tests, and the few remaining ones have been XFAILed.
- HOSTING_CRT0='[...]'
- HOSTING_LIBS='[...]'
ld/
* testsuite/ld-elf/elf.exp: Remove Hurd XFAILs.
Recent gcc commit b4371b277f1e ("[ARC] Enable init_array support")
inhibits DT_"INIT,FINI} in favor of DT_{INIT,FINI}ARRAY.
Even prior to that, it seems ARC port is the only one with this
special DT_INIT/FINI handling in linker emulation. Removing it
doesn't seem to change any uClibc/glibc testsuite results,
so this can RIP anyways.
bfd/
2019-02-01 Vineet Gupta <vgupta@synopsys.com>
* elf32-arc.c: Delete init_str, fini_str
ld/
2019-02-01 Vineet Gupta <vgupta@synopsys.com>
* emultempl/arclinux.em : Delete special INIT/FINI handling.
These targets were all failing due to extra symbols.
pdp11-dec-aout +FAIL: ld-scripts/pr24008
powerpc-aix5.1 +FAIL: ld-scripts/pr24008
powerpc-aix5.2 +FAIL: ld-scripts/pr24008
rs6000-aix4.3.3 +FAIL: ld-scripts/pr24008
rs6000-aix5.1 +FAIL: ld-scripts/pr24008
rs6000-aix5.2 +FAIL: ld-scripts/pr24008
Some fails remain, those I saw were segfaults or assertion fails that
indicate target bugs.
PR ld/24008
* testsuite/ld-scripts/pr24008.d: Pass with extra target
defined symbols.
commit bd7ab16b45
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Tue Feb 13 07:34:22 2018 -0800
x86-64: Generate branch with PLT32 relocation
removed check R_X86_64_PC32 relocation against protected symbols in
shared objects. Since elf_x86_64_check_relocs is called after we
have seen all input files, we can check for PC-relative relocations in
elf_x86_64_check_relocs. We should not allow PC-relative relocations
against protected symbols since address of protected function and
location of protected data may not be in the shared object.
bfd/
PR ld/24151
* elf64-x86-64.c (elf_x86_64_need_pic): Check
SYMBOL_DEFINED_NON_SHARED_P instead of def_regular.
(elf_x86_64_relocate_section): Move PIC check for PC-relative
relocations to ...
(elf_x86_64_check_relocs): Here.
(elf_x86_64_finish_dynamic_symbol): Use SYMBOL_DEFINED_NON_SHARED_P
to check if a symbol is defined in a non-shared object.
* elfxx-x86.h (SYMBOL_DEFINED_NON_SHARED_P): New.
ld/
PR ld/24151
* testsuite/ld-x86-64/pr24151a-x32.d: New file.
* testsuite/ld-x86-64/pr24151a.d: Likewise.
* testsuite/ld-x86-64/pr24151a.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr24151a and pr24151a-x32.
PR 24008
* ldexp.h (lang_phase_type): Add lang_fixed_phase_enum.
* ldexp.c (fold_name): Move expld.assign_name check later to
avoid an extra lookup.
(exp_fold_tree_1): When lang_fixed_phase_enum, don't change symbol
values, and don't clear expld.assign_name.
* ldlang.c (lang_map): Set expld.phase to lang_fixed_phase_enum.
(print_assignment): Resolve entire assignment expression.
Don't access symbol u.def unless symbol is defined.
place_orphan handled ELF SHT_REL/SHT_RELA specially, output_rel_find
didn't. This mismatch was a bug and also meant it was possible to
craft an object where ld accessed section->name out of bounds.
PR 24042
* emultempl/elf32.em (output_rel_find): Drop "sec" param. Add
"rela".
(gld${EMULATION_NAME}_place_orphan): Use sh_type to calculate
"rela" param of output_rel_find when ELF. Tidy uses of elfinput.
For PLT expressions, we should subtract the PLT relocation size only for
jump instructions. Since PLT relocations are PC relative, we only allow
"symbol@PLT" in PLT expression.
gas/
PR gas/23997
* config/tc-i386.c (x86_cons): Check for invalid PLT expression.
(md_apply_fix): Subtract the PLT relocation size only for jump
instructions.
* testsuite/gas/i386/reloc32.s: Add test for invalid PLT
expression.
* testsuite/gas/i386/reloc64.s: Likewise.
* testsuite/gas/i386/ilp32/reloc64.s: Likewise.
* testsuite/gas/i386/reloc32.l: Updated.
* testsuite/gas/i386/reloc64.l: Likewise.
* testsuite/gas/i386/ilp32/reloc64.l: Likewise.
ld/
PR gas/23997
* testsuite/ld-i386/i386.exp: Run PR gas/23997 test.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-x86-64/pr23997a.s: New file.
* testsuite/ld-x86-64/pr23997b.c: Likewise.
* testsuite/ld-x86-64/pr23997c.c: Likewise.
