We use the program argv to both find the program to run (argv[0]) and
to hold the arguments to the program. Most of the time this is fine,
but if we want to let programs specify argv[0] independently (which is
possible in standard *NIX programs), this double duty doesn't work.
So let's split the path to the program to run out into a separate
field by itself. This simplifies the various sim_open funcs too.
By itself, this code is more of a logical cleanup than something that
is super useful. But it will open up customization of argv[0] in a
follow up commit. Split the changes to make it easier to review.
The sim-basics.h is too big and includes too many things. This leads
to some arch's sim-main.h having circular loop issues with defs, and
makes it hard to separate out common objects from arch-specific defs.
By splitting up sim-basics.h and killing off sim-main.h, it'll make
it easier to separate out the two.
The m4 macro has 2 args: the "wire" settings (which represents the
hardwired port behavior), and the default settings (which are used
if nothing else is specified). If none are specified, the arch is
expected to support both, and the value will be probed based on the
user runtime options or the input program.
Only two arches today set the default value (bpf & mips). We can
probably let this go as it only shows up in one scenario: the sim
is invoked, but with no inputs, and no user endian selection. This
means bpf will not behave like the other arches: an error is shown
and forces the user to make a choice. If an input program is used
though, we'll still switch the default to that. This allows us to
remove the WITH_DEFAULT_TARGET_BYTE_ORDER setting.
For the ports that set a "wire" endian, move it to the runtime init
of the respective sim_open calls. This allows us to change the
WITH_TARGET_BYTE_ORDER to purely a user-selected configure setting
if they want to force a specific endianness.
With all the endian logic moved to runtime selection, we can move
the configure call up to the common dir so we only process it once
across all ports.
The ppc arch was picking the wire endian based on the target used,
but since we weren't doing that for other biendian arches, we can
let this go too. We'll rely on the input selecting the endian, or
make the user decide.
This is a bit of a hack, but it matches the hack we use in other
places in the sim currently. This fixes building for e.g. Windows.
The signal fallback logic needs a bit of love in general at some
point across all sim code.
The defs.h header will take care of including the various config.h
headers. For now, it's just config.h, but we'll add more when we
integrate gnulib in.
This header should be used instead of config.h, and should be the
first include in every .c file. We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h. We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way. Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
Few arches implement STATE_WATCHPOINTS()->pc while all of them implement
sim_pc_get. Lets switch the sim-watch core for monitoring pc events to
the sim_pc_get API so this module works for all ports, and then we can
delete this old back channel of snooping in the port's cpu state -- the
code needs the pointer to the pc storage so that it can read out bytes
and compare them to the watchrange.
This also fixes the logic on multi-cpu sims by removing the limitation
of only being able to watch CPU0's state.
Existing ports already have sizeof_pc set to the same size as sim_cia,
so simply make that part of the core code. We already assume this in
places by way of sim_pc_{get,set}, and this is how it's documented in
the sim-base.h API.
There is code to allow sims to pick different register word sizes from
address sizes, but most ports use the defaults for both (32-bits), and
the few that support multiple register sizes never change the address
size (so address defaults to register). I can't think of any machine
where the register hardware size would be larger than the address word
size either. We have ABIs that behave that way (e.g. x32), but the
hardware is still equivalent register sized.
Since we require C11 now, we can assume many headers exist, and
clean up all of the conditional includes. It's not like any of
this code actually accounted for the headers not existing, just
whether we could include them.
The strings.h cleanup is a little nuanced: it isn't in C11, but
every use of it in the codebase will include strings.h only if
string.h doesn't exist. Since we now assume the C11 string.h
exists, we'll never include strings.h, so we can delete it.
Fix a long standing todo where we let getopt write directly to stderr
when an invalid option is passed. Use the sim io funcs instead as they
go through the filtered callbacks that gdb wants.
Other than the nice advantage of all sims having to declare one fewer
common function, this also fixes leakage in pretty much every sim.
Many were not freeing any resources, and a few were inconsistent as
to the ones they did. Now we have a single module that takes care of
all the logic for us.
Most of the non-cgen based ones could be deleted outright. The cgen
ones required adding a callback to the arch-specific cleanup func.
The few that still have close callbacks are to manage their internal
state.
We do not convert erc32, m32c, ppc, rl78, or rx as they do not use
the common sim core.
The syscall path was the only code checking the custom exception state
after recent cleanups. Once we change that to the common engine halt
function, we can delete that state entirely.
This also helps highlight some other dead code that we can cull.
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state. This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.
It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
The previous profile change broke these sims that use sim-profile but
not sim-cpu (due to missing model support). Add simple funcs until we
can convert these over properly.
Since sim_do_command for many people simply calls sim_args_command, start
a unified version of it. For people who handle their own options, they
could switch to this by using sim_add_option_table instead.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
gdb/ChangeLog
* remote-sim.c (gdbsim_store_register): Update API to
sim_store_register to check more error conditions.
include/gdb/ChangeLog
* remote-sim.h (sim_store_register): Update the API
documentation for this function.
sim/erc32/ChangeLog
sim/h8300/ChangeLog
sim/m32c/ChangeLog
sim/mn10300/ChangeLog
sim/ppc/ChangeLog
sim/rx/ChangeLog
sim/v850/ChangeLog
* ???.c (sim_store_register): Update return value to
match new API.
1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
* Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o.
* interp.c (sim_open): Add stub mn103002 cache control memory regions.
Set OPERATING_ENVIRONMENT on "stdeval1" board.
(mn10300_core_signal): New function to intercept memory errors.
(program_interrupt): New function to dispatch to exception vector
(mn10300_exception_*): New functions to snapshot pre/post exception
state.
* sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal.
(SIM_ENGINE_HALT_HOOK): Do nothing.
(SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*().
(_sim_cpu): Add exc_* fields to store register value snapshots.
* dv-mn103ser.c (*): Support dv-sockser backend for UART I/O.
Various endianness and warning fixes.
* mn10300.igen (illegal): Call program_interrupt on error.
(break): Call program_interrupt on breakpoint
Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com>
merged in:
* dv-mn103int.c (mn103int_ioctl): New function for NMI
generation. (mn103int_finish): Install it as ioctl handler.
* dv-mn103tim.c: Support timer 6 specially. Endianness fixes.
using sim-options.
start-sanitize-am30
* (board): Add --board option for specifying am32.
* (sim_open): Create new timer and serial devices and control
configuration of other am32 devices via board option.
end-sanitize-am30
that image properties such as endianness can be checked.
More strongly document the expected behavour of each of the sim_*
interfaces.
Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN. Use in sim_config.
with references to load_byte, load_half, load_3_byte, load_word
and store_byte, store_half, store_3_byte, store_word.
(INLINE): Delete definition.
(load_mem_big): Likewise.
(max_mem): Make it global.
(dispatch): Make this function inline.
(load_mem, store_mem): Delete functions.
* mn10300_sim.h (INLINE): Define.
(RLW): Delete unused definition.
(load_mem, store_mem): Delete declarations.
(load_mem_big): New definition.
(load_byte, load_half, load_3_byte, load_word): New functions.
(store_byte, store_half, store_3_byte, store_word): New functions.
* simops.c: Replace all references to load_mem and store_mem
with references to load_byte, load_half, load_3_byte, load_word
and store_byte, store_half, store_3_byte, store_word.
defined elsewhere.
(compare_simops): New function.
(sim_open): Sort the Simops table before inserting entries
into the hash table.
* mn10300_sim.h: Remove unused #defines.
(load_mem_big): Define.
Another 20% so performance improvement for the mn10300 simulator.
traversals for common instructions. Add HASH_STAT support.
Rewrite opcode dispatch code using a big switch instead of
cascaded if/else statements. Avoid useless calls to load_mem.
