Commit Graph

10222 Commits

Author SHA1 Message Date
Jan Beulich
4faaa10f3f x86: don't attempt to resolve equates and alike from i386_parse_name()
PR gas/28977

Perhaps right from its introduction in 4d1bb7955a it was wrong for
i386_parse_name() to call parse_register(). This being a hook from the
expression parser, it shouldn't be resolving e.g. equated symbols.
That's relevant only for all other callers of parse_register().

To compensate, in Intel syntax mode check_register() needs calling;
perhaps not doing so was an oversight right when the function was
introduced. This is necessary in particular to force EVEX encoding when
VRex registers are used (but of course also to reject bad uses of
registers, i.e. fully matching what parse_register() needs it for).
2022-03-23 12:28:53 +01:00
Jan Beulich
1740425885 gas/Dwarf5: re-use file 0 line string table entry when faking file 0
No need to emit the same string a 2nd time for file 1 in this case.
2022-03-23 08:48:24 +01:00
Jan Beulich
8728bc3d87 gas/Dwarf5: adjust .debug_line file 0 checking
First of all when a table entry has a NULL filename, the two inner if()s
are better done the other way around: The 2nd doesn't depend on what the
first does. This then renders redundant half of the conditions of the
other if() and clarifies that subsequently only entry 0 is dealt with
(indicating that part of the comment was wrong). Finally for there to be
a usable name in slot 1, files_in_use needs to be larger than 1 and slot
1's (rather than slot 0's) name needs to be non-NULL.
2022-03-23 08:48:02 +01:00
Jan Beulich
47513fab28 gas/Dwarf5: drop dead code
Commit 3417bfca67 ("GAS: DWARF-5: Ensure that the 0'th entry in the
directory table contains the current... ") added a "dwarf_level < 5"
check to out_dir_and_file_list(). This rendered dead that branch of the
construct, due to the enclosing if()'s "DWARF2_LINE_VERSION >= 5".
Delete that code as well as the corresponding part of the comment.

While there also drop a redundant "dirs != NULL": "dirs" will always be
non-NULL when dirs_in_use is not zero.
2022-03-23 08:47:41 +01:00
Jan Beulich
7992631e8c gas/Dwarf: improve debug info generation from .irp and alike blocks
Tying the bumping of the logical line number to reading from the
original source file looks wrong: Upon finishing of the processing of an
sb the original values will be restored anyway. Yet without bumping the
line counter uses of .line inside e.g. an .irp construct won't have the
intended effect: Such uses may be necessary to ensure proper debug info
is emitted in particular when switching sections inside the .irp body,
as dwarf2_gen_line_info() would bail without doing anything when it
finds the line number unchanged from what it saw last.
2022-03-23 08:46:39 +01:00
Jan Beulich
36e2d65d26 ELF32: don't silently truncate relocation addends
At least x86-64's x32 sub-mode and RISC-V's 32-bit mode calculate
addends as 64-bit values, but store them in signed 32-bit fields when
generating the file without encountering any earlier error. When the
relocated field is a 64-bit one, the value resulting after processing
the relocation record when linking (or the latest when loading) may
thus be wrong due to the truncation.

With the code change in place, one x32 testcase actually triggers the
new diagnostic. That one case of too large a (negative) addend is being
adjusted alongside the addition of a new testcase to actually trigger
the new error. (Note that due to internal BFD behavior the relocation in
.data doesn't get processed anymore after the errors in .text.)

Note that in principle it is possible to express 64-bit relocations in
ELF32, but this would require .rel relocations, i.e. with the addend
stored in the 64-bit field being relocated. But I guess it would be a
lot of effort for little gain to actually support this.
2022-03-23 08:43:13 +01:00
Jan Beulich
b3446f947b gas: retain whitespace between strings
Macro arguments may be separated by commas or just whitespace. Macro
arguments may also be quoted (where one level of quotes is removed in
the course of determining the values for the respective formal
parameters). Furthermore this quote removal knows _two_ somewhat odd
escaping mechanisms: One, apparently in existence forever, is that a
pair of quotes counts as the escaping of a quote, with the pair being
transformed to a single quote in the course of quote removal. The other
(introduced by c06ae4f232) looks more usual on the surface in that it
deals with \" sequences, but it _retains_ the escaping \. Hence only the
former mechanism is suitable when the value to be used by the macro body
is to contain a quote. Yet this results in ambiguity of what "a""b" is
intended to mean; elsewhere (e.g. for .ascii) it represents two
successive string literals. However, in any event is the above different
from "a" "b": I don't think this can be viewed the same as "a""b" when
processing macro arguments.

Change the scrubber to retain such whitespace, by making the processing
of strings more similar to that of symbols. And indeed this appears to
make sense when taking into account that for quite a while gas has been
supporting quoted symbol names.

Taking a more general view, however, the change doesn't go quite far
enough. There are further cases where significant whitespace is removed
by the scrubber. The new testcase enumerates a few in its ".if 0"
section. I'm afraid the only way that I see to deal with this would be
to significantly simplify the scrubber, such that it wouldn't do much
more than collapse sequences of unquoted whitespace into a single blank.
To be honest problems in this area aren't really surprising when seeing
that there's hardly any checking of .macro use throughout the testsuite
(and in particular in the [relatively] generic tests under all/).
2022-03-23 08:41:54 +01:00
Jan Beulich
46fb6d5aa2 x86: don't suppress overflow diagnostics in x32 mode
Unlike in 64-bit mode, where values wrap at the 64-bit boundary anyway,
there's no wrapping at the 32-bit boundary here, and hence overflow
detection shouldn't be suppressed just because rela relocations are
going to be used.

The extra check against NO_RELOC is actually a result of an ilp32 test
otherwise failing. But thinking about it, reporting overflows for
not-really-relocations (typically because of earlier errors) makes
little sense in general. Perhaps this should even be extended to non-
64-bit modes.
2022-03-21 15:13:35 +01:00
Nick Clifton
a58b0053f4 z80 assembler: Fix new unexpected overflow warning in v2.37
PR 28791
	* config/tc-z80.c (emit_data_val): Do not warn about overlarge
	constants generated by bit manipulation operators.
	* testsuite/gas/z80/pr28791.s: New test source file.
	* testsuite/gas/z80/pr28791.d: New test driver file.
2022-03-21 11:33:59 +00:00
Andreas Schwab
062cda5a37 RISC-V: Fix misplaced @end table
Move the csr-check and arch items inside the table for the .option directive.
2022-03-20 19:04:05 +01:00
Alan Modra
bdcd45685b PR28979, internal error in demand_empty_rest_of_line
The change in read_a_source_file prevents the particular testcase in
the PR from triggering the assertion in demand_empty_rest_of_line.
I've also removed the assertion.  Nothing much goes wrong with gas if
something else triggers it, so it's not worthy of an abort.

I've also changed my previous patch to ignore_rest_of_line to allow
that function to increment input_line_pointer past buffer_limit, like
demand_empty_rest_of_line:  The two functions ought to behave the
same in that respect.  Finally, demand_empty_rest_of_line gets a
little hardening to prevent accesses past buffer_limit plus one.

	PR 28979
	* read.c (read_a_source_file): Calculate known size for sbuf
	rather than calling strlen.
	(demand_empty_rest_of_line): Remove "know" check.  Expand comment.
	Don't dereference input_line_pointer when past buffer_limit.
	(ignore_rest_of_line): Allow input_line_pointer to increment to
	buffer_limit plus one.  Expand comment.
2022-03-20 19:04:22 +10:30
liuzhensong
96a671f281 gas:LoongArch: Fix "make check" pr21884 fail in LoongArch32.
gas/config/
    * tc-loongarch.c: Add function to select target mach.
    * tc-loongarch.h: Define macro TARGET_MACH.
2022-03-20 09:37:12 +08:00
liuzhensong
3b14682a43 LoongArch: Update ABI eflag in elf header.
Update LoongArch ABI eflag in elf header.
    ilp32s  0x5
    ilp32f  0x6
    ilp32d  0x7
    lp64s   0x1
    lp64f   0x2
    lp64d   0x3

  bfd/
    * elfnn-loongarch.c Check object flags while ld.

  gas/
    * tc-loongarch.c Write eflag to elf header.

  include/elf
        * loongarch.h Define ABI number.
2022-03-20 09:37:12 +08:00
liuzhensong
1848a40fdd gas:LoongArch: Fix wrong line number in .debug_line
The dwarf2_emit_insn() can create debuginfo of line. But it is called
  too late in append_fixp_and_insn. It causes extra offs when debuginfo
  of line sets address.

  gas/config/
    * tc-loongarch.c
2022-03-20 09:37:12 +08:00
liuzhensong
5fb13d7ef4 gas:LoongArch: Fix segment error in compilation due to too long symbol name.
Change "char buffer[8192];" into "char *buffer =
  (char *) malloc(1000 +  6 * len_str);" in function
  loongarch_expand_macro_with_format_map.

  gas/
    * config/tc-loongarch.c

  include/
    * opcode/loongarch.h

  opcodes/
    * loongarch-coder.c
2022-03-20 09:37:12 +08:00
liuzhensong
748594bc07 LoongArch: Use functions instead of magic numbers.
Replace the magic numbers in gas(tc-loongarch.c) and
  bfd(elfnn-loongarch.c) with the functions defined in
  the howto table(elfxx-loongarch.c).

  gas/
    * config/tc-loongarch.c: use functions.

  bfd/
    * elfnn-loongarch.c: use functions.
    * elfxx-loongarch.c: define functions.
    * elfxx-loongarch.h
2022-03-20 09:37:12 +08:00
Jan Beulich
c4d0963383 x86: also fold remaining multi-vector-size shift insns
By slightly relaxing the checking in operand_type_register_match() we
can fold the vector shift insns with an XMM source as well. While
strictly speaking an overlap in just one size (see the code comment) is
not enough (both operands could have multiple sizes with just a single
common one), this is good enough for all templates we have, or which
could sensibly / usefully appear (within the scope of the present
operand matching model).

Tightening this a little would be possible, but would require broadcast
related information to be passed into the function.
2022-03-18 10:55:45 +01:00
Jan Beulich
22c3694052 x86: fold certain AVX2 templates into their AVX counterparts
Like for AVX512VL we can make the handling of operand sizes a little
more flexible to allow reducing the number of templates we have.
2022-03-18 10:54:53 +01:00
Tsukasa OI
41d6ac5da6 RISC-V: Cache management instructions
This commit adds 'Zicbom' / 'Zicboz' instructions.

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_multi_subset_supports): Add handling for
	new instruction classes.

include/ChangeLog:

	* opcode/riscv-opc.h (MATCH_CBO_CLEAN, MASK_CBO_CLEAN,
	MATCH_CBO_FLUSH, MASK_CBO_FLUSH, MATCH_CBO_INVAL,
	MASK_CBO_INVAL, MATCH_CBO_ZERO, MASK_CBO_ZERO): New macros.
	* opcode/riscv.h (enum riscv_insn_class): Add new instruction
	classes INSN_CLASS_ZICBOM and INSN_CLASS_ZICBOZ.

opcodes/ChangeLog:

	* riscv-opc.c (riscv_opcodes): Add cache-block management
	instructions.
2022-03-18 15:32:22 +08:00
Tsukasa OI
3b374308d3 RISC-V: Prefetch hint instructions and operand set
This commit adds 'Zicbop' hint instructions.

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_multi_subset_supports): Add handling for
	new instruction class.

gas/ChangeLog:

	* config/tc-riscv.c (riscv_ip): Add handling for new operand
	type 'f' (32-byte aligned pseudo S-type immediate for prefetch
	hints).
	(validate_riscv_insn): Likewise.

include/ChangeLog:

	* opcode/riscv-opc.h (MATCH_PREFETCH_I, MASK_PREFETCH_I,
	MATCH_PREFETCH_R, MASK_PREFETCH_R, MATCH_PREFETCH_W,
	MASK_PREFETCH_W): New macros.
	* opcode/riscv.h (enum riscv_insn_class): Add new instruction
	class INSN_CLASS_ZICBOP.

opcodes/ChangeLog:

	* riscv-dis.c (print_insn_args): Add handling for new operand
	type.
	* riscv-opc.c (riscv_opcodes): Add prefetch hint instructions.
2022-03-18 15:32:16 +08:00
Alan Modra
5fac3f02ed PR28977 tc-i386.c internal error in parse_register
PR 28977
	* config/tc-i386.c (parse_register): Handle X_op not O_register
	as for a non-reg_section symbol.  Simplify array bounds check.
2022-03-18 17:24:13 +10:30
Alan Modra
9e2c342294 Tidy gas current_frame before exit
Releases some obstack memory on an error path.

	* cond.c (cond_finish_check): Call cond_exit_macro.
2022-03-18 16:37:36 +10:30
Alan Modra
ecc263d676 ubsan: logical_input_line signed integer overflow
To avoid a completely useless fuzzing ubsan "bug" report, I decided to
make logical_input_line unsigned.

	* input-scrub.c (logical_input_line): Make unsigned.
	(struct input_save): Here too.
	(input_scrub_reinit, input_scrub_close, bump_line_counters),
	(as_where): Adjust to suit.
2022-03-18 16:37:36 +10:30
Alan Modra
4c5f3d0c9e asan: use of uninitialized value in buffer_and_nest
More occurences of the same as commit d12b8d620c.

	* macro.c (buffer_and_nest): Sanity check length in buffer
	before calling strncasecmp.
2022-03-17 21:32:44 +10:30
Alan Modra
0d1064face asan: buffer overflows after calling ignore_rest_of_line
operand() is not a place that should be calling ignore_rest_of_line.
ignore_rest_of_line shouldn't increment input_line_pointer if already
at buffer limit.

	* expr.c (operand): Don't call ignore_rest_of_line.
	* read.c (s_mri_common): Likewise.
	(ignore_rest_of_line): Don't increment input_line_pointer if
	already at buffer_limit.
2022-03-17 21:32:44 +10:30
Jan Beulich
ed971d9fa6 x86: don't accept base architectures as extensions
The -march= intentions are quite clear: A base architecture may be
followed by any number of extensions. Accepting a base architecture in
place of an extension will at best result in confusion, as the first of
the two (or more) items specified simply would not take effect, due to
being overridden by the later one(s).
2022-03-17 11:05:56 +01:00
Jan Beulich
b1f8a900fd x86: add another IAMCU testcase
Now that {L,K}1OM support is gone, and with it the brokenness in
check_cpu_arch_compatible(), put in place a test making sure that only
extensions can be enabled via .arch for IAMCU, and that the base
architecture cannot be changed.
2022-03-17 11:03:22 +01:00
Jan Beulich
c085ab00c7 x86: drop L1OM/K1OM support from gas
This was only rudimentary support anyway; none of the sub-architecture
specific insns were ever supported.
2022-03-17 11:02:42 +01:00
Jan Beulich
648d04db39 x86: assorted IAMCU CPU checking fixes
The checks done by check_cpu_arch_compatible() were halfway sensible
only at the time where only L1OM support was there. The purpose,
however, has always been to prevent bad uses of .arch (turning off the
base CPU "feature" flag) while at the same time permitting extensions to
be enabled / disabled. In order to achieve this (and to prevent
regressions when L1OM and K1OM support are removed)
- set CpuIAMCU in CPU_IAMCU_FLAGS,
- adjust the IAMCU check in the function itself (the other two similarly
  broken checks aren't adjusted as they're slated to be removed anyway),
- avoid calling the function for extentions (which would never have the
  base "feature" flag set),
- add a new testcase actually exercising ".arch iamcu" (which would also
  regress with the planned removal).
2022-03-17 11:01:38 +01:00
Alan Modra
dc3ff92676 Delete PowerPC macro insn support
Let's hope this stays dead, but it's here as a patch separate from
those that removed use of powerpc_macros just in case it needs to be
resurrected.

include/
	* opcode/ppc.h (struct powerpc_macro): Delete declaration.
	(powerpc_macros, powerpc_num_macros): Likewise..
opcodes/
	* ppc-opc.c (powerpc_macros, powerpc_num_macros): Delete.
gas/
	* config/tc-ppc.c (ppc_macro): Delete function.
	(ppc_macro_hash): Delete.
	(ppc_setup_opcodes, md_assemble): Delete macro support.
2022-03-16 10:08:46 +10:30
Alan Modra
51ba92c795 PowerPC VLE extended instructions in powerpc_macros
This moves VLE insn out of the macro table.  "e_slwi" and "e_srwi"
already exist in vle_opcodes as distinct instructions rather than
encodings of e_rlwinm.

opcodes/
	* ppc-opc.c (vle_opcodes): Typo fix e_rlwinm operand.
	Add "e_inslwi", "e_insrwi", "e_rotlwi", "e_rotrwi", "e_clrlwi",
	"e_clrrwi", "e_extlwi", "e_extrwi", and "e_clrlslwi".
	(powerpc_macros): Delete same.  Delete "e_slwi" and "e_srwi" too.
gas/
	* testsuite/gas/ppc/vle-simple-5.d: Update.
2022-03-16 10:07:02 +10:30
Alan Modra
f304c63d24 PowerPC32 extended instructions in powerpc_macros
As for PowerPC64, move instructions to the main opcode table.

opcodes/
	* ppc-opc.c (insert_crwn, extract_crwn, insert_elwn, extract_elwn),
	(insert_erwn, extract_erwn, insert_erwb, extract_erwb),
	(insert_cslwn, extract_cslwb, insert_ilwb, extract_ilwn),
	(insert_irwb, extract_irwn, insert_rrwn, extract_rrwn),
	(insert_slwn, extract_slwn, insert_srwn, extract_srwn): New functions.
	(CRWn, ELWn, ERWn, ERWb, CSLWb, CSLWn, ILWn, ILWb, IRWn, IRWb),
	(RRWn, SLWn, SRWn): Define and add powerpc_operands entries.
	(MMB_MASK, MME_MASK, MSHMB_MASK): Define.
	(powerpc_opcodes): Add "inslwi", "insrwi", "rotrwi", "clrrwi",
	"slwi", "srwi", "extlwi", "extrwi", "sli", "sri" and corresponding
	record (ie. dot suffix) forms.
	(powerpc_macros): Delete same.
gas/
	* testsuite/gas/ppc/476.d: Update.
	* testsuite/gas/ppc/simpshft.d: Update.
2022-03-16 10:05:37 +10:30
Alan Modra
42952a9605 PowerPC64 extended instructions in powerpc_macros
The extended instructions implemented in powerpc_macros aren't used by
the disassembler.  That means instructions like "sldi r3,r3,2" appear
in disassembly as "rldicr r3,r3,2,61", which is annoying since many
other extended instructions are shown.

Note that some of the instructions moved out of the macro table to the
opcode table won't appear in disassembly, because they are aliases
rather than a subset of the underlying raw instruction.  If enabled,
rotrdi, extrdi, extldi, clrlsldi, and insrdi would replace all
occurrences of rotldi, rldicl, rldicr, rldic and rldimi.  (Or many
occurrences in the case of clrlsldi if n <= b was added to the extract
functions.)

The patch also fixes a small bug in opcode sanity checking.

include/
	* opcode/ppc.h (PPC_OPSHIFT_SH6): Define.
opcodes/
	* ppc-opc.c (insert_erdn, extract_erdn, insert_eldn, extract_eldn),
	(insert_crdn, extract_crdn, insert_rrdn, extract_rrdn),
	(insert_sldn, extract_sldn, insert_srdn, extract_srdn),
	(insert_erdb, extract_erdb, insert_csldn, extract_csldb),
	(insert_irdb, extract_irdn): New functions.
	(ELDn, ERDn, ERDn, RRDn, SRDn, ERDb, CSLDn, CSLDb, IRDn, IRDb):
	Define and add associated powerpc_operands entries.
	(powerpc_opcodes): Add "rotrdi", "srdi", "extrdi", "clrrdi",
	"sldi", "extldi", "clrlsldi", "insrdi" and corresponding record
	(ie. dot suffix) forms.
	(powerpc_macros): Delete same from here.
gas/
	* config/tc-ppc.c (insn_validate): Don't modify value passed
	to operand->insert for PPC_OPERAND_PLUS1 when calculating mask.
	Handle PPC_OPSHIFT_SH6.
	* testsuite/gas/ppc/prefix-reloc.d: Update.
	* testsuite/gas/ppc/simpshft.d: Update.
ld/
	* testsuite/ld-powerpc/elfv2so.d: Update.
	* testsuite/ld-powerpc/notoc.d: Update.
	* testsuite/ld-powerpc/notoc3.d: Update.
	* testsuite/ld-powerpc/tlsdesc2.d: Update.
	* testsuite/ld-powerpc/tlsget.d: Update.
	* testsuite/ld-powerpc/tlsget2.d: Update.
	* testsuite/ld-powerpc/tlsopt5.d: Update.
	* testsuite/ld-powerpc/tlsopt6.d: Update.
2022-03-16 09:59:07 +10:30
Alan Modra
fb0e49d8e0 Constant fold view increment expressions
The idea here is to replace expressions like v + 1 + 1 + 1 with v + 3.

	* dwarf2dbg.c (set_or_check_view): Remove useless assertion.
	Resolve multiple view increments.
	* testsuite/gas/elf/dwarf2-18.d: Don't xfail mep.
2022-03-09 15:50:34 +10:30
Alan Modra
4afc889439 Reduce duplicated symbol_clone_if_forward_ref work
* symbol.c (struct symbol_flags): Add forward_resolved.
	(symbol_entry_find): Update needle initialisation.
	(symbol_clone_if_forward_ref): Do no work when forward_resolved
	is already set.  Set forward_resolved.
2022-03-09 14:10:00 +10:30
Jan Beulich
7919e5667c RISC-V: make .insn actually work for 64-bit insns
Presently in this case, due to an undefined behavior shift, at least
with x86 cross builds I'm observing:

Error: value conflicts with instruction length `8,0x0000003f'

Eliminate the UB and extend the respective testcase.
2022-03-04 13:37:59 +01:00
Jan Beulich
6a778a2100 x86: drop redundant x86-64-code16-2 test
The code16-2 test is already meaningless enough as a gas test, identical
to this one, and is run uniformly for all ELF targets anyway.
2022-03-04 13:37:30 +01:00
Patrick O'Neill
e4028336b1 RISC-V: PR28733, add missing extension info to 'unrecognized opcode' error
Currently we report errors as "unrecognized opcode `fence.i'" when the
opcode isn't part of the selected extensions.
This patch expands that error message to include the missing extension
information. For example, now the error message would be "unrecognized
opcode `fence.i', extension `zifencei' required".
If the opcode is not a part of any extension, the error message reverts
to "unrecognized opcode `<op statement>'".

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>

bfd/
	pr 28733
	* elfxx-riscv.c (riscv_multi_subset_supports_ext): New function,
	used to return the extension string for each INSN_CLASS_*.
	* elfxx-riscv.h: Added extern riscv_multi_subset_supports_ext.
gas/
	pr 28733
	* config/tc-riscv.c (struct riscv_ip_error): New structure,
	contains information about errors that occur within the riscv_ip.
	(riscv_ip): Use struct riscv_ip_error to report more detailed errors.
	* testsuite/gas/riscv/c-fld-fsd-fail.l: Updated.
	* testsuite/gas/riscv/march-imply-i2p1-01.: Likewise.
2022-02-23 19:45:52 +08:00
Patrick O'Neill
df0a549ebd RISC-V: PR28733, add missing extension info to 'invalid CSR' error
Currently we report errors as "invalid CSR 'fscr' for the current ISA"
when the instruction isn't valid.

This patch expands that error message to include the missing extension
information. For example, now the error message would be "invalid CSR
'fscr' for the current ISA, CSR 'fscr' needs 'f' extension".

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>

gas/
	pr 28733
	* config/tc-riscv.c (riscv_csr_address): Report more details
	when the CSR is invalid.
	* testsuite/gas/riscv/csr-version-1p10.l: Updated detailed errors.
	* testsuite/gas/riscv/csr-version-1p11.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p9p1.l: Likewise.
2022-02-23 19:08:19 +08:00
Alan Modra
cebc89b932 binutils 2.38 vs. ppc32 linux kernel
Commit b25f942e18 made .machine more strict.  Weaken it again.

	* config/tc-ppc.c (ppc_machine): Treat an early .machine specially,
	keeping sticky options to work around gcc bugs.
2022-02-23 19:23:09 +10:30
Nelson Chu
9cbed90ee6 RISC-V: Updated CSRs to privileged spec v1.12 and debug spec v1.0.
* Removed N extension CSRs,
ustatus, uie, utvec, uscratch, uepc, ucause, utval and uip.

* Removed two supervisor CSRs,
sedeleg and sideleg.

* Changed debug CSR address of scontext from 0x7aa to 0x5a8.  We cannot support
different versions of debug specs for now, so only supporting the latest one is
the only way to move forward.

* Added debug CSRs,
mscontext (0x7aa), mcontrol6 (0x7a1, tdata1) and tmexttrigger ((0x7a1, tdata1).

* Regarded hcontext as a debug CSR.

include/
	* opcode/riscv-opc.h: Updated CSRs to privileged spec v1.12 and
	debug spec v1.0.
gas/
	* testsuite/gas/riscv/csr.s: Updated CSRs to privileged spec v1.12
	and debug spec v1.0.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p9p1.l: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
2022-02-23 14:54:34 +08:00
Tsukasa OI
f4ce10b14f RISC-V: Add Privileged Architecture 1.12 CSRs
This commit adds,

* Most of CSRs as listed in the Privileged Architecture,
version 1.12 (except scontext and mscontext).

* Testcases for most CSRs added on the Privileged
Architecture, version 1.12 (except moved "scontext" and
new "mscontext").

include/ChangeLog:

	* opcode/riscv-opc.h (CSR_SENVCFG, CSR_MCONFIGPTR, CSR_MENVCFG,
	CSR_MSTATUSH, CSR_MENVCFGH, CSR_MTINST, CSR_MTVAL2, CSR_MSECCFG,
	CSR_MSECCFGH, CSR_PMPCFG4, CSR_PMPCFG5, CSR_PMPCFG6,
	CSR_PMPCFG7, CSR_PMPCFG8, CSR_PMPCFG9, CSR_PMPCFG10,
	CSR_PMPCFG11, CSR_PMPCFG12, CSR_PMPCFG13, CSR_PMPCFG14,
	CSR_PMPCFG15, CSR_PMPADDR16, CSR_PMPADDR17, CSR_PMPADDR18,
	CSR_PMPADDR19, CSR_PMPADDR20, CSR_PMPADDR21, CSR_PMPADDR22,
	CSR_PMPADDR23, CSR_PMPADDR24, CSR_PMPADDR25, CSR_PMPADDR26,
	CSR_PMPADDR27, CSR_PMPADDR28, CSR_PMPADDR29, CSR_PMPADDR30,
	CSR_PMPADDR31, CSR_PMPADDR32, CSR_PMPADDR33, CSR_PMPADDR34,
	CSR_PMPADDR35, CSR_PMPADDR36, CSR_PMPADDR37, CSR_PMPADDR38,
	CSR_PMPADDR39, CSR_PMPADDR40, CSR_PMPADDR41, CSR_PMPADDR42,
	CSR_PMPADDR43, CSR_PMPADDR44, CSR_PMPADDR45, CSR_PMPADDR46,
	CSR_PMPADDR47, CSR_PMPADDR48, CSR_PMPADDR49, CSR_PMPADDR50,
	CSR_PMPADDR51, CSR_PMPADDR52, CSR_PMPADDR53, CSR_PMPADDR54,
	CSR_PMPADDR55, CSR_PMPADDR56, CSR_PMPADDR57, CSR_PMPADDR58,
	CSR_PMPADDR59, CSR_PMPADDR60, CSR_PMPADDR61, CSR_PMPADDR62,
	CSR_PMPADDR63): New CSR macros.

gas/ChangeLog:

	* testsuite/gas/riscv/csr-dw-regnums.s: Add new CSRs.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
	* testsuite/gas/riscv/csr.s: Add new CSRs.
	* testsuite/gas/riscv/csr-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p9p1.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.l: Likewise.
2022-02-23 14:45:44 +08:00
Tsukasa OI
7379729c7d RISC-V: Reorganize testcases for CFI directives
This commit reorganizes and adds some CSRs to csr-dw-regnums.[sd] to
make it test the same CSRs as csr.s.

gas/ChangeLog:

	* testsuite/gas/riscv/csr-dw-regnums.s: Reorganize and add
	defined CSRs tested in csr.s.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
2022-02-23 14:45:34 +08:00
Alan Modra
19f7966ede gas local label and dollar label handling
Much of the gas source and older BFD source use "long" for function
parameters and variables, when other types would be more appropriate.
This patch fixes one of those cases.  Dollar labels and numeric local
labels do not need large numbers.  Small positive itegers are usually
all that is required.  Due to allowing longs, it was possible for
fb_label_name and dollar_label_name to overflow their buffers.

	* symbols.c: Delete unnecessary forward declarations.
	(dollar_labels, dollar_label_instances): Use unsigned int.
	(dollar_label_defined, dollar_label_instance): Likewise.
	(define_dollar_label): Likewise.
	(fb_low_counter, fb_labels, fb_label_instances): Likewise.
	(fb_label_instance_inc, fb_label_instance): Likewise.
	(fb_label_count, fb_label_max): Make them size_t.
	(dollar_label_name, fb_label_name): Rewrite using sprintf.
	* symbols.h (dollar_label_defined): Update prototype.
	(define_dollar_label, dollar_label_name): Likewise.
	(fb_label_instance_inc, fb_label_name): Likewise.
	* config/bfin-lex.l (yylex): Remove unnecessary casts.
	* expr.c (integer_constant): Likewise.
	* read.c (read_a_source_file): Limit numeric label range to int.
2022-02-16 22:05:24 +10:30
Alan Modra
969f6a63c0 ubsan: s_app_line integer overflow
There are quite a few ubsan warnings in gas.  This one disappears with
a code tidy.

	* read.c (s_app_line): Rename 'l' to 'linenum'.  Avoid ubsan
	warning.
2022-02-16 22:05:24 +10:30
Alan Modra
d12b8d620c asan : use of uninitialized value in buffer_and_nest
* macro.c (buffer_and_nest): Don't read past end of string buffer.
2022-02-16 19:15:40 +10:30
Richard Sandiford
b4b0dcfd03 gas/doc: Fix "a true results" typo 2022-02-11 15:08:46 +00:00
Nick Clifton
2f49159cfb Updated French translation for the gas sub-directory. 2022-01-28 12:16:03 +00:00
Mike Frysinger
9a84a44d5d gas: drop old cygnus install hack
This was needed when gas was using the automake cygnus option, but
this was removed years ago by Simon in d0ac1c4488
("Bump to autoconf 2.69 and automake 1.15.1").  So delete it here.
The info pages are already & still installed by default w/out it.
2022-01-24 19:58:33 -05:00
Nick Clifton
5fe73d4624 Update Bulgarian, French, Romaniam and Ukranian translation for some of the sub-directories 2022-01-24 14:22:49 +00:00