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4ed7ed8db2
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7018 Commits

Author SHA1 Message Date
Thomas Preud'homme
4ed7ed8db2 Add assembler support for ARMv8-M Mainline 
2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
    (tag_cpu_arch_combine): Adjust v4t_plus_v6_m and comb array to account
    for new TAG_CPU_ARCH_V4T_PLUS_V6_M value.  Deal with NULL values in
    comb array.

binutils/
    * readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Mainline Tag_CPU_arch
    value.
    (arm_attr_tag_THUMB_ISA_use): Add ARMv8-M Mainline Tag_THUMB_ISA_use
    value.

gas/
    * config/tc-arm.c (arm_ext_m): Include ARMv8-M.
    (arm_ext_v8m): New feature for ARMv8-M.
    (arm_ext_atomics): New feature for ARMv8 atomics.
    (do_tt): New encoding function for TT* instructions.
    (insns): Add new entries for ARMv8-M specific instructions and
    reorganize the ones shared by ARMv8-M Mainline and ARMv8-A.
    (arm_archs): Define armv8-m.main architecture.
    (cpu_arch_ver): Define ARM_ARCH_V8M_MAIN architecture version and
    clarify the ordering rule.
    (aeabi_set_public_attributes): Use TAG_CPU_ARCH_* macro to refer to
    Tag_CPU_arch values for ARMv7e-M detection.  Add logic to keep setting
    Tag_CPU_arch to ARMv8-A for -march=all.  Also set Tag_CPU_arch_profile
    to 'A' if extension bit for atomic instructions is set, unless it is
    ARMv8-M.  Set Tag_THUMB_ISA_use to 3 for ARMv8-M.  Set Tag_DIV_use to 0
    for ARMv8-M Mainline.

gas/testsuite/
    * gas/arm/archv8m.s: New file.
    * gas/arm/archv8m-main.d: Likewise.
    * gas/arm/attr-march-armv8m.main.d: Likewise.
    * gas/arm/any-armv8m.s: Likewise.
    * gas/arm/any-armv8m.d: Likewise.

include/elf/
    * arm.h (TAG_CPU_ARCH_V8M_MAIN): Declare.
    (MAX_TAG_CPU_ARCH): Define to TAG_CPU_ARCH_V8M_MAIN.
    (TAG_CPU_ARCH_V4T_PLUS_V6_M): Define to unused value 15.

include/opcode/
    * arm.h (ARM_EXT2_ATOMICS): New extension bit.
    (ARM_EXT2_V8M): Likewise.
    (ARM_EXT_V8): Adjust comment with regards to atomics and remove
    mention of legacy use for that bit.
    (ARM_AEXT2_V8_1A): New architecture extension bitfield.
    (ARM_AEXT2_V8_2A): Likewise.
    (ARM_AEXT_V8M_MAIN): Likewise.
    (ARM_AEXT2_V8M): Likewise.
    (ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield.
    (ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A.
    (ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A.
    (ARM_ARCH_V8M_MAIN): New architecture feature bitfield.
    (ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield
    and reindent.
    (ARM_ARCH_V8A_SIMD): Likewise.
    (ARM_ARCH_V8A_CRYPTOV1): Likewise.
    (ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of
    feature bits.
    (ARM_ARCH_V8_1A_SIMD): Likewise.
    (ARM_ARCH_V8_1A_CRYPTOV1): Likewise.

opcodes/
    * arm-dis.c (arm_opcodes): Guard lda, ldab, ldaex, ldaexb, ldaexh, stl,
    stlb, stlh, stlex, stlexb and stlexh by ARM_EXT2_ATOMICS instead of
    ARM_EXT_V8.
    (thumb32_opcodes): Add entries for wide ARMv8-M instructions.
 2015-12-24 17:26:54 +08:00
Yury Usishchev
491d01d3da ARM: Fix exidx coverage for relocatable builds. 
bfd  * elf-bfd.h: Add callback to count additional relocations.
     * elf32-arm.c (_arm_elf_section_data): Add new counter.
     (insert_cantunwind_after): Increment relocations counter.
     (elf32_arm_fix_exidx_coverage): Remove exidx entries and add
     terminating CANTUNWIND entry only in final builds.
     (elf32_arm_add_relocation): New function.
     (elf32_arm_write_section): Add relocations in relocatable builds.
     (elf32_arm_count_additional_relocs): New function.
     (elf_backend_count_additional_relocs): New define.
     * bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of
     .rel section.
     * bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define.

ld   * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call
     elf32_arm_fix_exidx_coverage for relocatable builds.

ld/testsuite
     * ld-arm/arm-elf.exp: New test.
     * ld-arm/unwind-rel.d: New file.
     * ld-arm/unwind-rel1.s: New file.
     * ld-arm/unwind-rel2.s: New file.
     * ld-arm/unwind-rel3.s: New file.
 2015-12-22 15:50:13 +00:00
Yoshinori Sato
239efab164 RXv2 support update 
2015-12-22  Yoshinori Sato <ysato@users.sourceforge.jp>

opcodes/
	* rx-decode.opc (movco): Use uniqe id.
	(movli): Likewise.
	(stnz): Condition fix.
	(mvtacgu): Destination fix.
	* rx-decode.c: Regenerate.

bfd/
	* archures.c: Add bfd_mach_rx_v2.
	* bfd-in2.h: Regenerate.
	* cpu-rx.c (arch_info_struct): Add v2 information.
	* elf32-rx.c (elf32_rx_machine): Add v2 support.
 2015-12-22 23:26:39 +09:00
Mickael Guene
ac4c9b0459 Add support for ARM's NOREAD section flag. 
include/elf
     * arm.h: Add arm SHF_ARM_NOREAD section flag.

bfd  * bfd-in2.h: Regenerate.
     * section.c: Add SEC_ELF_NOREAD.
     * elf32-arm.c (elf32_arm_post_process_headers): Only set
     PF_X attribute if a segment only contains section with
     SHF_ARM_NOREAD flag.
     (elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
     (elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
     to bfd flag.
     (elf32_arm_lookup_section_flags): New function to allow
     INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
     (elf32_arm_special_sections): Add special sections array
     to catch section prefix by '.text.noread' pattern.

ld/testsuite
     * ld-arm/arm-elf.exp: New tests.
     * ld-arm/thumb1-input-section-flag-match.d: New
     * ld-arm/thumb1-input-section-flag-match.s: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
     * ld-arm/thumb1-noread-present-one-section.d: New
     * ld-arm/thumb1-noread-present-one-section.s: New
     * ld-arm/thumb1-noread-present-two-section.d: New
     * ld-arm/thumb1-noread-present-two-section.s: New

binutils
	* readelf.c (get_elf_section_flags): Add support for ARM specific
	section flags.
 2015-12-22 14:12:35 +00:00
H.J. Lu
c9f203207d Fix formatting in coff-x86_64.c 
* coff-x86_64.c (coff_amd64_reloc): Fix formatting.
 2015-12-18 08:15:27 -08:00
Nick Clifton
ec70be9f61 Fix formatting of coff-i386.c 
* coff-i386.c (coff_i386_reloc): Fix formatting.
 2015-12-18 08:49:02 +00:00
Christophe Lyon
0bef041426 Add forgotten ChangeLog updates for 72d98d16ed: 
2015-12-16  Mickael Guene <mickael.guene@st.com>

	bfd/
	* bfd-in2.h: Regenerate.
	* reloc.c: Add new relocations.
	* libbfd.h (bfd_reloc_code_real_names): Add new relocations
	display names.
	* elf32-arm.c (elf32_arm_howto_table_1): Add HOWTO for new
	relocations.
	(elf32_arm_reloc_map): Add bfd/arm mapping for new relocations.
	(elf32_arm_final_link_relocate): Implement new relocations
	resolution.

	gas/
	* doc/c-arm.texi: Add documentation about new directives
	* config/tc-arm.c (group_reloc_table): Add mapping between gas
	syntax and new relocations.
	(do_t_add_sub): Keep new relocations for add operand.
	(do_t_mov_cmp): Keep new relocations for mov operand.
	(insns): Use 'shifter operand with possible group relocation'
	operand parse code for movs operand.
	(md_apply_fix): Implement mov and add encoding when new
	relocations on them.
	(tc_gen_reloc): Add new relocations.
	(arm_fix_adjustable): Since offset has a limited range ([0:255])
	we disable adjust_reloc_syms() for new relocations.

	gas/testsuite/
	* gas/arm/adds-thumb1-reloc-local.d: New
	* gas/arm/adds-thumb1-reloc-local.s: New
	* gas/arm/movs-thumb1-reloc-local.d: New
	* gas/arm/movs-thumb1-reloc-local.s: New

	include/
	* elf/arm.h: Add new arm relocations.

	ld/testsuite/
	* ld-arm/arm-elf.exp (armelftests_common): Add new relocations
	tests.
	* ld-arm/thumb1-adds.d: New
	* ld-arm/thumb1-adds.s: New
	* ld-arm/thumb1-movs.d: New
	* ld-arm/thumb1-movs.s: New
 2015-12-17 11:14:37 +01:00
Jan Beulich
270f824531 bfd: don't produce corrupt COFF symbol table due to long ELF file name symbols 
The re-writing logic in _bfd_coff_final_link() overwrote the ".file"
part of the symbol table entry, due to not coping with the auxiliary
entry generated in all cases.

Note that while I would have wanted to add a test case,
(a) I didn't spot any one testing the base functionality here, and
(b) I wasn't able to figure out proper conditionals to use in e.g.
    ld-elf/elf.exp to check for the necessary PE/PE+ support (which
    varies by target).
 2015-12-15 14:31:25 +01:00
Nick Clifton
08832196ac Update the copyright notices in the affected files. 
PR 19339
	* elf-vxworks.h: Update copyright notice.
	* elf-vxworks.c: Update copyright notice.
	* elf-nacl.h: Update copyright notice.
	* elf-nacl.c: Update copyright notice.
 2015-12-15 12:28:38 +00:00
H.J. Lu
c5847ba726 ld -r doesn't need plugin for slim lto object 
Plugin isn't required on slim lto object for relocatable link.

bfd/

	PR ld/19317
	* linker.c (_bfd_generic_link_add_one_symbol): Don't complain
	plugin needed to handle slim lto object for relocatable link.

ld/testsuite/

	PR ld/19317
	* ld-plugin/lto.exp (lto_no_fat): New.
	(lto_link_tests): Add a test for PR ld/19317.
	(lto_run_tests): Likewise.
	(run_ld_link_tests): Likewise.
 2015-12-10 12:35:50 -08:00
Sandra Loosemore
33d4099fc8 Fix GOT address computations in initial PLT entries for nios2. 
2015-12-09  Sandra Loosemore  <sandra@codesourcery.com>

	bfd/
	* elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Correct
	%hiadj/%lo computations for _GLOBAL_OFFSET_TABLE_ in initial
	PLT entries.  Assert alignment requirements.
 2015-12-09 16:13:58 -08:00
DJ Delorie
e896287c16 rl78: relaxation fixes 
Various fixes to linker relaxation.  In general, we need to support
relaxing every branch, even if we don't relax it in the assembler,
so we can optionally defer relaxation to the linker.

* elf32-rl78.c (rl78_offset_for_reloc): Add more relocs.
(rl78_elf_relax_section): Add bc/bz/bnc/bnz/bh/bnh.  Fix reloc
choices.

* config/rl78-parse.y: Make all branches relaxable via
rl78_linkrelax_branch().
* config/tc-rl78.c (rl78_linkrelax_branch): Mark all relaxable
branches with relocs.
(options): Add OPTION_NORELAX.
(md_longopts): Add -mnorelax.
(md_parse_option): Support OPTION_NORELAX.
(op_type_T): Add bh, sk, call, and br.
(rl78_opcode_type): Likewise.
(rl78_relax_frag): Fix not-relaxing logic.  Add sk.
(md_convert_frag): Fix relocation handling.
(tc_gen_reloc): Strip relax relocs when not linker relaxing.
(md_apply_fix): Defer overflow handling for anything that needs a
PLT, to the linker.
* config/tc-rl78.h (TC_FORCE_RELOCATION): Force all relocations to
the linker when linker relaxing.
* doc/c-rl78.texi (norelax): Add.
 2015-12-08 01:29:25 -05:00
DJ Delorie
7859afc4fa rx: Fix p_vaddr reconstruction logic. 
* elf32-rx.c (rx_elf_object_p): Ignore empty and nobits sections.
 2015-12-08 01:15:58 -05:00
Nick Clifton
6056244624 oops - accidentally omittde from previous delta. 2015-12-07 14:44:46 +00:00
Alan Modra
cbf9597294 PowerPC ifunc with local symbols 
This fixes some cases where the linker would incorrectly error on plt
relocs to local ifunc symbols.  I've also tidied plt and ifunc
handling for ppc64, where check_relocs was allowing for the
possibility of plt calls via addr14/addr24 relocs but relocate_section
was not.

	* elf32-ppc.c (ppc_elf_check_relocs): Don't error on local ifunc
	plt call.  Wrap long lines.
	(ppc_elf_relocate_section): Wrap long lines.
	* elf64-ppc.c (ppc64_elf_check_relocs): Don't error on local ifunc
	plt calls.  Move __tls_get_addr checks later.  Don't create plt
	for addr14/addr24 relocs.
	(ppc64_elf_gc_sweep_hook): Adjust to suit check_relocs changes.
	(ppc64_elf_relocate_section): Correct local ifunc handling for
	PLT64, PLT32 and PLT16 relocs.
 2015-12-07 13:52:01 +10:30
Alan Modra
c20f6f63ed PR19323 memory allocation greater than 4G 
On 32-bit targets, memory requested for program/section headers on a
fuzzed binary can wrap to 0.  A bfd_alloc of zero bytes actually
returns a one byte allocation rather than a NULL pointer.  This then
leads to buffer overflows.

Making this check unconditional triggers an extremely annoying gcc-5
warning.

	PR19323
	* elfcode.h (elf_object_p): Check for ridiculous e_shnum and
	e_phnum values.
 2015-12-07 13:42:23 +10:30
Alan Modra
006589cfa1 R_PPC64_ENTRY 
Add a new relocation that marks large-model entry code, for edit back
to medium-model.

include/elf/
	* ppc64.h (R_PPC64_ENTRY): Define.
bfd/
	* reloc.c (BFD_RELOC_PPC64_ENTRY): New.
	* elf64-ppc.c (reloc_howto_type ppc64_elf_howto_raw): Add
	entry for R_PPC64_ENTRY.
	(LD_R2_0R12, ADD_R2_R2_R12, LIS_R2, ADDIS_R2_R12): Define.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_ENTRY.
	(ppc64_elf_relocate_section): Edit code at R_PPC64_ENTTY.  Use
	new insn defines.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
 2015-12-07 13:14:53 +10:30
Kaz Kojima
2b213129c5 bfd: Mark sh5*-*-* and sh64*-*-* targets as obsolete. 2015-12-07 10:01:02 +09:00
H.J. Lu
02e2aef89b Optimize R_386_GOT32/R_386_GOT32X only if addend is 0 
Linker can't optimize R_386_GOT32 and R_386_GOT32X relocations if addend
isn't 0.  It isn't valid to convert

movl	foo@GOT+1(%ecx), %eax

to

leal	foo@GOTOFF+1(%ecx), %eax

nor to convert

movq	foo@GOTPCREL+1(%rip), %rax

to

leaq	foo(%rip), %rax

for x86-64.  We should check if addend is 0 before optimizing R_386_GOT32
and R_386_GOT32X relocations.  Testcases are added for i386 and x86-64.

bfd/

	* elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0.
	(elf_i386_relocate_section): Skip R_386_GOT32X optimization if
	addend isn't 0.

ld/testsuite/

	* ld-i386/i386.exp: Run mov2a, mov2b and mov3.
	* ld-i386/mov2.s: New file.
	* ld-i386/mov2a.d: Likewise.
	* ld-i386/mov2b.d: Likewise.
	* ld-i386/mov3.d: Likewise.
	* ld-i386/mov3.s: Likewise.
	* ld-x86-64/mov2.s: Likewise.
	* ld-x86-64/mov2a.d: Likewise.
	* ld-x86-64/mov2b.d: Likewise.
	* ld-x86-64/mov2c.d: Likewise.
	* ld-x86-64/mov2d.d: Likewise.
	* ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
 2015-12-04 09:03:04 -08:00
Tristan Gingold
461c4b2ede Remove useless loop in elf.c 2015-12-04 12:51:03 +01:00
Alan Modra
923b198a84 addr2line vs. inlined C functions called from C++ 
In this case the inlined function doesn't have DW_AT_linkage_name in
.debug_info, but the language is C++ so find_nearest_line goes looking
in the symbol table.  Since the function is inlined the enclosing
non-inline function symbol is returned from _bfd_elf_find_function,
which is wrong.  This patch only uses a symbol if its address matches.

	PR binutils/19315
	* dwarf2.c (_bfd_elf_find_function): Return symbol matched.
	(_bfd_dwarf2_find_nearest_line): Check symbol returned above
	against dwarf range.
	* elf-bfd.h (_bfd_elf_find_function): Update prototype.
 2015-12-02 23:55:51 +10:30
Alan Modra
c27b8c2aeb Fix powerpc64 segfault caused by zero r_symndx relocs. 
Fixes a segfault in ppc64_elf_tls_optimize found when testing
R_PPC64_ENTRY, and potential for trouble in other places found by
code inspection.

	* elf64-ppc.c (ppc64_elf_tls_optimize): Don't segfault on NULL
	symbol section or output section.
	(ppc64_elf_edit_toc): Similarly for ld -R objects.
	(ppc64_elf_size_stubs): Likewise.
 2015-12-02 19:18:27 +10:30
H.J. Lu
ead3d5427a Properly check symbol defined by assignment in linker script 
Symbol defined by a linker assignment may have type bfd_link_hash_new
or bfd_link_hash_undefined.  And h->def_regular is always set.
elf_i386_convert_load and elf_x86_64_convert_load should check
h->def_regular as well as bfd_link_hash_undefined and bfd_link_hash_new
to see if a symbol is defined by a linker script.

bfd/

	PR ld/19319
	* elf32-i386.c (elf_i386_convert_load): Check h->def_regular
	instead of bfd_link_hash_new.
	* elf64-x86-64.c (elf_x86_64_convert_load): Likewise.  Skip
	relocation overflow for bfd_link_hash_undefined and
	bfd_link_hash_new if h->def_regular is set.

ld/testsuite/

	PR ld/19319
	* ld-i386/i386.exp: Run pr19319 test.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr19319.dd: New file.
	* ld-i386/pr19319a.S: Likewise.
	* ld-i386/pr19319b.S: Likewise.
	* ld-x86-64/pr19319.dd: Likewise.
	* ld-x86-64/pr19319a.S: Likewise.
	* ld-x86-64/pr19319b.S: Likewise.
 2015-12-01 14:45:51 -08:00
Alan Modra
3a8c4a5b42 Trim unused params from aout adjust_sizes_and_vmas 
* aoutx.h (adjust_sizes_and_vmas): Remove unused text_size and
	text_end parameters.  Update callers.
	* aout-tic30.c: Update adjust_sizes_and_vmas callers.
	* hp300hpux.c: Likewise.
	* i386lynx.c: Likewise.
	* libaout.h: Likewise.
	* netbsd.h: Likewise.
	* pdp11.c: Likewise.
	* riscix.c: Likewise.
 2015-12-01 14:00:33 +10:30
Alan Modra
bbb1afc89b Invoke aout N_* macros with pointer to struct internal_exec 
No functional changes here.

BTW, some of these headers don't seem to be used anywhere:
include/aout/dynix3.h, include/aout/encap.h, include/aout/hp.h,
gas/config/aout_gnu.h

bfd/
	* aout-adobe.c: Invoke aout N_* macros with pointer to
	struct internal_exec.
	* aout-arm.c: Likewise.
	* aout-cris.c: Likewise.
	* aout-target.h: Likewise.
	* aout-tic30.c: Likewise.
	* aoutf1.h: Likewise.
	* aoutx.h: Likewise.
	* bout.c: Likewise.
	* freebsd.h: Likewise.
	* gen-aout.c: Likewise.
	* hp300hpux.c: Likewise.
	* i386aout.c: Likewise.
	* i386linux.c: Likewise.
	* i386lynx.c: Likewise.
	* i386mach3.c: Likewise.
	* i386os9k.c: Likewise.
	* libaout.h: Likewise.
	* m68klinux.c: Likewise.
	* m88kmach3.c: Likewise.
	* mipsbsd.c: Likewise.
	* netbsd.h: Likewise.
	* pc532-mach.c: Likewise.
	* pdp11.c: Likewise.
	* riscix.c: Likewise.
	* sparclinux.c: Likewise.
	* sparclynx.c: Likewise.
gas/
	* config/aout_gnu.h: Invoke aout N_* macros with pointer to
	struct internal_exec.
include/
	* bout.h: Invoke aout N_* macros with pointer to
	struct internal_exec.
	* os9k.h: Likewise.
include/aout/
	* adobe.h: Invoke aout N_* macros with pointer to
	struct internal_exec.
	* aout64.h: Likewise.
	* dynix3.h: Likewise.
	* encap.h: Likewise.
	* hp.h: Likewise.
	* hp300hpux.h: Likewise.
	* sun4.h: Likewise.
 2015-12-01 13:40:05 +10:30
Alan Modra
b560e2acdd Don't use BFD_TRADITIONAL_FORMAT flag in COFF support 
info->traditional_format is available, or can be easily made
available.  This relegates BFD_TRADITIONAL_FORMAT to AOUT use only.

	* coff-rs6000.c (_bfd_xcoff_put_symbol_name): Replace abfd param
	with info param.  Test info->traditional_format rather than
	BFD_TRADITIONAL_FORMAT flag.
	* coff64-rs6000.c (_bfd_xcoff64_put_symbol_name): Likewise.
	* libxcoff.h (struct xcoff_backend_data_rec): Update
	_xcoff_put_symbol_name prototype.
	(bfd_xcoff_put_symbol_name): Add info param.
	* xcofflink.c (xcoff_find_tc0): Update bfd_xcoff_put_symbol_name call.
	(xcoff_write_global_symbol): Likewise.
	(xcoff_link_input_bfd): Test info->traditional_format rather than
	BFD_TRADITIONAL_FORMAT flag.
	* cofflink.c (_bfd_coff_final_link): Likewise.
	(_bfd_coff_link_input_bfd, _bfd_coff_write_global_sym): Likewise.
 2015-12-01 13:40:04 +10:30
Alan Modra
44c2e68082 SRC-POTFILES.in update 
* po/SRC-POTFILES.in: Regenerate.
 2015-12-01 13:40:01 +10:30
Alan Modra
f26dd30880 Re: ARC port broken reloc processing 
* elf32-arc.c (ARC_ELF_HOWTO): Delete.
	(arc_elf_howto): New function.
	(bfd_elf32_bfd_reloc_type_lookup): Use it in place of existing
	init code.
	(bfd_elf32_bfd_reloc_name_lookup): Use arc_elf_howto.
	(arc_info_to_howto_rel, elf_arc_relocate_section): Likwise.
	(elf_arc_check_relocs): Likewise.
 2015-12-01 13:39:19 +10:30
Alan Modra
0a5ff21b13 ARC port broken reloc processing 
This initialises howto.dst_mask so that relocations in debug sections
are applied by the generic reloc processing used by objdump to display
debug sections.

	* elf32-arc.c (arc_elf_howto_init): Init dst_mask.
 2015-12-01 11:15:02 +10:30
Stefan Teleman
0b1fa2880c Fix a problem with the maximum number of open files held in the cache when running on a 32-bit Solaris host. 
PR ld/19260
	* cache.c (bfd_cache_max_open): Avoid using getrlimit on 32-bit
	Solaris as the result is unreliable.
 2015-11-20 15:28:40 +00:00
Tristan Gingold
9b334a2ccd Fix missing update in previous patch. 
bfd/
	* mach-o-x86-64.c (x86_64_howto_table): Change name here too.
 2015-11-20 15:15:24 +01:00
Tristan Gingold
f075eb5e6b binutils: add support for arm-*-darwin and aarch64-*-darwin. 
Currently only in bfd and binutils.

ChangeLog/
	* configure.ac: Add aarch64-*-darwin* and arm-*-darwin*.
	* configure: Regenerate.

bfd/ChangeLog/
	* targets.c (aarch64_mach_o_vec, arm_mach_o_vec): Declare.
	(_bfd_target_vector): Add new vectors.
	* reloc.c (BFD_RELOC_MACH_O_SUBTRACTOR32)
	(BFD_RELOC_MACH_O_SUBTRACTOR64, BFD_RELOC_MACH_O_ARM64_ADDEND)
	(BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21)
	(BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12)
	(BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT): New relocations.
	(BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32)
	(BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64): Remove.
	* mach-o-x86-64.c (bfd_mach_o_x86_64_swap_reloc_out): Change
	name of subtractor relocations.
	* config.bfd: Handle aarch64-*-darwin*, arm-*-darwin*.
	* Makefile.am (BFD32_BACKENDS): Add mach-o-arm.lo.
	(BFD32_BACKENDS_CFILES): Add mach-o-arm.c.
	(BFD64_BACKENDS): Add mach-o-aarch64.lo.
	(BFD64_BACKENDS_CFILES): Add mach-o-aarch64.c.
	* configure.ac: Handle aarch64_mach_o_vec and arm_mach_o_vec.
	* mach-o-aarch64.c: New file.
	* mach-o-arm.c: New file.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
 2015-11-20 14:53:06 +01:00
David Bridgham
11b8aeb881 Synchronize PDP11 page size between BFD and LD. 
* pdp11.c (TARGET_PAGE_SIZE): Set to 256 to match definition in
	ld/emulparams/pdp11.sh.
 2015-11-20 12:58:16 +00:00
Andreas Krebbel
d47b13e0e2 [S/390] Add null ptr check + port GOTOFF handling from 32 bit over to 64 bit 
bfd/ChangeLog:

2015-11-19  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	PR ld/19263
	* elf32-s390.c (elf_s390_gc_sweep_hook): Add null ptr check.
	* elf64-s390.c (elf_s390_check_relocs): Port the GOTOFF handling
	over from the 32 bit code.
	(elf_s390_relocate_section): Likewise.
 2015-11-19 11:10:06 +01:00
Tristan Gingold
bcb51645d3 mach-o: use a per-target reloc canonicalize function. 
bfd/
	* mach-o.h (bfd_mach_o_swap_in_non_scattered_reloc)
	(bfd_mach_o_canonicalize_non_scattered_reloc)
	(bfd_mach_o_pre_canonicalize_one_reloc): Declare.
	(bfd_mach_o_backend_data): Rename field
	_bfd_mach_o_swap_reloc_in to _bfd_mach_o_canonicalize_one_reloc.
	* mach-o.c (bfd_mach_o_swap_in_non_scattered_reloc): Now public.
	(bfd_mach_o_canonicalize_non_scattered_reloc): Renames from
	bfd_mach_o_canonicalize_one_reloc.
	(bfd_mach_o_pre_canonicalize_one_reloc): New function.
	(bfd_mach_o_canonicalize_relocs): Adjust.
	(bfd_mach_o_canonicalize_relocs): Rename define from
	bfd_mach_o_swap_reloc_in.
	* mach-o-target.c (TARGET_NAME_BACKEND): Use
	bfd_mach_o_canonicalize_one_reloc instead of
	bfd_mach_o_swap_reloc_in.
	* mach-o-i386.c (bfd_mach_o_i386_canonicalize_one_reloc): Renames
	from bfd_mach_o_i386_swap_reloc_in and adjust.
	(bfd_mach_o_canonicalize_one_reloc): Renames from
	bfd_mach_o_i386_canonicalize_one_reloc.
	* mach-o-x86_64.c (bfd_mach_o_x86_64_canonicalize_one_reloc): Renames
	from bfd_mach_o_x86_64_swap_reloc_in and adjust.
	(bfd_mach_o_canonicalize_one_reloc): Renames from
	bfd_mach_o_x86_64_canonicalize_one_reloc.
 2015-11-18 15:47:56 +01:00
Alan Modra
4978e369fb Prevent looping in archives 
PR 19256
	* archive.c (bfd_generic_openr_next_archived_file): Don't allow
	backward file movement via "negative" sizes.
	* coff-alpha.c (alpha_ecoff_openr_next_archived_file): Likewise.
 2015-11-18 22:16:24 +10:30
Tristan Gingold
47daa70fe0 mach-o cleanup: remove useless calls to bfd_seek. 
Also support new commands.

bfd/
	* mach-o.h (struct mach_o_data_struct): Add hdr_offset field.
	(bfd_mach_o_fat_archive_p): Renames prototype.
	(bfd_mach_o_fat_openr_next_archived_file): Renames.
	(bfd_mach_o_header_p): Add argument.
	* mach-o.c (bfd_mach_o_read_header): Add hdr_off argument and
	use it.
	(bfd_mach_o_read_section_32, bfd_mach_o_read_section_64)
	(bfd_mach_o_read_section): Remove offset argument.
	(bfd_mach_o_read_dylinker): Remove bfd_seek call.
	(bfd_mach_o_read_dylib, bfd_mach_o_read_prebound_dylib)
	(bfd_mach_o_read_prebind_cksum, bfd_mach_o_read_twolevel_hints)
	(bfd_mach_o_read_fvmlib, bfd_mach_o_read_dysymtab)
	(bfd_mach_o_read_symtab, bfd_mach_o_read_uuid)
	(bfd_mach_o_read_linkedit, bfd_mach_o_read_str)
	(bfd_mach_o_read_dyld_info, bfd_mach_o_read_version_min)
	(bfd_mach_o_read_encryption_info): Likewise.
	(bfd_mach_o_read_encryption_info_64): New function.
	(bfd_mach_o_read_main, bfd_mach_o_read_source_version)
	(bfd_mach_o_read_segment): Remove call to bfd_seek.
	(bfd_mach_o_read_command): Use hdr_offset in bfd_seek.
	Handle BFD_MACH_O_LC_LINKER_OPTIMIZATION_HINT,
	BFD_MACH_O_LC_ENCRYPTION_INFO_64, BFD_MACH_O_LC_VERSION_MIN_WATCHOS.
	(bfd_mach_o_header_p): Add hdr_off argument.
	(bfd_mach_o_gen_object_p, bfd_mach_o_gen_core_p): Adjust calls.
	(bfd_mach_o_fat_archive_p): Renames.
	(bfd_mach_o_fat_openr_next_archived_file): Renames.
	(bfd_mach_o_close_and_cleanup): Remove useless code.
	(bfd_mach_o_close_and_cleanup): Define.
	* mach-o-x86-64.c (bfd_mach_o_x86_64_object_p)
	(bfd_mach_o_x86_64_core_p): Adjust calls.
	* mach-o-target.c: Move defines for archive from mach-o.c.
	Remove check on TARGET_ARCHIVE.
	* mach-o-i386.c (bfd_mach_o_i386_object_p)
	(bfd_mach_o_i386_core_p): Adjust calls.
 2015-11-18 11:48:56 +01:00
Christophe Lyon
eee926f28e Fix a problematic message with the STM32L4XX fixup on 32-bit hosts. 
* elf32-arm.c (elf32_arm_write_section): Force offset output as
	long (%ld).
 2015-11-17 11:37:14 +00:00
Tristan Gingold
d8bd95efd8 Bump version to 2.26.51 
bfd/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* version.m4: Bump version to 2.26.51
	* configure: Regenerate.

binutils/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

gas/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

gprof/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

ld/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

opcodes/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.
 2015-11-14 16:24:39 -08:00
Marcus Shawcroft
06d2788cef Revert "[LD][AARCH64]Add TLSIE relaxation support under large memory model." 
This reverts commit 3ebe65c0ff.

Reverted due to PR19188
 2015-11-12 15:16:40 +00:00
Peter Bergner
a680de9a98 Add assembler, disassembler and linker support for power9. 
include/opcode/
	* ppc.h (PPC_OPCODE_POWER9): New define.
	(PPC_OPCODE_VSX3): Likewise.

opcodes/
	* ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries.
	Add PPC_OPCODE_VSX3 to the vsx entry.
	(powerpc_init_dialect): Set default dialect to power9.
        * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd,
        insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1,
        extract_l1 insert_xtq6, extract_xtq6): New static functions.
        (insert_esync): Test for illegal L operand value.
	(DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6,
	XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA,
	XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK,
	XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3,
	PPCVSX3): New defines.
	(powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu,
	fcmpo, ftdiv, ftsqrt>: Use XBF_MASK.
	<mcrxr>: Use XBFRARB_MASK.
	<addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq.,
	bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc.,
	cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first,
	cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx,
	lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll,
	lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw,
	modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last,
	rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx,
	stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx,
	subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh,
	vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
	vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd,
	vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d,
	vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx,
	vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq,
	vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd,
	vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait,
	xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp,
	xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp,
	xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz,
	xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp,
	xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp,
	xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo,
	xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo,
	xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo,
	xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp,
	xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp,
	xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp,
	xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw,
	xxinsertw, xxperm, xxpermr, xxspltib>: New instructions.
	<doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9.
	<tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands.

include/elf/
	* ppc.h (R_PPC_REL16DX_HA): New reloction.
	* ppc64.h (R_PPC64_REL16DX_HA): Likewise.

bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
	(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
	(ppc_elf_addr16_ha_reloc): Likewise.
	(ppc_elf_check_relocs): Likewise.
	(ppc_elf_relocate_section): Likewise.
	(is_insn_dq_form): Handle lxv and stxv instructions.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA.
	(ppc64_elf_ha_reloc): Likewise.
	(ppc64_elf_check_relocs): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
	* reloc.c (BFD_RELOC_PPC_REL16DX_HA): New.

elfcpp/
	* powerpc.h (R_POWERPC_REL16DX_HA): Define.

gas/
	* doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9.
	* doc/c-ppc.texi (PowerPC-Opts):  Likewise.
	* config/tc-ppc.c (md_show_usage): Likewise.
	(md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA.
	(md_apply_fix): Likewise.
	(ppc_handle_align): Handle power9's group ending nop.

gas/testsuite/
	* gas/ppc/altivec3.s: New test.
	* gas/ppc/altivec3.d: Likewise.
	* gas/ppc/vsx3.s: Likewise.
	* gas/ppc/vsx3.d: Likewise.
	* gas/ppc/power9.s: Likewise.
	* gas/ppc/power9.d: Likewise.
	* gas/ppc/ppc.exp: Run them.
	* gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests.
	* gas/ppc/power8.d: Likewise.
	* gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ...
	<lxvd2x, stxvd2x>: ...to this.
	* gas/ppc/vsx.d: Likewise.

gold/
	* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
	(Powerpc_relocate_functions::addr16dx_ha): Likewise.
	(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.

ld/testsuite/
	* ld-powerpc/addpcis.d: New test.
	* ld-powerpc/addpcis.s: New test.
	* ld-powerpc/powerpc.exp: Run it.
 2015-11-11 19:52:52 -06:00
H.J. Lu
18954b29a1 Handle x86 VTINHERIT/VTENTRY relocs when deleting relocations 
* elf32-i386.c (elf_i386_relocate_section): Handle VTINHERIT
	and VTENTRY relocations when deleting relocations.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
 2015-11-10 04:27:51 -08:00
H.J. Lu
2d5da47320 Properly move kept relocations when deleting relocations 
* elf32-i386.c (elf_i386_relocate_section): Properly move
	kept relocations when deleting relocations.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
 2015-11-10 00:17:59 -08:00
H.J. Lu
60f2e42e00 Fix performance regression on x86 with ld -r 
Similar fix to "commit c316a17c40e44e8798b34ff84130904f2e7a53de".

	* elf32-i386.c (elf_i386_relocate_section): Use read and write
	pointers to reloc array, rather than memmove when deleting a
	reloc.  Don't use RELOC_AGAINST_DISCARDED_SECTION.  Adjust
	reloc counts at end of loop.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
 2015-11-10 00:00:04 -08:00
Alan Modra
c316a17c40 Fix performance regression due to ld -r memmove 
The idea here is that instead of using memmove to shuffle the relocs
array every time one is deleted, to add a "wrel" pointer and copy from
rel[0] to wrel[0] as we go.

	* elf64-ppc.c (ppc64_elf_relocate_section): Use read and write
	pointers to reloc array, rather than memmove when deleting a
	reloc.  Don't use RELOC_AGAINST_DISCARDED_SECTION.  Adjust
	reloc counts at end of loop.
	* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
 2015-11-10 17:14:41 +10:30
Dominik Vogt
29f628db88 bfd: Fix left shift of negative value. 
This patch fixes all occurences of left-shifting negative constants in C code
which is undefined by the C standard.

bfd/ChangeLog:

        * elf64-ppc.c (ppc64_elf_size_stubs, ppc64_elf_build_stubs): Fix left
        shift of negative value.
        * libbfd.c (safe_read_leb128): Likewise.
        * dwarf2.c (place_sections): Likewise.
        * bfd-in.h (align_power): Likewise.
        * bfd-in2.h (align_power): Likewise.
 2015-11-09 17:12:56 +01:00
Nick Clifton
26f187cd16 Updated (simplified) Chinese translations for ld, bfd, binutils and gold. 
* po/zh_CN.po: Updated (simplified) Chinese translation.
 2015-10-30 12:50:27 +00:00
Catherine Moore
ca9584fb9b 2015-10-29 Catherine Moore <clm@codesourcery.com> 
bfd/
    	* elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output
    	section to bfd_abs_section_ptr if the stub is discarded.

    	ld/testsuite/
    	* ld-mips-elf/mips16-fp-stub-1.s: New.
    	* ld-mips-elf/mips16-fp-stub-2.s: New.
    	* ld-mips-elf/mips16-fp-stub.d: New.
    	* ld-mips-elf/mips-elf.exp: Run new tests.
    	* ld-mips-elf/mips16-intermix.d: Update expected output.

	https://sourceware.org/ml/binutils/2015-10/msg00137.html
 2015-10-29 06:58:16 -07:00
Ed Schouten
a75cf613fd Add support for AArch64 CloudABI binaries. 
ld	* Makefile.am (ALL_64_EMULATION_SOURCES): Add support for
	CloudABI on aarch64. For this target we have to make sure we use
	ELFOSABI_CLOUDABI instead of ELFOSABI_NONE.
	* configure.tgt (targ_emul): Likewise.
	* emulparams/aarch64cloudabi.sh: New file.
	* emulparams/aarch64cloudabib.sh: New file.
	* Makefile.in: Regenerate.

bfd	* config.bfd (targ_defvec): Add support for CloudABI on aarch64.
	For this target we have to make sure we use ELFOSABI_CLOUDABI
	instead of ELFOSABI_NONE.
	* configure.ac (tb): Likewise.
	* elfnn-aarch64.c: Likewise.
	* targets.c (_bfd_target_vector): Likewise.
	* configure: Regenerate.

gas	* config/tc-aarch64.c (elf64_aarch64_target_format): Select the
	cloudabi format if the TARGET_OS is cloudabi.
 2015-10-29 13:49:03 +00:00
Pedro Alves
968bc5cc86 bfd/libhppa.h: Make C++ compatible 
Fixes this when GDB is built in C++ mode:

 In file included from /home/pedro/gdb/mygit/src/gdb/../bfd/som.h:27:0,
		  from /home/pedro/gdb/mygit/src/gdb/somread.c:31:
 /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h: In function ‘int bfd_hppa_insn2fmt(bfd*, int)’:
 /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h:380:42: error: invalid conversion from ‘int’ to ‘hppa_opcode_type’ [-fpermissive]
  #define get_opcode(insn) (((insn) >> 26) & 0x3f)
					   ^
 /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h:465:30: note: in expansion of macro ‘get_opcode’
    enum hppa_opcode_type op = get_opcode (insn);
			       ^

bfd/ChangeLog:
2015-10-29  Pedro Alves  <palves@redhat.com>

	* libhppa.h (bfd_hppa_insn2fmt): Add cast.
 2015-10-29 12:56:27 +00:00