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12314 Commits

Author SHA1 Message Date
Andreas Krebbel
d47b13e0e2 [S/390] Add null ptr check + port GOTOFF handling from 32 bit over to 64 bit 
bfd/ChangeLog:

2015-11-19  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	PR ld/19263
	* elf32-s390.c (elf_s390_gc_sweep_hook): Add null ptr check.
	* elf64-s390.c (elf_s390_check_relocs): Port the GOTOFF handling
	over from the 32 bit code.
	(elf_s390_relocate_section): Likewise.
 2015-11-19 11:10:06 +01:00
GDB Administrator
62aa7be195 Automatic date update in version.in 2015-11-19 00:00:08 +00:00
Tristan Gingold
bcb51645d3 mach-o: use a per-target reloc canonicalize function. 
bfd/
	* mach-o.h (bfd_mach_o_swap_in_non_scattered_reloc)
	(bfd_mach_o_canonicalize_non_scattered_reloc)
	(bfd_mach_o_pre_canonicalize_one_reloc): Declare.
	(bfd_mach_o_backend_data): Rename field
	_bfd_mach_o_swap_reloc_in to _bfd_mach_o_canonicalize_one_reloc.
	* mach-o.c (bfd_mach_o_swap_in_non_scattered_reloc): Now public.
	(bfd_mach_o_canonicalize_non_scattered_reloc): Renames from
	bfd_mach_o_canonicalize_one_reloc.
	(bfd_mach_o_pre_canonicalize_one_reloc): New function.
	(bfd_mach_o_canonicalize_relocs): Adjust.
	(bfd_mach_o_canonicalize_relocs): Rename define from
	bfd_mach_o_swap_reloc_in.
	* mach-o-target.c (TARGET_NAME_BACKEND): Use
	bfd_mach_o_canonicalize_one_reloc instead of
	bfd_mach_o_swap_reloc_in.
	* mach-o-i386.c (bfd_mach_o_i386_canonicalize_one_reloc): Renames
	from bfd_mach_o_i386_swap_reloc_in and adjust.
	(bfd_mach_o_canonicalize_one_reloc): Renames from
	bfd_mach_o_i386_canonicalize_one_reloc.
	* mach-o-x86_64.c (bfd_mach_o_x86_64_canonicalize_one_reloc): Renames
	from bfd_mach_o_x86_64_swap_reloc_in and adjust.
	(bfd_mach_o_canonicalize_one_reloc): Renames from
	bfd_mach_o_x86_64_canonicalize_one_reloc.
 2015-11-18 15:47:56 +01:00
Alan Modra
4978e369fb Prevent looping in archives 
PR 19256
	* archive.c (bfd_generic_openr_next_archived_file): Don't allow
	backward file movement via "negative" sizes.
	* coff-alpha.c (alpha_ecoff_openr_next_archived_file): Likewise.
 2015-11-18 22:16:24 +10:30
Tristan Gingold
47daa70fe0 mach-o cleanup: remove useless calls to bfd_seek. 
Also support new commands.

bfd/
	* mach-o.h (struct mach_o_data_struct): Add hdr_offset field.
	(bfd_mach_o_fat_archive_p): Renames prototype.
	(bfd_mach_o_fat_openr_next_archived_file): Renames.
	(bfd_mach_o_header_p): Add argument.
	* mach-o.c (bfd_mach_o_read_header): Add hdr_off argument and
	use it.
	(bfd_mach_o_read_section_32, bfd_mach_o_read_section_64)
	(bfd_mach_o_read_section): Remove offset argument.
	(bfd_mach_o_read_dylinker): Remove bfd_seek call.
	(bfd_mach_o_read_dylib, bfd_mach_o_read_prebound_dylib)
	(bfd_mach_o_read_prebind_cksum, bfd_mach_o_read_twolevel_hints)
	(bfd_mach_o_read_fvmlib, bfd_mach_o_read_dysymtab)
	(bfd_mach_o_read_symtab, bfd_mach_o_read_uuid)
	(bfd_mach_o_read_linkedit, bfd_mach_o_read_str)
	(bfd_mach_o_read_dyld_info, bfd_mach_o_read_version_min)
	(bfd_mach_o_read_encryption_info): Likewise.
	(bfd_mach_o_read_encryption_info_64): New function.
	(bfd_mach_o_read_main, bfd_mach_o_read_source_version)
	(bfd_mach_o_read_segment): Remove call to bfd_seek.
	(bfd_mach_o_read_command): Use hdr_offset in bfd_seek.
	Handle BFD_MACH_O_LC_LINKER_OPTIMIZATION_HINT,
	BFD_MACH_O_LC_ENCRYPTION_INFO_64, BFD_MACH_O_LC_VERSION_MIN_WATCHOS.
	(bfd_mach_o_header_p): Add hdr_off argument.
	(bfd_mach_o_gen_object_p, bfd_mach_o_gen_core_p): Adjust calls.
	(bfd_mach_o_fat_archive_p): Renames.
	(bfd_mach_o_fat_openr_next_archived_file): Renames.
	(bfd_mach_o_close_and_cleanup): Remove useless code.
	(bfd_mach_o_close_and_cleanup): Define.
	* mach-o-x86-64.c (bfd_mach_o_x86_64_object_p)
	(bfd_mach_o_x86_64_core_p): Adjust calls.
	* mach-o-target.c: Move defines for archive from mach-o.c.
	Remove check on TARGET_ARCHIVE.
	* mach-o-i386.c (bfd_mach_o_i386_object_p)
	(bfd_mach_o_i386_core_p): Adjust calls.
 2015-11-18 11:48:56 +01:00
GDB Administrator
8fd3fe9331 Automatic date update in version.in 2015-11-18 00:00:08 +00:00
Christophe Lyon
eee926f28e Fix a problematic message with the STM32L4XX fixup on 32-bit hosts. 
* elf32-arm.c (elf32_arm_write_section): Force offset output as
	long (%ld).
 2015-11-17 11:37:14 +00:00
GDB Administrator
7ffdbc4f3f Automatic date update in version.in 2015-11-17 00:00:09 +00:00
GDB Administrator
a572cc6fd4 Automatic date update in version.in 2015-11-16 00:00:08 +00:00
Tristan Gingold
d8bd95efd8 Bump version to 2.26.51 
bfd/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* version.m4: Bump version to 2.26.51
	* configure: Regenerate.

binutils/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

gas/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

gprof/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

ld/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

opcodes/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.
 2015-11-14 16:24:39 -08:00
GDB Administrator
79bffa3b90 Automatic date update in version.in 2015-11-15 00:00:08 +00:00
GDB Administrator
895d4275ba Automatic date update in version.in 2015-11-14 00:00:08 +00:00
GDB Administrator
3319bd54ab Automatic date update in version.in 2015-11-13 00:00:07 +00:00
Marcus Shawcroft
06d2788cef Revert "[LD][AARCH64]Add TLSIE relaxation support under large memory model." 
This reverts commit 3ebe65c0ff.

Reverted due to PR19188
 2015-11-12 15:16:40 +00:00
Peter Bergner
a680de9a98 Add assembler, disassembler and linker support for power9. 
include/opcode/
	* ppc.h (PPC_OPCODE_POWER9): New define.
	(PPC_OPCODE_VSX3): Likewise.

opcodes/
	* ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries.
	Add PPC_OPCODE_VSX3 to the vsx entry.
	(powerpc_init_dialect): Set default dialect to power9.
        * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd,
        insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1,
        extract_l1 insert_xtq6, extract_xtq6): New static functions.
        (insert_esync): Test for illegal L operand value.
	(DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6,
	XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA,
	XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK,
	XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3,
	PPCVSX3): New defines.
	(powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu,
	fcmpo, ftdiv, ftsqrt>: Use XBF_MASK.
	<mcrxr>: Use XBFRARB_MASK.
	<addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq.,
	bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc.,
	cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first,
	cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx,
	lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll,
	lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw,
	modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last,
	rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx,
	stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx,
	subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh,
	vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
	vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd,
	vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d,
	vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx,
	vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq,
	vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd,
	vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait,
	xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp,
	xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp,
	xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz,
	xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp,
	xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp,
	xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo,
	xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo,
	xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo,
	xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp,
	xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp,
	xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp,
	xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw,
	xxinsertw, xxperm, xxpermr, xxspltib>: New instructions.
	<doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9.
	<tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands.

include/elf/
	* ppc.h (R_PPC_REL16DX_HA): New reloction.
	* ppc64.h (R_PPC64_REL16DX_HA): Likewise.

bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
	(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
	(ppc_elf_addr16_ha_reloc): Likewise.
	(ppc_elf_check_relocs): Likewise.
	(ppc_elf_relocate_section): Likewise.
	(is_insn_dq_form): Handle lxv and stxv instructions.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA.
	(ppc64_elf_ha_reloc): Likewise.
	(ppc64_elf_check_relocs): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
	* reloc.c (BFD_RELOC_PPC_REL16DX_HA): New.

elfcpp/
	* powerpc.h (R_POWERPC_REL16DX_HA): Define.

gas/
	* doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9.
	* doc/c-ppc.texi (PowerPC-Opts):  Likewise.
	* config/tc-ppc.c (md_show_usage): Likewise.
	(md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA.
	(md_apply_fix): Likewise.
	(ppc_handle_align): Handle power9's group ending nop.

gas/testsuite/
	* gas/ppc/altivec3.s: New test.
	* gas/ppc/altivec3.d: Likewise.
	* gas/ppc/vsx3.s: Likewise.
	* gas/ppc/vsx3.d: Likewise.
	* gas/ppc/power9.s: Likewise.
	* gas/ppc/power9.d: Likewise.
	* gas/ppc/ppc.exp: Run them.
	* gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests.
	* gas/ppc/power8.d: Likewise.
	* gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ...
	<lxvd2x, stxvd2x>: ...to this.
	* gas/ppc/vsx.d: Likewise.

gold/
	* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
	(Powerpc_relocate_functions::addr16dx_ha): Likewise.
	(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.

ld/testsuite/
	* ld-powerpc/addpcis.d: New test.
	* ld-powerpc/addpcis.s: New test.
	* ld-powerpc/powerpc.exp: Run it.
 2015-11-11 19:52:52 -06:00
GDB Administrator
3604307d2f Automatic date update in version.in 2015-11-12 00:00:09 +00:00
GDB Administrator
be20f084f1 Automatic date update in version.in 2015-11-11 00:00:08 +00:00
H.J. Lu
18954b29a1 Handle x86 VTINHERIT/VTENTRY relocs when deleting relocations 
* elf32-i386.c (elf_i386_relocate_section): Handle VTINHERIT
	and VTENTRY relocations when deleting relocations.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
 2015-11-10 04:27:51 -08:00
H.J. Lu
2d5da47320 Properly move kept relocations when deleting relocations 
* elf32-i386.c (elf_i386_relocate_section): Properly move
	kept relocations when deleting relocations.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
 2015-11-10 00:17:59 -08:00
H.J. Lu
60f2e42e00 Fix performance regression on x86 with ld -r 
Similar fix to "commit c316a17c40e44e8798b34ff84130904f2e7a53de".

	* elf32-i386.c (elf_i386_relocate_section): Use read and write
	pointers to reloc array, rather than memmove when deleting a
	reloc.  Don't use RELOC_AGAINST_DISCARDED_SECTION.  Adjust
	reloc counts at end of loop.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
 2015-11-10 00:00:04 -08:00
Alan Modra
c316a17c40 Fix performance regression due to ld -r memmove 
The idea here is that instead of using memmove to shuffle the relocs
array every time one is deleted, to add a "wrel" pointer and copy from
rel[0] to wrel[0] as we go.

	* elf64-ppc.c (ppc64_elf_relocate_section): Use read and write
	pointers to reloc array, rather than memmove when deleting a
	reloc.  Don't use RELOC_AGAINST_DISCARDED_SECTION.  Adjust
	reloc counts at end of loop.
	* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
 2015-11-10 17:14:41 +10:30
GDB Administrator
87d094f308 Automatic date update in version.in 2015-11-10 00:00:09 +00:00
Dominik Vogt
29f628db88 bfd: Fix left shift of negative value. 
This patch fixes all occurences of left-shifting negative constants in C code
which is undefined by the C standard.

bfd/ChangeLog:

        * elf64-ppc.c (ppc64_elf_size_stubs, ppc64_elf_build_stubs): Fix left
        shift of negative value.
        * libbfd.c (safe_read_leb128): Likewise.
        * dwarf2.c (place_sections): Likewise.
        * bfd-in.h (align_power): Likewise.
        * bfd-in2.h (align_power): Likewise.
 2015-11-09 17:12:56 +01:00
GDB Administrator
29960db724 Automatic date update in version.in 2015-11-09 00:00:23 +00:00
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GDB Administrator
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Nick Clifton
26f187cd16 Updated (simplified) Chinese translations for ld, bfd, binutils and gold. 
* po/zh_CN.po: Updated (simplified) Chinese translation.
 2015-10-30 12:50:27 +00:00
GDB Administrator
1b1149fadb Automatic date update in version.in 2015-10-30 00:00:17 +00:00
Catherine Moore
ca9584fb9b 2015-10-29 Catherine Moore <clm@codesourcery.com> 
bfd/
    	* elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output
    	section to bfd_abs_section_ptr if the stub is discarded.

    	ld/testsuite/
    	* ld-mips-elf/mips16-fp-stub-1.s: New.
    	* ld-mips-elf/mips16-fp-stub-2.s: New.
    	* ld-mips-elf/mips16-fp-stub.d: New.
    	* ld-mips-elf/mips-elf.exp: Run new tests.
    	* ld-mips-elf/mips16-intermix.d: Update expected output.

	https://sourceware.org/ml/binutils/2015-10/msg00137.html
 2015-10-29 06:58:16 -07:00
Ed Schouten
a75cf613fd Add support for AArch64 CloudABI binaries. 
ld	* Makefile.am (ALL_64_EMULATION_SOURCES): Add support for
	CloudABI on aarch64. For this target we have to make sure we use
	ELFOSABI_CLOUDABI instead of ELFOSABI_NONE.
	* configure.tgt (targ_emul): Likewise.
	* emulparams/aarch64cloudabi.sh: New file.
	* emulparams/aarch64cloudabib.sh: New file.
	* Makefile.in: Regenerate.

bfd	* config.bfd (targ_defvec): Add support for CloudABI on aarch64.
	For this target we have to make sure we use ELFOSABI_CLOUDABI
	instead of ELFOSABI_NONE.
	* configure.ac (tb): Likewise.
	* elfnn-aarch64.c: Likewise.
	* targets.c (_bfd_target_vector): Likewise.
	* configure: Regenerate.

gas	* config/tc-aarch64.c (elf64_aarch64_target_format): Select the
	cloudabi format if the TARGET_OS is cloudabi.
 2015-10-29 13:49:03 +00:00
Pedro Alves
968bc5cc86 bfd/libhppa.h: Make C++ compatible 
Fixes this when GDB is built in C++ mode:

 In file included from /home/pedro/gdb/mygit/src/gdb/../bfd/som.h:27:0,
		  from /home/pedro/gdb/mygit/src/gdb/somread.c:31:
 /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h: In function ‘int bfd_hppa_insn2fmt(bfd*, int)’:
 /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h:380:42: error: invalid conversion from ‘int’ to ‘hppa_opcode_type’ [-fpermissive]
  #define get_opcode(insn) (((insn) >> 26) & 0x3f)
					   ^
 /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h:465:30: note: in expansion of macro ‘get_opcode’
    enum hppa_opcode_type op = get_opcode (insn);
			       ^

bfd/ChangeLog:
2015-10-29  Pedro Alves  <palves@redhat.com>

	* libhppa.h (bfd_hppa_insn2fmt): Add cast.
 2015-10-29 12:56:27 +00:00
GDB Administrator
5d2b446244 Automatic date update in version.in 2015-10-29 00:00:08 +00:00
H.J. Lu
a3718e9efd Fix a typo in comment in elf32-i386.c 
* elf32-i386.c (elf_i386_relocate_section): Fix a typo in
	comment.
 2015-10-28 09:15:40 -07:00
Nick Clifton
82188b295d Fix recent STM324LXX patch to compile on 32-bit hosts. 
* elf32-arm.c (create_instruction_branch_absolute): Replace
	pointer parameters with a simple integer parameter.
	(stm32l4xx_create_replacing_stub_ldmia): Update calls to
	create_instruction_branch_absolute.
	(stm32l4xx_create_replacing_stub_ldmdb): Likewise.
	(stm32l4xx_create_replacing_stub_vldm): Likewise.
	(elf32_arm_write_section): Use pointer type for veneer addresses.
 2015-10-28 13:52:11 +00:00
Cupertino Miranda
6f4b1afcdc Fix errors in the gas testsuite for the ARC target. 
bfd	* reloc.c (BFD_RELOC_ARC_32_PCREL): New entry.
	(ARC_TLS_DTPOFF): Arrange it in order.
	* elf32-arc.c (arc_elf_howto_ini): Update formula.
	(get_middle_endian_relocation): New function.
	(PDATA): Define.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

elf	* arc-reloc.def (ARC_32_PCREL): New definition.

gas	* config/tc-arc.c (tokenize_arguments): Avoid creating unused
	symbols when parsing relocation types.
	(md_apply_fix): Handle TLS relocations. Fix BFD_RELOC_ARC_32_PCREL
	relocation.
	(arc_check_reloc): Emit BFD_RELOC_ARC_32_PCREL relocation.
 2015-10-28 13:48:00 +00:00
Alan Modra
199af15039 Orphan output section with multiple input sections 
If given input sections with differing flags, we'd like to place the
section according to the final output section flags.

bfd/
	PR ld/19162
	* elflink.c (_bfd_elf_gc_mark_reloc): Move code iterating over
	linker input bfds..
	* section.c (bfd_get_next_section_by_name): ..to here.  Add ibfd param.
	(bfd_get_linker_section): Adjust bfd_get_next_section_by_name call.
	* tekhex.c (first_phase): Likewise.
	* elflink.c (bfd_elf_gc_sections): Likewise.
	* bfd-in2.h: Regenerate.
ld/
	PR ld/19162
	* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Check flags
	before calling _bfd_elf_match_sections_by_type.  Merge flags for
	any other input sections that might match a new output section to
	decide placement.
 2015-10-28 17:51:10 +10:30
GDB Administrator
26656b1dc6 Automatic date update in version.in 2015-10-28 00:00:18 +00:00
Laurent Alfonsi
a504d23a83 Add --fix-stm32l4xx-629360 to the ARM linker to enable a link-time workaround for a bug in the bus matrix / memory controller for some of the STM32 Cortex-M4 based products (STM32L4xx). 
bfd  * bfd-in2.h: Regenerate.
     * bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
     STM32L4XX instruction scanning should be done.
     (bfd_elf32_arm_set_stm32l4xx_fix)
     (bfd_elf32_arm_stm32l4xx_erratum_scan)
     (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes.
     (bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument
     to prototype.
     * elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME)
     (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros.
     (elf32_stm32l4xx_erratum_type): New enum.
     (elf32_stm32l4xx_erratum_list): New struct. List of veneers or
     jumps to veneers.
     (_arm_elf_section_data): Add stm32l4xx_erratumcount,
     stm32l4xx_erratumlist.
     (elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size,
     stm32l4xx_fix and num_stm32l4xx_fixes fields.
     (ctz): New function.
     (popcount): New function.
     (elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix.
     (put_thumb2_insn): New function.
     (STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for
     LDM instructions.
     (STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for
     VLDM instructions.
     (bfd_elf32_arm_allocate_interworking_sections): Initialise erratum
     glue section.
     (record_stm32l4xx_erratum_veneer) : New function. Create a single
     veneer, and its associated symbols.
     (bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue.
     (bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of
     erratum workaround required.
     (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find
     out where veneers and branches to veneers have been placed in
     virtual memory after layout.
     (is_thumb2_ldmia): New function.
     (is_thumb2_ldmdb): Likewise.
     (is_thumb2_vldm ): Likewise.
     (stm32l4xx_need_create_replacing_stub): New function. Decide if a
     veneer must be emitted.
     (bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an
     input BFD for potential erratum-triggering insns. Record results.
     (bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in
     global hash table.
     (elf32_arm_size_dynamic_sections): Collect glue information.
     (create_instruction_branch_absolute): New function.
     (create_instruction_ldmia): Likewise.
     (create_instruction_ldmdb): Likewise.
     (create_instruction_mov): Likewise.
     (create_instruction_sub): Likewise.
     (create_instruction_vldmia): Likewise.
     (create_instruction_vldmdb): Likewise.
     (create_instruction_udf_w): Likewise.
     (create_instruction_udf): Likewise.
     (push_thumb2_insn32): Likewise.
     (push_thumb2_insn16): Likewise.
     (stm32l4xx_fill_stub_udf): Likewise.
     (stm32l4xx_create_replacing_stub_ldmia): New function. Expands the
     replacing stub for ldmia instructions.
     (stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb.
     (stm32l4xx_create_replacing_stub_vldm): Likewise for vldm.
     (stm32l4xx_create_replacing_stub): New function. Dispatches the
     stub emission to the appropriate functions.
     (elf32_arm_write_section): Output veneers, and branches to veneers.

ld   * ld.texinfo: Description of the STM32L4xx erratum workaround.
     * emultempl/armelf.em (stm32l4xx_fix): New.
     (arm_elf_before_allocation): Choose the type of fix, scan for
     erratum.
     (gld${EMULATION_NAME}_finish): Fix veneer locations.
     (arm_elf_create_output_section_statements): Propagate
     stm32l4xx_fix value.
     (PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX.
     (PARSE_AND_LIST_LONGOPTS): Add entry for handling
     --fix-stm32l4xx-629360.
     (PARSE_AND_LIST_OPTION): Add entry for helping on
     --fix-stm32l4xx-629360.
     (PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX.

tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
       tests.
     * ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New.
     * ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise.
     * ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise.
     * ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise.
     * ld-arm/stm32l4xx-fix-all.d: Likewise.
     * ld-arm/stm32l4xx-fix-all.s: Likewise.
     * ld-arm/stm32l4xx-fix-it-block.d: Likewise.
     * ld-arm/stm32l4xx-fix-it-block.s: Likewise.
     * ld-arm/stm32l4xx-fix-ldm.d: Likewise.
     * ld-arm/stm32l4xx-fix-ldm.s: Likewise.
     * ld-arm/stm32l4xx-fix-vldm.d: Likewise.
     * ld-arm/stm32l4xx-fix-vldm.s: Likewise.
 2015-10-27 13:20:33 +00:00
Sangamesh Mallayya
d6867a7559 Add support for 32-bit and 64-bit PowerPC AIX core files. 
* configure.ac (powerpc64-*-aix[5-9].*): Match powerpc64 running
	aix for core file support.
	* configure: Regenerate.
	* rs6000-core.c: Check for __ld_info64 if compiling 64-bit gdb.
	Added BFD64 check if we are using old core file format for 32-bit gdb.
	Set sizeof CORE_COMMONSZ appropriately in case of either new or
	old core file format.
	(read_hdr): Added BFD64 check for 64-bit support.
	(rs6000coff_core_p): Likewise.
	(rs6000coff_core_file_matches_executable_p): Likewise.
	(rs6000coff_core_file_failing_command): Likewise.
	(rs6000coff_core_file_failing_signal): Likewise.
	Add support for debugging core files generated by binaries in
	Large Memory model.
	(rs6000coff_core_p): If Large Memory Model is used, then the .data
	segment should start from BDATAORG which has been defined in the
	system header files.
 2015-10-27 10:30:29 +00:00
GDB Administrator
6780fe1095 Automatic date update in version.in 2015-10-27 00:00:10 +00:00
H.J. Lu
7b7e7f1da2 Check symbol defined by assignment in linker script 
Symbol symbol defined by an assignment in a linker script has type
bfd_link_hash_new.  elf_i386_convert_load and elf_x86_64_convert_load
should check bfd_link_hash_new to see if a symbol is defined by a linker
script.

bfd/

	PR ld/19175
	* elf32-i386.c (elf_i386_convert_load): Check bfd_link_hash_new
	instead of calling bfd_link_get_defined_symbol.
	* elf64-x86-64.c (elf_x86_64_convert_load): Likewise.  Skip
	relocation overflow for bfd_link_hash_new.
	* linker.c (bfd_link_get_defined_symbol): Removed.
	* bfd-in2.h: Regenerated.

ld/testsuite/

	PR ld/19175
	* ld-i386/i386.exp: Run pr19175.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr19175.d: New file.
	* ld-i386/pr19175.s: Likewise.
	* ld-i386/pr19175.t: Likewise.
	* ld-x86-64/pr19175.d: Likewise.
	* ld-x86-64/pr19175.s: Likewise.
	* ld-x86-64/pr19175.t: Likewise.
 2015-10-26 16:32:55 -07:00
H.J. Lu
a6af384b19 Properly convert address load of __start_XXX/__stop_XXX 
Since __start_XXX and __stop_XXX symbols aren't defined when address
load is being converted, we need to check if there is an XXX output
section to get their section and value.  This patch adds a new function,
bfd_link_get_defined_symbol, to search for the XXX output section to
check if __start_XXX and __stop_XXX symbols are defined.

bfd/

	PR ld/19171
	* elf32-i386.c (elf_i386_convert_load): Call
	bfd_link_get_defined_symbol to check if a symbol is defined.
	* elf64-x86-64.c (elf_x86_64_convert_load): Call
	bfd_link_get_defined_symbol to get defined symbol section and
	value.
	* linker.c (bfd_link_get_defined_symbol): New function.
	* bfd-in2.h: Regenerated.

ld/testsuite/

	PR ld/19171
	* ld-i386/lea1.s: Add tests for address load of __start_XXX
	and __stop_XXX.
	* ld-i386/mov1.s: Likewise.
	* ld-x86-64/lea1.s: Likewise.
	* ld-x86-64/mov1.s: Likewise.
	* ld-i386/lea1a.d: Updated.
	* ld-i386/lea1b.d: Likewise.
	* ld-i386/lea1c.d: Likewise.
	* ld-i386/mov1a.d: Likewise.
	* ld-i386/mov1b.d: Likewise.
	* ld-x86-64/lea1a.d: Likewise.
	* ld-x86-64/lea1b.d: Likewise.
	* ld-x86-64/lea1c.d: Likewise.
	* ld-x86-64/lea1d.d: Likewise.
	* ld-x86-64/lea1e.d: Likewise.
	* ld-x86-64/lea1f.d: Likewise.
	* ld-x86-64/mov1a.d: Likewise.
	* ld-x86-64/mov1b.d: Likewise.
	* ld-x86-64/mov1c.d: Likewise.
	* ld-x86-64/mov1d.d: Likewise.
 2015-10-26 08:11:55 -07:00
GDB Administrator
cdfb4fc32d Automatic date update in version.in 2015-10-26 00:00:08 +00:00