Commit Graph

3901 Commits

Author SHA1 Message Date
Andrew Burgess
043f5c63f0 sim: Fix autoreconf errors in sim/ directory
Run autoreconf in sim/ directory and you'll see some errors.  The
problem is that autoreconf (a perl script) does not evaluate the value
passed as an argument to AC_CONFIG_AUX_DIR, so something like:

  AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)

does not do the right thing inside autoreconf, my understanding is
that changing to something like this is fine:

  AC_CONFIG_AUX_DIR(../..)

the generated configure seems to check the value passed, and the value
passed relative to the source directory, so I think we get basically
the same behaviour as before.

sim/testsuite/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/d10v-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/frv-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/m32r-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/mips64el-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.
2020-10-06 11:29:44 +01:00
Andrew Burgess
e163628395 sim/m32r: return register sizes after fetch and store
The m32r simulator currently always returns -1 for the register size
after both a fetch and a store.  In the fetch case GDB is forgiving of
this, but in the store case GDB treats a return value of -1 as an
error.

This commit updates the m32r simulator to return a valid register size
when fetching or storing a register.  This fixes any GDB test that
writes to a register, which will include any GDB test that makes an
inferior call, for example gdb.base/break.exp.

sim/m32r/ChangeLog:

	* m32r.c (m32rbf_register_size): New function.
	(m32rbf_fetch_register): Use new function.
	(m32rbf_store_register): Likewise.
2020-09-18 17:26:07 +01:00
David Faust
3ad6c19423 bpf: simulator: correct div, mod insn semantics
The div and mod eBPF instructions are unsigned, but the semantic
specification for the simulator incorrectly used signed operators.
Correct them to unsigned versions, and correct the ALU tests in
the simulator (which incorrectly assumed signed semantics).

Tested in bpf-unknown-none.

cpu/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* bpf.cpu (define-alu-instructions): Correct semantic operators
	for div, mod to unsigned versions.

sim/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* bpf/sem-be.c: Regenerate.
	* bpf/sem-le.c: Likewise.

sim/testsuite/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* sim/bpf/alu.s: Correct div and mod tests.
	* sim/bpf/alu32.s: Likewise.
2020-09-08 11:39:07 -07:00
Jose E. Marchesi
0316fb52d6 bpf: several small fixes in the simulator
This patch fixes the following problems:
- Missing includes in several files leading to implicit function
  declarations.
- Missing prototype for bpf_trace_printk in bpf-helpers.h
- The simulator bitsize was set to 32 bits, causing truncation of
  the program counter.

Tested in bpf-unknown-none.

sim/ChangeLog:

2020-09-03  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* bpf/bpf.c: Include bpf-helpers.h.
	* bpf/bpf-helpers.h: Provide a prototype for bpf_trace_printk.
	* bpf/configure.ac: Set simulator bitsize to 64.
	* bpf/configure (includedir): Regenerate.
	* bpf/sim-if.c: Include stdlib.h.
	* bpf/traps.c: Likewise.
2020-09-03 18:22:08 +02:00
Jose E. Marchesi
1d01693f55 sim: better handle builds of primary targets lacking sims
When building with a primary target that doesn't feature a simulator,
one would expect for nothing to be done in sim/.  However, a
$(top_builddir)/sim/testsuite directory is created, with a Makefile
containing a rule like:

check-DEJAGNU: site.exp
	echo "Dejagnu-checking in `pwd` directory ..."
	rootme=`pwd`; export rootme; echo rootme = $$rootme; \
	srcdir=`cd ${srcdir}; pwd`; export srcdir ; echo srcdir = $$srcdir; \
	EXPECT=${EXPECT} ; export EXPECT ; echo EXPECT = $$EXPECT; \
	if [ -f $$rootme/../../expect/expect ]; then \
	  TCL_LIBRARY=`cd $$srcdir/../../tcl/library && pwd`; \
	  export TCL_LIBRARY; \
	fi; \
        echo TCL_LIBRARY = $$TCL_LIBRARY; \
	runtest=$(RUNTEST); echo runtest = $$runtest; \
	if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
	  $$runtest $(RUNTESTFLAGS); \
	else echo "WARNING: could not find \`runtest'" 1>&2; :;\
	fi

Consequently, when `make check' recurses into sim/testsuite, the above
rule is executed.  Until now, the desired effect (of doing nothing)
was achieved because `runtest --version' fails due to a malformed
site.exp being generated in objdir: it is malformed because the
primary target doesn't configure a $sim_arch. i.e. this was doing the
right thing just by chance.

However, the git version of dejagnu seems to have changed in a way
runtest doesn't try to load site.exp when it gets --version.  The net
effect is that the rule above tries to actually run the tests, failing
miserably.

This little patch makes sim/configure to not recurse into
sim/testsuite if the primary target didn't configure a simulator.

Tested with:
- A simulator target (bpf-unkonwn-none).
- A simulator-less target (x86_64-linux-gnu).
- A simulator-less target and --build-targets=all.

sim/ChangeLog:

2020-09-03  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure.ac: Do not configure sim/testsuite nor sim/igen if the
	primary target doesn't have a simulator.
	* configure: Regenerate.
2020-09-03 18:21:20 +02:00
Simon Marchi
5798d69f03 sim/bfin: include config/pkg.m4 in configure.ac
When trying to re-generate configure in sim/bfin, I get:

    $ autoreconf -vf
    autoreconf: Entering directory `.'
    autoreconf: configure.ac: not using Gettext
    autoreconf: running: aclocal --force
    autoreconf: configure.ac: tracing
    autoreconf: configure.ac: not running libtoolize: --install not given
    autoreconf: running: /opt/autostuff/bin/autoconf --force
    configure.ac:57: error: possibly undefined macro: AC_CHECK_LIB
          If this token and others are legitimate, please use m4_pattern_allow.
          See the Autoconf documentation.
    autoreconf: /opt/autostuff/bin/autoconf failed with exit status: 1

This happens since commit f693213d12 ("Run `autoreconf -vf` throughout").

The problem (not clear from the error message) is that the
PKG_CHECK_MODULES macro used in configure.ac is undefined.  In the past, I
suppose that it relied on the person running autoconf having pkg.m4 (from
pkg-config) in their include path.  That's not my case.

Since we recently added a local version of PKG_CHECK_MODULES to our tree,
we can just make sim/bfin/configure.ac use it.  This patch makes
configure.ac include config/pkg.m4, and re-generates configure.  With this,
the configure script appears to be generated correctly, I am able to
configure and build the bfin simulator.

Note: using sinclude to include the required m4 files makes no sense to
me.  These files contain macros we need, if they are not defined then
the resulting file is unusable.  And sinclude fails silently if the file
is not found.  So, better use include/m4_include.

sim/bfin/ChangeLog:

	* configure.ac: Include config/pkg.m4.

Change-Id: I7d8012e5ed510cd7746b94e918f0feb1c701cd83
2020-08-21 11:55:08 -04:00
Luis Machado
a5353ae6cf [ARM, sim] Fix build failure with -Werror (PR26365)
There is a bit of a situation in the ARM sim with regards to the handling
of argv. sim_open () gets a const char **argv, but ARM's sim_open gets
clever and decides to modify argv in place via sim_target_parse_command_line.
I'm not sure why.

In any case, here's a fix that makes the code modify a copy of argv instead.

sim/arm/ChangeLog:

2020-08-13  Luis Machado  <luis.machado@linaro.org>

	PR sim/26365

	* wrapper.c (sim_target_parse_command_line): Free discarded argv
	entries.
	(sim_open): Use a duplicate of argv instead of the original argv.
2020-08-13 10:32:52 -03:00
Tom de Vries
b3f8962bdb [sim] Fix mbuild build breaker in sim-cpu.c
When running gdb/gdb_mbuild.sh, I run into:
...
src/sim/aarch64/../common/sim-cpu.c: In function 'sim_cpu_free':
src/sim/aarch64/../common/sim-cpu.c:64:3: error: implicit declaration of \
  function 'free' [-Werror=implicit-function-declaration]
   free (cpu);
   ^~~~
src/sim/aarch64/../common/sim-cpu.c:64:3: error: incompatible implicit \
  declaration of built-in function 'free' [-Werror]
src/sim/aarch64/../common/sim-cpu.c:64:3: note: include '<stdlib.h>' or \
  provide a declaration of 'free'
...

Fix this by adding "#include <stdlib.h>".

Tested by gdb/gdb_mbuild.sh -e aarch64-elf.

sim/common/ChangeLog:

2020-08-10  Tom de Vries  <tdevries@suse.de>

	* sim-cpu.c: Include stdlib.h for free.
2020-08-10 17:26:09 +02:00
Jozef Lawrynowicz
4b48e6d46d MSP430: sim: Increase main memory region size
The area between 0xFF00 and 0xFFC0 is unallocated in the simulator
memory map, so extend the main memory region up to 0xFFC0 to allow the
simulator to make use of the extra 192 bytes of space.

sim/msp430/ChangeLog:

	* msp430-sim.c (sim_open): Increase the size of the main memory region
	to 0xFAC0.
2020-08-07 11:01:22 +01:00
Jozef Lawrynowicz
e8a387fb5f MSP430: sim: Fix incorrect simulation of unsigned widening multiply
Operand sizes used for simulation of MSP430 hardware multiply
operations are not aligned with the sizes used on the target, resulting
in the simulator storing signed operands with too much precision.

Additionally, simulation of unsigned multiplication is missing explicit
casts to prevent any implicit sign extension.

gcc.c-torture/execute/pr91450-1.c uses unsigned widening multiplication
of 32-bit operands -4 and 2, to produce a 64-bit result:
0xffff fffc * 0x2 = 0x1 ffff fff8

If -4 is stored in 64-bit precision, then the multiplication is
essentially signed and the result is -8 in 64-bit precision
(0xffff ffff ffff fffc), which is not correct.

sim/msp430/ChangeLog:

	* msp430-sim.c (put_op): For unsigned multiplication, explicitly cast
	operands to the unsigned type before multiplying.
	* msp430-sim.h (struct msp430_cpu_state): Fix types used to store hwmult
	operands.

sim/testsuite/sim/msp430/ChangeLog:

	* mpyull_hwmult.s: New test.
2020-08-05 15:02:30 +01:00
Jose E. Marchesi
8c4c18181e sim: generated files for the eBPF simulator
This patch adds the CGEN generated files for the eBPF simulator.

sim/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
	    David Faust <david.faust@oracle.com>

	* bpf/arch.c: Likewise.
	* bpf/arch.h: Likewise.
	* bpf/cpu.c: Likewise.
	* bpf/cpu.h: Likewise.
	* bpf/cpuall.h: Likewise.
	* bpf/decode-be.c: Likewise.
	* bpf/decode-be.h: Likewise.
	* bpf/decode-le.c: Likewise.
	* bpf/decode-le.h: Likewise.
	* bpf/defs-be.h: Likewise.
	* bpf/defs-le.h: Likewise.
	* bpf/sem-be.c: Likewise.
	* bpf/sem-le.c: Likewise.
2020-08-04 18:11:31 +02:00
Jose E. Marchesi
b26e2ae7d3 sim: eBPF simulator
This patch introduces the basics of an instruction-simulator for eBPF.
The simulator is based on CGEN.

gdb/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure.tgt: Set gdb_sim for bpf-*-* targets.

sim/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
	    David Faust <david.faust@oracle.com>

	* configure.tgt (sim_arch): Add entry for bpf-*-*.
	* configure: Regenerate.
	* MAINTAINERS: Add maintainer for the BPF simulator.
	* bpf/Makefile.in: New file.
	* bpf/bpf-helpers.c: Likewise.
	* bpf/bpf-helpers.def: Likewise.
	* bpf/bpf-helpers.h: Likewise.
	* bpf/bpf-sim.h: Likewise.
	* bpf/bpf.c: Likewise.
	* bpf/config.in: Likewise.
	* bpf/configure.ac: Likewise.
	* bpf/decode.h: Likewise.
	* bpf/eng.h: Likewise.
	* bpf/mloop.in: Likewise.
	* bpf/sim-if.c: Likewise.
	* bpf/sim-main.h: Likewise.
	* bpf/traps.c: Likewise.
	* bpf/configure: Generate.
	* bpf/aclocal.m4: Likewise.

sim/testsuite/ChangeLog:

2020-08-04  David Faust  <david.faust@oracle.com>
	    Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure: Regenerate.
	* sim/bpf/allinsn.exp: New file.
	* sim/bpf/alu.s: Likewise.
	* sim/bpf/alu32.s: Likewise.
	* sim/bpf/endbe.s: Likewise.
	* sim/bpf/endle.s: Likewise.
	* sim/bpf/jmp.s: Likewise.
	* sim/bpf/jmp32.s: Likewise.
	* sim/bpf/ldabs.s: Likewise.
	* sim/bpf/mem.s: Likewise.
	* sim/bpf/mov.s: Likewise.
	* sim/bpf/testutils.inc: Likewise.
	* sim/bpf/xadd.s: Likewise.
2020-08-04 18:09:16 +02:00
Simon Marchi
f693213d12 Run autoreconf -vf throughout
I ran

    for i in $(find . -name configure.ac); do pushd $(dirname $i); autoreconf -vf; popd; done

to re-generate all automake/autoconf files throughout the repo (with
upstream autoconf 2.69 and automake 1.15.1).  These were the changes
that came out.  I am pushing this as obvious.

libdecnumber/ChangeLog:

	* aclocal.m4, configure: Re-generate.

sim/bfin/ChangeLog:

	* aclocal.m4, configure: Re-generate.

sim/erc32/ChangeLog:

	* configure: Re-generate.

sim/mips/ChangeLog:

	* configure: Re-generate.

sim/testsuite/ChangeLog:

	* configure: Re-generate.

Change-Id: I97335c09972d25cc5f6fd8da4db4ffe4a0348787
2020-07-29 16:03:55 -04:00
Sebastian Huber
c4df5bbeb8 sim/igen: Fix linker error with -fno-common
GCC 10 enables -fno-common by default.  This resulted in multiple
definition linker errors since a global variable was declared and
defined in a header file:

  ld: libsim.a(idecode.o):sim/v850/idecode.h:71: multiple definition of
  `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first defined
  here

  ld: libsim.a(engine.o):sim/v850/idecode.h:71: multiple definition of
  `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first defined
  here

  ld: libsim.a(support.o):sim/v850/idecode.h:71: multiple definition of
  `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first defined
  here

  ld: libsim.a(semantics.o):sim/v850/idecode.h:71: multiple definition
  of `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first
  defined here

sim/igen

	PR sim/26194

	* lf.h (lf_get_file_type): Declare.
	* lf.c (lf_get_file_type): Define.
	* gen-idecode.c (print_idecode_issue_function_header): Use
	lf_get_file_type() to issue an extern variable declaration in
	case of header files.
2020-07-03 21:03:47 +02:00
Sebastian Huber
ad8464f799 sim/ppc: Fix linker error with -fno-common
GCC 10 enables -fno-common by default.  This resulted in a multiple
definition linker error since global variables were declared and defined
in a header file:

  ld: ld-insn.o:sim/ppc/ld-insn.h:221: multiple definition of
  `max_model_fields_len'; igen.o:sim/ppc/ld-insn.h:221: first defined here

sim/ppc

	* ld-insn.h (last_model, last_model_data, last_model_function,
	last_model_internal, last_model_macro, last_model_static):
	Delete.
	(max_model_fields_len, model_data, model_functions,
	model_internal, model_macros, model_static, models): Declare, but do not
	define.
	* ld-insn.c (last_model, last_model_data, last_model_function,
	last_model_internal, last_model_macro, last_model_static,
	max_model_fields_len, model_data, model_functions,
	model_internal, model_macros, model_static, models): Define.
2020-07-03 18:47:40 +02:00
Kamil Rytarowski
7a20f753ef sim: ppc: netbsd: Sync signal names with NetBSD 9.99.49
sim/ppc/ChangeLog:

	* emul_netbsd.c (netbsd_signal_names): Sync with NetBSD 9.99.49.
2020-03-12 16:07:37 +01:00
Kamil Rytarowski
607c693210 sim: ppc: netbsd: Sync errno codes with NetBSD 9.99.49
sim/ppc/ChangeLog:

	* emul_netbsd.c (netbsd_error_names): Sync with NetBSD 9.99.49.
2020-03-12 16:07:37 +01:00
Carlo Bramini
69b1ffdb01 sim/aarch64: Fix register ordering bug in blr (PR sim/25318)
A comment in the implementation of blr says:

  /* The pseudo code in the spec says we update LR before fetching.
     the value from the rn.  */

With 'rn' being the register holding the destination address.

This may have been true at one point, but the ISA manual now clearly
shows the destination register being read before the link register is
written.

This commit updates the implementation of blr to match.

sim/aarch64/ChangeLog:

	PR sim/25318
	* simulator.c (blr): Read destination register before calling
	aarch64_save_LR.

Change-Id: Icb1c556064e3d9c807ac28440475caa205ab1064
2020-02-06 22:50:26 +00:00
Jozef Lawrynowicz
b7dcc42dfd MSP430: Fix simulator execution of RRUX instruction
The MSP430X RRUX instruction (unsigned right shift) is synthesized as
the RRC (rotate right through carry) instruction, but with the ZC
(zero carry) bit of the opcode extention word set.

Ensure the carry flag is ignored when the ZC bit is set.

sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* msp430-sim.c (msp430_step_once): Ignore the carry flag when executing
	an RRC instruction, if the ZC bit of the extension word is set.

sim/testsuite/sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* rrux.s: New test.
2020-01-22 21:52:29 +00:00
Simon Marchi
b760fb3a1c sim: add some stdlib.h includes
When trying to compile GDB with --target=avr, with gcc 9.2.0, I am
getting a bunch of:

    /home/simark/src/binutils-gdb/sim/avr/../common/nrun.c:94:7: error: implicit declaration of function ‘abort’ [-Werror=implicit-function-declaration]
       94 |       abort ();
          |       ^~~~~
    /home/simark/src/binutils-gdb/sim/avr/../common/nrun.c:94:7: error: incompatible implicit declaration of built-in function ‘abort’ [-Werror]
    /home/simark/src/binutils-gdb/sim/avr/../common/nrun.c:94:7: note: include ‘<stdlib.h>’ or provide a declaration of ‘abort’

I did what the compiler told me and added the relevant includes in the
problematic files.

sim/common/ChangeLog:

	* nrun.c: Include stdlib.h.
	* sim-core.c: Likewise.
	* sim-engine.c: Likewise.
	* sim-io.c: Likewise.
	* sim-module.c: Likewise.
	* sim-reason.c: Likewise.
2020-01-19 19:48:16 -05:00
Christian Biesinger
07f1f3aa53 Fix spelling errors
seperate -> separate

bfd/ChangeLog:

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* coff-arm.c: Fix spelling error (seperate).
	* elfxx-riscv.c (riscv_parse_sv_or_non_std_ext): Fix spelling
	error (seperate).
	* sysdep.h (strnlen): Fix spelling error (seperate).

opcodes/ChangeLog:

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* opintl.h: Fix spelling error (seperate).

sim/arm/ChangeLog:

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* iwmmxt.c: Fix spelling error (seperate).

Change-Id: I55e5f47bcf3cf3533d2acb7ad338f1be0d5f30f9
2020-01-17 12:34:03 -06:00
Joel Brobecker
b811d2c292 Update copyright year range in all GDB files.
gdb/ChangeLog:

        Update copyright year range in all GDB files.
2020-01-01 10:20:53 +04:00
Tom Tromey
78aa740b76 Add install-strip to sim/
PR build/24572 notes that "make install-strip" fails.  For me, it
works in every directory except "sim", so this patch adds
install-strip targets to the Makefiles that appear there.

sim/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/common/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/igen/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/ppc/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/testsuite/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

Change-Id: I76613bc5c7e7812284f33826f8a5d914477fcdc5
2019-12-19 11:28:53 -07:00
Anthony Green
fb46334198 Add unlink support to moxie simulator
This change adds support for the unlink system call, which is
required by the GCC testsuite.  It also switches read/write/open
system calls to use the sim_io_* functions.

2019-12-14  Anthony Green  <green@moxielogic.com>

	* interp.c (sim_engine_run): Make use of sim_io_* functions for
	read/write/open system calls.  Implement the unlink system call.
2019-12-14 05:33:39 -05:00
Luis Machado
851c0536ca [ARM, sim] Fix build error and warnings
Newer GCC's have switched to -fno-common by default, and this breaks the build
for the ARM sim, like this:

binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:65: multiple definition of `DSPsc'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:134: first defined here
binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:64: multiple definition of `DSPacc'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:133: first defined here
binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:63: multiple definition of `DSPregs'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:132: first defined here

I also noticed a few warnings due to mismatching types, as follows:

../../../../repos/binutils-gdb/sim/arm/wrapper.c: In function ‘sim_create_inferior’:
../../../../repos/binutils-gdb/sim/arm/wrapper.c:335:16: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
       for (arg = argv; *arg != NULL; arg++)
                ^
../../../../repos/binutils-gdb/sim/arm/wrapper.c:342:8: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
    arg = argv;
        ^
../../../../repos/binutils-gdb/sim/arm/wrapper.c:345:13: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
    for (arg = argv; *arg != NULL; arg++)
             ^
The following patch fixes both of the above.

sim/arm/ChangeLog:

2019-12-06  Luis Machado  <luis.machado@linaro.org>

	* armemu.c (isize): Move this declaration ...
	* arminit.c (isize): ... here.
	* maverick.h: New file.
	* wrapper.c: Include "maverick.h".
	(<struct maverick_regs>, <union maverick_acc_regs>): Remove and update
	comment.
	(sim_create_inferior): Cast variables to proper type.
	* maverick.c: Include "maverick.h".
	(<struct maverick_regs>, <union maverick_acc_regs>): Move
	declarations to maverick.h and update comment.
	(DSPsc, DSPacc, DSPregs): Adjust comment.

Change-Id: I21db699d3b61b2de8c44053e47be4387285af28f
2019-12-06 18:16:20 -03:00
Pavel I. Kryukov
f47674be8e sim-utils.c: prevent buffer overflow.
Representation of max 32-bit integer is 10 chars.
The potential issue is observed by GCC 7 targeted to AArch64.

sim/common/ChangeLog:
2019-12-01  Pavel I. Kryukov  <kryukov@frtk.ru>

	* sim-utils.c: Prevent buffer overflow.
2019-12-04 10:38:08 -07:00
Dimitar Dimitrov
e2e9097bd2 Add testsuite for the PRU simulator port
sim/testsuite/ChangeLog:

	* configure: Regenerate.

sim/testsuite/sim/pru/ChangeLog:

	* add.s: New test.
	* allinsn.exp: New file.
	* dmem-zero-pass.s: New test.
	* dmem-zero-trap.s: New test.
	* dram.s: New test.
	* jmp.s: New test.
	* loop-imm.s: New test.
	* loop-reg.s: New test.
	* mul.s: New test.
	* subreg.s: New test.
	* testutils.inc: New file.
2019-09-23 22:11:16 +01:00
Dimitar Dimitrov
ddd44b7053 sim: Add PRU simulator port
A simulator port for the TI PRU I/O processor.

v1: https://sourceware.org/ml/gdb-patches/2016-12/msg00143.html
v2: https://sourceware.org/ml/gdb-patches/2017-02/msg00397.html
v3: https://sourceware.org/ml/gdb-patches/2017-02/msg00516.html
v4: https://sourceware.org/ml/gdb-patches/2018-06/msg00484.html
v5: https://sourceware.org/ml/gdb-patches/2019-08/msg00584.html
v6: https://sourceware.org/ml/gdb-patches/2019-09/msg00036.html

gdb/ChangeLog:

	* NEWS: Mention new simulator port for PRU.

sim/ChangeLog:

	* MAINTAINERS: Add myself as PRU maintainer.
	* configure: Regenerated.
	* configure.tgt: Add PRU.

sim/common/ChangeLog:

	* gennltvals.sh: Add PRU libgloss target.
	* nltvals.def: Regenerate from the latest libgloss sources.

sim/pru/ChangeLog:

	* Makefile.in: New file.
	* aclocal.m4: Regenerated.
	* config.in: Regenerated.
	* configure: Regenerated.
	* configure.ac: New file.
	* interp.c: New file.
	* pru.h: New file.
	* pru.isa: New file.
	* sim-main.h: New file.
2019-09-23 22:11:02 +01:00
Alan Modra
00f93c4492 bfd macro conversion to inline functions
This converts some of the macros that access struct bfd fields to
inline functions.

bfd/
	* archive.c (bfd_generic_archive_p): Use bfd_set_thin_archive.
	* bfd-in.h (bfd_get_filename, bfd_get_cacheable, bfd_get_format),
	(bfd_get_target, bfd_get_flavour, bfd_family_coff, bfd_big_endian),
	(bfd_little_endian, bfd_header_big_endian, bfd_header_little_endian),
	(bfd_get_file_flags, bfd_applicable_file_flags),
	(bfd_applicable_section_flags, bfd_has_map, bfd_is_thin_archive),
	(bfd_valid_reloc_types, bfd_usrdata, bfd_get_start_address),
	(bfd_get_symcount, bfd_get_outsymbols, bfd_count_sections),
	(bfd_get_dynamic_symcount, bfd_get_symbol_leading_char): Delete.
	* bfd/bfd.c (bfd_get_filename, bfd_get_cacheable, bfd_get_format),
	(bfd_get_file_flags, bfd_get_start_address, bfd_get_symcount),
	(bfd_get_dynamic_symcount, bfd_get_outsymbols, bfd_count_sections),
	(bfd_has_map, bfd_is_thin_archive, bfd_set_thin_archive),
	(bfd_usrdata, bfd_set_usrdata): New inline functions.
	* targets.c (bfd_get_target, bfd_get_flavour),
	(bfd_applicable_file_flags, bfd_family_coff, bfd_big_endian),
	(bfd_little_endian, bfd_header_big_endian),
	(bfd_header_little_endian, bfd_applicable_section_flags),
	(bfd_get_symbol_leading_char): New inline functions.
	* bfd-in2.h: Regenerate.
binutils/
	* ar.c (write_archive): Use bfd_set_thin_archive.
gdb/
	* gdb_bfd.c (gdb_bfd_ref, gdb_bfd_unref): Use bfd_set_usrdata.
	* dwarf2read.c (dwarf2_read_gdb_index, dwarf2_read_debug_names),
	(read_indirect_string_from_dwz): Use bfd accessor.
	* dwarf2read.h (struct dwz_file <filename>): Likewise.
	* machoread.c (macho_symfile_read_all_oso): Likewise.
	* solib.c (solib_bfd_open): Likewise.
ld/
	* ldelf.c (ldelf_after_open, ldelf_place_orphan
	* ldlang.c (walk_wild_file, lang_process): Use bfd_usrdata.
	(load_symbols, ldlang_add_file): Use bfd_set_usrdata.
	* ldmain.c (add_archive_element): Use bfd_usrdata.
	* ldlang.h (bfd_input_just_syms): New inline function.
	* emultempl/aarch64elf.em (build_section_lists): Use it.
	* emultempl/mmo.em (mmo_place_orphan): Likewise.
	* emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
	* emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
	* emultempl/ppc64elf.em (build_section_lists): Likewise.
sim/
	* ppc/emul_generic.c (emul_add_tree_options): Delete old bfd code.
2019-09-20 18:04:02 +09:30
Alan Modra
fd3619828e bfd_section_* macros
This large patch removes the unnecessary bfd parameter from various
bfd section macros and functions.  The bfd is hardly ever used and if
needed for the bfd_set_section_* or bfd_rename_section functions can
be found via section->owner except for the com, und, abs, and ind
std_section special sections.  Those sections shouldn't be modified
anyway.

The patch also removes various bfd_get_section_<field> macros,
replacing their use with bfd_section_<field>, and adds
bfd_set_section_lma.  I've also fixed a minor bug in gas where
compressed section renaming was done directly rather than calling
bfd_rename_section.  This would have broken bfd_get_section_by_name
and similar functions, but that hardly mattered at such a late stage
in gas processing.

bfd/
	* bfd-in.h (bfd_get_section_name, bfd_get_section_vma),
	(bfd_get_section_lma, bfd_get_section_alignment),
	(bfd_get_section_size, bfd_get_section_flags),
	(bfd_get_section_userdata): Delete.
	(bfd_section_name, bfd_section_size, bfd_section_vma),
	(bfd_section_lma, bfd_section_alignment): Lose bfd parameter.
	(bfd_section_flags, bfd_section_userdata): New.
	(bfd_is_com_section): Rename parameter.
	* section.c (bfd_set_section_userdata, bfd_set_section_vma),
	(bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section),
	(bfd_set_section_size): Delete bfd parameter, rename section parameter.
	(bfd_set_section_lma): New.
	* bfd-in2.h: Regenerate.
	* mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param,
	update callers.
	* aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c,
	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
	* compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h,
	* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c,
	* elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c,
	* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
	* elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c,
	* elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c,
	* elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c,
	* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
	* elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c,
	* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
	* elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c,
	* elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c,
	* elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c,
	* elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c,
	* elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
	* elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c,
	* elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c,
	* elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c,
	* elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c,
	* elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c,
	* mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c,
	* peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c,
	* xcofflink.c: Update throughout for bfd section macro and function
	changes.
binutils/
	* addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c,
	* objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c,
	* od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c,
	* resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update
	throughout for bfd section macro and function changes.
gas/
	* as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c,
	* read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c,
	* config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c,
	* config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c,
	* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
	* config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c,
	* config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c,
	* config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c,
	* config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c,
	* config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c,
	* config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c,
	* config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c,
	* config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c,
	* config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c,
	* config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c,
	* config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c,
	* config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c,
	* config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c,
	* config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c,
	* config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c,
	* config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c,
	* config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c,
	* config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for
	bfd section macro and function changes.
	* write.c (compress_debug): Use bfd_rename_section.
gdb/
	* aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c,
	* coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c,
	* dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c,
	* exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h,
	* hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c,
	* i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c,
	* maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c,
	* mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c,
	* objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c,
	* ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c,
	* rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c,
	* s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c,
	* solib-spu.c, * solib-svr4.c, * solib-target.c,
	* spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c,
	* symmisc.c, * symtab.c, * target.c, * windows-nat.c,
	* xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c,
	* mi/mi-interp.c: Update throughout for bfd section macro and
	function changes.
	* gcore (gcore_create_callback): Use bfd_set_section_lma.
	* spu-tdep.c (spu_overlay_new_objfile): Likewise.
gprof/
	* corefile.c, * symtab.c: Update throughout for bfd section
	macro and function changes.
ld/
	* ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c,
	* emultempl/aarch64elf.em, * emultempl/aix.em,
	* emultempl/armcoff.em, * emultempl/armelf.em,
	* emultempl/cr16elf.em, * emultempl/cskyelf.em,
	* emultempl/m68hc1xelf.em, * emultempl/m68kelf.em,
	* emultempl/mipself.em, * emultempl/mmix-elfnmmo.em,
	* emultempl/mmo.em, * emultempl/msp430.em,
	* emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em,
	* emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update
	throughout for bfd section macro and function changes.
libctf/
	* ctf-open-bfd.c: Update throughout for bfd section macro changes.
opcodes/
	* arc-ext.c: Update throughout for bfd section macro changes.
sim/
	* common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c,
	* erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c,
	* m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c,
	* rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c,
	* rx/trace.c: Update throughout for bfd section macro changes.
2019-09-19 09:40:13 +09:30
Alan Modra
b16c44debc bfd_get_filename
This macro says:
/* Cast from const char * to char * so that caller can assign to
   a char * without a warning.  */

I reckon that isn't such a good idea since it can result in char*
variables where const char* is appropriate.  Not very many places
need the char* cast.

bfd/
	* aout-target.h (object_p): Formatting.
	* bfd-in.h (bfd_get_filename): Don't cast to char*.
	* corefile.c (generic_core_file_matches_executable_p): Constify
	variables and remove cast.
	* bfd-in2.h: Regenerate.
binutils/
	* nm.c (print_object_filename_bsd, print_object_filename_sysv),
	(print_object_filename_posix, print_archive_filename_bsd),
	(print_archive_filename_sysv, print_archive_filename_posix),
	(print_archive_member_bsd, print_archive_member_sysv),
	(print_archive_member_posix): Constify parameter.
	(struct output_fns <print_object_filename, print_archive_filename>),
	(<print_archive_member>): Likewise.
	* objcopy.c (copy_archive): Add cast for make_tempdir.
ld/
	* emultempl/elf32.em (gld${EMULATION_NAME}_search_needed): Constify
	variable.
	* emultempl/pe.em (gld_${EMULATION_NAME}_after_open): Likewise.
	* emultempl/pep.em (gld_${EMULATION_NAME}_after_open): Likewise.
gdb/
	* coffread.c (coff_symfile_read): Constify filename variable.
	* dbxread.c (dbx_symfile_init, coffstab_build_psymtabs),
	(elfstab_build_psymtabs, stabsect_build_psymtabs): Likewise.
	* gdb_bfd.c (gdb_bfd_close_or_warn): Likewise.
	* solib.c (reload_shared_libraries_1): Likewise.
	* symfile.c (reread_symbols): Likewise.
	* solib-aix.c (solib_aix_bfd_open): Add cast for xfree of filename.
	* solib-darwin.c (darwin_bfd_open): Likewise.
	* symfile-mem.c (symbol_file_add_from_memory): Likewise.
sim/cris/
	* sim-if.c (sim_open): Constify filename variable.
2019-09-06 12:22:59 +09:30
Stafford Horne
57a63d27dc sim/testsuite/or1k: Add tests for unordered compares
Add tests for 32-bit and 64-bit unordered compare instructions.

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* fpu-unordered.S: New file.
	* fpu64a32-unordered.S: New file.
2019-06-13 21:27:10 +09:00
Stafford Horne
3c83b496d4 sim/testsuite/or1k: Add test case for l.adrp instruction
This is a simple test to ensure that the l.adrp instruction can be assembled and
simulated correctly.

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* adrp.S: New file.
2019-06-13 21:27:10 +09:00
Stafford Horne
b4f9e00346 sim/testsuite/or1k: Add test for 64-bit fpu operations
This is a very basic test but it ensure the machine is wired up
correctly and that the assembler works.

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* fpu64a32.S: New file.
2019-06-13 21:27:10 +09:00
Stafford Horne
f1cc84f594 sim/common: wire up new unordered comparisons
Define and wire up unordered floating point comparison operations for cgen
targets.  This patch depends on my posted cgen patches[0].

[0] https://www.sourceware.org/ml/cgen/2019-q2/msg00013.html

sim/common/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* cgen-accfp.c (unorderedsf, unordereddf): New functions.
	(cgen_init_accurate_fpu): Wire up unorderedsf and unordereddf.
	* cgen-fpu.h (cgen_fp_ops): Define fields unorderedsf and unordereddf.
2019-06-13 21:27:10 +09:00
Stafford Horne
688cea90bc sim/common: Wire in df/di conversion
Up until now these have not been used in any CGEN targets, add them as
they are now used by OpenRISC.

sim/common/ChangeLog:

	* cgen-accfp.c (floatdidf, fixdfdi): New functions.
	(cgen_init_accurate_fpu): Add floatdidf and fixdfdi.
2019-06-13 21:27:10 +09:00
Stafford Horne
7ccbb4437a sim/or1k: Regenerate sim
This picks up changes for:

 - new orfpx64a32 spec
 - new unordered instructions
 - documentation and symbol updates

sim/ChangeLog:

	* or1k/cpu.c: Regenerate.
	* or1k/cpu.h: Regenerate.
	* or1k/decode.c: Regenerate.
	* or1k/decode.h: Regenerate.
	* or1k/model.c: Regenerate.
	* or1k/sem-switch.c: Regenerate.
	* or1k/sem.c: Regenerate.
2019-06-13 21:27:09 +09:00
Andrew Burgess
798066abd8 sim: Use host not target byte order for merging and splitting values
When using writes to memory through a struct to merge and extract
multi-word value, it is the endianness of the host, not the target
that affects which order the component words need to be written into
the structure.

Of the 5 functions adjusted here 4 of them are unused.  The 5th,
JOINSIDF will soon be used by the or1k target.

For or1k, simulated on x86-64, this change fixes this function so that
the correct bytes are now returned.

sim/common/ChangeLog:

	* cgen-ops.h (SUBWORDXFSI): Compare HOST_BYTE_ORDER not
	CURRENT_TARGET_BYTE_ORDER.
	(SUBWORDTFSI): Likewise.
	(JOINSIDF): Likewise.
	(JOINSIXF): Likewise.
	(JOINSITF): Likewise.
2019-04-13 22:21:14 +01:00
Andrew Burgess
d3fe0d7bb8 sim: fix all sim builds
This commit:

  commit ef9866970c
  Date:   Thu Mar 28 06:40:30 2019 +0900

      sim/common: convert sim-arange to use sim-inline

broke many simulator targets.  I fixed aarch64 in a previous commit
without realising how many other target were also broken.

This commit adds the missing includes (sim-assert.h and libiberty.h),
which seem to be needed by many simulator targets, in a central
location, this should fix most builds.

sim/common/ChangeLog:

	* sim-base.h: Add 'sim-assert.h' include.
	* sim-basics.h: Add 'libiberty.h' include.
2019-03-28 22:33:29 +00:00
Andrew Burgess
cd5b607419 sim: fix aarch64 sim build
This commit:

  commit ef9866970c
  Date:   Thu Mar 28 06:40:30 2019 +0900

      sim/common: convert sim-arange to use sim-inline

Broke the simulator build for aarch64 - some required macros are no
longer included where needed, fixed in this commit.

sim/aarch64/ChangeLog:

	* cpustate.c: Add 'libiberty.h' include.
	* interp.c: Add 'sim-assert.h' include.
2019-03-28 13:46:09 +00:00
Stafford Horne
b6061d4d38 sim/common: Fix warnings: "warning: implicit declaration of function..."
During building of several cgen simulator's I notices the below
warnings.  Adding includes fixes these.

Including config.h allows stdio.h to properly configure itself to expose
asprintf().

The other warnings for abort, free, memset, strlen are trivial.

Warnings:

../../../binutils-gdb/sim/or1k/../common/sim-watch.c: In function ‘sim_watchpoint_install’:
../../../binutils-gdb/sim/or1k/../common/sim-watch.c:415:10: warning: implicit declaration of function ‘asprintf’; did you mean ‘vasprintf’? [-Wimplicit-function-declaration]
      if (asprintf (&name, "watch-%s-%s",
          ^~~~~~~~
          vasprintf

../../../binutils-gdb/sim/lm32/../common/hw-device.c: In function ‘hw_strdup’:
../../../binutils-gdb/sim/lm32/../common/hw-device.c:59:34: warning: implicit declaration of function ‘strlen’ [-Wimplicit-function-declaration]
       char *dup = hw_zalloc (me, strlen (str) + 1);
                                  ^~~~~~

../../../binutils-gdb/sim/lm32/../common/hw-events.c: In function ‘hw_event_queue_schedule’:
../../../binutils-gdb/sim/lm32/../common/hw-events.c:92:3: warning: implicit declaration of function ‘memset’ [-Wimplicit-function-declaration]
   memset (&dummy, 0, sizeof dummy);
   ^~~~~~

../../../binutils-gdb/sim/lm32/../common/hw-handles.c: In function ‘hw_handle_remove_ihandle’:
../../../binutils-gdb/sim/lm32/../common/hw-handles.c:211:4: warning: implicit declaration of function ‘free’ [-Wimplicit-function-declaration]
    free (delete);
    ^~~~

../../../binutils-gdb/sim/lm32/../common/sim-fpu.c: In function ‘pack_fpu’:
../../../binutils-gdb/sim/lm32/../common/sim-fpu.c:292:7: warning: implicit declaration of function ‘abort’ [-Wimplicit-function-declaration]
       abort ();
       ^~~~~

sim/common/ChangeLog:

	* sim-options.c: Include "config.h".
	Include <stdio.h>.
	* sim-watch.c: Include "config.h".
	Include <stdio.h>.
	* hw-device.c: Include <string.h>.
	* hw-events.c: Include <string.h>.
	* hw-handles.c: Include <stdlib.h>.
	* sim-fpu.c: Include <stdlib.h>.
2019-03-28 06:40:30 +09:00
Stafford Horne
ef9866970c sim/common: convert sim-arange to use sim-inline
This fixes a TODO item and also fixes an error which we get when
building with no optimizations (-O0) in at least gcc 8.2.1.

Tested with sims that use cgen code lm32, or1k, cris, m32r and inlining
is working corretly.

Reference Error:

gcc -DHAVE_CONFIG_H -DWITH_DEFAULT_MODEL='"or1200"' -DWITH_ALIGNMENT=STRICT_ALIGNMENT \
 -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31 -DWITH_TARGET_ADDRESS_BITSIZE=32 \
 -DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_BIG   -DDEFAULT_INLINE=0  -DWITH_SCACHE=16384 \
 -I. -I../../../binutils-gdb/sim/or1k -I../common -I../../../binutils-gdb/sim/or1k/../common \
 -I../../include -I../../../binutils-gdb/sim/or1k/../../include -I../../bfd \
 -I../../../binutils-gdb/sim/or1k/../../bfd -I../../opcodes -I../../../binutils-gdb/sim/or1k/../../opcodes \
 -g -o run nrun.o libsim.a ../../bfd/libbfd.a ../../opcodes/libopcodes.a  ../../libiberty/libiberty.a \
 -ldl  -lz -lm

/usr/bin/ld: libsim.a(mloop.o): in function `extract':
/home/shorne/work/openrisc/gdb-musl/sim/or1k/mloop.c:82: undefined reference to `sim_addr_range_hit_p'
/usr/bin/ld: /home/shorne/work/openrisc/gdb-musl/sim/or1k/mloop.c:83: undefined reference to `sim_addr_range_hit_p'
collect2: error: ld returned 1 exit status
make[3]: *** [Makefile:305: run] Error 1

sim/common/ChangeLog:

	* Make-common.in (sim-arange_h): Remove sim-arange.c
	* sim-arange.c: Remove SIM_ARANGE_C.
	Add ifdef for _SIM_ARANGE_C_.
	Include "sim-arange.h".
	Remove include for unused "sim-assert.h".
	Remove DEFINE_INLINE_P.  Remove DEFINE_NON_INLINE_P.
	(sim_addr_range_add): Declare as INLINE_SIM_ARANGE.
	(sim_addr_range_delete): Declare as INLINE_SIM_ARANGE.
	(sim_addr_range_hit_p): Change from SIM_ARANGE_INLINE to
	INLINE_SIM_ARANGE.
	* sim-arange.h (sim_addr_range_add): Declare as
	INLINE_SIM_ARANGE.
	(sim_addr_range_delete): Declare as INLINE_SIM_ARANGE.
	(sim_addr_range_hit_p) Declare as INLINE_SIM_ARANGE.
	Remove definition of SIM_ARANGE_INLINE.
	Remove [HAVE_INLINE].
	Wrap include "sim-arange.c" in H_REVEALS_MODULE_P.
	* sim-base.h: Include "sim-arange.h"
	* sim-basics.h: Remove include of "sim-arange.h"
	* sim-inline.c: Include "sim-arange.c"
	* sim-inline.h: Define INLINE_SIM_ARANGE.
	Define SIM_ARANGE_INLINE.  Define EXTERN_SIM_ARANGE_P.
	Define STATIC_INLINE_SIM_ARANGE.  Define STATIC_SIM_ARANGE.
2019-03-28 06:40:30 +09:00
Joel Brobecker
9c4c331816 (gdb/sim) Move Mike Frysinger to past maintainers section
sim/ChangeLog:

	* MAINTAINERS: Move Mike Frysinger to past maintainers' section.
2019-02-28 11:20:29 +04:00
Simon Marchi
007024cc6a Add Andrew Burgess as global maintainer of gdb/ and sim/ 2019-02-13 16:56:21 -05:00
Tom Tromey
67f8b42f3e Fix the sim build
Simon pointed out that the "common/" include change in gdb broke the
sim build.  The problem was that the sim was using gdb's
create-version.sh, which changed.

This patch copies create-version.sh to the sim, so that it can
generate "version.c" in a way that works in the sim build.

Tested by rebuilding.

sim/common/ChangeLog
2019-01-26  Tom Tromey  <tom@tromey.com>

	* Make-common.in (version.c): Use sim's create-version.sh.
	* create-version.sh: New file.

sim/ppc/ChangeLog
2019-01-26  Tom Tromey  <tom@tromey.com>

	* Makefile.in (version.c): Use sim's create-version.sh.
2019-01-26 08:53:31 -07:00
Simon Marchi
b84bb29de9 Actually remove definitions of DEFINE_NON_INLINE_P and DEFINE_INLINE_P
I applied the patch "Do not expand macros to 'defined'" by hand because
I couldn't apply it with git-am, and of course forgot to remove the
macro definitions.  This patch fixes it, and also makes the ChangeLog
entry a bit cleaner.
2019-01-16 17:05:28 -05:00
Pavel I. Kryukov
7516c26f86 Do not expand macros to 'defined'
Expanding a macro which contains 'defined' PP keyword is UB.  It causes
a compilation failure when -Wexpansion-to-defined is used.

sim/common/Changelog:
2019-01-16  Pavel I. Kryukov  <kryukov@frtk.ru>

	* sim-arange.c: eliminate DEFINE_NON_INLINE_P
2019-01-16 16:10:35 -05:00
Simon Marchi
dc7e818497 sim: Fix definition of SIM_ARANGE_INLINE
If HAVE_INLINE is false, SIM_ARANGE_INLINE is currently defined as

    #define SIM_ARANGE_INLINE EXTERN

However, EXTERN is not defined anywhere, leading to errors such as:

    In file included from
    /mipt-mips/simulator/../../sim/common/sim-basics.h:147:0,
                     from /mipt-mips/simulator/export/gdb/sim-main.h:13,
                     from /mipt-mips/simulator/export/gdb/gdb_interface.cpp:7:
    /mipt-mips/simulator/../../sim/common/sim-arange.h:71:27: error: ‘EXTERN’
    does not name a type; did you mean ‘EUSERS’?
     #define SIM_ARANGE_INLINE EXTERN
                               ^
    /mipt-mips/simulator/../../sim/common/sim-arange.h:76:1: note: in expansion
    of macro ‘SIM_ARANGE_INLINE’
     SIM_ARANGE_INLINE int
     ^~~~~~~~~~~~~~~~~

I (Simon) have reproduced the problem by simply removing the HAVE_INLINE
definition.  This was originally reported by Pavel I. Kryukov
<kryukov@frtk.ru>.

sim/common/ChangeLog:

	* sim-arange.h (SIM_ARANGE_INLINE): Change EXTERN to extern.
2019-01-15 17:46:40 -05:00
Павел Крюков
444b3faef5 Add 'extern C' if simulator is written in C++
sim/common/Changelog:
2018-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>

        * sim-base.h: Add 'extern C' if header is compiled with C++
2019-01-03 09:41:13 -05:00
Joel Brobecker
42a4f53d2b Update copyright year range in all GDB files.
This commit applies all changes made after running the gdb/copyright.py
script.

Note that one file was flagged by the script, due to an invalid
copyright header
(gdb/unittests/basic_string_view/element_access/char/empty.cc).
As the file was copied from GCC's libstdc++-v3 testsuite, this commit
leaves this file untouched for the time being; a patch to fix the header
was sent to gcc-patches first.

gdb/ChangeLog:

	Update copyright year range in all GDB files.
2019-01-01 10:01:51 +04:00