Commit Graph

526 Commits

Author SHA1 Message Date
Ian Carmichael
8ea23ea4bb * Implement remaining bits in VPU_STAT, CMSAR0, CMSAR1, FBRST. Fix COP2 interface
* to VI registers (CFC2/CTC2).
*
* Modified Files:
* 	ChangeLog.sky interp.c sim-main.c sky-pke.h sky-vu.c sky-vu.h
1998-06-16 16:02:04 +00:00
James Lemke
05faca8731 Implement CPCOND0 and insns BC0F/BC0FL/BC0T/BC0TL. 1998-06-15 17:36:23 +00:00
Ron Unrau
f083fff397 * sky-engine.c: Set ordering of device issues to match enumerated type
txvu_cpu_context (sim-main.h tm-txvu.h). This also allowed the issue
        structure to be simplified to an array of functions.
1998-06-14 17:01:02 +00:00
Patrick Macdonald
ff94f10401 * interp.c: added call to sky_command_options_end() to close
any open file handles before exiting
	* sky-gpuif.[c|h]: add disassembly on the fly code, log and log
	file option support
	* sky-gdb.[c|h] (sky_command_options_close()): new function, added
	some body to the log and log file option sections
1998-06-12 18:58:26 +00:00
Frank Ch. Eigler
95caab7df2 * Moving some sky-specific ChangeLog entries into ChangeLog.sky 1998-06-11 13:50:28 +00:00
Frank Ch. Eigler
b879096335 * Support for sky hardware interrupts. The sky-dma cannot trigger
interrupts properly yet (jlemke TODO).
Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): For TX39, add stub COP0 register #7,
 	to allay warnings.
	(interrupt_event): Made non-static.
start-sanitize-tx3904
	* dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
 	interchange of configuration values for external vs. internal
 	clock dividers.
end-sanitize-tx3904
start-sanitize-sky
	* sky-device.c (sky_signal_interrupt): New function to generate
	interrupt event.
	* sky-device.h: Declare it.
	* sky-dma.c (check_int1): Call it.
	* sky-pke.c (pke_begin_interrupt_stall): Call it.
end-sanitize-sky
1998-06-10 17:07:10 +00:00
Patrick Macdonald
a4377bf7bd * Updated several files to place all sky specific runtime options
in sky-gdb.c.
	* Added two new runtime options --sky-debug and --screen-refresh
	* ChangeLog.sky contains a detailed description of the mods
1998-06-10 17:07:09 +00:00
Frank Ch. Eigler
e1b5df344e * Typo fix for tx3904tmr use of configuration parameters.
(ChangeLog entry coming later.)
1998-06-10 08:58:42 +00:00
Ian Carmichael
0001bce1f8 * Handle 10 and 20-bit versions of Break instruction. Move handling
* of special values from signal_exception() in interp.c into mips.igen.
*
* Modified: ChangeLog gencode.c interp.c mips.igen sim-main.h
1998-06-09 22:11:24 +00:00
Frank Ch. Eigler
cc9bc93202 * Updates to tx3904 peripheral simulations for ECC.
Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
 	register upon non-zero interrupt event level, clear upon zero
 	event value.
	* dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
	by passing zero event value.
	(*_io_{read,write}_buffer): Endianness fixes.
	* dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
	(deliver_*_tick): Reduce sim event interval to 75% of count interval.
	* interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
	serial I/O and timer module at base address 0xFFFF0000.
1998-06-09 16:54:09 +00:00
Ian Carmichael
895a7dc2aa * Handle 10 and 20-bit versions of Break instruction. Move handling
* of special values from signal_exception() in interp.c into mips.igen.
*
* Modified: gencode.c interp.c mips.igen sim-main.h
1998-06-09 16:54:08 +00:00
Gavin Romig-Koch
2b5d87dfa4 * mips.igen (SWC1) : Correct the handling of ReverseEndian
and BigEndianCPU.
1998-06-09 15:54:05 +00:00
Gavin Romig-Koch
55ad270f9a * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
parts.
	* configure: Update.
1998-06-09 15:42:04 +00:00
James Lemke
037f29c526 Added support for the VU insn D (debug) & T (trace) bits. 1998-06-04 20:50:55 +00:00
Frank Ch. Eigler
da040f2a6c * Early check-in of tx3904 timer sim implementation for ECC.
It is not yet properly tested.
Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904tmr.c: New file - implements tx3904 timer.
	* dv-tx3904{irc,cpu}.c: Mild reformatting.
	* configure.in: Include tx3904tmr in hw_device list.
	* configure: Rebuilt.
	* interp.c (sim_open): Instantiate three timer instances.
	Fix address typo of tx3904irc instance.
1998-06-04 12:43:45 +00:00
Andrew Cagney
0e797366ef The r5900 doesn't have HI/LO DIV/MUL register problems. Hobble
checks on hi/lo usage but retain functions so that they can be used
for HI/LO stall counting code.
1998-06-04 08:46:56 +00:00
Ian Carmichael
4979c0a271 * Move the sanitize comments to the right place. 1998-06-02 21:04:49 +00:00
Ian Carmichael
8e3a0b599f * SYSCALL now uses exception vector.
* SKY: New memory mapping rules for k1seg, k0seg.
* Modified Files: ChangeLog.sky ChangeLog interp.c sim-main.c
1998-06-02 19:53:36 +00:00
Frank Ch. Eigler
29b5afe9af * Small TX39-only patch for ECC.
Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): For TX39, add stub COP0 register #3,
	to allay warnings.
1998-06-01 16:29:43 +00:00
Jeff Law
fb0ea2b9e1 * r5900.igen (rsqrt.s): Update based on r5900 ISA manual version 2.1.
(sqrt.s): Likewise.
1998-06-01 16:29:42 +00:00
Andrew Cagney
df26156d68 Match mips*tx39 not mipst*tx39. 1998-05-29 01:42:20 +00:00
Andrew Cagney
ce82378189 Fix mips SWL on 64bit ISA when 32 bit word appears in second half of
64 bit bus.
Test.
1998-05-25 05:48:34 +00:00
Ron Unrau
aa81c3ca99 * Initial support for "sim list vif[01]" 1998-05-24 13:06:09 +00:00
Andrew Cagney
f872d0d643 Only enable H/W on some mips targets.
Move common hw-obj to Make-common
Pacify GCC
1998-05-22 05:23:04 +00:00
Andrew Cagney
32d41f6ddb Sanity clause 1998-05-22 02:08:26 +00:00
Gavin Romig-Koch
5e34097b8b gencode.c: Mark BEGEZALL as LIKELY. 1998-05-21 18:26:38 +00:00
Patrick Macdonald
fab0ee0d0b * interp.c: modified name of GIF device
* sky-gpuif.[ch]:  IMT burst support and queue manipulation ( see
	                   ChangeLog.sky for complete details )
	* sky-gs.c: modified name of GIF device
1998-05-21 15:41:35 +00:00
Andrew Cagney
26feb3a83d Fix sign extension on 32 bit add/sub instructions. 1998-05-21 09:32:07 +00:00
Andrew Cagney
8404825993 * interp.c (sim_fetch_register): Convert internal r5900 regs to
target byte order
1998-05-21 08:18:21 +00:00
Frank Ch. Eigler
3fa454e95f * Monster patch - may destablize MIPS sims for a little while.
* Followup patch for SCEI PR 15853
* First check-in of TX3904 interrupt controller devices for ECC. [sanitized]
* First implementation of MIPS hardware interrupt emulation.
Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
 	modules.  Recognize TX39 target with "mips*tx39" pattern.
	* configure: Rebuilt.
	* sim-main.h (*): Added many macros defining bits in
 	TX39 control registers.
	(SignalInterrupt): Send actual PC instead of NULL.
	(SignalNMIReset): New exception type.
	* interp.c (board): New variable for future use to identify
	a particular board being simulated.
	(mips_option_handler,mips_options): Added "--board" option.
	(interrupt_event): Send actual PC.
	(sim_open): Make memory layout conditional on board setting.
	(signal_exception): Initial implementation of hardware interrupt
 	handling.  Accept another break instruction variant for simulator
 	exit.
	(decode_coproc): Implement RFE instruction for TX39.
	(mips.igen): Decode RFE instruction as such.
start-sanitize-tx3904
	* configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
	* interp.c: Define "jmr3904" and "jmr3904debug" board types and
	bbegin to implement memory map.
	* dv-tx3904cpu.c: New file.
	* dv-tx3904irc.c: New file.
end-sanitize-tx3904
1998-05-18 15:55:05 +00:00
Gavin Romig-Koch
7d2c0e8c97 * r5900.igen: Replace the calls and the definition of the
function check_op_hilo_hi1lo1 with the pair
	check_mult_hilo_hi1lo1 and check_mult_hilo_hi1lo1.
1998-05-13 18:30:15 +00:00
Gavin Romig-Koch
afc5e7f23a * tx.igen (madd,maddu): Replace calls to check_op_hilo
with calls to check_div_hilo.
1998-05-13 18:14:09 +00:00
Gavin Romig-Koch
94dda41a0c * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
Replace check_op_hilo with check_mult_hilo and check_div_hilo.
	Add special r3900 version of do_mult_hilo.
	(do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
	with calls to check_mult_hilo.
	(do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
	with calls to check_div_hilo.
1998-05-13 14:00:56 +00:00
Andrew Cagney
1a89994e08 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
Document a replacement.
1998-05-12 05:36:47 +00:00
Frank Ch. Eigler
24abdc9d31 * Fixing typo that caused infinite loop upon PKE MPG. 1998-05-11 16:15:22 +00:00
Patrick Macdonald
55470cc7ef * Roll Alpha modifications into devo for sky-gpuif*/ sky-gs*/ interp.c
* Complete and informative details can be found in ChangeLog.sky
1998-05-07 19:14:28 +00:00
Frank Ch. Eigler
a1d609b4fe * Changes to sky PKE sim to calculate word-precision source-addresses
for VU memory tracking tables.

Thu May  7 12:15:41 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-pke.c (pke_pcrel_operand_bits): Compute word-resolution
	source address for UNPACK into VU MEM.
	(pke_code_mpg): Ditto for MPG into VU uMEM.
1998-05-07 17:50:18 +00:00
Ron Unrau
c939ffeb80 Initial Breakpoint support:
* sim-main.h: (struct _sim_cpu): add cur_device field.
          Define cur_device values, breakpoint value, and SIM_ENGINE_HALT_HOOK
        * interp.c (sim_open): initialize cur_device
        * sky-engine.c (engine_run): use cur_device to set current_cpu
        * sky-libvpe.c (vpecallms_cycle): add check for breakpoint
        * sky-hardware.h: delete NUMBER_CPUS
        * sky-hardware.c (attach_devices): create a memory mapped comm
          area for GDB/SIM interactions

misc:
        * sky-vu.c ({read,write}_vu_misc_reg): do default behavior for
          unknown regs instead of sim_io_error. MP reg is float (was missing
          cast).
1998-05-07 14:36:42 +00:00
Doug Evans
eb00d70698 * sim-main.h (INSN_NAME): New arg `cpu'. 1998-05-07 02:45:07 +00:00
James Lemke
60372a3f96 * sim-main.h, sky-libvpe.c: r59fp_op* functions were called with
1st parm of wrong type.  Converted remaining "/" to "FDiv".
	* interp.c: Make "--float-type host" the default.
1998-04-29 21:17:53 +00:00
Geoffrey Noer
9d45df1b8c Tue Apr 28 18:28:58 1998 Geoffrey Noer <noer@cygnus.com>
* common/aclocal.m4: call AM_EXEEXT in SIM_AC_COMMON, define
        AM_CYGWIN32 and AM_EXEEXT.
        * common/Make-common.in: set EXEEXT, add missing EXEEXTs
        to run and install-common rules.
        * common/configure: regenerate

And update all subdirectory ChangeLogs and configure files.
1998-04-29 01:44:23 +00:00
Tom Tromey
5da9ce07eb * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* acconfig.h: New file.
	* configure.in: Reverted change of Apr 24; use sinclude again.
1998-04-26 22:03:55 +00:00
Tom Tromey
b1df34b9ed * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* configure.in: Don't call sinclude.
1998-04-24 20:39:48 +00:00
Andrew Cagney
ca61710bde * mips.igen (do_store_left): Pass 0 not NULL to store_memory. 1998-04-24 09:57:17 +00:00
James Lemke
aefd02b523 Move target specific stuff from sim/common/sim-base.h to sim/mips/sim-main.h 1998-04-22 20:41:04 +00:00
James Lemke
8c8dd0c471 r5900.igen, sim-main.h, sky-libvpe.c: Add run-time option --float-type 1998-04-21 21:33:44 +00:00
James Lemke
2b1d91ab62 configure.in, interp.c: Add configure option --with-sim-funit. 1998-04-21 21:24:24 +00:00
James Lemke
3e5fbf91b5 Add configure option --with-sim-funit for sim & gdb. 1998-04-21 21:14:09 +00:00
Jason Molenda
5fe24ce03a Fix sanitize tag. The proper keyword is "start-sanitize-*", not
"begin-sanitize-*".
1998-04-21 17:55:06 +00:00
Andrew Cagney
515125b709 Entry about changing sim_open missing from changelog. 1998-04-21 05:25:56 +00:00
Andrew Cagney
97f4d18341 Implement ERET instruction.
Add {signed,unsigned}_address type.
1998-04-21 04:30:27 +00:00
Andrew Cagney
421cbaae98 For new IGEN simulators, rewrite checks validating correct use of the
HI/LO registers.  For old gencode simulator, delete all checks.
1998-04-21 01:17:58 +00:00
Frank Ch. Eigler
f8998e7780 * Fixed data mangling problems in R5900 COP2 LQC2/SQC2 instructions. 1998-04-17 19:04:53 +00:00
Frank Ch. Eigler
fc4e5b84c8 * Adapted R5900 COP2 interface code to clarified micro-mode interlock
behavior.
1998-04-16 19:27:55 +00:00
Andrew Cagney
7d93d53871 o CVT.S.W and CVT.W.S were reversed
o When unpacking an r5900 FP value,
  was not treating IEEE-NaN's as very
  large values.
o When packing an r5900 FP result from an infinite
  precision intermediate value was saturating
  to IEEE-MAX instead of r5900-MAX
o The least significant bit of the FP status
  register did not stick to one.
1998-04-16 07:49:58 +00:00
Andrew Cagney
c58fa2cc43 TX19 uses igen by default. 1998-04-15 23:17:16 +00:00
Frank Ch. Eigler
46399a00e8 * Changes to make interp.c compile under mips64r5900-sky-elf target.
Wed Apr 15 12:41:18 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Make COP2 branch code compile after
 	igen signature changes.
1998-04-15 19:02:04 +00:00
Andrew Cagney
74025eeea7 Re-fix 32 bit DSRAV instruction.
Fix mips16 BRANCH, unsigned ADD/SUB and SRAV instructions.
1998-04-15 14:04:01 +00:00
Andrew Cagney
f3bdd368ea Debug tx19 built from igen sources.
Rework ifetch{16,32} to match the more recent do_load function.
1998-04-15 07:23:28 +00:00
Ian Carmichael
ac137dc872 * Added interactive debugging for vector units, and a bunch of minor
* things.  See ChangeLog.sky for details.
*
* Modified Files:
*    .Sanitize ChangeLog.sky Makefile.in sky-libvpe.c sky-vu.c
*    sky-vu.h sky-vudis.c sky-vudis.h
* Added Files:
*    sky-indebug.c sky-indebug.h sky-interact.c sky-interact.h
*    sky-console.c sky-console.h
1998-04-14 19:58:36 +00:00
Andrew Cagney
c0a4c3ba17 Implement 32 bit MIPS16 instructions listed in m16.igen. 1998-04-14 14:34:48 +00:00
Frank Ch. Eigler
96a4eb30da * Fixed a one-character typo in COP2 instruction synthesis.
[ChangeLog]
	Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Add proper 1000000 bit-string at top
	of VU lower instruction.
1998-04-13 20:31:29 +00:00
Frank Ch. Eigler
b0b39eb2de * Backed out week-old attempt at enabling quadword memory access on
MIPS sim; added PKE sim code fixes.  No COP2 testing progress today.

[ChangeLog]

Thu Apr  9 16:38:23 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
	instead of QUADWORD.

	* sim-main.h: Removed attempt at allowing 128-bit access.

[ChangeLog.sky]

Thu Apr  9 16:42:54 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-pke.c (read_pke_pc): Corrected PKE PC calculation
	to word granularity.
1998-04-09 20:56:00 +00:00
Ian Carmichael
7dba069e20 * Fixed up blank lines in file. 1998-04-09 03:24:13 +00:00
Ian Carmichael
2fd7c40770 * Temporarily change LOADDRMASK in sky build. 1998-04-09 03:17:43 +00:00
Frank Ch. Eigler
11c47f314b * R5900 sky COP2 testing continuing. Today only small
VCALLMS-related were found/fixed.

[ChangeLog.sky]

	* sky-vu.c ({read,write}_vu_special_reg): Add CMSAR[01] as special
 	registers for a VU.  Behavior not as mandated.
	({read,write}_vu_{misc,special}_reg): Create sim_io_error upon
	access to unknown register.  Behavior not as mandated.

	* sky-vu.h (anonymous register numbering enum): Add CMSAR[01].

	* sky-libvpe.c (indebug): Cache $ENV{'SKY_DEBUG'}.

[ChangeLog]


	* Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.

	* interp.c (decode_coproc): Refer to VU CIA as a "special"
	register, not as a "misc" register.  Aha.  Add activity
	assertions after VCALLMS* instructions.
1998-04-08 22:22:58 +00:00
Ian Carmichael
997d07bb70 * Add sky-vudis.h, sky-vudis.c. 1998-04-08 20:14:44 +00:00
Andrew Cagney
8764538f22 Keep sim-main.c and tx.igen 1998-04-07 23:15:53 +00:00
Doug Evans
4b61e1073f Keep sky-gs.[ch] if sky. 1998-04-07 22:54:10 +00:00
Frank Ch. Eigler
174ff2242b * R5900 COP2 sim testing in progress. The majority of instructions actually
work!

[ChangeLog.sky]

	* sky-vu.h (vu_device): Represent "macro instruction just stuffed
 	into fetch buffer" condition with new "m" bit.  Rename old "m" to
 	"l".

	* sky-libvpe.c (indebug): Save snapshot of environment value;
 	workaround for suspected memory corruption.
	(fetch_inst): Respect new "m" macro-instruction flag for reporting
 	successful fetch to caller.
	(exec_inst): Disassemble instruction here instead of fetch time.
  	Renamed old "m" -> "l" flag in VU state to track interlock
 	release.
	(vpecallms_cycle): Call exec_inst only if fetch_inst did some
 	work.

	* sky-vu.c (vu_attach, vu[01]_device): Revamped initialization to
 	ensure complete clear of tail part of struct at attach time.
	(vu0_busy): Fix thinko.
	(vu0_macro_issue): Adapt to new "l" flag.
	(vu0_micro_interlock_released): Ditto.
 	(write_vu_special_reg): Ditto.
	(read_vu_special_reg): Compute VBS0/VBS1 bits more explicitly.
  	The other VU status bits are not yet computed.

[ChangeLog]

	* interp.c (decode_coproc): Do not apply superfluous E (end) flag
 	to upper code of generated VU instruction.
1998-04-07 22:47:53 +00:00
Frank Ch. Eigler
2ebb2a6855 * R5900 COP2 is now ready for testing. Let loose the dogs!
Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (cop_[ls]q): Replaced stub with proper COP2 code.

	* sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 	for TARGET_SKY.

	* r5900.igen (SQC2): Thinko.
1998-04-07 00:01:31 +00:00
Frank Ch. Eigler
ebcfd86a2e * R5900 COP2 function nearly complete. PKE sim now aware of new GPUIF
masking facility for PATH3 transfers.

[ChangeLog.sky]

Sun Apr  5 12:11:45 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-libvpe.c (exec-inst): Added "M" bit detection for upper
 	instruction.

	* sky-pke.c (pke_check_stall): Added more assertions.
	(pke_code_mskpath3): Use new GPUIF M3P control register.

	* sky-pke.h (VU[01]_CIA): New macros that give VU CIA
 	pseudo-register addresses.

	* sky-vu.h (vu_device, VectorUnitState): Merged structs.
	(VectorUnitState.mflag): New field.
	(VU_REG_{CMSAR0,CMSAR1,FBRST}) Added missing control registers.

	* sky-vu.c (vu0_busy): New function.
	(vu0_q_busy): New function.
	(vu0_macro_issue): New function.
	(vu0_micro_interlock_released): New function.
	(vu0_busy_in_{micro,macro}_mode): Deleted stubs.
	(vu0_macro_hazard_check): Deleted stubs.
	(vu_attach): Adapted code to merged device & state struct.
	(read_vu_special_reg): Compute VBS0/VBS1 bits in STAT register.

[ChangeLog]
start-sanitize-sky
Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (*): Adapt code to merged VU device & state structs.
	(decode_coproc): Execute COP2 each macroinstruction without
 	pipelining, by stepping VU to completion state.  Adapted to
	read_vu_*_reg style of register access.

	* mips.igen ([SL]QC2): Removed these COP2 instructions.

	* r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.

	* sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.

end-sanitize-sky
1998-04-05 16:40:03 +00:00
Andrew Cagney
64ed8b6a8c aclocal.m4: Don't enable inlining when cross-compiling.
mips/*: Tune mips simulator - allow all memory transfer code to be inlined.
1998-04-05 07:16:54 +00:00
Andrew Cagney
278bda4050 Cleanup INLINE support for simulators using common framework.
Make IGEN responsible for co-ordinating inlining of generated files.
By default, aclocal.m4 disabled all inlining.
1998-04-04 12:33:11 +00:00
Ron Unrau
c567d0b941 * sim-main.h: add vif registers
* interp.c: incorporate vif register load/store
        * sky-pke.[ch]: add register load/store routines
        * sku-vu.c: P register is float
1998-04-02 21:02:38 +00:00
Andrew Cagney
69d5a56645 Re-do load/store operations so that they work for both 32 and 64 bit
ISAs.
Enable tx39 as igen again.
1998-04-02 19:35:39 +00:00
Andrew Cagney
725fc5d927 For mips get_mem_size call. Force the return of a 32 bit value
regardless of the target's word bitsize.
1998-04-02 03:27:24 +00:00
Ron Unrau
2151467d63 sky-vu.[ch]: prototype decls, cast floats to ints before register transfer
interp.c: integrate VU register read/writes
sim-main.h : track tm-txvu.h
1998-04-01 17:31:24 +00:00
Frank Ch. Eigler
6b0c51c929 * You bop one on the head ... another one appears.
Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
1998-04-01 13:19:07 +00:00
James Lemke
1ff39ecb10 * sky-dma.c: Clarify text in warning msg.
* interp.c: Add global option "float-type".
	* sky-vu.h: Add SIM_DESC sd; to VectorUnitState for accessing
	global options.
1998-03-31 21:46:31 +00:00
Frank Ch. Eigler
6ed00b0607 * Continuing sky R5900 / COP2 work. Added extra sanitize tags to hide
128-bit MIPS part.

[ChangeLog]

Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Continuing COP2 work.
  	(cop_[ls]q): Hide 128-bit COP2 more.

	* sim-main.h (COP_[LS]Q): Hide 128-bit COP2 more.

[ChangeLog.sky]

Mon Mar 30 18:44:15 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-libvpe.c: Code too wide - ran indent on SCEI code.

	* sky-vu.h (vu0_busy*, vu0_macro*): New entry points for COP2
 	interface.

	* sky-vu.c (vu0_busy*, vu0_macro*): Stub functions for above.
1998-03-30 23:56:52 +00:00
Gavin Romig-Koch
34f51d8723 * configure.in (mipstx39*-*-*): Use gencode simulator rather
than igen one.
	* configure : Rebuild.
1998-03-30 19:54:15 +00:00
Frank Ch. Eigler
7dd4a46650 * Oops, added #ifdef TARGET_SKY around R5900 COP2 implementation skeleton. 1998-03-29 22:53:31 +00:00
Frank Ch. Eigler
b59e0b6815 * Modified sky PKE behavior according to new SCEI specs. 1998-03-28 00:35:43 +00:00
Frank Ch. Eigler
15232df4a3 * Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] code
into single PKE-style vu.[ch].


[ChangeLog]

Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>

start-sanitize-sky
	* Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.

	* interp.c (sim_{load,store}_register): Use new vu[01]_device
 	static to access VU registers.
	(decode_coproc): Added skeleton of sky COP2 (VU) instruction
 	decoding.  Work in progress.

	* mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 	overlapping/redundant bit pattern.
	(LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
	progress.

	* sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 	status register.

end-sanitize-sky

	* interp.c (cop_lq, cop_sq): New functions for future 128-bit
 	access to coprocessor registers.

	* sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.

[ChangeLog.sky]

	* sky-engine.c (engine_run): Adapted from vu[01] -> vu merge.

	* sky-hardware.c (register_devices): Ditto

	* sky-pke.c (pke_fifo_*): Made these functions private again, now
 	that the GPUIF code does not use them.

	* sky-pke.h (pke_fifo_*): Removed newly private declarations.

	* sky-vu.c (*): Major rework: merge of old sky-vu0.c and
 	sky-vu1.c.  Management of two VU devices parallels two PKEs.
	Work in progress.

	* sky-vu.h (*): Other half of merge.
	(vu_device): New struct, parallel to pke_device.
1998-03-27 22:00:56 +00:00
Patrick Macdonald
76969284c3 sky-gs.c: initial drop of GS control registers (outstanding questions)
sky-gs.h: initial drop of GS control registers
Makefile.in: added sky-gs.o to sanitized list
sky-gpuif.c (gif_io_write_buffer): correct memset length error, renamed
trace file for gif
1998-03-27 18:36:33 +00:00
Ron Unrau
d44859a2d8 * sky-vu.c: new file to read/write VU registers
* Makefile.in .Sanitize: add sky-vu.c
	* sky-vu.h: define registers as enum, export read/write routines
        * sky-vu[01].[ch]: use register read/write routines in sky-vu.c
        * interp.c: use register read/write routines in sky-vu.c
1998-03-27 14:44:39 +00:00
Andrew Cagney
d8f5304972 Do top level sim-hw module for device tree.
Add to aclocal.m4, update all configure files.
1998-03-27 11:42:16 +00:00
Andrew Cagney
82ea14fd9d Define CPU_INDEX. Initialize.
For mips_options, iterate over MAX_NR_PROCESSORS when setting options.
1998-03-27 04:25:45 +00:00
Andrew Cagney
d89fa2d80a Re-do --enable-sim-hardware so that each simulator can specify the devices
it wants built.
Generate hw-config.h.
1998-03-25 01:41:33 +00:00
Andrew Cagney
612a649eee * interp.c (Max, Min): Comment out functions. Not yet used.
* vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
1998-03-24 23:16:57 +00:00
Ian Carmichael
9fa5e700c0 * Several fixes and performance enhancements from my 2 weeks working in Japan. 1998-03-24 22:23:33 +00:00
Frank Ch. Eigler
121d6745bc * Monster bug fixes & improvements from the last two days' demo-testing work.
* sky-pke.h (pke_fifo*): Exported these formerly private functions.
	(pke_device): Added FIFO cache fields.

	* sky-pke.c (pke_fifo_reset): New function for GPUIF client -
 	clear FIFO contents.
	(pke_pcrel_fifo): Added caching facility to prevent O(n^2) cost for
	searching for consecutive operand words.

	* sky-libvpe.c (MEM, uMEM): New/changed macros that perform modulo
 	calculations to handle out-of-range VU memory addresses.
	(*): Replaced many previous uses of MEM[] and state->uMEM[] with
	calls to above macros.

	* sky-vu.h (struct VectorUnitState): Added qw/dw size fields for
	MEM/uMEM buffers, for overflow prevention.  Renamed MEM/uMEM fields
	to catch all their prior users.

	* sky-vu0.c (vu0_attach): Manually align MEM0/MEM1 buffers to force
	16-byte alignment.  (zalloc is not enough.)

	* sky-vu1.c (vu1_attach): Ditto.
	(init_vu): Store buffer sizes from allocation into VectorUnitState.

	* sky-gpuif.h (GifPath): Use a pke_fifo strucf instead of
 	temporary fixed-size array for flexible FIFO sizing.

	* sky-gpuif.c (SKY_GPU2_REFRESH): This is now an integer value to be
	used as a modulus for periodic refresh.
	(refresh): New function to send GPU2 refresh code periodically.
	(*): Use pke_fifo calls to en/dequeue GPUIF tags & operands.

	* sky-pke.h (struct pke_device): Added fields to allow caching of
 	results from recent FIFO searches.
1998-03-20 22:12:06 +00:00
Frank Ch. Eigler
0b9843e5ee * Changes today consist just of some code hardening. 1998-03-18 19:33:33 +00:00
Frank Ch. Eigler
9b23b76d68 * Added --with-sim-gpu2=<path> option for linking SCEI's GPU2 library with
the stand-alone executable.


[in ChangeLog.sky:]

	* sky-gpuif.c (call_gs): Call properly into GPU2 library if
 	configured --with-sim-gpu2.  Use SKY_GPU2_REFRESH symbol as
 	placeholder for future GPU2-refresh policy.

[in ChangeLog:]

	* Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 	configurable settings for stand-alone simulator.

start-sanitize-sky
	* configure.in: Added --with-sim-gpu2 option to specify path of
 	sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 	links/compiles stand-alone simulator with this library.

	* interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
end-sanitize-sky

	* configure.in: Added X11 search, just in case.

	* configure: Regenerated.
1998-03-18 00:20:40 +00:00
Frank Ch. Eigler
9614fb3c36 * PKE testing was driven by SCEI "test0" bucket; code coverage remains
effectively full.  The code is believed to be functionally complete now.
  Some code cleanup is included at no extra charge in this version.

Fri Mar 13 20:21:57 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-vu1.c: (dump_mem): Commented out function to satiate
 	warning-ful compilation.

	* sky-pke.c: (pke_reset): New function, called explicitly at
 	initialization and at FBRST.
	(pke_fifo_flush): New function to flush (skip over) existing
 	quadwords in FIFO.
	(pke_fifo_fit): New function to add space for new quadword in
 	FIFO.
	(pke_fifo_access): New function to absolute-index into FIFO.
	(pke_fifo_old): New function to remove old quadwords from FIFO.
	(pke_begin_interrupt_stall): New function to abstract
 	interrupt-caused stalls.
	(pke_*): Access PKE FIFO only thorugh pke_fifo functions.
	(pke_pcrel_*): Renamed pke_pc_* functions.
	(pke_code_unpack): Numerous logic tweaks for latest UNPACK
 	behavior changes & clarifications from SCEI.

	* sky-pke.h (struct pke_fifo): New explicit FIFO representation.
	(struct pke_device): Use struct above.
	(PKE_DEBUG): Removed macro as misnomer.

	* sky-hardware.c: Moved *_cmd_install declarations out.

	* sky-hardware.h: Moved *_cmd_install declarations in.
1998-03-14 01:47:06 +00:00
Gavin Romig-Koch
ca8c38472e Sanity for 4320 1998-03-11 17:05:20 +00:00
Andrew Cagney
eefc25e592 Allow more than just read, write and exec memory spaces in the core
module.
1998-03-11 12:18:39 +00:00
Andrew Cagney
10572b6a43 * sky-gdb.c (vu_option_handler): Delete unused local unit.
(log_option_handler): Delete extra arg from printf, twice.
* sky-pke.c (config.h): Include.
(string.h, strings.h): Include.
(pke_issue): Delete unused locals imm, num
* sky-libvpe.c: Pacify GCC.
* sky-gpuif.c (gif_io_write_buffer): Pacify GCC.
* sky-dma.c (config.h): Include.
(string.h, strings.h): Include.
(dma_io_read_buffer): Pacify GCC.
(dma_io_write_buffer): Pacify GCC.  Initialize pmem before first use.
(do_dma_transfer): Delete unused local variables qwbuf and local.
1998-03-11 11:57:55 +00:00
Gavin Romig-Koch
5fa71251a0 * vr4320.igen (clz,dclz) : Added.
(dmac): Replaced 99, with LO.
1998-03-10 15:37:24 +00:00
Gavin Romig-Koch
d843d7ca34 * mips/vr4320.igen: Mark the insn in here as vr4320 only.
Reorder the insns.
1998-03-09 20:22:45 +00:00
Frank Ch. Eigler
fd90908986 * Numerous changes & small bug fixes in PKE sim code and test suite.
for sim/testsuite/sky:

	* t-pke4.run: Removed test, since it succeeds yet returns a
 	non-zero exit code.

	* Makefile.in (RUNOPTS): Removed --memory-size flag, made
 	unnecessary by sim/mips/interp.c changes.
	(TESTS): Removed t-pke4.ok target.

	* t-pke3.trc: Classified tests with [---] indicators, to match
 	items up with entries documented in testplan.sgml.  Added numerous
 	additional tests.  They assert behavior that assumes certain
 	favorable answers to PKE question set #6 to SCEI.

	* t-pke1.trc: Added some [---] indicators.

  for sim/mips:

	* sky-pke.c (pke_issue): Revamped interrupt & stall code.  Assume
 	that ER1/ER0/PIS bits are only set if not masked by ERR bits.
  	Signal PIS only if unmasked.
	(pke_code_error): Signal ER1 only if unmasked.
	(pke_pc_fifo): Signal ER0 only if unmasked.
	(pke_code_unpack): Round up num_operands for last operand's
 	partial-word.  Factor out "R" bit handling for better coverage
 	analysis.  Fill upper words of a quadword with zeroes for Vn_m
 	UNPACK with n < 4.

	* sky-device.c (device_error): Made function accept varargs.

	* sky-device.h (device_error): Changed declaration to match.

	* interp.c (sim_open): Made 0x0000 area memory be an alias of
	the K0/K1 segments.  Sanitized code.
1998-03-06 22:46:40 +00:00
Andrew Cagney
6ba4c1539f Fix opcode fields in SHFL.* 1998-03-05 21:32:31 +00:00
Frank Ch. Eigler
370e0ef781 * Fixed a double-buffering bug in PKE, due to naive use of
complex macros with side-effects.  Gripes.
1998-03-05 20:23:59 +00:00
James Lemke
9ce23bf951 * interp.c (sim_open): Map 4M of memory at zero for SKY sim only. 1998-03-04 23:33:36 +00:00
Frank Ch. Eigler
5068e793ef * Merely eliminated silly duplicated code, to raise test coverage.
* sky-pke.c (pke_issue): Move interrupt-handling into decode logic.
	(pke_code_*): Remove duplicated interrupt-handling code.
1998-03-04 19:14:03 +00:00
Ron Unrau
a859684b25 sim-main.h: track SKY register number changes from gdb
interp.c: ditto
1998-03-04 08:47:31 +00:00
Gavin Romig-Koch
dd15abd5a6 * vr4320.igen: New file.
* Makefile.in (vr4320.igen) : Added.
	* configure.in (mips64vr4320-*-*): Added.
	* configure : Rebuilt.
	* mips.igen : Correct the bfd-names in the mips-ISA model entries.
	Add the vr4320 model entry and mark the vr4320 insn as necessary.
1998-03-03 17:03:57 +00:00
Andrew Cagney
ca6f76d135 Fix DIV, DIV1 (wrong check for overflow) and DIVU1 (shouldn't check
for overflow).
Pacify GCC.
1998-03-03 05:39:49 +00:00
Frank Ch. Eigler
f62dff78f9 * Continuing PKE sim unit tests. Found little bugs in VU instead.
* sky-vu1.c (vu1_io_write_register_window): Make CIA (pc) write
 	effective by updating more registers.

	* sky-libvpe.c: Updated to match earlier VU state-change code.

	* sky-vpe.h: Removed unused globals from declarations.
1998-03-03 00:00:09 +00:00
Ron Unrau
8c6a2b75b9 add sky-gdb.c to sky_files 1998-03-02 14:43:52 +00:00
Ron Unrau
aaab4e578d sky-gdb.c: new file - temporary demo version of the sim interface
sky-hardware.c: add sim commands
Makefile.in: build sky-gdb.c
1998-03-01 14:41:38 +00:00
Andrew Cagney
0e701ac37b Add generic sim-info.c:sim_info() function using module mechanism.
Clean up compile probs in mips/vr5400.
1998-02-28 02:51:06 +00:00
Doug Evans
7c5d88c1bb * interp.c (DECLARE_OPTION_HANDLER): Use it.
(mips_option_handler): New argument `cpu'.
	(sim_open): Update call to sim_add_option_table.
1998-02-28 02:43:31 +00:00
Frank Ch. Eigler
f0bb94cd67 * Major endianness fixes on sky code today. The milestone sample and existing
PKE tests run identically on SPARC/Solaris and x86/Linux.

	* sky-pke.c (pke_io_{read,write}_buffer): Endianness fixes aka
 	"E-fixes" in register and FIFO read/writes.
	(pke_code_{pkemscalf,pkemscal}): E-fixes in VU CIA setting.
	(pke_code_{mpg,unpack}): E-fixes in VU memory & tracking updates.
	(pke_code_direct): E-fixes in GPUIF FIFO stuffing.

	* sky-pke.h (PKE_MEM_WRITE): E-fixes in trace file writing.

	* sky-vu0.c (vu0_attach): Allocate micro/data memory with zalloc
 	to guarantee sufficient (16-byte) alignment.

	* sky-vu1.c (vu1_attach): Ditto.
	(vu1_io_read_register_window): *PARTIAL* E-fixes in register accesses.

	* sky-libvpe.c (gif_write): E-fixes in GPUIF FIFO stuffing.

	* sky-gpuif.c (gif_io_{read,write}_buffer): E-fixes in
 	register and FIFO read/writes.

	* sky-dma.c (do_dma_transfer_tag): E-fixes in tag reading.
1998-02-27 21:52:40 +00:00
Frank Ch. Eigler
d22ea5d001 * PKE unit testing continuing. Confusion over PKE1 double-buffering
mechanism is starting to subside.

	* sky-pke.h (PKE_FLAG_INT_NOLOOP): Added device flag to indicate
 	presence of stalled & interrupted PKEcode.

	* sky-pke.c (pke_issue): Added PKEcode interrupt bit handling.
	(pke_flip_dbf): Changed double-buffering logic to match SCEI
 	clarification.
	(pke_code_*): Added interrupt bit stalling clause.
	(pke_code_pkems*): Added ITOP/ITOPS transmission code.
	(pke_code_unpack): Added more careful logic for processing
 	overflows of VU data memory addresses.
1998-02-25 19:34:06 +00:00
Andrew Cagney
f89c0689a1 Finish implementation of r5900 instructions. 1998-02-25 15:31:15 +00:00
Frank Ch. Eigler
89154e47a3 * Unit testing of PKE sim continuing. Only minor VU addressing problems
found today.
1998-02-25 01:13:05 +00:00
Ian Carmichael
733cfc784b * A bunch of changes which get us closer to running the sample. 1998-02-24 23:37:20 +00:00
Andrew Cagney
d3e1d59414 Add tracing to r5900 p* instructions. 1998-02-24 03:42:27 +00:00
Frank Ch. Eigler
b4d2f483b3 * PKE sim unit testing continuing. Starting to run milestone sample.
* sky-pke.h (PKE_MEM_READ): Removed "read" entry from FIFO trace.

	* sky-pke.c (pke_attach): Set trace file to line buffering iff
 	open.
	(pke_io_read_buffer, pke_io_write_buffer): Handle erroneous
 	reads/writes by zero-padding.
	(pke_io_write_buffer): Switch to more bit-field definition macros.
	(pke_issue): Remove "stalled" entry from FIFO trace.
	(pke_pc_advance): Correct logic for DMA-tag-skipping, PKEcode
 	classification.
	(pke_code_mskpath3): Sketch of possible PATH3 masking method.
	(pke_code_mpg): Keep order of lower/upper VU words as supplied.
	(pke_code_unpack): Logic change for wl/cl/num unpacking.  Weird.
1998-02-24 02:10:23 +00:00
Ron Unrau
ce4713dc3b Make it compile again for -DTARGET_SKY 1998-02-23 23:40:40 +00:00
Andrew Cagney
a48e8c8d21 sim-main.h: Re-arange r5900 registers so that they have their own
little struct.
interp.c: Update.  Also add floating point Max/Min functions.
mips.igen: Remove r5900 tag from any floating point instructions.
r5900.igen: Rewrite.  Implement *all* floating point insns (except ld/st).
r5400.igen: Tag mdmx functions as being mdmx specific.
1998-02-23 16:55:38 +00:00
Frank Ch. Eigler
653c259005 * PKE sim unit testing continuing. The DIRECT and MPG instructions
were hammered in today's runs.  Work is beginning in endian-proofing
  the code.

	* sky-pke.c (pke1_issue): Issue on correct PKE device.
	(pke_io_write_buffer, pke_code_mpg, pke_code_unpack): Perform more
 	endian conversions.
	(pke_code_mpg, pke_code_direct): Add operand alignment assertions.
	(pke_code_mpg): Correct VU stall checks.  Correct VU opcode
 	transfer ordering.
	(pke_code_direct): Correct typos in DIRECT operand accessing.
	(pke_code_unpack): Correct conditional sign-extension handling.

	* sky-gpuif.c (gif_io_read_buffer, gif_io_write_buffer): Correct
 	assertion polarity.
	(gif_read_tag): Disable faulty DMA-tag testing code.
1998-02-20 23:59:10 +00:00
Frank Ch. Eigler
534a3d5cf1 * Continuing unit testing of PKE simulator. It now successfully matches
the SCEI PKE simulator's output on its own test sample (tsv432.in).

	* sky-pke.h (PKE_MEM_READ, PKE_MEM_WRITE, PKE_REG_MASK_SET): Add
 	trace file records.

	* sky-pke.c: (pke_track_write): Removed function.  Replaced with
 	in-line modifications to VU tracking tables.
	(pke_attach): Attach VU tracking tables.  Use line buffering on
 	trace files.
	(pke_issue): Spit out additional trace records.
	(pke_pc_operand_bits): Correct bitfield masking error.
	(*): Replace sim_read/write with kludge PKE_MEM_READ/WRITE
 	throughout.
	(pke_code_unpack): Correct numerous small bugs in operand decoding
 	etc.
1998-02-20 01:50:01 +00:00
John Metzler
180d1f0b50 Fall back from using igen to using gencode for the mips64vr4100 because
igen is not ready yet.
1998-02-19 21:28:50 +00:00
Gavin Romig-Koch
f319bab251 * interp.c (load_memory): Add missing "break"'s. 1998-02-19 15:24:10 +00:00
Frank Ch. Eigler
e23069923b * Started PKE sim unit testing. A number of minor errors were corrected.
A few PKE instructions even run correctly!  Next missing function of
  interest: FIFO pruning.

	* sky-pke.c (pke_issue): Take extra SIM_DESC argument.
	(pke_attach): Attach correct PKE0/PKE1 device.  Open trace file if
 	VIF{0,1}_TRACE_FILE env. var. is defined.
	(pke_io_write_buffer): Classify words in FIFO quadword.  Use
 	kludgey sim_core routines to access DMA registers.
	(pke_pc_advance): Add PKEcode classification.  Correct DMA tag
 	skipping.  Emit trace records.
	(pke_pc_fifo): Add PKEcode operand classification.
	(pke_check_stall): Perform stall checks against updated register
 	scheme.
	(pke_code_unpack): Correct operand-count calculation.
	(pke_code_stmask): Correct instruction skipping.

	* sky-pke.h (PKE_MEM_WRITE, PKE_MEM_READ): New kludge macros.
	(BIT_MASK_BTW): Corrected off-by-one error.
	(enum wordclass): Classify words in a FIFO quadword.

	* sky-dma.c (dma_io_read_buffer): Correct address checking assertions.

	* sky-engine.c (engine_run): Pass along SIM_DESC to PKE
 	instruction issue code.
1998-02-18 21:26:38 +00:00
James Lemke
3733e09fb6 DMA define names changed (SRCADDR -> MADR). 1998-02-18 16:47:03 +00:00
Ian Carmichael
374ed20d80 * XGKICK now uses memory-based GIF fifo. 1998-02-17 23:50:35 +00:00
Ian Carmichael
c5efcf3c85 * Added VU0_CIA register #define. 1998-02-16 22:09:57 +00:00
Ian Carmichael
04a7f72aea * Add magic VU1_CIA register. 1998-02-16 22:07:11 +00:00
Ian Carmichael
9c577d9a94 * Partially implement new VPE_STAT register. 1998-02-16 21:44:45 +00:00
Ron Unrau
7aa6042f58 configure: rerun autoconf
interp.c: shield dummy vu registers with -DTARGET_SKY
1998-02-16 04:33:28 +00:00
Ron Unrau
97908603a4 configure.in: add -DTARGET_SKY for mips64r5900-sky-elf configure.
sim-main.h: Define regs for sky if -DTARGET_SKY
interp.c: Initial register upload/download support for sky.
1998-02-15 21:33:13 +00:00
Ian Carmichael
486c714a26 * Vu1 state moved to struct. Host-target endian twiddling. Misc other fixes. 1998-02-14 05:34:08 +00:00
Frank Ch. Eigler
db6dac32c7 - PKE simulation almost finished. Needed enhancements:
* trace file generation
  * FIFO pruning

- PKE functions still missing due to external dependencies:
  * interrupt to 5900 (igen?)
  * VU busy checking (sky-vu / coprocessor registers)
  * PATH3 masking (sky-gpuif / covert control interface)
1998-02-13 23:29:38 +00:00
Patrick Macdonald
8f9acca317 First functional drop of the gpuif code plus modifications to
non-gpuif code to allow sky sim to build with --enable-sim-warnings
1998-02-13 18:02:24 +00:00
James Lemke
5d5a459fd1 Update DMA register addresses 1998-02-11 23:19:52 +00:00
Frank Ch. Eigler
43a6998b41 - PKE simulation code almost complete. Still missing:
* handling of super duper packed UNPACK arguments
  * skipping of in-progress instruction on break/stop
  * interrupt generation to 5900
  * PATH2/PATH3 status checking & masking
  * ability to write to FIFO one word (instead of quadword) at a time
1998-02-11 19:42:15 +00:00
Ian Carmichael
52793fab2f * Many changes to make sky sim build with --enable-sim-warnings. 1998-02-10 20:08:16 +00:00
Ian Carmichael
dde66fa756 * Make it so vu.bin is an optional file. 1998-02-10 00:13:54 +00:00
Ian Carmichael
2c88fae9ad * Add hardware_init hook. 1998-02-09 23:53:33 +00:00
Andrew Cagney
452b380811 Fix double dependency for itable.[hc]. Was causing both the mips16 and the
normal mips simulators to be built.
1998-02-07 06:24:51 +00:00
Frank Ch. Eigler
fba9bfed2d - Added almost all code needed for PKE0/1 simulation. Considers
clarifications given in SCEI question/answer batches #1 and #2.
1998-02-07 00:12:14 +00:00
Doug Evans
f3534b6867 sky sanitization 1998-02-06 03:27:55 +00:00
Doug Evans
5759734b2c * Makefile.in (SIM_SKY_OBJS,MIPS_EXTRA_OBJS): New vars.
(SIM_OBJS): Add $(MIPS_EXTRA_OBJS).
	* configure.in: Set mips_extra_objs to sky files if mips64r59*-sky-*.
	* configure: Regenerated.
1998-02-06 03:19:56 +00:00
Doug Evans
72db5610de Prepend sky- to sky header file names. 1998-02-06 03:11:44 +00:00
Doug Evans
803f52b9dc Second pass at moving sky files into mips dir,
prepend sky- to all #include's of sky headers.
1998-02-06 03:09:03 +00:00
Doug Evans
aea481da17 First pass at moving sky stuff from ../txvu to mips dir. 1998-02-06 02:29:22 +00:00
Andrew Cagney
8c9ee21e2f New files, update .Sanitize 1998-02-05 22:08:33 +00:00
Andrew Cagney
37379a256b IGEN - Replace IMEM (IMEM_IMMED) macro with IMEM<insn-size> macro,
update v850, tic80 and mips simulators.
IGEN - Prepend prefix to more generated symbols and macros
(idecode_issue, instruction_word).
IGEN - Add -Wnowith option to supress warnings about word size
inflicts in input files.
MIPS - Clean up Makefile.in, m16.igen, m16.dc (new), m16run.c (new) so
that a mips16 simulator built using IGEN can be compiled.
1998-02-03 05:39:15 +00:00
Andrew Cagney
4634263c4c Make IGEN the generator for all but mips16 simulators.
Clean up botched merge in interp.c:sim_open().
1998-02-02 14:14:17 +00:00
Andrew Cagney
a97f304b04 Add support for configuring the size of the floating point unit (fp_word).
For mips, move fp_registers into a separate array of type fp_word[].
1998-02-02 14:06:52 +00:00
Andrew Cagney
2acd126a47 Rewrite the mipsI/II/III pending-slot code. 1998-02-02 13:49:17 +00:00
Andrew Cagney
192ae475f9 Always compile FP code (test for FP at run-time).
Remove dependance of interp.c on gencode.c's output.
1998-02-02 08:25:33 +00:00
Andrew Cagney
01737f42d8 mips: Add multi-processor support for r5900. Others might work.
common, igen: Fix MP related bugs.
1998-02-01 03:29:48 +00:00
Andrew Cagney
412c4e940e Add config support for the size of the target address and OF cell. 1998-01-31 14:07:23 +00:00
Andrew Cagney
c4db5b04f8 mips - for r5900 generate igen simulator.
igen - stop crash when simulator isn't multi-sim'ed
1998-01-31 06:56:13 +00:00
Andrew Cagney
9ec6741b17 igen: Fix SMP simulator generator support.
Use the bfd-processor name in the sim-engine switch.
	Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
	Update
mips:	Fill in bfd-processor field of model records so that
	they match ../bfd/archures.
1998-01-31 06:23:41 +00:00
Andrew Cagney
2d44e12a27 Use macro GPR_SET(N,VAL) to clear zero registers. 1998-01-21 22:08:37 +00:00
Doug Evans
462cfbc4eb * aclocal.m4: Recognize --enable-maintainer-mode.
*/configure: Regenerated.
1998-01-20 06:37:00 +00:00
Andrew Cagney
13151a934d Document existence of old (gencode) and new (igen) MIPS ISA simulators. 1998-01-16 01:09:15 +00:00
Mark Alexander
e0e0fc765e * interp.c (sim_monitor): Handle Densan monitor outbyte
and inbyte functions.
1998-01-05 23:43:30 +00:00
Felix Lee
76ef416550 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c). 1997-12-29 16:03:23 +00:00
Andrew Cagney
9c8ec16d78 In nrun.c, look for sigaction & SA_RESTART. When both present,
install cntrl-c (SIGINT) handler with no SA_RESTART bit set.
1997-12-15 12:33:59 +00:00
Andrew Cagney
b17d2d1474 For MADD et.al. instructions sign extend 32 bit result assigned to a
register.
1997-12-13 04:23:31 +00:00
Jeff Law
255cbbf190 * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
vr5400 with the vr5000 as the default.
1997-12-12 19:24:34 +00:00
Jeff Law
23850e9219 * mips.igen (MSUB): Fix to work like MADD.
* gencode.c (MSUB): Similarly.
1997-12-11 00:11:04 +00:00
Andrew Cagney
c02ed6a8a3 For bfd, add vr5400 and vr5000 mips machine variants to list of machines.
For sim/mips, enable multi-sim support when mips64vr5400-elf is target.
For sim/igen, allow specification of a default machine (will need
more work later).
1997-12-09 04:01:06 +00:00
Doug Evans
6e51f990a2 Regenerate configure files. 1997-12-04 17:26:06 +00:00
Andrew Cagney
0931ce5aa7 Missing change log entry. 1997-12-03 22:54:44 +00:00
Andrew Cagney
0d5d0d102d Fix typo in format argument to sim_io_eprintf. 1997-11-26 12:07:27 +00:00
Andrew Cagney
35c246c9d7 Move MDMX instructions which are public knowledge from vr5400.igen
into mdmx.igen (MDMX is MMX on steroids).  Keep the file secret.
1997-11-26 11:47:36 +00:00
Andrew Cagney
8c31916d92 sanitize-r5900 not v5900 1997-11-25 22:02:59 +00:00
Andrew Cagney
58fb5d0a4f vr5400 sanitize cleanups 1997-11-25 21:47:16 +00:00
Andrew Cagney
9dcdd9ad73 Sanitization 1997-11-24 13:34:52 +00:00
Andrew Cagney
232156dee9 o Add SIM_SIGFPE to sim-signals
o Start SIM_SIG* at 64 so that the use of host signal numbers can be
  detected and reported.
o Update MIPS simulator to use sim-signal.
1997-11-20 09:50:36 +00:00
Andrew Cagney
a09a30d298 Allow reads/writes to C0_CONFIG register. 1997-11-20 09:17:06 +00:00
Doug Evans
486740ce01 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). 1997-11-18 23:40:40 +00:00
Andrew Cagney
f23e93dab0 * mips.igen: Tag vr5000 instructions.
(ANDI): Was missing mipsIV model, fix assembler syntax.
        (do_c_cond_fmt): New function.
        (C.cond.fmt): Handle mips I-III which do not support CC field
        separatly.
        (bc1): Handle mips IV which do not have a delaed FCC separatly.
        (SDR): Mask paddr when BigEndianMem, not the converse as specified
        in IV3.2 spec.
        (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
        vr5000 which saves LO in a GPR separatly.
        * configure.in (enable-sim-igen): For vr5000, select vr5000
        specific instructions.
        * configure: Re-generate.
1997-11-14 08:27:38 +00:00
Andrew Cagney
a94c5493a7 Make the signess of compares between GPR's explicit using a cast to
signed_word.
1997-11-11 12:31:24 +00:00
Andrew Cagney
030843d7f8 Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,
SWXC1MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1, MULT, MULTU, BEQZ, ...MTHI,
MFHI instructions.
Trace nullified instruction.
1997-11-11 07:50:13 +00:00
Andrew Cagney
95469cebdd Replace global IPC with function argument cia or current instruction
address.
Pass cia into calls to sim_engine_stop so that breakpoints et.al. work.
1997-11-06 14:24:57 +00:00
Andrew Cagney
7ce8b9178c IGEN likes to cache the current instruction address (CIA). Change the
MIPS simulator so that correctly writes the value of CIA back int PC
(the global previously used) when the simulation halts.
Fix implementation of DELAY_SLOT and NULLIFY_NEXT_INSTRUCTION macros.
1997-11-06 09:16:16 +00:00
Andrew Cagney
44b8585a3d Add option --enable-sim-igen to mips configuration. Allows user to
attempt a build of an older MIPS simulator using igen.
1997-11-05 09:43:34 +00:00
Andrew Cagney
63be8febf7 Rewrite the MIPS simulator's memory model so that it uses the generic
common/sim-core.

Add support for 3, 5, 6, 7 byte transfers to sim core.
1997-11-05 08:17:26 +00:00
Andrew Cagney
22de994d0e Delete -l and -n options, didn't do anything.
Rename option trace to dinero-trace & dinero-file - -t clashed with
common options.
Enable common trace options.
1997-11-05 01:08:12 +00:00
Andrew Cagney
525d929e49 Rewrite sim_monitor (implements read, write, open, et.al. system
calls) and sim_open so that they uses the virtual memory data transfer
functions sim_read & sim_write.  This eliminates all code (other than
in load_memory & store_memory) that makes assumptions about the
implementation of the underlying memory model.
1997-11-05 00:08:14 +00:00
Gavin Romig-Koch
0425cfb3af Correct r5900 sanitization. 1997-11-04 05:50:22 +00:00
Gavin Romig-Koch
6205f37913 * gencode.c: Add tx49 configury and insns.
* configure.in: Add tx49 configury.
	* configure: Update.
1997-10-29 19:42:49 +00:00
Andrew Cagney
01b9cd49ca common/sim-bits.h: Document ROTn macro.
igen/{igen.c,ld-insns.h}: Document mnemonic string formats.
mips/Makefile.in: Add dependencies for files included by mips.igen
mips/vr5400.igen: checkpoint vr5400 instructions.
1997-10-29 04:02:30 +00:00
Andrew Cagney
89d0973831 Add support for 16 byte quantities to sim-endian macro H2T.
Add model-filter field to option, include, model anf function igen records
1997-10-28 07:10:36 +00:00
Andrew Cagney
16bd5d6e52 Separate r5900 specifoc and mips16 instructions.
Add support for this to configure (vr5400 target only)
1997-10-27 07:55:24 +00:00
Andrew Cagney
90ad43b2de Add mips64vr5400 to configuration list
Mark mipsIV instructions as being implemented by the vr5400.
Sanitize.
1997-10-27 06:42:13 +00:00
Gavin Romig-Koch
635ae9cb7c * sim/mips/gencode.c (build_instruction): Follow sim_write's lead in using
BigEndianMem instead of !ByteSwapMem.
1997-10-25 20:53:46 +00:00
Andrew Cagney
122edc03de Add basic igen configuration to autoconf. Disable. 1997-10-24 07:54:21 +00:00
Andrew Cagney
dad6f1f326 Add function to fetch 32bit instructions
When address translation of insn fetch fails raise exception immediatly.
Use address_word as type of all address variables (instead of unsigned64),
the former is configured as either 32 or 64 bit type.
Always compile fpu code (no #if has fpu)
1997-10-24 06:43:51 +00:00
Andrew Cagney
49a7683337 Checkpoint IGEN version of mips sim 1997-10-24 06:38:44 +00:00
Andrew Cagney
92ad193bb0 Use SIM*_OVERFLOW_RESULT defined in sim-alu.h 1997-10-21 07:57:33 +00:00
Andrew Cagney
aa324b9b1e Output pc profile statistics once gathered. 1997-10-21 07:40:00 +00:00
Andrew Cagney
e2f8ffb736 Delete profile support from MIPS simulator, use sim/common/sim-profile
module instead.
Generate a "gmon.out" (gprof) when profiling the target PC.
Add target PC profiling option --profile-pc-granularity (bucket size)
1997-10-21 03:41:21 +00:00
Andrew Cagney
fb5a2a3e39 Make mips registers of type unsigned_word.
Ensure all references to MIPS registers use same type.
1997-10-20 06:28:53 +00:00
Andrew Cagney
ea985d2472 Move register definitions and macros out of interp.c and into sim-main.h 1997-10-16 03:50:48 +00:00
Andrew Cagney
085c1cb988 Checkpoint IGEN version of MIPS simulator. 1997-10-16 03:41:57 +00:00
Andrew Cagney
284e759d1f Rename generated file engine.c to oengine.c. 1997-10-16 03:39:13 +00:00
Andrew Cagney
339fb14904 * gencode.c (build_instruction): Use FPR_STATE not fpr_state. 1997-10-16 03:29:47 +00:00
Andrew Cagney
8b70f83790 * gencode.c (build_instruction): For "FPSQRT", output correct number
of arguments to Recip.
1997-10-16 03:23:16 +00:00
Andrew Cagney
055ee2977f Checkpoint IGEN version of MIPS simulator. 1997-10-14 09:34:08 +00:00
Andrew Cagney
0c2c5f6141 Move global MIPS simulator variables into sim_cpu struct. 1997-10-14 09:26:03 +00:00
Andrew Cagney
18c64df613 o Add support for configuring wordsize, fp hardware and target
endianness.  Provide defaults for some tier-1 mips targets.
o	Parameterize all functions with SIM_DESC.
1997-10-14 07:27:31 +00:00
Andrew Cagney
49a6eed58a Snap. Gets through igen's checks. 1997-10-09 08:38:22 +00:00
Andrew Cagney
f2b3001251 MIPS/IGEN checkpoint - doesn't build. 1997-10-08 04:16:01 +00:00
Andrew Cagney
391c71708e Checkpoint IGEN input file for MIPS simulator. 1997-10-07 08:45:11 +00:00
Andrew Cagney
adf4739efe Add access to hi part of r5900 128 bit registers. 1997-09-30 03:45:51 +00:00
Bob Manson
26b20b0a0e * configure: Regenerated.
Can't hack one without the other...
1997-09-29 21:46:32 +00:00
Mark Alexander
6eedf3f4e5 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB. 1997-09-26 20:56:55 +00:00
Andrew Cagney
af51b8d56d Add/use SIM_AC_OPTION_BITSIZE. 1997-09-25 07:19:05 +00:00
Andrew Cagney
e63bc706fe Allow gencode.c to generate input to the igen generator. 1997-09-25 04:23:24 +00:00
Andrew Cagney
eb2e3c85ca Pacify GCC -Wall 1997-09-25 04:13:50 +00:00
Jeff Law
832f05e865 vr5900-r5900. 1997-09-23 16:21:23 +00:00
Andrew Cagney
92f91d1ff0 Remove need to update <targ>/Makefile.in when adding optional options
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
1997-09-23 01:25:26 +00:00
Andrew Cagney
76a6247f07 Add memory alignment config option. 1997-09-22 09:40:57 +00:00
Andrew Cagney
794e9ac96a Simplify logic behind the generic configuration option --enable-sim-alignment. 1997-09-22 02:49:57 +00:00
Andrew Cagney
b45caf050c Add support for --enable-sim-alignment to simulator common aclocal.m4
Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
1997-09-22 00:24:46 +00:00
Gavin Romig-Koch
c476ac5560 Add handling for 3900's SDBBP, DERET, and RFE insns.
* gencode.c (SDBBP,DERET): Added (3900) insns.
	(RFE): Turn on for 3900.
	* interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
	(dsstate): Made global.
	(SUBTARGET_R3900): Added.
	(CANCELDELAYSLOT): New.
	(SignalException): Ignore SystemCall rather than ignore and
	terminate.  Add DebugBreakPoint handling.
	(decode_coproc): New insns RFE, DERET; and new registers Debug
	and DEPC protected by SUBTARGET_R3900.
	(sim_engine_run): Use CANCELDELAYSLOT rather than clearing
	bits explicitly.
	* Makefile.in,configure.in: Add mips subtarget option.
	* configure: Update.
1997-09-20 18:22:22 +00:00
Gavin Romig-Koch
7afa8d4edc * gencode.c: Add r3900 (tx39).
* gencode.c: Fix some configuration problems by improving
	the relationship between tx19 and tx39.
1997-09-19 13:39:55 +00:00
Gavin Romig-Koch
667065d0d4 * sim/mips/gencode.c (build_instruction): Don't need to subtract 4 for
JALR, just 2.
1997-09-16 20:01:00 +00:00
Gavin Romig-Koch
9cb8397f86 * sim/mips/interp.c: Correct some HASFPU problems. 1997-09-16 15:36:18 +00:00
Andrew Cagney
a2ab5e65eb Update to reflect change to sim/common/aclocal.m4 (allow sim/common
directory to specify its own unqiue config.h file).
1997-09-15 08:25:04 +00:00
Andrew Cagney
11ac69e013 Short form of sample-size option had wrong value. 1997-09-12 02:29:04 +00:00
Andrew Cagney
972f3a34f5 mips/sim_info was just returning????? 1997-09-10 23:50:32 +00:00
Gavin Romig-Koch
318b499d8e Support tx19 sanitation. 1997-09-10 04:53:18 +00:00
Andrew Cagney
9eeaaefa0f Better word error messages. 1997-09-09 10:38:39 +00:00
Andrew Cagney
c31c13b481 Remove GCC specific `0x...LL', replace with SIGNED64 (0x...). 1997-09-09 07:02:02 +00:00
Gavin Romig-Koch
b637f306ba tx19 and related necessary changes.
* config.sub: Add tx19/r1900.
	* sim/mips/configure.in, sim/mips/gencode: Add tx19/r1900.
	* gcc/config.sub, gcc/configure: Add tx19/r1900.
	* gcc/config/mips/r1900.h, config/mips/t-r1900: New.
	* gas/config/tc-mips.c: Add tx19/r1900.

	* gcc/config/mips/mips.c: Don't build 16 bit to 32 bit stubs for
	TARGET_SOFT_FLOAT.

	* config.sub: Add "marketing-names" patch.
	* gcc/config.sub: Add "marketing-names" patch.

	* gcc/configure: Change "as" link from "../gas/as.new" to "../gas/as-new";
	Same for "ld" link.
1997-09-07 20:33:22 +00:00
David Edelsohn
6fea47635b * configure: Regenerated to track ../common/aclocal.m4 changes. 1997-09-05 00:42:05 +00:00
Andrew Cagney
52352d38d6 Test/fix pabsh, pabsw, psrlvw. 1997-09-01 09:47:03 +00:00
Andrew Cagney
8811705410 Fix doco on enable-sim-inline. 1997-08-27 22:43:18 +00:00
Andrew Cagney
fafce69ab1 Add ABFD argument to sim_create_inferior. Document.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
1997-08-27 04:44:41 +00:00
Andrew Cagney
7230ff0faa Flush defunct sim_kill. 1997-08-26 02:05:18 +00:00
Andrew Cagney
247fccdeb5 Add ABFD argument to sim_open call. Pass through to sim_config so
that image properties such as endianness can be checked.

More strongly document the expected behavour of each of the sim_*
interfaces.

Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN.  Use in sim_config.
1997-08-25 23:14:25 +00:00
Andrew Cagney
9204a35e78 Handle overflow from signed divide by -1. 1997-07-28 13:46:53 +00:00
Gavin Romig-Koch
c12e2e4c48 gencode.c: Two arg MADD should not assign result to /bin/bash. 1997-07-25 19:10:05 +00:00
Andrew Cagney
1e851d2c82 Fix a number of problems in the r5900 specific p* (parallel) instructions.
In particular a host endian dependency one fixed resolved most problems.
1997-07-11 03:07:29 +00:00
Jeff Law
6443523484 * gencode.c (build_instruction): Handle "pext5" according to
version 1.95 of the r5900 ISA.
Fixes pr12413 (c/h from toshiba).
1997-07-02 18:41:22 +00:00
Jeff Law
649625bb8e * gencode.c (build_instruction): Handle "ppac5" according to
version 1.95 of the r5900 ISA.
fixes pr12407 (c/h from toshiba).
1997-07-02 18:29:16 +00:00
Jeff Law
05d1322f2c * interp.c (sim_engine_run): Reset the ZERO register to zero
regardless of FEATURE_WARN_ZERO.
1997-07-02 18:13:00 +00:00
Jeff Law
ae19b07bf8 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
Fix for pr12402 (c/h from toshiba).
1997-07-02 17:57:56 +00:00
Andrew Cagney
56e7c84918 o Fixes to repeated watchpoints
o	Add mips ISA instructions needed to handle interrupts
1997-06-03 23:03:50 +00:00