Commit Graph

119224 Commits

Author SHA1 Message Date
Simon Marchi
4113c737bd gdb: make program_space::free_all_objfiles use this
Use `this` instead of `current_program_space`.  Presumably, the method
wants to check the solibs of "this" program space, not the current
global program space (although they are likely always the same at the
moment).

Change-Id: Iaf0534f36bfd47c04c53ed0657da332bdb8fb906
Approved-By: Tom Tromey <tom@tromey.com>
Reviewed-By: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
2024-07-15 14:34:12 -04:00
Simon Marchi
b8c9d0de90 gdb: pass program space to no_shared_libraries
Make the current program space reference bubble up one level.  Pass
`current_program_space` everywhere, except in some cases where we can
get the pspace another way, and it's relatively obvious that it's the
same as the current program space.

Change-Id: Id86b79f1e44f92a398f49d137d57457174dfa96d
Approved-By: Tom Tromey <tom@tromey.com>
Reviewed-By: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
2024-07-15 14:34:12 -04:00
Simon Marchi
89dc60d957 gdb: split no_shared_libraries, command vs implementation
The `no_shared_libraries` function is currently used to implement the
`nosharedlibrary` command, but it also used internally by other
functions.  This does not make a very good internal API.

Add the `no_shared_libraries_command` function to implement the CLI
command.  Remove the unused parameters from `no_shared_libraries`.

Remove the `from_tty` parameter of `target_pre_inferior`, since it's now
unused.

Change-Id: I4fcba5ee1e0f7d250aab1a7b62b9ea16265fe962
Approved-By: Tom Tromey <tom@tromey.com>
Reviewed-By: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
2024-07-15 14:34:12 -04:00
Simon Marchi
98793b838c gdb: pass program space to objfile_purge_solibs
Make the current program space reference bubble up one level.

Change-Id: I08cfa77a0351c9602131ed2a294eabb1f1f59a6e
Approved-By: Tom Tromey <tom@tromey.com>
Reviewed-By: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
2024-07-15 14:34:12 -04:00
Simon Marchi
93016848f9 gdb: use objfile::pspace in objfile::unlink
I think it would make sense to use objfile::pspace instead of the
current program space here.  It reduces the risks of calling this
method with the wrong current program space set.

Change-Id: Id4f3644719f232640c83a1c7f4aa92eaa6af6c5c
Approved-By: Tom Tromey <tom@tromey.com>
Reviewed-By: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
2024-07-15 14:34:12 -04:00
Simon Marchi
574b77fccb gdb: remove some trivial uses of current_program_space
It is obvious that pspace is the same as current_program_space in these
cases, due to the set_current_program_space call just above.  The rest
of the functions probably care about the current program space though,
so leave the set_cset_current_program_space calls there.

Change-Id: I3c300decbf2c2fe5f25aa7f697ebcb524432394f
2024-07-15 11:07:29 -04:00
Hannes Domani
25c2284095 Fix loading a saved recording
Currently you get this assertion failure if you try to execute the
inferior after loading a saved recording, when no recording was done
earlier in the same gdb session:
```
$ gdb -q c -ex "record restore test.rec"
Reading symbols from c...
[New LWP 26428]
Core was generated by `/tmp/c'.
Restored records from core file /tmp/test.rec.
(gdb) c
Continuing.
../../gdb/inferior.c:293: internal-error: inferior* find_inferior_pid(process_stratum_target*, int): Assertion `pid != 0' failed.
A problem internal to GDB has been detected,
further debugging may prove unreliable.
```

The change in step-precsave.exp triggers this bug, since now the
recording is loaded in a new gdb session, where
record_full_resume_ptid was never set.

The fix is to simply set record_full_resume_ptid when resuming a loaded
recording.

Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31971
Approved-By: Guinevere Larsen <blarsen@redhat.com>
2024-07-15 16:31:20 +02:00
Simon Marchi
134a0a106c gdb: make objfile::pspace private
Rename to m_pspace, add getter.  An objfile's pspace never changes, so
no setter is necessary.

Change-Id: If4dfb300cb90dc0fb9776ea704ff92baebb8f626
2024-07-15 13:55:00 +00:00
Szabolcs Nagy
d21176c014 aarch64: Fix --no-apply-dynamic-relocs for RELR
The option only makes sense for RELA relative relocs where the
addend is present, not for RELR relative relocs.

Fixes bug 31924.
2024-07-15 13:42:22 +01:00
Nick Clifton
323b56a7ab Synchronize config.[sub|guess] with the latest versions from the config project. 2024-07-15 10:22:54 +01:00
GDB Administrator
50e33eb079 Automatic date update in version.in 2024-07-15 00:00:09 +00:00
John David Anglin
a48e485c7c hppa: Fix handling of relocations that apply to data
Commit d125f96753 introduced a bug
in handling relocations for data.  The R_PARISC_DIR32 relocation
operates on 32-bit data and not instructions.  The HOWTO table
needs to be used to determine the format of relocations that apply
to data.  The R_PARISC_SEGBASE relocation is another special case
as it only changes segment base.

This was noticed in Debian cmor package build.

2024-07-14  John David Anglin  <danglin@gcc.gnu.org>

bfd/ChangeLog:

	* elf32-hppa.c (final_link_relocate): Use HOWTO table to
	determine reload format for relocations that apply to data.
2024-07-14 07:22:13 -04:00
GDB Administrator
7846287a38 Automatic date update in version.in 2024-07-14 00:00:10 +00:00
Maciej W. Rozycki
e8723b48d9 Revert "MIPS: Use N64 by default for mips*64*-*-linux-gnuabi64"
This reverts commit d49f2dd78b.  It was
applied unapproved.
2024-07-13 06:00:44 +01:00
Maciej W. Rozycki
61022df13c Revert "MIPS/GAS: Omit LI 0 for condition trap"
This reverts commit bfa257b407.  It was
applied unapproved.
2024-07-13 06:00:43 +01:00
Lulu Cai
7478277414 LoongArch: Fix dwarf3 test cases from XPASS to PASS
In the past, the .align directive generated a label that did not match
the regular expression, and we set it to XFAIL.
But now it matches fine so it becomes XPASS. We fix it with PASS.
2024-07-13 10:00:02 +08:00
GDB Administrator
e8fbf31961 Automatic date update in version.in 2024-07-13 00:00:11 +00:00
Sam James
ed8025a576
libiberty: sync with gcc
This imports the following commits from GCC as of r15-1722-g7682d115402743:
	ca2f7c84927f libiberty: Invoke D demangler when --format=auto
	94792057ad4a Fix up duplicated words mostly in comments, part 1
	20e57660e64e libiberty: Fix error return value in pex_unix_exec_child [PR113957].
	52ac4c6be866 [libiberty] remove TBAA violation in iterative_hash, improve code-gen
	53bb7145135c libiberty: Fix up libiberty_vprintf_buffer_size
	65388b28656d c++, demangle: Implement https://github.com/itanium-cxx-abi/cxx-abi/issues/148 non-proposal
2024-07-12 22:47:58 +01:00
Jens Remus
6f8b365b65 s390: Avoid reloc overflows on undefined weak symbols (cont)
This complements and reuses logic from Andreas Krebbel's commit
896a639bab ("s390: Avoid reloc overflows on undefined weak symbols").

Replace relative long addressing instructions of weak symbols, which
will definitely resolve to zero, with either a load address of 0 or a
a trapping insn.

This prevents the PLT32DBL relocation from overflowing in case the
binary will be loaded at 4GB or more.

bfd/
	* elf64-s390.c (elf_s390_relocate_section): Replace
	instructions using undefined weak symbols with relative
	addressing to avoid relocation overflows.

ld/
	* testsuite/ld-s390/s390.exp: Add new test.
	* testsuite/ld-s390/weakundef-2.s: New test.
	* testsuite/ld-s390/weakundef-2.dd: Likewise.

Reported-by: Alexander Gordeev <agordeev@linux.ibm.com>
Suggested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Suggested-by: Andreas Krebbel <krebbel@linux.ibm.com>
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2024-07-12 16:53:47 +02:00
Jens Remus
83511d2679 s390: Do not replace brcth referencing undefined weak symbol
Branch Relative on Count High (brcth) is a conditional branch relative
instruction. It is not guaranteed that it only appears within loops
that sooner or later will take the branch. It may very well be used to
check a condition that will prevent the branch from ever being taken.

bfd/
	* elf64-s390.c (elf_s390_relocate_section): Do not replace brcth
	referencing undefined weak symbol with a trap.

ld/
	* testsuite/ld-s390/weakundef-1.s: Update test case accordingly.
	* testsuite/ld-s390/weakundef-1.dd: Likewise.

Fixes: 896a639bab ("s390: Avoid reloc overflows on undefined weak symbols")
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2024-07-12 16:53:47 +02:00
Srinath Parvathaneni
7bdb051fd6 aarch64: Add support for sme2.1 zero instructions.
This patch adds support for following sme2.1 zero instructions and
the spec is available here [1].

1. ZERO (single-vector).
2. ZERO (double-vector).
3. ZERO (quad-vector).

The VECTOR GROUP symbols VGx2 and VGx4 are optional for the assembler
for most of the sme and sve instructions. But for few of the sme2.1
zero instruction variants VECTOR GROUP symbols VGx2 and VGx4 are mandatory.
To address this a bit "F_VG_REQ" is introduced in this patch, on setting
F_VG_REQ bit in flags of aarch64_opcode forces the assembler to accept
instruction operand only having VECTOR GROUP symbols.

[1]: https://developer.arm.com/documentation/ddi0602/2024-03/SME-Instructions?lang=en
2024-07-12 15:41:56 +01:00
Srinath Parvathaneni
6ab366f264 aarch64: Add support for sme2.1 movaz instructions.
This patch adds support for following sme2.1 movaz instructions and
the spec is available here [1].

1. MOVAZ (array to vector, two registers).
2. MOVAZ (array to vector, four registers).
3. MOVAZ (tile to vector, single).

[1]: https://developer.arm.com/documentation/ddi0602/2024-03/SME-Instructions?lang=en
2024-07-12 15:40:48 +01:00
Srinath Parvathaneni
9858d3031e aarch64: Add support for sme2.1 luti2 and luti4 instructions.
This patch adds support for following sme2.1 luti2 and luti4 instructions, spec is
available here [1]

1. LUTI2 (two registers) strided.
2. LUTI2 (four registers) strided.
3. LUTI4 (two registers) strided.
4. LUTI4 (four registers) strided.

[1]: https://developer.arm.com/documentation/ddi0602/2024-03/SME-Instructions?lang=en
2024-07-12 15:39:15 +01:00
Jan Beulich
246b21d777 x86: drop unnecessary \() from bundle tests
':' isn't permitted in macro parameter names, hence this separator
construct isn't necessary at the end of labels. Drop its use in such
cases, for being potentially confusing (and hampering readability, even
if only a little).
2024-07-12 12:28:50 +02:00
Jan Beulich
3367789048 x86/APX: remove two inconsistencies
As indicated in earlier discussion, permitting GOTTPOFF uniformly for
all legacy non-SIMD insns while at the same time restricting to just
certain ADD forms when EVEX-encoded is inconsistent. Make promoted insns
"equal" to their legacy original ones. Doing that adjustment prevents
another inconsistency, too: In

	data16 neg (%rax)
	data16 neg (%r16)
	data16 {nf} neg (%rax)

it is not logical why the last one shouldn't be permitted. Bypassing
that check requires other adjustments, though, to actually properly
consume (and then squash) the data size prefix.

While there also add the missing CMP and TEST cases to the test case
being modified.
2024-07-12 12:28:03 +02:00
Jan Beulich
eb81ff85a0 x86/APX: correct TEST/CTESTcc with 1st operand being a memory one
While they properly inherited D and C, code processing the reversal of
operands wasn't updated accordingly (and "reversed" operands also
weren't tested anywhere).
2024-07-12 12:27:19 +02:00
YunQiang Su
bfa257b407 MIPS/GAS: Omit LI 0 for condition trap
MIPSr6 removes condition trap instructions with imm, so we expand
the instruction like "tne $2,IMM" to
	li	$at,IMM
	tne	$2,$at
While if IMM is 0, we can use
	tne	$2,$zero
only.
2024-07-12 18:19:35 +08:00
YunQiang Su
d49f2dd78b MIPS: Use N64 by default for mips*64*-*-linux-gnuabi64
the ABI section of the triple explicitly asks for N64,
and in fact GCC also does so.

It can fix the test failure:
  FAIL: libdep test: did not get expected output from the linker
with Debian's mipsisa64r6el-linux-gnuabi64 toolchain.
2024-07-12 18:19:27 +08:00
Matthieu Longo
0d988fbb4e aarch64: disable feature b16b16
Feature b16b16 is currently incomplete and requires re-work.

Disable the command line option for b16b16, and mark the associated
tests as XFAIL.
2024-07-12 11:05:35 +01:00
Vladimir Mezentsev
f769dcdb01 gprofng: add release notes for 2.43
ChangeLog
2024-07-10  Vladimir Mezentsev  <vladimir.mezentsev@oracle.com>.

	* binutils/NEWS (gprofng): Add release notes for 2.43
2024-07-11 21:27:10 -07:00
Alan Modra
d686a2b688 Re: base64: Add support for targets with byte size > octet size.
Three extra octets are now expected with the latest change to base64.s.
They happened to be covered by patterns allowing for zero padding at
the end of the section, but we don't want to allow fewer octets than
expected.

	PR 31964
	* testsuite/gas/all/base64.d: Adjust.
2024-07-12 13:01:52 +09:30
GDB Administrator
1ccffa40d5 Automatic date update in version.in 2024-07-12 00:00:09 +00:00
Nick Clifton
a790949155 base64: Add support for targets with byte size > octet size.
PR 31964
2024-07-11 12:52:32 +01:00
Jan Beulich
0cec3ce570 gas: don't open-code IS_WHITESPACE() / IS_NEWLINE()
Better be consistent in use of the wrapper macros, which imo also helps
readability.
2024-07-11 12:27:18 +02:00
Jan Beulich
296597f53e gas: multi-byte warning adjustments
First input_scrub_next_buffer()'s invocation was wrong, leading to input
only being checked from the last newline till the end of the current
buffer. Correcting the invocation, however, leads to duplicate checking
unless -f (or the #NO_APP equivalent thereof) is in effect. Move the
invocation to input_file_give_next_buffer(), to restrict it accordingly.

Then, when macros contain multi-byte characters, warning about them
again in every expansion isn't useful. Suppress such warnings from
sb_scrub_and_add_sb().
2024-07-11 12:26:36 +02:00
Jan Beulich
8ea8012a8b gas: there's no scrubber state 12
Apparently (beyond what's [easily] visible in git history) when this was
added there was confusion about scrubber states vs lex[] contents. For
the purposes here LEX_IS_DOUBLEDASH_1ST (which happens to also resolve
to 12) alone is sufficient. "state" is never set to 12, and it being 12
also isn't handled anywhere.
2024-07-11 12:25:26 +02:00
Kévin Le Gouguec
5e07665d4c gdb: add testcase for invalid record display
More of a DWARF-generation non-regression test; fixed on the GCC side
with 2024-06-03 "Implement wrap-around arithmetics in DWARF
expressions" (f3d6d60d2ae).

Approved-By: Tom Tromey <tom@tromey.com>
2024-07-11 11:48:29 +02:00
Cui, Lili
cef946b6f4 X86: Update gas/NEWS for Intel APX.
gas/ChangeLog:

        * NEWS: Update gas/NEWS for Intel APX.
2024-07-11 14:35:24 +08:00
Tsukasa OI
25f05199bb RISC-V: Add platform property/capability extensions
RISC-V Profiles document defines number of "extensions" that indicate
certain platform properties/capabilities just like 'Zkt' extension from the
RISC-V cryptography extensions.

This commit defines 20 platform property/capability extensions as defined
in the RISC-V Profiles documentation.

The only exception: 'Ssstateen' extension is defined separately because it
defines a subset (supervisor/hypervisor view) of the 'Smstateen' extension.

This is based on the ratified version of RISC-V Profiles:
<https://github.com/riscv/riscv-profiles/releases/tag/v1.0>

[Definition]

"Main memory regions":
    Main memory regions (in contrast to I/O or vacant memory regions) with
    both the cacheability and coherence PMAs.

[New Unprivileged Extensions]

1.  'Ziccif'
    "Main memory regions" support instruction fetch and any instruction
    fetches of naturally aligned power-of-2 sizes up to min(ILEN, XLEN)
    are atomic.
2.  'Ziccrse'
    "Main memory regions" provide the eventual success guarantee for
    LR/SC sequence (RsrvEventual).
3.  'Ziccamoa'
    "Main memory regions" support all currently-defined AMO operations
    including swap, logical and arithmetic operations (AMOArithmetic).
4.  'Za64rs'
    For LR/SC instructions, reservation sets are contiguous, naturally
    aligned and at most 64-bytes in size.
5.  'Za128rs'
    Likewise, but reservation sets are at most 128-bytes in size.
6.  'Zicclsm'
    Misaligned loads / stores to "main memory regions" are supported.
    Those include both regular scalar and vector accesses but does not
    include AMOs and other specialized forms of memory accesses.
7.  'Zic64b'
    Cache blocks are (exactly) 64-bytes in size and naturally aligned.

[New Privileged Extensions]

1.  'Svbare'
    "satp" mode Bare is supported.
2.  'Svade'
    Page-fault exceptions are raised when a page is accessed when A bit is
    clear, or written when D bit is clear.
3.  'Ssccptr'
    "Main memory regions" support hardware page-table reads.
4.  'Sstvecd'
    "stvec" mode Direct is supported.  When "stvec" mode is Direct,
    "stvec.BASE" is capable of holding any valid 4-byte aligned address.
5.  'Sstvala'
    "stval" is always written with a nonzero value whenever possible as
    specified in the Privileged Architecture documentation
    (version 20211203: see section 4.1.9).
6.  'Sscounterenw'
    For any "hpmcounter" that is not read-only zero, the corresponding bit
    in "scounteren" is writable.
7.  'Ssu64xl'
    "sstatus.UXL" is capable of holding the value 0b10
    (UXLEN==64 is supported).
8.  'Shcounterenw'
    Similar to 'Sscounterenw' but the same rule applies to "hcounteren".
9.  'Shvstvala'
    Similar to 'Sstvala' but the same rule applies to "vstval".
10. 'Shtvala'
    "htval" is written with the faulting guest physical address as long as
    permitted by the ISA (a bit similar to 'Sstvala' and 'Shvstvala').
11. 'Shvstvecd'
    Similar to 'Sstvecd' but the same rule applies to "vstvec".
12. 'Shvsatpa'
    All translation modes supported in "satp" are also supported in "vsatp".
13. 'Shgatpa'
    For each supported virtual memory scheme SvNN supported in "satp", the
    corresponding "hgatp" SvNNx4 mode is supported.  The "hgatp" mode Bare
    is also supported.

[Implications]

(Due to reservation set size constraints)
-   'Za64rs' -> 'Za128rs'

(Due to the fact that a privileged "extension" directly refers a CSR)
-   'Svbare'       -> 'Zicsr'
-   'Sstvecd'      -> 'Zicsr'
-   'Sstvala'      -> 'Zicsr'
-   'Sscounterenw' -> 'Zicsr'
-   'Ssu64xl'      -> 'Zicsr'

(Due to the fact that a privileged "extension" indirectly depends on CSRs)
-   'Svade' -> 'Zicsr'

(Due to the fact that a privileged "extension" is a hypervisor property)
-   'Shcounterenw' -> 'H'
-   'Shvstvala'    -> 'H'
-   'Shtvala'      -> 'H'
-   'Shvstvecd'    -> 'H'
-   'Shvsatpa'     -> 'H'
-   'Shgatpa'      -> 'H'

bfd/
	* elfxx-riscv.c (riscv_implicit_subsets): Updated for property
	and capability extensions.
	(riscv_supported_std_z_ext): Added zic64b, ziccamoa, ziccif, zicclsm,
	ziccrse, za64rs and za128rs extensions.
	(riscv_supported_std_s_ext): Added shcounterenw, shgatpa, shtvala,
	shvsatpa, shvstvala, shvstvecd, ssccptr, sscounterenw, sstvala,
	sstvecd, ssu64xlm svade and svbare extensions.
gas/
	* testsuite/gas/riscv/imply.d: Updated for property and capability
	extensions.
	* testsuite/gas/riscv/imply.s: Likewise.
	* testsuite/gas/riscv/march-help.l: Likewse.
2024-07-11 12:58:27 +08:00
Alan Modra
4cf957e7ac Re: Add support for a .base64 pseudo-op to gas
Fixes a failure on rx-elf where the standard data section isn't .data.
run_dump_test has machinery to translate .data in both options and
expected results for objdump, but not for readelf -x.

	PR 31964
	* testsuite/gas/all/base64.d: Dump .data with objdump.  Run on
	all targets.
2024-07-11 11:13:15 +09:30
Jinyang He
b357aca749 LoongArch: Not alloc dynamic relocs if symbol is absolute
The absolute symbol should be resolved to const when link to dso or exe.
Alloc dynamic relocs will cause extra space and R_LARCH_NONE finally.
2024-07-11 09:27:22 +08:00
GDB Administrator
82ed416538 Automatic date update in version.in 2024-07-11 00:00:15 +00:00
H.J. Lu
aa047105e0 x86-64: Skip -z mark-plt tests on MUSL
Skip -z mark-plt tests, which are specific to glibc, on MUSL.

	PR ld/31970
	* ld/testsuite/ld-x86-64/x86-64.exp: Skip -z mark-plt tests on
	MUSL.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2024-07-10 16:50:52 -07:00
Yixuan Chen
762c38d552 RISC-V:[gprofng] Minimal support gprofng for riscv.
ChangeLog: Add target riscv to --enable-gprofng.

2024-07-04  Yixuan Chen  <chenyixuan@iscas.ac.cn>

        * configure: Add riscv.
        * configure.ac: Add riscv.

gprofng/ChangeLog: Minimal support gprofng for riscv.

2024-07-04  Yixuan Chen  <chenyixuan@iscas.ac.cn>

        * gprofng/common/core_pcbe.c (core_pcbe_init): Add RISC-V vendor conditon.
        (defined): Add riscv.
        * gprofng/common/cpuid.c (defined): Add risc-v hwprobe.
        * gprofng/common/gp-defs.h (TOK_A_RISCV): Add riscv.
        (defined): Add riscv.
        (ARCH_RISCV): Add riscv.
        * gprofng/common/hwc_cpus.h: Add RISC-V vendor.
        * gprofng/common/hwcfuncs.h (HW_INTERVAL_TYPE): Remove useless defination.
        * gprofng/configure: Add riscv.
        * gprofng/configure.ac: Add riscv.
        * gprofng/libcollector/hwprofile.h (ARCH): Add RISC-V register.
        (CONTEXT_PC): Add RISC-V register.
        (CONTEXT_FP): Add RISC-V register.
        (CONTEXT_SP): Add RISC-V register.
        (SETFUNCTIONCONTEXT):
        * gprofng/libcollector/libcol_util.c (__collector_util_init): Fix libc open condition.
        * gprofng/libcollector/libcol_util.h (ARCH): Add RISC-V.
        * gprofng/libcollector/unwind.c (ARCH): Add RISC-V register.
        (GET_PC): Add RISC-V register.
        (GET_SP): Add RISC-V register.
        (GET_FP): Add RISC-V register.
        (FILL_CONTEXT):
        * gprofng/src/DbeSession.cc (ARCH): Add RISC-V.
        * gprofng/src/Disasm.cc (Disasm::disasm_open): Add RISC-V.
        * gprofng/src/Experiment.cc (Experiment::ExperimentHandler::startElement): Add RISC-V.
        * gprofng/src/checks.cc (ARCH): Add RISC-V.
        * gprofng/src/collctrl.cc (defined): Set risc-v cpu frequency to 1000MHz as default for now, will fix when I find a better method to get cpu frequency.
        (read_cpuinfo): Add "mvendorid" condition according to risc-v /proc/cpuinfo file content.
        * gprofng/src/dbe_types.h (enum Platform_t): Add RISC-V.
2024-07-10 15:16:03 -07:00
Nick Clifton
479edf0a6a Add support for a .base64 pseudo-op to gas
PR 31964
2024-07-10 15:01:39 +01:00
Clément Chigot
1ca8994049 libsframe: remove runstatedir in Makefile.in
The regeneration was made with Ubuntu automake which has this runstatedir
additional variable, compared to the usual automake.
2024-07-10 10:24:45 +02:00
Clément Chigot
db79be6121 libsframe: accept --target configure option
Libsframe was missing AC_CANONICAL_TARGET, meaning that --target was
ignored. This could prevent libsframe.a to be installed in some cases,
the host fetching its canonical value while the target isn't. Both
having a different value, INSTALL_LIBBFD would be false.
2024-07-10 10:13:45 +02:00
GDB Administrator
a4a220f266 Automatic date update in version.in 2024-07-10 00:00:36 +00:00
H.J. Lu
7757f66fdb elf: Add glibc version dependency only if needed
There is no need to add a needed glibc version if the glibc base version
includes the needed glibc version.

	PR ld/31966
	* elflink.c (elf_link_add_glibc_verneed): Add glibc_minor_base.
	Skip if the glibc base version includes the needed glibc version.
	(_bfd_elf_link_add_glibc_version_dependency): Initialize
	glibc_minor_base to INT_MAX and pass it to
	elf_link_add_glibc_verneed.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2024-07-09 14:34:54 -07:00
Vladimir Mezentsev
971ae1844e gprofng: add hardware counters for Intel Ice Lake processor
gprofng/ChangeLog
2024-07-07  Vladimir Mezentsev  <vladimir.mezentsev@oracle.com>.

	* common/hwc_cpus.h: New constant for Intel Ice Lake processor.
	* common/hwcdrv.c: Add a new argument to hwcfuncs_get_x86_eventsel.
	Set config1 in perf_event_attr. Remove the use of memset.
	* common/core_pcbe.c (core_pcbe_get_eventnum): Return 0.
	* common/hwcentry.h: Add config1.
	* src/collctrl.cc (Coll_Ctrl::build_data_desc):Set config1.
	* common/hwcfuncs.c (process_data_descriptor): Set config1.
	* common/hwctable.c: Add the hwc table for Intel Ice Lake processor.
	* src/hwc_intel_icelake.h: New file.
2024-07-09 10:50:05 -07:00