Commit Graph

4013 Commits

Author SHA1 Message Date
Mike Frysinger
760b3e8bc9 sim: common: split up acinclude.m4 into individual m4 files
This file is quite large and is getting unmanageable.  Split it apart
to follow aclocal best practices by putting one-macro-per-file.  There
shouldn't be any real functional changes here as can be seen in the
configure script regens.
2021-02-21 02:20:19 -05:00
Mike Frysinger
3e8bb3e934 sim: merge configure.tgt into configure.ac
One fewer file to worry about & manage.
2021-02-20 10:35:27 -05:00
Nelson Chu
5a9f5403c7 RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.
* Renamed obsolete UJ/SB types and RVC types, also added CSS/CL(CS) types,

[VALID/EXTRACT/ENCODE macros]
BTYPE_IMM:            Renamed from SBTYPE_IMM.
JTYPE_IMM:            Renamed from UJTYPE_IMM.
CITYPE_IMM:           Renamed from RVC_IMM.
CITYPE_LUI_IMM:       Renamed from RVC_LUI_IMM.
CITYPE_ADDI16SP_IMM:  Renamed from RVC_ADDI16SP_IMM.
CITYPE_LWSP_IMM:      Renamed from RVC_LWSP_IMM.
CITYPE_LDSP_IMM:      Renamed from RVC_LDSP_IMM.
CIWTYPE_IMM:          Renamed from RVC_UIMM8.
CIWTYPE_ADDI4SPN_IMM: Renamed from RVC_ADDI4SPN_IMM.
CSSTYPE_IMM:          Added for .insn without special encoding.
CSSTYPE_SWSP_IMM:     Renamed from RVC_SWSP_IMM.
CSSTYPE_SDSP_IMM:     Renamed from RVC_SDSP_IMM.
CLTYPE_IMM:           Added for .insn without special encoding.
CLTYPE_LW_IMM:        Renamed from RVC_LW_IMM.
CLTYPE_LD_IMM:        Renamed from RVC_LD_IMM.
RVC_SIMM3:            Unused and removed.
CBTYPE_IMM:           Renamed from RVC_B_IMM.
CJTYPE_IMM:           Renamed from RVC_J_IMM.

* Added new operands and removed the unused ones,

C5: Unsigned CL(CS) immediate, added for .insn directive.
C6: Unsigned CSS immediate, added for .insn directive.
Ci: Unused and removed.
C<: Unused and removed.

bfd/
    PR 27158
    * elfnn-riscv.c (perform_relocation): Updated encoding macros.
    (_bfd_riscv_relax_call): Likewise.
    (_bfd_riscv_relax_lui): Likewise.
    * elfxx-riscv.c (howto_table): Likewise.
gas/
    PR 27158
    * config/tc-riscv.c (riscv_ip): Updated encoding macros.
    (md_apply_fix): Likewise.
    (md_convert_frag_branch): Likewise.
    (validate_riscv_insn): Likewise.  Also arranged operands, including
    added C5 and C6 operands, and removed unused Ci and C< operands.
    * doc/c-riscv.texi: Updated and added CSS/CL/CS types.
    * testsuite/gas/riscv/insn.d: Added CSS/CL/CS instructions.
    * testsuite/gas/riscv/insn.s: Likewise.
gdb/
    PR 27158
    * riscv-tdep.c (decode_ci_type_insn): Updated encoding macros.
    (decode_j_type_insn): Likewise.
    (decode_cj_type_insn): Likewise.
    (decode_b_type_insn): Likewise.
    (decode): Likewise.
include/
    PR 27158
    * opcode/riscv.h: Updated encoding macros.
opcodes/
    PR 27158
    * riscv-dis.c (print_insn_args): Updated encoding macros.
    * riscv-opc.c (MASK_RVC_IMM): defined to ENCODE_CITYPE_IMM.
    (match_c_addi16sp): Updated encoding macros.
    (match_c_lui): Likewise.
    (match_c_lui_with_hint): Likewise.
    (match_c_addi4spn): Likewise.
    (match_c_slli): Likewise.
    (match_slli_as_c_slli): Likewise.
    (match_c_slli64): Likewise.
    (match_srxi_as_c_srxi): Likewise.
    (riscv_insn_types): Added .insn css/cl/cs.
sim/
    PR 27158
    * riscv/sim-main.c (execute_i): Updated encoding macros.
2021-02-19 11:44:49 +08:00
Mike Frysinger
b0dcd7d832 sim: testsuite: push $arch out to targets
This is needed to move to automake & its dejagnu-provided logic,
and eventually by the unified sim logic.  The $arch is used only
to figure out which `run` program to use when running tests, and
as we move to a single top-level build, we can delete this and
use sim/run directly.
2021-02-13 12:14:25 -05:00
Mike Frysinger
9ee455572d sim: rx: mitigate fread warning
Current toolchains warn about unused result from fread, so mitigate
the edge case if fread returns short data.  It's not great, but it
gets things building again.
2021-02-13 02:44:36 -05:00
Mike Frysinger
136da8cd9c sim: switch to AC_CONFIG_MACRO_DIRS
Rather than hand maintain m4 includes in various autotool files,
use AC_CONFIG_MACRO_DIRS to declare the relevant search paths.
This simplifies the code, makes it more robust, and cleans out
unused logic from configure.
2021-02-13 00:24:20 -05:00
Mike Frysinger
652f80e07b sim: common: delete unused aclocal.m4
This was missed when we deleted the common/configure build logic.
2021-02-13 00:17:45 -05:00
Andrew Burgess
6bf99988c6 sim/rx: enable build with warnings
The rx simulator now has no build warnings.  Delete the call to
SIM_AC_OPTION_WARNINGS in configure.ac, the default yes will be
provided by SIM_AC_OUTPUT.

sim/rx/ChangeLog:

	* configure: Regenerate.
	* configure.ac (SIM_AC_OPTION_WARNINGS): Delete call.
2021-02-08 11:01:07 +00:00
Andrew Burgess
da9ecd6085 sim/rx: avoid pointer arithmetic on void * pointers
Pointer arithmetic on void * pointers results in a GCC warning.  Avoid
the warning by casting the pointer to its actual type earlier in the
function.

sim/rx/ChangeLog:

	* mem.c (mem_put_blk): Rename parameter, add cast from parameter
	type to local type.  Remove cast later in the function.
	(mem_get_blk): Likewise.
	* mem.h (mem_put_blk): Rename parameter to match definition.
	(mem_get_blk): Likewise.
2021-02-08 11:01:07 +00:00
Andrew Burgess
fab2b376e3 sim/rx: add some missing includes
In load.c there's some GCC warnings about undefined
functions (bfd_get_elf_phdr_upper_bound and bfd_get_elf_phdrs).  To
get the declarations of these functions include 'elf-bfd.h'.  This
headers also pulls in other elf related headers, like 'elf/internal.h'
and 'elf/common.h', so these no longer need to be explicitly included
from load.c.

In trace.c and include for trace.h is missing, again this results in
GCC warnings for missing function declarations.

sim/rx/ChangeLog:

	* load.c: Replace 'elf/internal.h' and 'elf/common.h' includes
	with 'elf-bfd.h' include.
	* trace.c: Add 'trace.h' include.
2021-02-08 11:01:07 +00:00
Andrew Burgess
ae41b4ce9f sim/rx: use PRIx64 in printf format string
Silence a GCC compiler warning by using PRIx64 in printf format string
instead of hard coded "llx".

sim/rx/ChangeLog:

	* reg.c (trace_register_changes): Use PRIx64 in printf format
	string.
2021-02-08 11:01:07 +00:00
Andrew Burgess
783a7b12d3 sim/rx: move some variable declarations to the start of the block
For sim code variables still need to be declared at the start of the
enclosing block.  This silences a few GCC warnings.

sim/rx/ChangeLog:

	* syscalls.c (rx_syscall): Move declaration of some variables to
	the start of the enclosing block.
	* trace.c (load_file_and_line): Likewise.
2021-02-08 11:01:07 +00:00
Andrew Burgess
b9fe995797 sim/rx: provide a format string for printf
Calling printf with the format being a non constant string results in
a GCC warning:

  warning: format not a string literal and no format arguments [-Wformat-nonliteral]

Provide a constant format string to printf in the few places this
warning is triggered.

sim/rx/ChangeLog:

	* reg.c (fpsw2str): Provide a format string to printf.
	(trace_register_changes): Likewise.
2021-02-08 11:01:07 +00:00
Andrew Burgess
4b42639636 sim/rx: delete an unused function
This function is not used.

sim/rx/ChangeLog:

	* err.c (execution_error_exit_all): Delete.
2021-02-08 11:01:07 +00:00
Andrew Burgess
73d4725f21 sim/rx: mark some functions as static
Some functions that should be marked static.

sim/rx/ChangeLog:

	* fpu.c (check_exceptions): Make static.
	* gdb-if.c (handle_step): Likewise.
	* mem.c (mem_put_byte): Likewise.
2021-02-08 11:01:07 +00:00
Andrew Burgess
1c3e93a41f sim/rx: fill in missing 'void' for empty argument lists
Ensure we have 'void' inside empty argument lists.  This was causing
several warnings for the rx simulator.

sim/rx/ChangeLog:

	* cpu.h (trace_register_changes): Add void parameter type.
	* err.c (ee_overrides): Likewise.
	* mem.c (mem_usage_stats): Likewise.
	(e): Likewise.
	* reg.c (stack_heap_stats): Likewise.
	* rx.c (pop): Likewise.
	(poppc): Likewise.
	(decode_opcode): Likewise.
	* syscalls.c (arg): Likewise.
2021-02-08 11:01:07 +00:00
Andrew Burgess
93a01471f3 sim/rx: fix an issue where we try to modify a const string
While experimenting with switching on warnings for the rx simulator I
discovered this bug.  In sim_do_command we get passed a 'const char *'
argument.  We create a copy of this string to work with locally, but
then while processing this we accidentally switch back to reference
the original string.

sim/rx/ChangeLog:

	* gdb-if.c (sim_do_command): Work with a copy of the command.
2021-02-08 11:01:07 +00:00
Andrew Burgess
0309f9549d sim/rx: define sim_memory_map
The rx simulator doesn't define sim_memory_map and so fails to link
with GDB.  Define it now to return NULL, this can be extended later to
return an actual memory map if anyone wants this functionality.

sim/rx/ChangeLog:

	* gdb-if.c (sim_memory_map): New function.
2021-02-08 11:01:07 +00:00
Mike Frysinger
7a9bd3b4e2 sim: erc32/m32c/rl78: add sim_memory_map stub for gdb
These ports don't use the common sim core, so they weren't providing
a sim_memory_map for gdb, so they failed to link with the new memory
map logic added for the sim.  Add stubs to fix.
2021-02-06 12:15:34 -05:00
Mike Frysinger
4c0d76b9c4 sim: watchpoints: use common sim_pc_get
Few arches implement STATE_WATCHPOINTS()->pc while all of them implement
sim_pc_get.  Lets switch the sim-watch core for monitoring pc events to
the sim_pc_get API so this module works for all ports, and then we can
delete this old back channel of snooping in the port's cpu state -- the
code needs the pointer to the pc storage so that it can read out bytes
and compare them to the watchrange.

This also fixes the logic on multi-cpu sims by removing the limitation
of only being able to watch CPU0's state.
2021-02-06 12:12:51 -05:00
Mike Frysinger
cd89c53f6d sim: add ChangeLog entries for last commits 2021-02-06 12:07:08 -05:00
Mike Frysinger
8e25beb4af sim: igen: drop libiberty linkage
This dir doesn't use anything from libiberty, so drop the linkage.
2021-02-06 12:01:40 -05:00
Mike Frysinger
7a36eeea26 sim: common: switch AC_CONFIG_HEADERS
The AC_CONFIG_HEADER macro is long deprecated, so switch to the
newer form.  This also gets rid of the position limitation, and
drops support for an argument to SIM_AC_COMMON which we haven't
used anywhere.
2021-02-06 12:00:42 -05:00
Mike Frysinger
aa09469fc6 sim: drop use of bfd/configure.host
These settings might have made sense in darker compiler times, but I
think they're largely obsolete now.  Looking through the values that
get used in HDEFINES, it's quite limited, and configure itself should
handle them.  If we still need something, we can leverage standard
autoconf macros instead, after we get a clear user report.

TDEFINES was never set anywhere and was always empty, so prune that.
2021-02-06 10:56:11 -05:00
Mike Frysinger
04b4939b03 gdb: riscv: enable sim integration
Now the simulator can be loaded via gdb using "target sim".
2021-02-04 19:15:17 -05:00
Mike Frysinger
b9249c461c sim: riscv: new port
This is a hand-written implementation that should have fairly complete
coverage for the base integer instruction set ("i"), and for the atomic
("a") and integer multiplication+division ("m") extensions.  It also
covers 32-bit & 64-bit targets.

The unittest coverage is a bit weak atm, but should get better.
2021-02-04 19:02:19 -05:00
Mike Frysinger
6451541244 sim: cgen-trace: tweak printf call
GCC warns that we pass a non-string literal as the format string,
so add an explicit "%s" to make it happy.
2021-01-31 17:31:44 -05:00
Mike Frysinger
bccec180ce sim: bpf: fix mainloop extract call
The extract function takes the argbuf, not the scache.
2021-01-31 17:19:38 -05:00
Mike Frysinger
ba2f0de216 sim: bpf/or1k: fix CGEN_TRACE_EXTRACT name
We renamed these years ago, but it looks like the cgen core missed the
TRACE_EXTRACT function, so these new ports still used the incompatible
common name.  Fix those ports to use the right func.
2021-01-31 17:08:49 -05:00
Stafford Horne
5bc4f5ca15 sim: cgen-accfp: Fix pointer sign warnings
When compiling we get the following warnings:

  common/cgen-accfp.c: In function 'fixsfsi':
  common/cgen-accfp.c:370:18: warning: pointer targets in passing argument 1 of 'sim_fpu_to32i' differ in signedness [-Wpointer-sign]
     sim_fpu_to32i (&res, &op1, sim_fpu_round_near);
                    ^
  common/cgen-accfp.c: In function 'fixdfsi':
  common/cgen-accfp.c:381:18: warning: pointer targets in passing argument 1 of 'sim_fpu_to32i' differ in signedness [-Wpointer-sign]
     sim_fpu_to32i (&res, &op1, sim_fpu_round_near);
                    ^
2021-01-31 15:26:58 -05:00
Mike Frysinger
5f05936d9b sim: v850: cleanup build warnings
This port only had one minor warning left in it, so fix it and then
enable -Werror behavior by deleting the macro call.  We'll use the
common default now (which is -Werror).
2021-01-31 15:19:16 -05:00
Mike Frysinger
44b30b7f0e sim: v850: fix handling of SYS_times
My recent rewrite of the nltvals generator fixed a bug where SYS_times
was not being exported for v850.  But that in turn uncovered this bug
where the SYS_times codepath had a compile error.
2021-01-31 15:15:33 -05:00
Mike Frysinger
3c811346e9 sim: moxie: cleanup build warnings
This port only had one minor warning left in it, so fix it and then
enable -Werror behavior by deleting the macro call.  We'll use the
common default now (which is -Werror).
2021-01-31 12:06:29 -05:00
Mike Frysinger
9a7ba4aa0e sim: common: change gennltvals helper to Python
This tool is only run by developers and not in a release build,
so rewrite it in Python to make it more maintainable.
2021-01-30 20:17:46 -05:00
Mike Frysinger
683b8d961e sim: m68hc11: fix printf size warnings
GCC complains %llu is wrong for signed64, so switch to PRIi64.
2021-01-30 10:40:26 -05:00
Mike Frysinger
b9e016f517 sim: m68hc11: localize a few functions
These are only used in this file and lack prototypes, so gcc
complains about it.  Add static everywhere to clean that up.
2021-01-30 10:28:38 -05:00
Mike Frysinger
fb8d4e59af sim: m68hc11: tweak printf-style funcs
GCC complains that we past non-string literals to a printf style func,
so put a %s in here to keep it quiet.
2021-01-30 10:25:04 -05:00
Mike Frysinger
ee64caae5b sim: m68hc11: include stdlib.h for prototypes
These files use abort() & strtod(), so include stdlib.h for them.
2021-01-30 10:21:15 -05:00
Mike Frysinger
d4e3adda12 sim: watchpoints: change sizeof_pc to sizeof(sim_cia)
Existing ports already have sizeof_pc set to the same size as sim_cia,
so simply make that part of the core code.  We already assume this in
places by way of sim_pc_{get,set}, and this is how it's documented in
the sim-base.h API.

There is code to allow sims to pick different register word sizes from
address sizes, but most ports use the defaults for both (32-bits), and
the few that support multiple register sizes never change the address
size (so address defaults to register).  I can't think of any machine
where the register hardware size would be larger than the address word
size either.  We have ABIs that behave that way (e.g. x32), but the
hardware is still equivalent register sized.
2021-01-30 10:14:21 -05:00
Mike Frysinger
18d4b488f4 sim: profile: fix bucketing with 64-bit targets
When the target's PC is 64-bits, this shift expands into a range of
8 * 8 - 1 which doesn't work with 32-bit constants.  Force it to be
a 64-bit value all the time and let the compiler truncate it.
2021-01-30 01:15:04 -05:00
Mike Frysinger
88f68ee277 sim: m68hc11: stop making hardware conditional
This port doesn't build if these hardware modules are omitted, and
there's no reason we need to make it conditional at build time, so
always enable it.  The hardware devices only get turned on if the
user requests it at runtime via hardware settings.
2021-01-30 01:09:38 -05:00
Mike Frysinger
f4dd74915b sim: hw: replace fgets with getline
This avoids fixed sized buffers on the stack.
2021-01-30 01:07:58 -05:00
Mike Frysinger
481fac96bd sim: common: sort nltvals.def
This was largely already done, but I think people didn't quite notice.
2021-01-30 01:00:07 -05:00
Mike Frysinger
008a02e36d sim: readd myself as a maintainer 2021-01-29 22:11:45 -05:00
Maciej W. Rozycki
c651f0a614 MAINTAINERS: Update my e-mail address
binutils/
	* MAINTAINERS: Update my e-mail address.

	gdb/
	* MAINTAINERS: Update my e-mail address.

	sim/
	* MAINTAINERS: Update my e-mail address.
2021-01-22 00:10:39 +00:00
Mike Frysinger
c65ca138c4 sim: ppc: update version script usage
This matches the changes in the common code.
2021-01-19 10:54:06 -05:00
Mike Frysinger
0e7620dcdc sim: bfin: delete accidental ADI copyright
This wasn't supposed to be in here when it was first merged as we
had specifically disabled it for all the tests (and ADI has papers
in place w/the FSF).  Clean up this one.
2021-01-18 21:30:12 -05:00
Mike Frysinger
f89f33e57c sim: common: simplify version script
We don't use the host & target aliases, so don't bother emitting them.
2021-01-18 12:25:57 -05:00
Mike Frysinger
5e25901fcc sim: common: delete configure & Makefile
This was mostly orphaned a while back, but left behind so people could
still run `make headers`.  Merge that one target to the top sim dir and
delete all the build logic.  This should avoid confusing people further.
2021-01-18 12:23:18 -05:00
Mike Frysinger
4cfcd3b333 sim: common: modernize gennltvals.sh
It's not 1996 anymore, so stop writing shell code like it is, and
rewrite it with modern POSIX shell standards.  This makes it much
more user friendly.

Then regenerate the file with latest newlib sources to verify.
2021-01-18 12:19:19 -05:00