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1080 Commits

Author SHA1 Message Date
Kyrylo Tkachov
38e75bf223 [AArch64][gas] Add support for Neoverse N1 
This adds support for the Neoverse N1 [1] CPU to gas.
This was previously enabled under the Ares codename, which remains as
a valid option for -mcpu for compatibility reasons.

make check-gas passes on aarch64-none-elf.

[1] https://community.arm.com/processors/b/blog/posts/arm-neoverse-n1-platform-accelerating-the-transformation-to-a-scalable-cloud-to-edge-infrastructure

2019-02-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

    * config/tc-aarch64.c (aarch64_cpus): Add neoverse-n1.
    * doc/c-aarch64.texi (-mcpu): Document neoverse-n1 value.
 2019-02-22 09:56:50 +00:00
Paul Hua
6f2117ba38 Fix a potential deadlock in some older Loongson 3A1000 MIPS processors. 
* NEWS: Mention -m[no-]fix-loongson3-llsc.
	* configure.ac: Add --enable-mips-fix-loongson3-llsc.
	Define DEFAULT_MIPS_FIX_LOONGSON3_LLSC.
	* config.in: Regenerated.
	* configure: Likewise.
	* config/tc-mips.c (sync_insn, mips_fix_loongson3_llsc):
	New variables.
	(options): New OPTION_FIX_LOONGSON3_LLSC,
	OPTION_NO_FIX_LOONGSON3_LLSC.
	(md_longopts): Add -m[no-]fix-loongson3-llsc.
	(md_begin): Initialize sync insn.
	(fix_loongson3_llsc): New.
	(append_insn): Call fix_loongson3_llsc.
	(md_parse_option): Handle OPTION_FIX_LOONGSON3_LLSC,
	OPTION_NO_FIX_LOONGSON3_LLSC.
	(md_show_usage): Display -m[no-]fix-loongson3-llsc.
	* doc/c-mips.texi: Document -m[no-]fix-loongson3-llsc,
	--enable-mips-fix-loongson3-llsc=[yes|no].
 2019-02-19 17:57:16 +00:00
H.J. Lu
db22231044 gas: Pass max_bytes to TC_FRAG_INIT 
ommit 3ae729d5a4
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Mar 7 04:18:45 2018 -0800

    x86: Rewrite NOP generation for fill and alignment

increased MAX_MEM_FOR_RS_ALIGN_CODE to 4095 which resulted in increase
of assembler time and memory usage by 5 times for inputs with many
.p2align directives, which is typical for LTO output.  This patch passes
max_bytes to TC_FRAG_INIT so that MAX_MEM_FOR_RS_ALIGN_CODE can be set
as needed and tracked by backend it so that HANDLE_ALIGN can check the
maximum alignment for each rs_align_code frag.  Wall time to assemble
the same cc1plus.s:

before:

423.78user 0.89system 7:05.71elapsed 99%CPU

after:

102.35user 0.27system 1:42.89elapsed 99%CPU

	PR gas/24165
	* frags.c (frag_var_init): Pass max_chars to TC_FRAG_INIT as
	max_bytes.
	* config/tc-aarch64.h (TC_FRAG_INIT): Add and pass max_bytes to
	aarch64_init_frag.
	* /config/tc-arm.h (TC_FRAG_INIT): And and pass max_bytes to
	arm_init_frag.
	* config/tc-avr.h (TC_FRAG_INIT): And and ignore max_bytes.
	* config/tc-ia64.h (TC_FRAG_INIT): Likewise.
	* config/tc-mmix.h (TC_FRAG_INIT): Likewise.
	* config/tc-nds32.h (TC_FRAG_INIT): Likewise.
	* config/tc-ns32k.h (TC_FRAG_INIT): Likewise.
	* config/tc-rl78.h (TC_FRAG_INIT): Likewise.
	* config/tc-rx.h (TC_FRAG_INIT): Likewise.
	* config/tc-score.h (TC_FRAG_INIT): Likewise.
	* config/tc-tic54x.h (TC_FRAG_INIT): Likewise.
	* config/tc-tic6x.h (TC_FRAG_INIT): Likewise.
	* config/tc-xtensa.h (TC_FRAG_INIT): Likewise.
	* config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Set to
	(alignment ? ((1 << alignment) - 1) : 1)
	(i386_tc_frag_data): Add max_bytes.
	(TC_FRAG_INIT): Add and track max_bytes.
	(HANDLE_ALIGN): Replace MAX_MEM_FOR_RS_ALIGN_CODE with
	fragP->tc_frag_data.max_bytes.
	* doc/internals.texi: Update TC_FRAG_TYPE with max_bytes.
 2019-02-10 04:34:22 -08:00
Andreas Krebbel
fc60b8c806 S/390: Implement instruction set extensions 
opcodes/ChangeLog:

2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>

	* s390-mkopc.c (main): Accept arch13 as cpu string.
	* s390-opc.c: Add new instruction formats and instruction opcode
	masks.
	* s390-opc.txt: Add new arch13 instructions.

include/ChangeLog:

2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>

	* opcode/s390.h (enum s390_opcode_cpu_val): Add
	S390_OPCODE_ARCH13.

gas/ChangeLog:

2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/tc-s390.c (s390_parse_cpu): New entry for arch13.
	* doc/c-s390.texi: Document arch13 march option.
	* testsuite/gas/s390/s390.exp: Run the arch13 related tests.
	* testsuite/gas/s390/zarch-arch13.d: New test.
	* testsuite/gas/s390/zarch-arch13.s: New test.
	* testsuite/gas/s390/zarch-z13.d: Expect the renamed mnemonics
	also for z13.
 2019-01-31 17:32:18 +01:00
Jim Wilson
2dc8dd17cd RISC-V: Support ELF attribute for gas and readelf. 
2019-01-16  Kito Cheng  <kito@andestech.com>
		    Nelson Chu  <nelson@andestech.com>

	bfd/
	* elfnn-riscv.c (riscv_elf_obj_attrs_arg_type): New.
	(elf_backend_obj_attrs_vendor): Define.
	(elf_backend_obj_attrs_section_type): Likewise.
	(elf_backend_obj_attrs_section): Likewise.
	(elf_backend_obj_attrs_arg_type): Define as
	riscv_elf_obj_attrs_arg_type.
	* elfxx-riscv.c (riscv_estimate_digit): New.
	(riscv_estimate_arch_strlen1): Likewise.
	(riscv_estimate_arch_strlen): Likewise.
	(riscv_arch_str1): Likewise.
	(riscv_arch_str): Likewise.
	* elfxx-riscv.h (riscv_arch_str): Declare.
	binutils/
	* readelf.c (get_riscv_section_type_name): New function.
	(get_section_type_name): Add handler for RISC-V.
	(riscv_attr_tag_t): Declare.
	(riscv_attr_tag): New.
	(display_riscv_attribute): New function.
	(process_attributes): Add handler for RISC-V.
	* testsuite/binutils-all/strip-3.d: Remove .riscv.attribute
	section.
	gas/
	* config/tc-riscv.c (DEFAULT_RISCV_ATTR): Define to 0 if not defined.
	(riscv_set_options): Add `arch_attr` field.
	(riscv_opts): Set default value for arch_attr.
	(riscv_write_out_arch_attr): New.
	(riscv_set_public_attributes): Likewise.
	(riscv_md_end): Likewise.
	(riscv_convert_symbolic_attribute): Likewise.
	(s_riscv_attribute): Likewise.
	(explicit_arch_attr): Likewise.
	(riscv_pseudo_table): Add .attribute to the table.
	(options): Add OPTION_ARCH_ATTR and OPTION_NO_ARCH_ATTR
	enumeration constants.
	(md_longopts): Add `march-attr' and `mno-arch-attr' options.
	(md_parse_option): Handle the new options.
	(md_show_usage): Document the `march-attr' option.
	* config/tc-riscv.h (md_end): Define as riscv_md_end
	(riscv_md_end): Declare.
	(CONVERT_SYMBOLIC_ATTRIBUTE): Define as
	riscv_convert_symbolic_attribute.
	(riscv_convert_symbolic_attribute): Declare.
	(start_assemble): Declare.
	* testsuite/gas/elf/elf.exp: Adjust test case for section2.e.
	* testsuite/gas/elf/section2.e-riscv: New.
	* testsuite/gas/riscv/attribute-01.d: New test
	* testsuite/gas/riscv/attribute-02.d: Likewise.
	* testsuite/gas/riscv/attribute-03.d: Likewise.
	* testsuite/gas/riscv/attribute-04.d: Likewise.
	* testsuite/gas/riscv/attribute-04.s: Likewise.
	* testsuite/gas/riscv/attribute-05.d: Likewise.
	* testsuite/gas/riscv/attribute-05.s: Likewise.
	* testsuite/gas/riscv/attribute-06.d: Likewise.
	* testsuite/gas/riscv/attribute-06.s: Likewise.
	* testsuite/gas/riscv/attribute-07.d: Likewise.
	* testsuite/gas/riscv/attribute-07.s: Likewise.
	* testsuite/gas/riscv/attribute-08.d: Likewise.
	* testsuite/gas/riscv/attribute-08.s: Likewise.
	* testsuite/gas/riscv/attribute-unknown.d: Likewise.
	* testsuite/gas/riscv/attribute-unknown.s: Likewise.
	* testsuite/gas/riscv/empty.l: Likewise.
	* doc/c-riscv.texi (.attribute): Add documentation.
	* configure.ac (--enable-default-riscv-attribute): New options.
	* configure: Re-generate.
	* config.in: Re-generate.
	include/
	* elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
	(Tag_RISCV_arch): Likewise.
	(Tag_RISCV_priv_spec): Likewise.
	(Tag_RISCV_priv_spec_minor): Likewise.
	(Tag_RISCV_priv_spec_revision): Likewise.
	(Tag_RISCV_unaligned_access): Likewise.
	(Tag_RISCV_stack_align): Likewise.
 2019-01-16 13:14:59 -08:00
Kyrylo Tkachov
c8fcc36012 [AArch64][gas] Add -mcpu support for Arm Ares 
This adds support for the Arm Ares CPU for AArch64.
It implements the Armv8.2-A architecture with the optional features
of statistical profiling, dot product and FP16 on by default.

Note: Ares is a codename to enable early adopters and in time
we will add the final product name once it's announced.

    * config/tc-aarch64.c (aarch64_cpus): Add ares.
    * doc/c-aarch64.texi (-mcpu): Document ares value.
 2019-01-08 15:18:32 +00:00
Kyrylo Tkachov
ef8df4caec [arm][gas] Add -mcpu support for Arm Ares 
This adds support for the Arm Ares CPU in the arm port.
It implements the Armv8.2-A architecture with the relevant optional
features
of dot product and FP16 on by default.

Note: Ares is a codename to enable early adopters and in time
we will add the final product name once it's announced.

	* config/tc-arm.c (arm_cpus): Add ares.
	* doc/c-arm.texi (-mcpu): Document ares value.
 2019-01-07 09:22:55 +00:00
Yoshinori Sato
6a25bee8d0 RX: gas - Add RXv3 instruction support. 
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0316ej0100-rxv3sm.pdf

	* config/rx-defs.h (rx_cpu_types): Add type RXV3 and RXV3FPU.
	(rx_bfield): Add prototype.
	(rx_post): Likewise.
	* config/rx-parse.y: Add v3 instructions and Double FPU registers.
	(DSIZE): Define.
	(POST): Define.
	(rx_check_v3): New. check v3 type.
	(rx_check_dfpu): New. check have double support.
	(double_condition_table): New. dcmp<cond> contiditon.
	(check_condition): Multiple condition support.
	(rx_lex): RXv3 instructions support.
	Add parse dcmp<cond> instruction and Double FPU registers.
	(immediate): Disable optimize in dmov #imm case.
	(displacement): Add double displacement in dmov instraction.
	* config/tc-rx.c (rx_use_conventional_section_names):
	Invert default value in rx-*-linux target.
	(cpu_type): Add additional ELF flags.
	(cpu_type_list): Add RXv3.
	(md_parse_option): Refer elf_flags from cpu_type_list.
	(md_show_usage): Add rxv3 and rxv3-dfpu.
	(rx_bytesT): Add post byte.
	(rx_bfield): New. generate bfmov / bfmovz "imm" field.
	(rx_post): New. Set instruction post byte.
	(md_assemble): Add post byte.
	doc/c-rx.texi: Add cpu types.
	* testsuite/gas/rx/Xtod.d: New.
	* testsuite/gas/rx/Xtod.sm: New.
	* testsuite/gas/rx/bfmov.d: New.
	* testsuite/gas/rx/bfmov.sm: New.
	* testsuite/gas/rx/dabs.d: New.
	* testsuite/gas/rx/dabs.sm: New.
	* testsuite/gas/rx/dadd.d: New.
	* testsuite/gas/rx/dadd.sm: New.
	* testsuite/gas/rx/dcmp.d: New.
	* testsuite/gas/rx/dcmp.sm: New.
	* testsuite/gas/rx/ddiv.d: New.
	* testsuite/gas/rx/ddiv.sm: New.
	* testsuite/gas/rx/dmov.d: New.
	* testsuite/gas/rx/dmov.sm: New.
	* testsuite/gas/rx/dmul.d: New.
	* testsuite/gas/rx/dmul.sm: New.
	* testsuite/gas/rx/dneg.d: New.
	* testsuite/gas/rx/dneg.sm: New.
	* testsuite/gas/rx/dpopm.d: New.
	* testsuite/gas/rx/dpopm.sm: New.
	* testsuite/gas/rx/dpushm.d: New.
	* testsuite/gas/rx/dpushm.sm: New.
	* testsuite/gas/rx/dround.d: New.
	* testsuite/gas/rx/dround.sm: New.
	* testsuite/gas/rx/dsqrt.d: New.
	* testsuite/gas/rx/dsqrt.sm: New.
	* testsuite/gas/rx/dsub.d: New.
	* testsuite/gas/rx/dsub.sm: New.
	* testsuite/gas/rx/dtoX.d: New.
	* testsuite/gas/rx/dtoX.sm: New.
	* testsuite/gas/rx/macros.inc: Add double FPU registers.
	* testsuite/gas/rx/mvfdc.d: New.
	* testsuite/gas/rx/mvfdc.sm: New.
	* testsuite/gas/rx/mvfdr.d: New.
	* testsuite/gas/rx/mvfdr.sm: New.
	* testsuite/gas/rx/mvtdc.d: New.
	* testsuite/gas/rx/mvtdc.sm: New.
	* testsuite/gas/rx/rstr.d: New.
	* testsuite/gas/rx/rstr.sm: New.
	* testsuite/gas/rx/rx.exp: Use rxv3-dfpu option.
	* testsuite/gas/rx/save.d: New.
	* testsuite/gas/rx/save.sm: New.
	* testsuite/gas/rx/xor.d: New.
	* testsuite/gas/rx/xor.sm: Add pattern.
 2019-01-05 22:51:41 +09:00
Alan Modra
827041555a Update year range in copyright notice of binutils files 2019-01-01 22:06:53 +10:30
Sam Tebbs
3a67e1a6b4 [aarch64] Add support for pointer authentication B key 
Armv8.3-A has another key used in pointer authentication called the
B-key (other than the A-key that is already supported). In order for
stack unwinders to work it is necessary to be able to identify frames
that have been signed with the B-key rather than the A-key and it was
felt that keeping this as an augmentation character in the CIE was the
best bet. The DWARF extensions for ARM therefore propose to add a new
augmentation character 'B' to the CIE augmentation string and the
corresponding cfi directive ".cfi_b_key_frame". I've made the relevant
changes to GAS and LD to add support for B-key unwinding, which required
modifying LD to check for 'B' in the augmentation string, adding the
".cfi_b_key_frame" directive to GAS and adding a "pauth_key" field to
GAS's fde_entry and cie_entry structs.

The pointer authentication instructions will behave as NOPs on
architectures that don't support them, and so a check for the
architecture being assembled for is not necessary since there will be no
behavioural difference between augmentation strings with and without the
'B' character on such architectures.

2018-12-05  Sam Tebbs  <sam.tebbs@arm.com>

bfd/
	* elf-eh-frame.c (_bfd_elf_parse_eh_frame): Add check for 'B'.

gas/
	* dw2gencfi.c (struct cie_entry): Add tc_cie_entry_extras invocation.
	(alloc_fde_entry): Add tc_fde_entry_init_extra invocation.
	(output_cie): Add tc_output_cie_extra invocation.
	(select_cie_for_fde): Add tc_cie_fde_equivalent_extra and
	tc_cie_entry_init_extra invocation.
	(frch_cfi_data, cfa_save_data): Move to dwgencfi.h.
	* config/tc-aarch64.c (s_aarch64_cfi_b_key_frame): Declare.
	(md_pseudo_table): Add "cfi_b_key_frame".
	* config/tc-aarch64.h (tc_fde_entry_extras, tc_cie_entry_extras,
	tc_fde_entry_init_extra, tc_output_cie_extra,
	tc_cie_fde_equivalent_extra, tc_cie_entry_init_extra): Define.
	* dw2gencfi.h (struct fde_entry): Add tc_fde_entry_extras invocation.
	(pointer_auth_key): Define.
	(frch_cfi_data, cfa_save_data): Move from dwgencfi.c.
	* doc/c-aarch64.texi (.cfi_b_key_frame): Add documentation.
	* testsuite/gas/aarch64/(pac_ab_key.d, pac_ab_key.s): New file.
 2018-12-05 18:30:08 +00:00
Fredrik Noring
27c634e0ed GAS/MIPS: Add `-mfix-r5900' option for the R5900 short loop erratum 
`-march=r5900' already enables the R5900 short loop workaround.
However, the R5900 ISA and most other MIPS ISAs are mutually
exclusive since R5900-specific instructions are generated as well.

The `-mfix-r5900' option can be used in combination with e.g.
`-mips2' or `-mips3' to generate generic MIPS binaries that also
work with the R5900 target.

This change has been tested with `make RUNTESTFLAGS=mips.exp
check-gas' for the targets `mipsr5900el-unknown-linux-gnu',
`mipsr5900el-elf' and `mips3-unknown-linux-gnu'.

	gas/
	* config/tc-mips.c (mips_fix_r5900, mips_fix_r5900_explicit):
	New variables.
	(options): Add OPTION_FIX_R5900 and OPTION_NO_FIX_R5900
	enumeration constants.
	(md_longopts): Add "mfix-r5900" and "mno-fix-r5900" options.
	(can_swap_branch_p, md_parse_option, mips_after_parse_args):
	Handle the new options.
	(md_show_usage): Document the `-mfix-r5900' option.
	* doc/as.texi: Likewise.
	* doc/c-mips.texi: Likewise.
	* testsuite/gas/mips/mips.exp: Run R5900 dump tests.
	* testsuite/gas/mips/r5900-fix.d: Test `-mfix-r5900' option.
	* testsuite/gas/mips/r5900-fix.s: Likewise.
	* testsuite/gas/mips/r5900-no-fix.d: Test `-mno-fix-r5900'.
	* testsuite/gas/mips/r5900-no-fix.s: Likewise.
 2018-11-30 18:32:36 +00:00
Jim Wilson
4765cd6119 RISC-V: Add .insn CA support. 
gas/
	* config/tc-riscv.c (validate_riscv_insn) <'F'>: Add support for CF6
	and CF2 operands.
	(riscv_ip) <'F'>: Likewise.
	* doc/c-riscv.texi (RISC-V-Formats): Add func6 abbreviation.  Use rs2
	instead of rs1 in CR description.  Add CA docs.
	* gas/testsuite/riscv/insn.s: Add use of .insn ca.
	* gas/testsuite/riscv/insn.d: Update to match.
	include/
	* opcode/riscv.h (OP_MASK_CFUNCT6, OP_SH_CFUNCT6): New.
	(OP_MASK_CFUNCT2, OP_SH_CFUNCT2): New.
	opcodes/
	* riscv-opc.c (ciw): Fix whitespace to align columns.
	(ca): New.
 2018-11-27 11:29:23 -08:00
Sudakshina Das
73b605ec3f [BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-A 
This patch is part of the patch series to add support for ARMv8.5-A
Memory Tagging Extensions. Memory Tagging Extension is an optional extension to
ARMv8.5-A and is enabled using the +memtag command line option.
This patch adds the new command line option and the new feature macros.

*** include/ChangeLog ***

2018-11-12  Sudakshina Das  <sudi.das@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_MEMTAG): New.

*** opcodes/ChangeLog ***

2018-11-12  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-tbl.h (aarch64_feature_memtag): New.
	(MEMTAG, MEMTAG_INSN): New.

*** gas/ChangeLog ***

2018-11-12  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-aarch64.c (aarch64_features): Add "memtag"
	as a new option.
	* doc/c-aarch64.texi: Document the same.
 2018-11-12 12:45:30 +00:00
Alan Modra
8d1015a887 Move struc-symbol.h to symbols.c 
This file was never supposed to be widely used.  The fact that it has
found its way into many gas files led to bugs, typically when code
expecting a symbolS* to point at a struct symbol is presented with a
struct local_symbol.  Also, commit 158184ac9e changed these structs in
2012 but didn't catch all places where symbol bsym was being used to
test for a local_symbol.

	* Makefile.am (HFILES): Delete struc-symbol.h.
	* doc/internals.texi: Delete struc-symbol.h reference and out
	of date local symbol description.
	* struc-symbol.h: Delete.  Move contents to..
	* symbols.c: ..here.
	(symbol_on_chain, symbol_symbolS): New functions.
	* symbols.h (symbol_on_chain, symbol_symbolS): Declare.
	* cgen.c: Don't #include struc-symbol.h.
	(gas_cgen_parse_operand): Don't test for local_symbol using
	bsym, instead call symbol_symbolS.  Use symbol_get_bfdsym.
	(weak_operand_overflow_check, make_right_shifted_expr): Use
	symbol accessors.
	* config/obj-coff.c: Don't #include struc-symbol.h.
	(GET_FILENAME_STRING): Delete.
	* config/obj-elf.c: Don't #include struc-symbol.h.
	(elf_file_symbol): Use symbol accessors.
	(elf_adjust_symtab): Call symbol_on_chain.
	* config/obj-evax.c: Don't #include struc-symbol.h.
	* config/tc-nds32.c: Likewise.
	* config/tc-rl78.c: Likewise.
	* config/tc-rx.c: Likewise.
	* config/tc-alpha.c: Likewise.
	(add_to_link_pool, s_alpha_comm): Use symbol accessors.
	* config/tc-arc.c: Don't #include struc-symbol.h.
	(arc_check_relocs): Use symbol accessors, testing gas symbol
	section rather than bfd symbol section.
	* config/tc-avr.c: Don't #include struc-symbol.h.
	(avr_patch_gccisr_frag): Use symbol accessors.
	* config/tc-bfin.c: Don't #include struc-symbol.h.
	(bfin_loop_beginend): Use symbol accessors.
	* config/tc-csky.c: Don't #include struc-symbol.h.
	(v2_work_movih, v2_work_ori): Use symbol accessors.  Check for
	absolute symbol as well as O_constant.
	* config/tc-riscv.c: Don't #include struc-symbol.h.
	(riscv_pre_output_hook): Use symbol accessors.
	* config/tc-s390.c: Don't #include struc-symbol.h.
	(s390_literals): Use symbol accessors.
	* config/tc-score.c (s3_build_la_pic, s3_build_lwst_pic): Use
	symbol accessors.
	(s3_relax_branch_inst16, s3_relax_cmpbranch_inst32): Don't
	test symbol bsym.
	* config/tc-score7.c: Don't #include struc-symbol.h.
	(s7_build_la_pic, s7_build_lwst_pic): Use symbol accessors.
	(s7_b32_relax_to_b16): Don't test symbol bsym.
	* config/tc-sh.c: Don't #include struc-symbol.h.
	(insert_loop_bounds): Use symbol accessors.
	(sh_frob_section): Remove bogus symbol canonicalization.
	* config/tc-tic54x.c: Don't #include struc-symbol.h.
	(tic54x_bss): Use symbol accessors.
	* config/tc-tilegx.c: Don't #include struc-symbol.h.
	(emit_tilegx_instruction, tilegx_parse_name): Use symbol accessors.
	* config/tc-tilepro.c: Don't #include struc-symbol.h.
	(emit_tilepro_instruction, tilepro_parse_name): Use accessors.
	* config/tc-xtensa.c: Don't #include struc-symbol.h.
	(xg_assemble_vliw_tokens): Use symbol accessors.
	(xg_order_trampoline_chain): Likewise.
	* ehopt.c: Don't #include struc-symbol.h.
	(check_eh_frame): Correct local symbol test.  Use symbol accessors.
	* write.c: Don't #include struc-symbol.h.
	(create_note_reloc, maybe_generate_build_notes): Use symbol accessors.
	* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
 2018-10-29 18:20:48 +10:30
Sudakshina Das
104fefeebb [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS 
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
The encodings can be found in the System Register XML.

This patch adds support for the mitigation for Spectre Variant 4 by
adding the PSTATE bit SSBS which are accessible using MSR and MRS
instructions. Although this is a mandatory addition to the ARMv8.5-A,
it is permitted to be added to any version of the ARMv8 architecture.
This is enabled using the command line option of +ssbs for older
versions.

*** include/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
	(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.

*** opcodes/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Add
	SSBS in the check for one-bit immediate.
	(aarch64_sys_regs): New entry for SSBS.
	(aarch64_sys_reg_supported_p): New check for above.
	(aarch64_pstatefields): New entry for SSBS.
	(aarch64_pstatefield_supported_p): New check for above.

*** gas/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-aarch64.c (aarch64_features): Add new "ssbs".
	* doc/c-aarch64.texi: Document the same.
	* testsuite/gas/aarch64/ssbs-illegal1.d: New test.
	* testsuite/gas/aarch64/ssbs-illegal1.l: New test.
	* testsuite/gas/aarch64/ssbs-illegal2.d: New test.
	* testsuite/gas/aarch64/ssbs-illegal2.l: New test.
	* testsuite/gas/aarch64/ssbs.s: New test.
	* testsuite/gas/aarch64/ssbs1.d: Test with +ssbs
	* testsuite/gas/aarch64/ssbs2.d: Test with armv8.5-a.
 2018-10-09 15:39:29 +01:00
Sudakshina Das
af4bcb4ce6 [PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions 
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
The encodings can be found in the System Register XML.

This patch adds the following:
MSR Xn, RNDR
MSR Xn, RNDRRS

These are optional instructions in ARMv8.5-A and hence the new
+rng is added.

*** include/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_RNG): New.

*** opcodes/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-opc.c (aarch64_sys_regs): New entries for
	rndr and rndrrs.
	(aarch64_sys_reg_supported_p): New check for above.

*** gas/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-aarch64.c (aarch64_features): New "rng" option.
	* doc/c-aarch64.texi: Document the same.
	* testsuite/gas/aarch64/sysreg-4.s: Test both instructions.
	* testsuite/gas/aarch64/sysreg-4.d: Likewise.
	* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
 2018-10-09 15:39:29 +01:00
Sudakshina Das
2ac435d466 [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions 
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order)

This patch adds the prediction restriction instructions (that is, cfp,
dvp, cpp). These instructions are retrospectively made optional for
all versions of the architecture from ARMv8.0 to ARMv8.4 and is
mandatory from ARMv8.5. Hence adding a new +predres which can be used
by the older architectures.

*** include/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
	(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
	(aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
	(aarch64_sys_regs_sr): Declare new table.

*** opcodes/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-dis.c (aarch64_ext_sysins_op): Add case for
	AARCH64_OPND_SYSREG_SR.
	* aarch64-opc.c (aarch64_print_operand): Likewise.
	(aarch64_sys_regs_sr): Define table.
	(aarch64_sys_ins_reg_supported_p): Check for RCTX with
	AARCH64_FEATURE_PREDRES.
	* aarch64-tbl.h (aarch64_feature_predres): New.
	(PREDRES, PREDRES_INSN): New.
	(aarch64_opcode_table): Add entries for cfp, dvp and cpp.
	(AARCH64_OPERANDS): Add new description for SYSREG_SR.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

*** gas/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-aarch64.c (aarch64_sys_regs_sr_hsh): New.
	(parse_operands): Add entry for AARCH64_OPND_SYSREG_SR.
	(md_begin): Allocate and initialize aarch64_sys_regs_sr_hsh
	with aarch64_sys_regs_sr.
	(aarch64_features): Add new "predres" option for older
	architectures.
	* doc/c-aarch64.texi: Document the same.
	* testsuite/gas/aarch64/sysreg-4.s: New.
	* testsuite/gas/aarch64/sysreg-4.d: New.
	* testsuite/gas/aarch64/illegal-sysreg-4.d: New.
	* testsuite/gas/aarch64/illegal-sysreg-4.l: New.
	* testsuite/gas/aarch64/predres.s: New.
	* testsuite/gas/aarch64/predres.d: New.
 2018-10-09 15:17:10 +01:00
Sudakshina Das
68dfbb92ef [PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A 
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order)

This instruction is retrospectively made optional for all versions of
the architecture from ARMv8.0 to ARMv8.4 and is mandatory from
ARMv8.5.  Hence a new command line option of "+sb" is added for older
architectures.

*** include/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_SB): New.
	(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.

*** opcodes/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-tbl.h (aarch64_feature_sb): New.
	(SB, SB_INSN): New.
	(aarch64_opcode_table): Add entry for sb.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

*** gas/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-aarch64.c (aarch64_features): Add new "sb" option
	for older architectures.
	* doc/c-aarch64.texi: Document the same.
	* testsuite/gas/aarch64/sb.s: New.
	* testsuite/gas/aarch64/sb.d: New.
 2018-10-09 15:11:27 +01:00
Sudakshina Das
70d561813c [PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal feature macros 
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)

This is the first of the patch series and adds -march=armv8.5-a and
other internal feature marcos needed for it.

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

    * config/tc-aarch64.c (aarch64_archs): New entry for armv8.5-a.
    * doc/c-aarch64.texi: Add documentation for the same.

*** include/ChnageLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

    * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
    (AARCH64_ARCH_V8_5): New.

*** opcodes/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

    * aarch64-tbl.h (aarch64_feature_set aarch64_feature_v8_5): New.
    (ARMV8_5, V8_5_INSN): New.
 2018-10-09 15:02:52 +01:00
Sudakshina Das
dad0c3bfb5 [Arm, 3/3] Add Execution and Data Prediction instructions for AArch32 
This patch is part of the patch series to add support for ARMv8.5-A
extensions.

(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)

This patch adds the Execution and Data Prediction Restriction
instructions (that is, cfprctx, dvprxtc, cpprctx). These are all
aliases to MCR and are disassembled as such.

This instruction is retrospectively made optional for all versions of
the architecture from ARMv8.0 to ARMv8.4 and is mandatory from
ARMv8.5.  Hence adding a new +predres for older versions of the
architecture.

*** include/ChangeLog ***

2018-10-05  Sudakshina Das  <sudi.das@arm.com>

	* opcode/arm.h (ARM_EXT2_PREDRES): New.
	(ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.

*** gas/ChangeLog ***

2018-10-05  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-arm.c (arm_ext_predres): New.
	(insns): Add new cfprctx, dvprctx and cpprctx instructions.
	(arm_extensions): Add "predres".
	* doc/c-arm.texi: Document the above.
	* testsuite/gas/arm/predres-bad.d: New test.
	* testsuite/gas/arm/predres-bad.l: New test.
	* testsuite/gas/arm/predres.s: New test.
	* testsuite/gas/arm/predres1.d: New test.
	* testsuite/gas/arm/predres2.d: New test.
 2018-10-05 11:31:21 +01:00
Sudakshina Das
7fadb25d6f [Arm, 2/3] Add instruction SB for AArch32 
This patch is part of the patch series to add support for ARMv8.5-A
extensions.

(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)

This patch adds the instruction SB. This instruction is
retrospectively made optional for all versions of the architecture
from ARMv8.0 to ARMv8.4 and is mandatory from ARMv8.5. Hence adding a
new "+sb" for older archtectures.

*** include/ChangeLog ***

2018-10-05  Sudakshina Das  <sudi.das@arm.com>

	* opcode/arm.h (ARM_EXT2_SB): New.
	(ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.

*** opcodes/ChangeLog ***

2018-10-05  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (arm_opcodes): Add sb.
	(thumb32_opcodes): Likewise.

*** gas/ChangeLog ***

2018-10-05  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-arm.c (arm_ext_sb): New.
	(insns): Add new sb instruction.
	(arm_extensions): Add "sb".
	* doc/c-arm.texi: Document the above.
	* testsuite/gas/arm/sb-bad.d: New test.
	* testsuite/gas/arm/sb-bad.l: New test.
	* testsuite/gas/arm/sb-thumb1.d: New test.
	* testsuite/gas/arm/sb-thumb2.d: New test.
	* testsuite/gas/arm/sb.s: New test.
	* testsuite/gas/arm/sb1.d: New test.
	* testsuite/gas/arm/sb2.d: New test.
 2018-10-05 11:31:19 +01:00
Sudakshina Das
23f233a595 [Arm, 1/3] Add -march=armv8.5-a and related internal feature macros to AArch32 
This patch is part of the patch series to add support for ARMv8.5-A
extensions.

(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)

This is the first of the patch series and adds -march=armv8.5-a and
other internal feature marcos needed for it.

*** gas/ChangeLog ***

2018-10-05  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-arm.c (arm_archs): New entry for armv8.5-a.
	(cpu_arch_ver): Likewise.
	* doc/c-arm.texi: Add documentation for the same.
	* testsuite/gas/arm/attr-march-armv8_5-a.d: New.

*** include/ChnageLog ***

2018-10-05  Sudakshina Das  <sudi.das@arm.com>

	* opcode/arm.h (ARM_EXT2_V8_5A): New.
	(ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
 2018-10-05 11:31:14 +01:00
Stafford Horne
1f041c6edf or1k: Add OpenRISC gas documentation 
gas/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* doc/Makefile.am (CPU_DOCS): Add entry for OpenRISC.
	* doc/Makefile.in: Regenerated.
	* doc/all.texi: Set OPENRISC.
	* doc/as.texi: Document OpenRISC.
	* doc/c-or1k.texi: New file.
 2018-10-05 11:41:42 +09:00
H.J. Lu
0375113302 x86: Add -mvexwig=[0|1] option to assembler 
Add -mvexwig=[0|1] option to x86 assembler to control how the assembler
should encode the VEX.W bit in WIG VEX instructions.

	* gas/NEWS: Mention -mvexwig=[0|1] option.
	* config/tc-i386.c (vexwig): New.
	(build_vex_prefix): Set the VEX.W bit for -mvexwig=1 for WIG
	VEX instructions.
	(OPTION_MVEXWIG): New.
	(md_longopts): Add -mvexwig=.
	(md_parse_option): Handle OPTION_MVEXWIG.
	(md_show_usage): Show -mvexwig=[0|1].
	* doc/c-i386.texi: Document -mvexwig=[0|1].
	* testsuite/gas/i386/avx-wig.d: New file.
	* testsuite/gas/i386/avx-wig.s: Likewise.
	* testsuite/gas/i386/avx2-wig.d: Likewise.
	* testsuite/gas/i386/avx2-wig.s: Likewise.
	* testsuite/gas/i386/x86-64-avx-wig.d: Likewise.
	* testsuite/gas/i386/x86-64-avx-wig.s: Likewise.
	* testsuite/gas/i386/x86-64-avx2-wig.d: Likewise.
	* testsuite/gas/i386/x86-64-avx2-wig.s: Likewise.
	* testsuite/gas/i386/i386.exp: Run avx-wig, avx2-wig,
	x86-64-avx-wig and x86-64-avx2-wig.
 2018-09-17 09:26:29 -07:00
H.J. Lu
b4a3a7b44c x86: Extend assembler to generate GNU property notes 
Add -mx86-used-note=[yes|no] option to generate (or not) GNU property
notes with GNU_PROPERTY_X86_FEATURE_2_USED and GNU_PROPERTY_X86_ISA_1_USED
properties.  If the assembly input contains no instructions, set the
GNU_PROPERTY_X86_UINT32_VALID bit in GNU_PROPERTY_X86_FEATURE_2_USED
property.  Add a --enable-x86-used-note configure time option to set the
default behavior.  Set the default if the configure option is not used
to "no".

	* NEWS: Mention -mx86-used-note=[no|yes].
	* configure.ac: Add --enable-x86-used-note.  Define
	DEFAULT_X86_USED_NOTE.
	* config.in: Regenerated.
	* configure: Likewise.
	* config/tc-i386.c (x86_isa_1_used): New.
	(x86_feature_2_used): Likewise.
	(x86_used_note): Likewise.
	(_i386_insn): Add has_regmmx, has_regxmm, has_regymm and
	has_regzmm.
	(build_modrm_byte): Set i.has_regmmx, i.has_regzmm.
	i.has_regymm and i.has_regxmm.
	(x86_cleanup): New function.
	(output_insn): Update x86_isa_1_used and x86_feature_2_used.
	(OPTION_X86_USED_NOTE): New.
	(md_longopts): Add -mx86-used-note=.
	(md_parse_option): Handle OPTION_X86_USED_NOTE.
	(md_show_usage): Display -mx86-used-note=.
	* config/tc-i386.h (x86_cleanup): New prototype.
	(md_cleanup): New.
	* doc/c-i386.texi: Document -mx86-used-note=.
 2018-08-31 04:31:20 -07:00
Chenghua Xu
9108bc33b1 [MIPS] Add Loongson 2K1000 proccessor support. 
bfd/
	* archures.c (bfd_architecture): New machine
	bfd_mach_mips_gs264e.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (enum I_xxx): Likewise.
	(arch_info_struct): Likewise.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle
	E_MIPS_MACH_GS264E.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Map bfd_mach_mips_gs264e to
	bfd_mach_mips_gs464e extension.

binutils/
	* NEWS: Mention Loongson 2K1000 proccessor support.
	* readelf.c (get_machine_flags): Handle gs264e.

elfcpp/
	* mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS264E.

gas/
	* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS264E.
	(mips_cpu_info_table): Add gs264e descriptors.
	* doc/as.texi (march table): Add gs264e.

include/
	* elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
	* opcode/mips.h (CPU_XXX): New CPU_GS264E.

ld/
	* testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination
	gs264e and gs464e.

opcodes/
	* mips-dis.c (mips_arch_choices): Add gs264e descriptors.
 2018-08-29 20:55:25 +08:00
Chenghua Xu
bd782c07b9 [MIPS] Add Loongson 3A2000/3A3000 proccessor support. 
bfd/
	* archures.c (bfd_architecture): New machine
	bfd_mach_mips_gs464e.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (enum I_xxx): Likewise.
	(arch_info_struct): Likewise.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle
	E_MIPS_MACH_GS464E.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Map bfd_mach_mips_gs464e to
	bfd_mach_mips_gs464 extension.

binutils/
	* NEWS: Mention Loongson 3A2000/3A3000 proccessor support.
	* readelf.c (get_machine_flags): Handle gs464e.

elfcpp/
	* mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS464E.

gas/
	* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS464E.
	(mips_cpu_info_table): Add gs464e descriptors.
	* doc/as.texi (march table): Add gs464e.

include/
	* elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
	* opcode/mips.h (CPU_XXX): New CPU_GS464E.

ld/
	* testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination
	gs464e and gs464.

opcodes/
	* mips-dis.c (mips_arch_choices): Add gs464e descriptors.
 2018-08-29 20:43:19 +08:00
Chenghua Xu
ac8cb70f36 [MIPS] Add Loongson 3A1000 proccessor support. 
bfd/
	* archures.c (bfd_architecture): Rename
	bfd_mach_mips_loongson_3a to bfd_mach_mips_gs464.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (enum I_xxx): Likewise.
	(arch_info_struct): Likewise.
	* elfxx-mips.c (_bfd_elf_mips_mach): Likewise.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Likewise.
	(bfd_mips_isa_ext_mach): Likewise.
	(bfd_mips_isa_ext): Likewise.
	(print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.

binutils/
	* NEWS: Mention Loongson 3A1000 proccessor support.
	* readelf.c (get_machine_flags): Rename loongson-3a to gs464.
	(print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.

elfcpp/
	* mips.c (EF_MIPS_MACH): Rename E_MIPS_MACH_LS3A to
	E_MIPS_MACH_GS464.

gas/
	* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Rename
	CPU_LOONGSON_3A to CPU_GS464.
	(mips_cpu_info_table): Add gs464 descriptors, Keep
	loongson3a as an alias of gs464 for compatibility.
	* doc/as.texi (march table): Rename loongson3a to gs464.
	* testsuite/gas/mips/loongson-3a-mmi.d: Set "ISA Extension"
	flag to None.

gold/
	* mips.cc (Mips_mach, add_machine_extensions, elf_mips_mach):
	Rename loongson3a to gs464.
	(mips_isa_ext_mach, mips_isa_ext): Delete loongson3a.
	(infer_abiflags): Use ases instead of isa_ext for infer ABI
flags.
	(elf_mips_mach_name): Rename loongson3a to gs464.

include/
	* elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
	E_MIPS_MACH_GS464.
	(AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
	* opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
	(CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
	* opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.

ld/
	* testsuite/ld-mips-elf/mips-elf-flags.exp: Rename loongson3a
	to gs464.

opcodes/
	* mips-dis.c (mips_arch_choices): Add gs464 descriptors, Keep
	loongson3a as an alias of gs464 for compatibility.
	* mips-opc.c (mips_opcodes): Change Comments.
 2018-08-29 20:32:30 +08:00
Chenghua Xu
a693765e23 [MIPS/GAS] Add Loongson EXT2 Instructions support. 
bfd/
	* elfxx-mips.c (print_mips_ases): Add Loongson EXT2 extension.

binutils/
	* readelf.c (print_mips_ases): Add Loongson EXT2 extension.

gas/
	* NEWS: Mention Loongson EXTensions R2 (EXT2) support.
	* config/tc-mips.c (options): Add OPTION_LOONGSON_EXT2 and
	OPTION_NO_LOONGSON_EXT2.
	(md_longopts): Likewise.
	(mips_ases): Define availability for EXT.
	(mips_convert_ase_flags): Map ASE_LOONGSON_EXT2 to
	AFL_ASE_LOONGSON_EXT2.
	(md_show_usage): Add help for -mloongson-ext2 and
	-mno-loongson-ext2.
	* doc/as.texi: Document -mloongson-ext2, -mno-loongson-ext2.
	* doc/c-mips.texi: Document -mloongson-ext2, -mno-loongson-ext2,
	.set loongson-ext2 and .set noloongson-ext2.
	* testsuite/gas/mips/loongson-ext2.d: New test.
	* testsuite/gas/mips/loongson-ext2.s: New test.
	* testsuite/gas/mips/mips.exp: Run loongson-ext2 test.

include/
	* elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
	* opcode/mips.h (ASE_LOONGSON_EXT2): New macro.

opcodes/
	* mips-dis.c (parse_mips_ase_option): Handle -M loongson-ext
	option.
	(print_mips_disassembler_options): Document -M loongson-ext.
	* mips-opc.c (LEXT2): New macro.
	(mips_opcodes): Add cto, ctz, dcto, dctz instructions.
 2018-08-29 20:08:58 +08:00
Chenghua Xu
bdc6c06e3b [MIPS/GAS] Split Loongson EXT Instructions from loongson3a. 
bfd/
	 * elfxx-mips.c (infer_mips_abiflags): Use ases instead of
	 isa_ext for infer ABI flags.
	 (print_mips_ases): Add Loongson EXT extension.

binutils/
	 * readelf.c (print_mips_ases): Add Loongson EXT extension.

elfcpp/
	 * mips.h (AFL_ASE_LOONGSON_EXT): New enum.

gas/
	 * NEWS: Mention Loongson EXTensions (EXT) support.
	 * config/tc-mips.c (options): Add OPTION_LOONGSON_EXT and
	 OPTION_NO_LOONGSON_EXT.
	 (md_longopts): Likewise.
	 (mips_ases): Define availability for EXT.
	 (mips_convert_ase_flags): Map ASE_LOONGSON_EXT to
	 AFL_ASE_LOONGSON_EXT.
	 (mips_cpu_info_table): Add ASE_LOONGSON_EXT for loongson3a.
	 (md_show_usage): Add help for -mloongson-ext and
	 -mno-loongson-ext.
	 * doc/as.texi: Document -mloongson-ext, -mno-loongson-ext.
	 * doc/c-mips.texi: Document -mloongson-ext, -mno-loongson-ext,
	 .set loongson-ext and .set noloongson-ext.
	 * testsuite/gas/mips/loongson-mmi.d: Add ASE flag.

include/
	 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
	 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
	 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.

opcodes/
	 * mips-dis.c (mips_arch_choices): Add EXT to loongson3a
	 descriptors.
	 (parse_mips_ase_option): Handle -M loongson-ext option.
	 (print_mips_disassembler_options): Document -M loongson-ext.
	 * mips-opc.c (IL3A): Delete.
	 * mips-opc.c (LEXT): New macro.
	 (mips_opcodes): Replace IL2F|IL3A marking with LEXT for EXT
	 instructions.
 2018-08-29 19:57:39 +08:00
Chenghua Xu
716c08de28 [MIPS/GAS] Split Loongson CAM Instructions from loongson3a 
bfd/
	* elfxx-mips.c (print_mips_ases): Add CAM extension.

binutils/
	* readelf.c (print_mips_ases): Add CAM extension.

gas/
	* NEWS: Mention Loongson Content Address Memory (CAM)
	support.
	* config/tc-mips.c (options): Add OPTION_LOONGSON_CAM and
	OPTION_NO_LOONGSON_CAM.
	(md_longopts): Likewise.
	(mips_ases): Define availability for CAM.
	(mips_convert_ase_flags): Map ASE_LOONGSON_CAM to
	AFL_ASE_LOONGSON_CAM.
	(mips_cpu_info_table): Add ASE_LOONGSON_CAM for loongson3a.
	(md_show_usage): Add help for -mloongson-cam and
	-mno-loongson-cam.
	* doc/as.texi: Document -mloongson-cam, -mno-loongson-cam.
	* doc/c-mips.texi: Document -mloongson-cam, -mno-loongson-cam,
	.set loongson-cam and .set noloongson-cam.
	* testsuite/gas/mips/loongson-3a-2.d: Move cam test to ...
	* testsuite/gas/mips/loongson-cam.d: Here.  Add ISA/ASE
	flag verification.
	* testsuite/gas/mips/loongson-3a-2.s: Move cam test to ...
	* testsuite/gas/mips/loongson-cam.s: Here.
	* testsuite/gas/mips/loongson-3a-mmi.d: Add ASE flag.
	* testsuite/gas/mips/mips.exp: Run loongson-cam test.

include/
	* elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
	* opcode/mips.h (ASE_LOONGSON_CAM): New macro.

opcodes/
	* mips-dis.c (mips_arch_choices): Add CAM to loongson3a
	descriptors.
	(parse_mips_ase_option): Handle -M loongson-cam option.
	(print_mips_disassembler_options): Document -M loongson-cam.
	* mips-opc.c (LCAM): New macro.
	(mips_opcodes): Replace IL2F|IL3A marking with LCAM for CAM
	instructions.
 2018-08-29 19:33:09 +08:00
H.J. Lu
d871f3f483 x86: Add CpuCMOV and CpuFXSR 
There are separate CPUID feature bits for fxsave/fxrstor and cmovCC
instructions.  This patch adds CpuCMOV and CpuFXSR to replace Cpu686
on corresponding instructions.

gas/

	* config/tc-i386.c (cpu_arch): Add .cmov and .fxsr.
	(cpu_noarch): Add nocmov and nofxsr.
	* doc/c-i386.texi: Document cmov and fxsr.

opcodes/

	* i386-gen.c (cpu_flag_init): Add CpuCMOV and CpuFXSR to
	CPU_I686_FLAGS.  Add CPU_CMOV_FLAGS, CPU_FXSR_FLAGS,
	CPU_ANY_CMOV_FLAGS and CPU_ANY_FXSR_FLAGS.
	(cpu_flags): Add CpuCMOV and CpuFXSR.
	* i386-opc.tbl: Replace Cpu686 with CpuFXSR on fxsave, fxsave64,
	fxrstor and fxrstor64.  Replace Cpu686 with CpuCMOV on cmovCC.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2018-08-11 14:37:32 -07:00
Andrew Jenner
b8891f8d62 Add support for the C_SKY series of processors. 
This patch series is a new binutils port for C-SKY processors, including support for both the V1 and V2 processor variants.  V1 is derived from the MCore architecture while V2 is substantially different, with mixed 16- and 32-bit instructions, a larger register set, a different (but overlapping) ABI, etc.  There is support for bare-metal ELF targets and Linux with both glibc and uClibc.

This code is being contributed jointly by C-SKY Microsystems and Mentor Graphics.  C-SKY is responsible for the technical content and has proposed Lifang Xia and Yunhai Shang as port maintainers.  (Note that C-SKY does have a corporate copyright assignment on file with the FSF.) Mentor Graphics' role has been cleaning up the code, adding documentation and additional test cases, etc, to address issues we anticipated reviewers would complain about.

bfd     * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add C-SKY.
        (BFD32_BACKENDS, BFD_BACKENDS_CFILES): Likewise.
        * Makefile.in: Regenerated.
        * archures.c (enum bfd_architecture): Add bfd_arch_csky and
        related bfd_mach defines.
        (bfd_csky_arch): Declare.
        (bfd_archures_list): Add C-SKY.
        * bfd-in.h (elf32_csky_build_stubs): Declare.
        (elf32_csky_size_stubs): Declare.
        (elf32_csky_next_input_section: Declare.
        (elf32_csky_setup_section_lists): Declare.
        * bfd-in2.h: Regenerated.
        * config.bfd: Add C-SKY.
        * configure.ac: Likewise.
        * configure: Regenerated.
        * cpu-csky.c: New file.
        * elf-bfd.h (enum elf_target_id): Add C-SKY.
        * elf32-csky.c: New file.
        * libbfd.h: Regenerated.
        * reloc.c: Add C-SKY relocations.
        * targets.c (csky_elf32_be_vec, csky_elf32_le_vec): Declare.
        (_bfd_target_vector): Add C-SKY target vector entries.

binutils* readelf.c: Include elf/csky.h.
        (guess_is_rela): Handle EM_CSKY.
        (dump_relocations): Likewise.
        (get_machine_name): Likewise.
        (is_32bit_abs_reloc): Likewise.

include  * dis-asm.h (csky_symbol_is_valid): Declare.
         * opcode/csky.h: New file.

opcodes  * Makefile.am (TARGET_LIBOPCODES_CFILES): Add csky-dis.c.
         * Makefile.in: Regenerated.
         * configure.ac: Add C-SKY.
         * configure: Regenerated.
         * csky-dis.c: New file.
         * csky-opc.h: New file.
         * disassemble.c (ARCH_csky): Define.
         (disassembler, disassemble_init_for_target): Add case for ARCH_csky.
         * disassemble.h (print_insn_csky, csky_get_disassembler): Declare.

gas      * Makefile.am (TARGET_CPU_CFILES): Add entry for C-SKY.
         (TARGET_CPU_HFILES, TARGET_ENV_HFILES): Likewise.
         * Makefile.in: Regenerated.
         * config/tc-csky.c: New file.
         * config/tc-csky.h: New file.
         * config/te-csky_abiv1.h: New file.
         * config/te-csky_abiv1_linux.h: New file.
         * config/te-csky_abiv2.h: New file.
         * config/te-csky_abiv2_linux.h: New file.
         * configure.tgt: Add C-SKY.
         * doc/Makefile.am (CPU_DOCS): Add entry for C-SKY.
         * doc/Makefile.in: Regenerated.
         * doc/all.texi: Set CSKY feature.
         * doc/as.texi (Overview): Add C-SKY options.
         (Machine Dependencies): Likewise.
         * doc/c-csky.texi: New file.
         * testsuite/gas/csky/*: New test cases.

ld      * Makefile.am (ALL_EMULATION_SOURCES): Add C-SKY emulations.
        (ecskyelf.c, ecskyelf_linux.c): New rules.
        * Makefile.in: Regenerated.
        * configure.tgt: Add C-SKY.
        * emulparams/cskyelf.sh: New file.
        * emulparams/cskyelf_linux.sh: New file.
        * emultempl/cskyelf.em: New file.
        * gen-doc.texi: Add C-SKY.
        * ld.texi: Likewise.
        (Options specific to C-SKY targets): New section.
        * testsuite/ld-csky/*: New tests.
 2018-07-30 12:24:14 +01:00
Alex Chadwick
fa758a7046 PowerPC Improve support for Gekko & Broadway 
This is a relatively straightforward patch to improve support for the
IBM Gekko and IBM Broadway processors.  Broadway is functionally
equivalent to the IBM 750CL, while Gekko's functionality is a subset
of theirs.  The patch simplifies this reality and adds -mgekko and
-mbroadway as aliases for -m750cl.  I didn't feel it was worth wasting
a PPC_OPCODE_* bit to differentiate Gekko.  The patch adds a number of
simplified mnemonics for special purpose register access.  Notably,
Broadway adds 4 additional IBAT and DBAT registers but these are not
assigned sequential SPR numbers.

gas/
	* config/tc-ppc.c (md_show_usage): Add -mgekko and -mbroadway.
	* doc/as.texi (Target PowerPC options): Add -mgekko and -mbroadway.
	* doc/c-ppc.texi (PowerPC-Opts): Likewise.
	* testsuite/gas/ppc/broadway.d,
	* testsuite/gas/ppc/broadway.s: New test for broadway.
	* testsuite/gas/ppc/ppc.exp: Run new test.
include/
	* opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
opcodes/
	* ppc-dis.c (ppc_opts): Add -mgekko and -mbroadway.
	(powerpc_init_dialect): Handle bfd_mach_ppc_750.
	* ppc-opc.c (insert_sprbat, extract_sprbat): New functions to
	support disjointed BAT.
	(powerpc_operands): Allow extra bit in SPRBAT_MASK.  Add SPRGQR.
	(XSPRGQR_MASK, GEKKO, BROADWAY): Define.
	(powerpc_opcodes): Add 750cl extended mnemonics for spr access.
 2018-07-26 17:42:47 +09:30
Thomas Preud'homme
5469110733 Clarify doc for .arch/.cpu 
Documentation for .arch and .cpu directives currently says that it
accepts the same name as -march/-mcpu command-line options respectively.
However it only accept the architecture/CPU part of those options: it
does not accept specifying an extension which is done via
.arch_extension. This patch clarifies that the extension is not
accepted.

2018-07-25  Thomas Preud'homme  <thomas.preudhomme@linaro.org>

gas/
	* doc/c-arm.texi (.arch directive): Clarify that name must not include
	an extension.
	(.cpu directive): Likewise.
 2018-07-25 14:12:40 +01:00
Chenghua Xu
8095d2f70e MIPS/GAS: Split Loongson MMI Instructions from loongson2f/3a 
The MMI instruction set has been implemented in many Loongson
processors.  There is a lot of software optimized for MMI.  This patch
splits MMI from loongson2f/3a, and adds GAS and disassembler options for
MMI instructions.

2018-07-20  Chenghua Xu  <paul.hua.gm@gmail.com>
            Maciej W. Rozycki  <macro@mips.com>

bfd/
	* elfxx-mips.c (print_mips_ases): Add MMI extension.

binutils/
	* readelf.c (print_mips_ases): Add MMI extension.

gas/
	* NEWS: Mention MultiMedia extensions Instructions (MMI)
	support.
	* config/tc-mips.c (options): Add OPTION_LOONGSON_MMI and
	OPTION_NO_LOONGSON_MMI.
	(md_longopts): Likewise.
	(mips_ases): Define availability for MMI.
	(mips_convert_ase_flags): Map ASE_LOONGSON_MMI to
	AFL_ASE_LOONGSON_MMI.
	(mips_cpu_info_table): Add ASE_LOONGSON_MMI for loongson2f/3a.
	(md_show_usage): Add help for -mloongson-mmi and
	-mno-loongson-mmi.
	* doc/as.texi: Document -mloongson-mmi, -mno-loongson-mmi.
	* doc/c-mips.texi: Document -mloongson-mmi, -mno-loongson-mmi,
	.set loongson-mmi and .set noloongson-mmi.
	* testsuite/gas/mips/loongson-2f.d: Move mmi test to ...
	* testsuite/gas/mips/loongson-2f-mmi.d: Here.  Add ISA/ASE
	flag verification.
	* testsuite/gas/mips/loongson-2f.s: Move mmi test to ...
	* testsuite/gas/mips/loongson-2f-mmi.s: Here.
	* testsuite/gas/mips/loongson-3a.d: Move mmi test to ...
	* testsuite/gas/mips/loongson-3a-mmi.d: Here.  Add ISA/ASE
	flag verification.
	* testsuite/gas/mips/loongson-3a.s: Move mmi test to ...
	* testsuite/gas/mips/loongson-3a-mmi.s: Here.
	* testsuite/gas/mips/mips.exp: Run loongson-2f-mmi and
	loongson-3a-mmi tests.

include/
	* elf/mips.h (AFL_ASE_MMI): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
	* opcode/mips.h (ASE_LOONGSON_MMI): New macro.

opcodes/
	* mips-dis.c (mips_arch_choices): Add MMI to loongson2f and
	loongson3a descriptors.
	(parse_mips_ase_option): Handle -M loongson-mmi option.
	(print_mips_disassembler_options): Document -M loongson-mmi.
	* mips-opc.c (LMMI): New macro.
	(mips_opcodes): Replace IL2F|IL3A marking with LMMI for MMI
	instructions.
 2018-07-20 13:21:33 +01:00
Thomas Preud'homme
a05a5b64cf Fix use of "command line X" in binutils doc 
Binutils documentation uses a mix of spelling for the compound word
"command-line X". According to [1]:

"Sometimes compound words are written separately (nail polish),
sometimes with a hyphen (short-sighted) and sometimes as one word
(eyelashes). Often new compounds are written as two separate words and,
as they become more familiar, they are either connected with a hyphen
(-) or made into one word."

I think command-line X is common enough in our industry that the two
workds command and line should be connected. Since command-line is more
common than commandline, I propose to update binutils documentation to
consistently use "command-line" when this is used as an adjective to a
noun (eg. command-line argument, command-line switch, command-line
option and command-line flag). I've left occurences of "the command
line" as is. I've also left gdb, sim and readline alone and have only
touched public documentation (texi and NEWS files).

[1]
http://dictionary.cambridge.org/grammar/british-grammar/word-formation/compounds

2018-07-02  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* doc/bfdint.texi: Use command-line consistently when used in a
	compount word.
	* doc/bfdsumm.texi: Likewise.

binutils/
	* NEWS: Use command-line consistently when used in a compount word.
	* doc/binutils.texi: Likewise and fix trailing whitespace on same
	line.

gas/
	* NEWS: Use command-line consistently when used in a compount word.
	* doc/as.texi: Likewise.
	* doc/c-aarch64.texi: Likewise.
	* doc/c-alpha.texi: Likewise.
	* doc/c-arc.texi: Likewise.
	* doc/c-arm.texi: Likewise.
	* doc/c-avr.texi: Likewise.
	* doc/c-bfin.texi: Likewise.
	* doc/c-cris.texi: Likewise.
	* doc/c-epiphany.texi: Likewise.
	* doc/c-i386.texi: Likewise.
	* doc/c-ia64.texi: Likewise.
	* doc/c-lm32.texi: Likewise.
	* doc/c-m32r.texi: Likewise.
	* doc/c-m68k.texi: Likewise.
	* doc/c-mips.texi: Likewise.
	* doc/c-mmix.texi: Likewise.
	* doc/c-msp430.texi: Likewise.
	* doc/c-mt.texi: Likewise.
	* doc/c-nios2.texi: Likewise.
	* doc/c-ppc.texi: Likewise.
	* doc/c-pru.texi: Likewise.
	* doc/c-rl78.texi: Likewise.
	* doc/c-rx.texi: Likewise.
	* doc/c-tic6x.texi: Likewise.
	* doc/c-v850.texi: Likewise.
	* doc/c-vax.texi: Likewise.
	* doc/c-visium.texi: Likewise.
	* doc/c-xstormy16.texi: Likewise.
	* doc/c-xtensa.texi: Likewise.
	* doc/c-z80.texi: Likewise.
	* doc/c-z8k.texi: Likewise.
	* doc/internals.texi: Likewise.

gprof/
	* gprof.texi: Use command-line consistently when used in a compount
	word.

ld/
	* NEWS: Use command-line consistently when used in a compount word.
	* ld.texinfo: Likewise.
	* ldint.texinfo: Likewise.
 2018-07-02 11:18:24 +01:00
Alan Modra
d388f64333 Regen doc/Makefile.in 
Also make the automake strictness "foreign".  My regeneration of the
three doc/Makefile.in files already had --foreign in the automake
invocation, so this just makes it explicit.

bfd/
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Add "foreign".
	* doc/Makefile.in: Regenerate.
binutils/
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Add "foreign".
	* doc/Makefile.in: Regenerate.
gas/
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Add "foreign".
	* doc/Makefile.in: Regenerate.
zlib/
	* Makefile.in: Regenerate.
 2018-06-21 23:00:05 +09:30
Nick Clifton
fc6141f097 Change the ARM assembler's ADR and ADRl pseudo-ops so that they will only set the bottom bit of imported thumb function symbols if the -mthumb-interwork option is active. 
For more information see the email thread starting here:
https://www.sourceware.org/ml/binutils/2018-05/msg00348.html

	PR 21458
	* tc-arm.c (do_adr): Only set the bottom bit of an imported thumb
	function symbol address if -mthumb-interwork is active.
	(do_adrl): Likewise.
	* doc/c-arm.texi: Update descriptions of the -mthumb-interwork
	option and the ADR and ADRL pseudo-ops.
	* NEWS: Mention the new behaviour of the ADR and ADRL pseudo-ops.
	* testsuite/gas/arm/pr21458.d: Add -mthumb-interwork option to
	assembler command line.
	* testsuite/gas/arm/adr.d: Likewise.
	* testsuite/gas/arm/adrl.d: Likewise.
 2018-06-20 12:38:10 +01:00
Simon Marchi
d0ac1c4488 Bump to autoconf 2.69 and automake 1.15.1 
When trying to run the update-gnulib.sh script in gdb, I get this:

Error: Wrong automake version (Unescaped left brace in regex is deprecated, passed through in regex; marked by <-- HERE in m/\${ <-- HERE ([^      =:+{}]+)}/ at /opt/automake/1.11.1/bin/automake line 4113.), we need 1.11.1.
Aborting.

Apparently, it's an issue with a regex in automake that triggers a
warning starting with Perl 5.22.  It has been fixed in automake 1.15.1.
So I think it's a good excuse to bump the versions of autoconf and
automake used in the gnulib import.  And to avoid requiring multiple
builds of autoconf/automake, it was suggested that we bump the required
version of those tools for all binutils-gdb.

For autoconf, the 2.69 version is universally available, so it's an easy
choice.  For automake, different distros and distro versions have
different automake versions.  But 1.15.1 seems to be the most readily
available as a package.  In any case, it's easy to build it from source.

I removed the version checks from AUTOMAKE_OPTIONS and AC_PREREQ,
because I don't think they are useful in our case.  They only specify a
lower bound for the acceptable version of automake/autoconf.  That's
useful if you let the user choose the version of the tool they want to
use, but want to set a minimum version (because you use a feature that
was introduced in that version).  In our case, we force people to use a
specific version anyway.  For the autoconf version, we have the check in
config/override.m4 that enforces the version we want.  It will be one
less thing to update next time we change autotools version.

I hit a few categories of problems that required some changes.  They are
described below along with the chosen solutions.

Problem 1:

  configure.ac:17: warning: AM_INIT_AUTOMAKE: two- and three-arguments forms are deprecated.  For more info, see:
  configure.ac:17: http://www.gnu.org/software/automake/manual/automake.html#Modernize-AM_005fINIT_005fAUTOMAKE-invocation

Solution 1:

  Adjust the code based on the example at that URL.

Problem 2 (in zlib/):

  Makefile.am: error: required file './INSTALL' not found
  Makefile.am:   'automake --add-missing' can install 'INSTALL'
  Makefile.am: error: required file './NEWS' not found
  Makefile.am: error: required file './AUTHORS' not found
  Makefile.am: error: required file './COPYING' not found
  Makefile.am:   'automake --add-missing' can install 'COPYING'

Solution 2:

  Add the foreign option to AUTOMAKE_OPTIONS.

Problem 3:

  doc/Makefile.am:20: error: support for Cygnus-style trees has been removed

Solution 3:

  Remove the cygnus options.

Problem 4:

  Makefile.am:656: warning: 'INCLUDES' is the old name for 'AM_CPPFLAGS' (or '*_CPPFLAGS')

Solution 4:

  Rename "INCLUDES = " to "AM_CPPFLAGS += " (because AM_CPPFLAGS is
  already defined earlier).

Problem 5:

  doc/Makefile.am:71: warning: suffix '.texinfo' for Texinfo files is discouraged; use '.texi' instead
  doc/Makefile.am: warning: Oops!
  doc/Makefile.am:     It appears this file (or files included by it) are triggering
  doc/Makefile.am:     an undocumented, soon-to-be-removed automake hack.
  doc/Makefile.am:     Future automake versions will no longer place in the builddir
  doc/Makefile.am:     (rather than in the srcdir) the generated '.info' files that
  doc/Makefile.am:     appear to be cleaned, by e.g. being listed in CLEANFILES or
  doc/Makefile.am:     DISTCLEANFILES.
  doc/Makefile.am:     If you want your '.info' files to be placed in the builddir
  doc/Makefile.am:     rather than in the srcdir, you have to use the shiny new
  doc/Makefile.am:     'info-in-builddir' automake option.

Solution 5:

  Rename .texinfo files to .texi.

Problem 6:

  doc/Makefile.am: warning: Oops!
  doc/Makefile.am:     It appears this file (or files included by it) are triggering
  doc/Makefile.am:     an undocumented, soon-to-be-removed automake hack.
  doc/Makefile.am:     Future automake versions will no longer place in the builddir
  doc/Makefile.am:     (rather than in the srcdir) the generated '.info' files that
  doc/Makefile.am:     appear to be cleaned, by e.g. being listed in CLEANFILES or
  doc/Makefile.am:     DISTCLEANFILES.
  doc/Makefile.am:     If you want your '.info' files to be placed in the builddir
  doc/Makefile.am:     rather than in the srcdir, you have to use the shiny new
  doc/Makefile.am:     'info-in-builddir' automake option.

Solution 6:

  Remove the hack at the bottom of doc/Makefile.am and use
  the info-in-builddir automake option.

Problem 7:

  doc/Makefile.am:35: error: required file '../texinfo.tex' not found
  doc/Makefile.am:35:   'automake --add-missing' can install 'texinfo.tex'

Solution 7:

  Use the no-texinfo.tex automake option.  We also have one in
  texinfo/texinfo.tex, not sure if we should point to that, or move it
  (or a newer version of it added with automake --add-missing) to
  top-level.

Problem 8:

  Makefile.am:131: warning: source file 'config/tc-aarch64.c' is in a subdirectory,
  Makefile.am:131: but option 'subdir-objects' is disabled
  automake: warning: possible forward-incompatibility.
  automake: At least a source file is in a subdirectory, but the 'subdir-objects'
  automake: automake option hasn't been enabled.  For now, the corresponding output
  automake: object file(s) will be placed in the top-level directory.  However,
  automake: this behaviour will change in future Automake versions: they will
  automake: unconditionally cause object files to be placed in the same subdirectory
  automake: of the corresponding sources.
  automake: You are advised to start using 'subdir-objects' option throughout your
  automake: project, to avoid future incompatibilities.

Solution 8:

  Use subdir-objects, that means adjusting references to some .o that will now
  be in config/.

Problem 9:

  configure.ac:375: warning: AC_LANG_CONFTEST: no AC_LANG_SOURCE call detected in body
  ../../lib/autoconf/lang.m4:193: AC_LANG_CONFTEST is expanded from...
  ../../lib/autoconf/general.m4:2601: _AC_COMPILE_IFELSE is expanded from...
  ../../lib/autoconf/general.m4:2617: AC_COMPILE_IFELSE is expanded from...
  ../../lib/m4sugar/m4sh.m4:639: AS_IF is expanded from...
  ../../lib/autoconf/general.m4:2042: AC_CACHE_VAL is expanded from...
  ../../lib/autoconf/general.m4:2063: AC_CACHE_CHECK is expanded from...
  configure.ac:375: the top level

Solution 9:

  Use AC_LANG_SOURCE, or use proper quoting.

Problem 10 (in intl/):

  configure.ac:7: warning: AC_COMPILE_IFELSE was called before AC_USE_SYSTEM_EXTENSIONS
  /usr/share/aclocal/threadlib.m4:36: gl_THREADLIB_EARLY_BODY is expanded from...
  /usr/share/aclocal/threadlib.m4:29: gl_THREADLIB_EARLY is expanded from...
  /usr/share/aclocal/threadlib.m4:318: gl_THREADLIB is expanded from...
  /usr/share/aclocal/lock.m4:9: gl_LOCK is expanded from...
  /usr/share/aclocal/intl.m4:211: gt_INTL_SUBDIR_CORE is expanded from...
  /usr/share/aclocal/intl.m4:25: AM_INTL_SUBDIR is expanded from...
  /usr/share/aclocal/gettext.m4:57: AM_GNU_GETTEXT is expanded from...
  configure.ac:7: the top level

Solution 10:

  Add AC_USE_SYSTEM_EXTENSIONS in configure.ac.

ChangeLog:

	* libtool.m4: Use AC_LANG_SOURCE.
	* configure.ac: Remove AC_PREREQ, use AC_LANG_SOURCE.
	* README-maintainer-mode: Update version requirements.
	* ar-lib: New file.
	* test-driver: New file.
	* configure: Re-generate.

bfd/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11.
	(INCLUDES): Rename to ...
	(AM_CPPFLAGS): ... this.
	* configure.ac: Remove AC_PREREQ.
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9, cygnus, add
	info-in-builddir no-texinfo.tex.
	(info_TEXINFOS): Rename bfd.texinfo to bfd.texi.
	* doc/bfd.texinfo: Rename to ...
	* doc/bfd.texi: ... this.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

binutils/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Remove cygnus, add
	info-in-builddir no-texinfo.tex.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

config/ChangeLog:

	* override.m4 (_GCC_AUTOCONF_VERSION): Bump from 2.64 to 2.69.

etc/ChangeLog:

	* configure.in: Remove AC_PREREQ.
	* configure: Re-generate.

gas/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11, add subdir-objects.
	(TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O): Add config/ prefix.
	* configure.ac (TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O, emfiles,
	extra_objects): Add config/ prefix.
	* doc/as.texinfo: Rename to...
	* doc/as.texi: ... this.
	* doc/Makefile.am: Rename as.texinfo to as.texi throughout.
	Remove DISTCLEANFILES hack.
	(AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add no-texinfo.tex and
	info-in-builddir.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

gdb/ChangeLog:

	* common/common-defs.h (PACKAGE_NAME, PACKAGE_VERSION,
	PACKAGE_STRING, PACKAGE_TARNAME): Undefine.
	* configure.ac: Remove AC_PREREQ, add missing quoting.
	* gnulib/configure.ac: Modernize usage of
	AC_INIT/AM_INIT_AUTOMAKE.  Remove AC_PREREQ.
	* gnulib/update-gnulib.sh (AUTOCONF_VERSION): Bump to 2.69.
	(AUTOMAKE_VERSION): Bump to 1.15.1.
	* configure: Re-generate.
	* config.in: Re-generate.
	* aclocal.m4: Re-generate.
	* gnulib/aclocal.m4: Re-generate.
	* gnulib/config.in: Re-generate.
	* gnulib/configure: Re-generate.
	* gnulib/import/Makefile.in: Re-generate.

gdb/gdbserver/ChangeLog:

	* configure.ac: Remove AC_PREREQ, add missing quoting.
	* configure: Re-generate.
	* config.in: Re-generate.
	* aclocal.m4: Re-generate.

gdb/testsuite/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.

gold/ChangeLog:

	* configure.ac: Remove AC_PREREQ, add missing quoting and usage
	of AC_LANG_SOURCE.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
	* testsuite/Makefile.in: Re-generate.

gprof/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* Makefile.am: Remove DISTCLEANFILES hack.
	(AUTOMAKE_OPTIONS): Remove 1.11, add info-in-builddir.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
	* gconfig.in: Re-generate.

intl/ChangeLog:

	* configure.ac: Add AC_USE_SYSTEM_EXTENSIONS, remove AC_PREREQ.
	* configure: Re-generate.
	* config.h.in: Re-generate.
	* aclocal.m4: Re-generate.

ld/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* Makefile.am: Remove DISTCLEANFILES hack, rename ld.texinfo to
	ld.texi, ldint.texinfo to ldint.texi throughout.
	(AUTOMAKE_OPTIONS): Add info-in-builddir.
	* README: Rename ld.texinfo to ld.texi, ldint.texinfo to
	ldint.texi throughout.
	* gen-doc.texi: Likewise.
	* h8-doc.texi: Likewise.
	* ld.texinfo: Rename to ...
	* ld.texi: ... this.
	* ldint.texinfo: Rename to ...
	* ldint.texi: ... this.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.

libdecnumber/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.
	* aclocal.m4.

libiberty/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.
	* config.in: Re-generate.

opcodes/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11.
	* configure.ac: Remove AC_PREREQ.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.

readline/ChangeLog.gdb:

	* configure: Re-generate.
	* examples/rlfe/configure: Re-generate.

sim/ChangeLog:

	* All configure.ac: Remove AC_PREREQ.
	* All configure: Re-generate.

zlib/ChangeLog.bin-gdb:

	* configure.ac: Modernize AC_INIT call, remove AC_PREREQ.
	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add
	foreign.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
 2018-06-19 16:55:06 -04:00
Faraz Shahbazker
6f20c942c3 MIPS: Add Global INValidate ASE support 
Add support for the Global INValidate Application Specific Extension
for Release 6 of the MIPS Architecture.

[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
    Instruction Set Manual", Imagination Technologies Ltd., Document
    Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2
    "Alphabetical List of Instructions", pp. 187-191

bfd/
	* elfxx-mips.c (print_mips_ases): Add GINV extension.

binutils/
	* readelf.c (print_mips_ases): Add GINV extension.

gas/
	* NEWS: Mention MIPS Global INValidate ASE support.
	* config/tc-mips.c (options): Add OPTION_GINV and OPTION_NO_GINV.
	(md_longopts): Likewise.
	(mips_ases): Define availability for GINV.
	(mips_convert_ase_flags): Map ASE_GINV to AFL_ASE_GINV.
	(md_show_usage): Add help for -mginv and -mno-ginv.
	* doc/as.texinfo: Document -mginv, -mno-ginv.
	* doc/c-mips.texi: Document -mginv, -mno-ginv, .set ginv and
	.set noginv.
	* testsuite/gas/mips/ase-errors-1.s: Add error checks for GINV
	ASE.
	* testsuite/gas/mips/ase-errors-2.s: Likewise.
	* testsuite/gas/mips/ase-errors-1.l: Likewise.
	* testsuite/gas/mips/ase-errors-2.l: Likewise.
	* testsuite/gas/mips/ginv.d: New test.
	* testsuite/gas/mips/ginv-err.d: New test.
	* testsuite/gas/mips/ginv-err.l: New test stderr output.
	* testsuite/gas/mips/ginv.s: New test source.
	* testsuite/gas/mips/ginv-err.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

include/
	* elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
	(AFL_ASE_MASK): Update to include AFL_ASE_GINV.
	* opcode/mips.h: Document "+\" operand format.
	(ASE_GINV): New macro.

opcodes/
	* mips-dis.c (mips_arch_choices): Add GINV to mips32r6 and
	mips64r6 descriptors.
	(parse_mips_ase_option): Handle -Mginv option.
	(print_mips_disassembler_options): Document -Mginv.
	* mips-opc.c (decode_mips_operand) <+\>: New operand format.
	(GINV): New macro.
	(mips_opcodes): Define ginvi and ginvt.
 2018-06-14 21:34:49 +01:00
Scott Egerton
730c31740a MIPS: Add CRC ASE support 
Add support for the CRC Application Specific Extension for Release 6 of
the MIPS Architecture.

[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
    Instruction Set Manual", Imagination Technologies Ltd., Document
    Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2
    "Alphabetical List of Instructions", pp. 143-148

[2] "MIPS Architecture for Programmers Volume II-A: The MIPS64
    Instruction Set Manual", Imagination Technologies Ltd., Document
    Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2
    "Alphabetical List of Instructions", pp. 165-170

ChangeLog:

bfd/
2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
            Faraz Shahbazker  <Faraz.Shahbazker@mips.com>

	* elfxx-mips.c (print_mips_ases): Add CRC.

binutils/
2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
            Faraz Shahbazker  <Faraz.Shahbazker@mips.com>

	* readelf.c (print_mips_ases): Add CRC.

gas/
2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
            Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
            Maciej W. Rozycki  <macro@mips.com>

	* config/tc-mips.c (options): Add OPTION_CRC and OPTION_NO_CRC.
	(md_longopts): Likewise.
	(md_show_usage): Add help for -mcrc and -mno-crc.
	(mips_ases): Define availability for CRC and CRC64.
	(mips_convert_ase_flags): Map ASE_CRC to AFL_ASE_CRC.
	* doc/as.texinfo: Document -mcrc, -mno-crc.
	* doc/c-mips.texi: Document -mcrc, -mno-crc, .set crc and
	.set no-crc.
	* testsuite/gas/mips/ase-errors-1.l: Add error checks for CRC
	ASE.
	* testsuite/gas/mips/ase-errors-2.l: Likewise.
	* testsuite/gas/mips/ase-errors-1.s: Likewise.
	* testsuite/gas/mips/ase-errors-2.s: Likewise.
	* testsuite/gas/mips/crc.d: New test.
	* testsuite/gas/mips/crc64.d: New test.
	* testsuite/gas/mips/crc-err.d: New test.
	* testsuite/gas/mips/crc64-err.d: New test.
	* testsuite/gas/mips/crc-err.l: New test stderr output.
	* testsuite/gas/mips/crc64-err.l: New test stderr output.
	* testsuite/gas/mips/crc.s: New test source.
	* testsuite/gas/mips/crc64.s: New test source.
	* testsuite/gas/mips/crc-err.s: New test source.
	* testsuite/gas/mips/crc64-err.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

include/
2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
            Faraz Shahbazker  <Faraz.Shahbazker@mips.com>

	* elf/mips.h (AFL_ASE_CRC): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_CRC.
	* opcode/mips.h (ASE_CRC): New macro.
	* opcode/mips.h (ASE_CRC64): Likewise.

opcodes/
2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
            Faraz Shahbazker  <Faraz.Shahbazker@mips.com>

	* mips-dis.c (mips_arch_choices): Add CRC and CRC64 ASEs.
	* mips-opc.c (CRC, CRC64): New macros.
	(mips_builtin_opcodes): Define crc32b, crc32h, crc32w,
	crc32cb, crc32ch and crc32cw for CRC.  Define crc32d and
	crc32cd for CRC64.
 2018-06-13 15:39:05 +01:00
kyrtka01
7ebd13590c [arm][gas] Add support for Arm Cortex-A76 
This patch adds support to gas for -mcpu=cortex-a76 in the usual way.
make check-gas passes without problems.

2018-06-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

    * config/tc-arm.c (arm_cpus): Add Cortex-A76 entry.
    * doc/c-arm.texi (-mcpu): Document cortex-a76.
 2018-06-08 15:40:39 +01:00
kyrtka01
c2a0f9293a [AArch64][gas] Add support for Arm Cortex-A76 
This patch adds support to gas for -mcpu=cortex-a76 in the usual way.
make check-gas passes without problems.

2018-06-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

    * config/tc-aarch64.c (aarch64_cpus): Add Cortex-A76 entry.
    * doc/c-aarch64.texi (-mcpu): Document cortex-a76.
 2018-06-08 15:39:47 +01:00
Amit Pawar
a9660a6f40 Add znver2 support. 
gas/
	* config/tc-i386.c (cpu_flag_init): Add CPU_ZNVER2_FLAGS.
	* doc/c-i386.texi : Document znver2.
	* gas/testsuite/gas/i386/arch-13.s: Updated for znver2.
	* gas/testsuite/gas/i386/arch-13.d: Updated.
	* gas/testsuite/gas/i386/arch-13-znver1.d: Updated.
	* gas/testsuite/gas/i386/arch-13-znver2.d: New file.
	* gas/testsuite/gas/i386/x86-64-arch-3.s: Updated for znver2.
	* gas/testsuite/gas/i386/x86-64-arch-3.d: Updated.
	* gas/testsuite/gas/i386/x86-64-arch-3-znver1.d: Updated.
	* gas/testsuite/gas/i386/x86-64-arch-3-znver2.d: New file.
	* gas/testsuite/gas/i386/i386.exp: Updated for new test.

	opcode/
	* i386-gen.c (cpu_flag_init): Add CPU_ZNVER2_FLAGS.
	* i386-init.h : Regenerated.
 2018-05-30 12:27:35 +05:30
Jim Wilson
7f99954970 RISC-V: Add RV32E support. 
Kito Cheng  <kito.cheng@gmail.com>
	Monk Chiang  <sh.chiang04@gmail.com>

	bfd/
	* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Handle
	EF_RISCV_RVE.

	binutils/
	* readelf.c (get_machine_flags): Handle EF_RISCV_RVE.

	gas/
	* config/tc-riscv.c (rve_abi): New.
	(riscv_set_options): Add rve field.  Initialize it.
	(riscv_set_rve) New function.
	(riscv_set_arch): Support 'e' ISA subset.
	(reg_lookup_internal): If rve, check register is available.
	(riscv_set_abi): New parameter rve.
	(md_parse_option): Pass new argument to riscv_set_abi.
	(riscv_after_parse_args): Call riscv_set_rve.  If rve_abi, set
	EF_RISCV_RVE.
	* doc/c-riscv.texi (-mabi): Document new ilp32e argument.

	include/
	* elf/riscv.h (EF_RISCV_RVE): New define.
 2018-05-18 14:03:18 -07:00
John Darrington
7b4ae82428 Add support for the Freescale s12z processor. 
bfd	* Makefile.am: Add s12z files.
	* Makefile.in: Regenerate.
	* archures.c: Add bfd_s12z_arch.
	* bfd-in.h: Add exports of bfd_putb24 and bfd_putl24.
	* bfd-in2.h: Regenerate.
	* config.bfd: Add s12z target.
	* configure.ac: Add s12z target.
	* configure: Regenerate.
	* cpu-s12z.c: New file.
	* elf32-s12z.c: New file.
	* libbfd.c (bfd_putb24): New function.
	(bfd_putl24): New function.
	* libbfd.h: Regenerate.
	* reloc.c: Add s12z relocations.
	(bfd_get_reloc_size): Handle size 5 relocs.
	* targets.c: Add s12z_elf32_vec.

opcodes	* Makefile.am: Add support for s12z architecture.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* s12z-dis.c: New file.
	* s12z.h: New file.

include	* elf/s12z.h: New header.

ld	* Makefile.am: Add support for s12z architecture.
	* configure.tgt: Likewise.
	* Makefile.in: Regenerate.
	* emulparams/m9s12zelf.sh: New file.
	* scripttempl/elfm9s12z.sc: New file.
	* testsuite/ld-discard/static.d: Expect to fail for the s12z
	target.
	* testsuite/ld-elf/endsym.d: Likewise.
	* testsuite/ld-elf/merge.d: Likewise.
	* testsuite/ld-elf/pr14926.d: Skip for the s12z target.
	* testsuite/ld-elf/sec64k.exp: Likewise.
	* testsuite/ld-s12z: New directory.
	* testsuite/ld-s12z/opr-linking.d: New file.
	* testsuite/ld-s12z/opr-linking.s: New file.
	* testsuite/ld-s12z/relative-linking.d: New file.
	* testsuite/ld-s12z/relative-linking.s: New file.
	* testsuite/ld-s12z/z12s.exp: New file.

gas	* Makefile.am: Add support for s12z target.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new support.
	* config/tc-s12z.c: New file.
	* config/tc-s12z.h: New file.
	* configure.tgt: Add  s12z support.
	* doc/Makefile.am: Likewise.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi: Add s12z documentation.
	* doc/as.textinfo: Likewise.
	* doc/c-s12z.texi: New file.
	* testsuite/gas/s12z: New directory.
	* testsuite/gas/s12z/abs.d: New file.
	* testsuite/gas/s12z/abs.s: New file.
	* testsuite/gas/s12z/adc-imm.d: New file.
	* testsuite/gas/s12z/adc-imm.s: New file.
	* testsuite/gas/s12z/adc-opr.d: New file.
	* testsuite/gas/s12z/adc-opr.s: New file.
	* testsuite/gas/s12z/add-imm.d: New file.
	* testsuite/gas/s12z/add-imm.s: New file.
	* testsuite/gas/s12z/add-opr.d: New file.
	* testsuite/gas/s12z/add-opr.s: New file.
	* testsuite/gas/s12z/and-imm.d: New file.
	* testsuite/gas/s12z/and-imm.s: New file.
	* testsuite/gas/s12z/and-opr.d: New file.
	* testsuite/gas/s12z/and-opr.s: New file.
	* testsuite/gas/s12z/and-or-cc.d: New file.
	* testsuite/gas/s12z/and-or-cc.s: New file.
	* testsuite/gas/s12z/bfext-special.d: New file.
	* testsuite/gas/s12z/bfext-special.s: New file.
	* testsuite/gas/s12z/bfext.d: New file.
	* testsuite/gas/s12z/bfext.s: New file.
	* testsuite/gas/s12z/bit-manip.d: New file.
	* testsuite/gas/s12z/bit-manip.s: New file.
	* testsuite/gas/s12z/bit.d: New file.
	* testsuite/gas/s12z/bit.s: New file.
	* testsuite/gas/s12z/bra-expression-defined.d: New file.
	* testsuite/gas/s12z/bra-expression-defined.s: New file.
	* testsuite/gas/s12z/bra-expression-undef.d: New file.
	* testsuite/gas/s12z/bra-expression-undef.s: New file.
	* testsuite/gas/s12z/bra.d: New file.
	* testsuite/gas/s12z/bra.s: New file.
	* testsuite/gas/s12z/brclr-symbols.d: New file.
	* testsuite/gas/s12z/brclr-symbols.s: New file.
	* testsuite/gas/s12z/brset-clr-opr-imm-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-opr-imm-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-opr-reg-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-opr-reg-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-reg-imm-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-reg-imm-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-reg-reg-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-reg-reg-rel.s: New file.
	* testsuite/gas/s12z/clb.d: New file.
	* testsuite/gas/s12z/clb.s: New file.
	* testsuite/gas/s12z/clr-opr.d: New file.
	* testsuite/gas/s12z/clr-opr.s: New file.
	* testsuite/gas/s12z/clr.d: New file.
	* testsuite/gas/s12z/clr.s: New file.
	* testsuite/gas/s12z/cmp-imm.d: New file.
	* testsuite/gas/s12z/cmp-imm.s: New file.
	* testsuite/gas/s12z/cmp-opr-inc.d: New file.
	* testsuite/gas/s12z/cmp-opr-inc.s: New file.
	* testsuite/gas/s12z/cmp-opr-rdirect.d: New file.
	* testsuite/gas/s12z/cmp-opr-rdirect.s: New file.
	* testsuite/gas/s12z/cmp-opr-reg.d: New file.
	* testsuite/gas/s12z/cmp-opr-reg.s: New file.
	* testsuite/gas/s12z/cmp-opr-rindirect.d: New file.
	* testsuite/gas/s12z/cmp-opr-rindirect.s: New file.
	* testsuite/gas/s12z/cmp-opr-sxe4.d: New file.
	* testsuite/gas/s12z/cmp-opr-sxe4.s: New file.
	* testsuite/gas/s12z/cmp-opr-xys.d: New file.
	* testsuite/gas/s12z/cmp-opr-xys.s: New file.
	* testsuite/gas/s12z/cmp-s-imm.d: New file.
	* testsuite/gas/s12z/cmp-s-imm.s: New file.
	* testsuite/gas/s12z/cmp-s-opr.d: New file.
	* testsuite/gas/s12z/cmp-s-opr.s: New file.
	* testsuite/gas/s12z/cmp-xy.d: New file.
	* testsuite/gas/s12z/cmp-xy.s: New file.
	* testsuite/gas/s12z/com-opr.d: New file.
	* testsuite/gas/s12z/com-opr.s: New file.
	* testsuite/gas/s12z/complex-shifts.d: New file.
	* testsuite/gas/s12z/complex-shifts.s: New file.
	* testsuite/gas/s12z/db-tb-cc-opr.d: New file.
	* testsuite/gas/s12z/db-tb-cc-opr.s: New file.
	* testsuite/gas/s12z/db-tb-cc-reg.d: New file.
	* testsuite/gas/s12z/db-tb-cc-reg.s: New file.
	* testsuite/gas/s12z/dbCC.d: New file.
	* testsuite/gas/s12z/dbCC.s: New file.
	* testsuite/gas/s12z/dec-opr.d: New file.
	* testsuite/gas/s12z/dec-opr.s: New file.
	* testsuite/gas/s12z/dec.d: New file.
	* testsuite/gas/s12z/dec.s: New file.
	* testsuite/gas/s12z/div.d: New file.
	* testsuite/gas/s12z/div.s: New file.
	* testsuite/gas/s12z/eor.d: New file.
	* testsuite/gas/s12z/eor.s: New file.
	* testsuite/gas/s12z/exg.d: New file.
	* testsuite/gas/s12z/exg.s: New file.
	* testsuite/gas/s12z/ext24-ld-xy.d: New file.
	* testsuite/gas/s12z/ext24-ld-xy.s: New file.
	* testsuite/gas/s12z/inc-opr.d: New file.
	* testsuite/gas/s12z/inc-opr.s: New file.
	* testsuite/gas/s12z/inc.d: New file.
	* testsuite/gas/s12z/inc.s: New file.
	* testsuite/gas/s12z/inh.d: New file.
	* testsuite/gas/s12z/inh.s: New file.
	* testsuite/gas/s12z/jmp.d: New file.
	* testsuite/gas/s12z/jmp.s: New file.
	* testsuite/gas/s12z/jsr.d: New file.
	* testsuite/gas/s12z/jsr.s: New file.
	* testsuite/gas/s12z/ld-imm-page2.d: New file.
	* testsuite/gas/s12z/ld-imm-page2.s: New file.
	* testsuite/gas/s12z/ld-imm.d: New file.
	* testsuite/gas/s12z/ld-imm.s: New file.
	* testsuite/gas/s12z/ld-immu18.d: New file.
	* testsuite/gas/s12z/ld-immu18.s: New file.
	* testsuite/gas/s12z/ld-large-direct.d: New file.
	* testsuite/gas/s12z/ld-large-direct.s: New file.
	* testsuite/gas/s12z/ld-opr.d: New file.
	* testsuite/gas/s12z/ld-opr.s: New file.
	* testsuite/gas/s12z/ld-s-opr.d: New file.
	* testsuite/gas/s12z/ld-s-opr.s: New file.
	* testsuite/gas/s12z/ld-small-direct.d: New file.
	* testsuite/gas/s12z/ld-small-direct.s: New file.
	* testsuite/gas/s12z/lea-immu18.d: New file.
	* testsuite/gas/s12z/lea-immu18.s: New file.
	* testsuite/gas/s12z/lea.d: New file.
	* testsuite/gas/s12z/lea.s: New file.
	* testsuite/gas/s12z/mac.d: New file.
	* testsuite/gas/s12z/mac.s: New file.
	* testsuite/gas/s12z/min-max.d: New file.
	* testsuite/gas/s12z/min-max.s: New file.
	* testsuite/gas/s12z/mod.d: New file.
	* testsuite/gas/s12z/mod.s: New file.
	* testsuite/gas/s12z/mov.d: New file.
	* testsuite/gas/s12z/mov.s: New file.
	* testsuite/gas/s12z/mul-imm.d: New file.
	* testsuite/gas/s12z/mul-imm.s: New file.
	* testsuite/gas/s12z/mul-opr-opr.d: New file.
	* testsuite/gas/s12z/mul-opr-opr.s: New file.
	* testsuite/gas/s12z/mul-opr.d: New file.
	* testsuite/gas/s12z/mul-opr.s: New file.
	* testsuite/gas/s12z/mul-reg.d: New file.
	* testsuite/gas/s12z/mul-reg.s: New file.
	* testsuite/gas/s12z/mul.d: New file.
	* testsuite/gas/s12z/mul.s: New file.
	* testsuite/gas/s12z/neg-opr.d: New file.
	* testsuite/gas/s12z/neg-opr.s: New file.
	* testsuite/gas/s12z/not-so-simple-shifts.d: New file.
	* testsuite/gas/s12z/not-so-simple-shifts.s: New file.
	* testsuite/gas/s12z/opr-18u.d: New file.
	* testsuite/gas/s12z/opr-18u.s: New file.
	* testsuite/gas/s12z/opr-expr.d: New file.
	* testsuite/gas/s12z/opr-expr.s: New file.
	* testsuite/gas/s12z/opr-ext-18.d: New file.
	* testsuite/gas/s12z/opr-ext-18.s: New file.
	* testsuite/gas/s12z/opr-idx-24-reg.d: New file.
	* testsuite/gas/s12z/opr-idx-24-reg.s: New file.
	* testsuite/gas/s12z/opr-idx3-reg.d: New file.
	* testsuite/gas/s12z/opr-idx3-reg.s: New file.
	* testsuite/gas/s12z/opr-idx3-xysp-24.d: New file.
	* testsuite/gas/s12z/opr-idx3-xysp-24.s: New file.
	* testsuite/gas/s12z/opr-indirect-expr.d: New file.
	* testsuite/gas/s12z/opr-indirect-expr.s: New file.
	* testsuite/gas/s12z/opr-symbol.d: New file.
	* testsuite/gas/s12z/opr-symbol.s: New file.
	* testsuite/gas/s12z/or-imm.d: New file.
	* testsuite/gas/s12z/or-imm.s: New file.
	* testsuite/gas/s12z/or-opr.d: New file.
	* testsuite/gas/s12z/or-opr.s: New file.
	* testsuite/gas/s12z/p2-mul.d: New file.
	* testsuite/gas/s12z/p2-mul.s: New file.
	* testsuite/gas/s12z/page2-inh.d: New file.
	* testsuite/gas/s12z/page2-inh.s: New file.
	* testsuite/gas/s12z/psh-pul.d: New file.
	* testsuite/gas/s12z/psh-pul.s: New file.
	* testsuite/gas/s12z/qmul.d: New file.
	* testsuite/gas/s12z/qmul.s: New file.
	* testsuite/gas/s12z/rotate.d: New file.
	* testsuite/gas/s12z/rotate.s: New file.
	* testsuite/gas/s12z/s12z.exp: New file.
	* testsuite/gas/s12z/sat.d: New file.
	* testsuite/gas/s12z/sat.s: New file.
	* testsuite/gas/s12z/sbc-imm.d: New file.
	* testsuite/gas/s12z/sbc-imm.s: New file.
	* testsuite/gas/s12z/sbc-opr.d: New file.
	* testsuite/gas/s12z/sbc-opr.s: New file.
	* testsuite/gas/s12z/shift.d: New file.
	* testsuite/gas/s12z/shift.s: New file.
	* testsuite/gas/s12z/simple-shift.d: New file.
	* testsuite/gas/s12z/simple-shift.s: New file.
	* testsuite/gas/s12z/single-ops.d: New file.
	* testsuite/gas/s12z/single-ops.s: New file.
	* testsuite/gas/s12z/specd6.d: New file.
	* testsuite/gas/s12z/specd6.s: New file.
	* testsuite/gas/s12z/st-large-direct.d: New file.
	* testsuite/gas/s12z/st-large-direct.s: New file.
	* testsuite/gas/s12z/st-opr.d: New file.
	* testsuite/gas/s12z/st-opr.s: New file.
	* testsuite/gas/s12z/st-s-opr.d: New file.
	* testsuite/gas/s12z/st-s-opr.s: New file.
	* testsuite/gas/s12z/st-small-direct.d: New file.
	* testsuite/gas/s12z/st-small-direct.s: New file.
	* testsuite/gas/s12z/st-xy.d: New file.
	* testsuite/gas/s12z/st-xy.s: New file.
	* testsuite/gas/s12z/sub-imm.d: New file.
	* testsuite/gas/s12z/sub-imm.s: New file.
	* testsuite/gas/s12z/sub-opr.d: New file.
	* testsuite/gas/s12z/sub-opr.s: New file.
	* testsuite/gas/s12z/tfr.d: New file.
	* testsuite/gas/s12z/tfr.s: New file.
	* testsuite/gas/s12z/trap.d: New file.
	* testsuite/gas/s12z/trap.s: New file.

binutils* readelf.c: Add support for s12z architecture.
	* testsuite/lib/binutils-common.exp (is_elf_format): Excluse s12z
	targets.
 2018-05-18 15:26:18 +01:00
H.J. Lu
c0a30a9f0a Enable Intel MOVDIRI, MOVDIR64B instructions 
gas/

	* config/tc-i386.c (cpu_arch): Add .movdir, .movdir64b.
	(cpu_noarch): Likewise.
	(process_suffix): Add check for register size.
	* doc/c-i386.texi: Document movdiri, movdir64b.
	* testsuite/gas/i386/i386.exp: Run MOVDIR{I,64B} tests.
	* testsuite/gas/i386/movdir-intel.d: New file.
	* testsuite/gas/i386/movdir.d: Likewise.
	* testsuite/gas/i386/movdir.s: Likewise.
	* testsuite/gas/i386/movdir64b-reg.s: Likewise.
	* testsuite/gas/i386/movdir64b-reg.l: Likewise.
	* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-movdir.d: Likewise.
	* testsuite/gas/i386/x86-64-movdir.s: Likewise.
	* testsuite/gas/i386/x86-64-movdir64b-reg.s: Likewise.
	* testsuite/gas/i386/x86-64-movdir64b-reg.l: Likewise.

opcodes/

	* i386-dis.c (Gva): New.
	(enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
	MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
	(prefix_table): New instructions (see prefix above).
	(mod_table): New instructions (see prefix above).
	(OP_G): Handle va_mode.
	* i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
	CPU_MOVDIR64B_FLAGS.
	(cpu_flags): Add CpuMOVDIRI and CpuMOVDIR64B.
	* i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
	(i386_cpu_flags): Add cpumovdiri and cpumovdir64b.
	* i386-opc.tbl: Add movidir{i,64b}.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2018-05-07 16:57:48 -07:00
Igor Tsimbalist
aa17843739 Revert "Enable Intel MOVDIRI, MOVDIR64B instructions." 
This reverts commit a914a7c958.
 2018-04-27 14:34:13 +02:00
Igor Tsimbalist
a914a7c958 Enable Intel MOVDIRI, MOVDIR64B instructions. 
gas/
	* config/tc-i386.c (cpu_arch): Add .movdir, .movdir64b.
	(cpu_noarch): Likewise.
	(process_suffix): Add check for register size.
	* doc/c-i386.texi: Document movdiri, movdir64b.
	* testsuite/gas/i386/i386.exp: Run MOVDIR{I,64B} tests.
	* testsuite/gas/i386/movdir-intel.d: New test.
	* testsuite/gas/i386/movdir.d: Likewise.
	* testsuite/gas/i386/movdir.s: Likewise.
	* testsuite/gas/i386/movdir64b-reg.s: Likewise.
	* testsuite/gas/i386/movdir64b-reg.l: Likewise.
	* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-movdir.d: Likewise.
	* testsuite/gas/i386/x86-64-movdir.s: Likewise.
	* testsuite/gas/i386/x86-64-movdir64b-reg.s: Likewise.
	* testsuite/gas/i386/x86-64-movdir64b-reg.l: Likewise.

opcodes/
	* i386-dis.c (enum): Add PREFIX_0F38F8, PREFIX_0F38F9.
	(prefix_table): New instructions (see prefix above).
	Add Gva macro and handling in OP_G.
	* i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
	CPU_MOVDIR64B_FLAGS.
	(cpu_flags): Likewise.
	(opcode_modifiers): Add AddrPrefixOpReg.
	(i386_opcode_modifier): Likewise.
	* i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
	(i386_cpu_flags): Likewise.
	* i386-opc.tbl: Add movidir{i,64b}.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Likewise.
 2018-04-26 23:34:04 +02:00