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604 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Alan Modra
|
ee67d69a3f |
Add .abiversion related support for ELFv2
Defines bits in ELF e_flags to differentiate ELFv2 objects from ELFv2, adds .abiversion directive to explicitly choose the ABI, and code to check and automatically select ABI. include/elf/ * ppc64.h (EF_PPC64_ABI): Define. bfd/ * elf64-ppc.c (abiversion, set_abiversion): New functions. (ppc64_elf_get_synthetic_symtab): Handle ELFv2 objects without .opd. (struct ppc_link_hash_table): Add opd_abi. (ppc64_elf_check_relocs): Check no .opd with ELFv2. (ppc64_elf_merge_private_bfd_data): New function. (ppc64_elf_print_private_bfd_data): New function. (ppc64_elf_tls_setup): Set htab->opd_abi. (ppc64_elf_size_dynamic_sections): Don't emit OPD related dynamic tags for ELFv2. (ppc_build_one_stub): Use R_PPC64_IRELATIVE for ELFv2 ifunc. (ppc64_elf_finish_dynamic_symbol): Likewise binutils/ * readelf.c (get_machine_flags): Display ABI version for EM_PPC64. gas/ * config/tc-ppc.c: Include elf/ppc64.h. (ppc_abiversion): New variable. (md_pseudo_table): Add .abiversion. (ppc_elf_abiversion, ppc_elf_end): New functions. * config/tc-ppc.h (md_end): Define. |
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Alan Modra
|
f9c6b9078c |
Report overflow on PowerPC64 @h and @ha relocations.
This changes the behaviour of @h and @ha on PowerPC64 to report errors on 32-bit overflow. The motivation for this change is that on PowerPC64, most uses of @h and @ha modifiers and their corresponding relocations are to build up 32-bit offsets. We'd like to know when such offsets overflow. Only rarely do people use @h or @ha with the high 32-bit modifiers to build a 64-bit constant. Those uses will now need to use two new modifiers, @high and @higha, if the constant isn't known at assembly time. For now, we won't report overflow at assembly time.. This also fixes an error when applying some of the HIGHER and HIGHEST relocations. include/elf/ * ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA, R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA, R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New. (IS_PPC64_TLS_RELOC): Match new tls relocs. bfd/ * reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA, BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA, BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New. * elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs. Make all _HA and _HI relocs report signed overflow. (ppc64_elf_reloc_type_lookup): Handle new relocs. (must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise. (dec_dynrel_count, ppc64_elf_relocate_section): Likewise. (ppc64_elf_relocate_section): Don't apply 0x8000 adjust to R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST, R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ * config/tc-ppc.c (SEX16): Don't mask. (REPORT_OVERFLOW_HI): Define as zero. (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha, @tprel@high, and @tprel@higha modifiers. (md_assemble): Ignore X_unsigned when applying 16-bit insn fields. Add (disabled) code to check @h and @ha reloc overflow for powerpc64. Handle new relocs. (md_apply_fix): Similarly. elfcpp/ * powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA, R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA, R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define. gold/ * powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs. (Target_powerpc::Scan::global, local): Likewise. (Target_powerpc::Relocate::relocate): Likewise. Check for overflow on all ppc64 @h and @ha relocs. |
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Chao-ying Fu
|
63b8b2af80 |
2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* mips.h (enum): Add Tag_GNU_MIPS_ABI_MSA. (enum): Add Val_GNU_MIPS_ABI_MSA_ANY and Val_GNU_MIPS_ABI_MSA_128. |
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Steve Ellcey
|
f303dcc05d |
2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
* mips.h (EF_MIPS_FP64): New e_flags bit. |
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Nick Clifton
|
4046d87a36 |
* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if G10
flag bits do not match. (rl78_elf_print_private_bfd_data): Describe G10 flag. * readelf.c (get_machine_flags): Handle RL78 G10 flag. * config/tc-rl78.c (elf_flags): New variable. (enum options): Add OPTION_G10. (md_longopts): Add mg10. (md_parse_option): Parse -mg10. (rl78_elf_final_processing): New function. * config/tc-rl78.c (tc_final_processing): Define. * doc/c-rl78.texi: Document -mg10 option. * rl78.c (E_FLAG_RL78_G10): Define. * lib/ld-lib.exp (check_shared_lib_support): Note that the RL78 does not support shared library generation. |
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Maciej W. Rozycki
|
d929bc19b9 |
include/elf/
* mips.h (Tag_GNU_MIPS_ABI_FP): Remove comment. (Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE, Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT, Val_GNU_MIPS_ABI_FP_64): New enum. bfd/ * elfxx-mips.c (mips_elf_merge_obj_attributes): Replace hardcoded magic numbers with enum values. binutils/ * readelf.c (display_mips_gnu_attribute): Replace hardcoded magic numbers with enum values. gdb/ * mips-tdep.c (mips_gdbarch_init): Replace hardcoded magic numbers with enum values. |
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Maciej W. Rozycki
|
ba92f88752 |
include/elf/
* mips.h (EF_MIPS_NAN2008): New macro. bfd/ * elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Handle EF_MIPS_NAN2008. (_bfd_mips_elf_print_private_bfd_data): Likewise. binutils/ * readelf.c (get_machine_flags): Handle EF_MIPS_NAN2008. gas/ * config/tc-mips.c (mips_flag_nan2008): New variable. (options): Add OPTION_NAN enum value. (md_longopts): Handle it. (md_parse_option): Likewise. (s_nan): New function. (mips_elf_final_processing): Handle EF_MIPS_NAN2008. (md_show_usage): Add -mnan. * doc/as.texinfo (Overview): Add -mnan. * doc/c-mips.texi (MIPS Opts): Document -mnan. (MIPS NaN Encodings): New node. Document .nan directive. (MIPS-Dependent): List the new node. gas/testsuite/ * gas/mips/nan-2008-1.d: New test. * gas/mips/nan-2008-2.d: New test. * gas/mips/nan-2008-3.d: New test. * gas/mips/nan-2008-4.d: New test. * gas/mips/nan-legacy-1.d: New test. * gas/mips/nan-legacy-2.d: New test. * gas/mips/nan-legacy-3.d: New test. * gas/mips/nan-legacy-4.d: New test. * gas/mips/nan-legacy-5.d: New test. * gas/mips/nan-error-1.l: New list test. * gas/mips/nan-error-2.l: New list test. * gas/mips/nan-2008-override.s: New test source. * gas/mips/nan-2008.s: New test source. * gas/mips/nan-legacy-override.s: New test source. * gas/mips/nan-legacy.s: New test source. * gas/mips/nan-error-1.s: New test source. * gas/mips/nan-error-2.s: New test source. * gas/mips/mips.exp: Run the new tests. ld/testsuite/ * ld-mips-elf/nan-2008.d: New test. * ld-mips-elf/nan-legacy.d: New test. * ld-mips-elf/nan-mixed-1.d: New test. * ld-mips-elf/nan-mixed-2.d: New test. * ld-mips-elf/nan-2008.s: New test source. * ld-mips-elf/nan-legacy.s: New test source. |
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Tristan Gingold
|
ee4dff511c |
2013-07-08 Tristan Gingold <gingold@adacore.com>
* ia64.h (STB_VMS_WEAK, STB_VMS_SYSTEM): Add. |
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Andreas Krebbel
|
fb798c50b2 |
2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
opcodes/ * s390-opc.c (J12_12, J24_24): New macros. (INSTR_MII_UPI): Rename to INSTR_MII_UPP. (MASK_MII_UPI): Rename to MASK_MII_UPP. * s390-opc.txt: Rename MII_UPI to MII_UPP for bprp instruction. include/elf/ * s390.h: Add new relocs R_390_PC12DBL, R_390_PLT12DBL, R_390_PC24DBL, and R_390_PLT24DBL. gas/testsuite/ * gas/s390/zarch-zEC12.s: Change bprp second operand and add variants requiring relocations. * gas/s390/zarch-zEC12.d: Likewise. gas/ * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new relocs. bfd/ * elf32-s390.c: Add new relocation definitions R_390_PC12DBL, R_390_PLT12DBL, R_390_PC24DBL, and R_390_PLT24DBL. (elf_s390_reloc_type_lookup, elf_s390_check_relocs) (elf_s390_gc_sweep_hook, elf_s390_relocate_section): Support new relocations. * elf64-s390.c: See elf32-s390.c * bfd-in2.h: Add new relocs to enum bfd_reloc_code_real. * libbfd.h: Add new reloc strings. |
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Yufeng Zhang
|
a6bb11b2df |
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling
bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc. |
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Maciej W. Rozycki
|
1bbce13264 |
bfd/
* elfxx-mips.h (_bfd_mips_elf_get_synthetic_symtab): New prototype. * elf32-mips.c (elf_backend_plt_sym_val): Remove macro. (bfd_elf32_get_synthetic_symtab): New macro. * elfxx-mips.c (plt_entry): New structure. (mips_elf_link_hash_entry): Add use_plt_entry member. (mips_elf_link_hash_table): Rename plt_entry_size member to plt_mips_entry_size. Add plt_comp_entry_size, plt_mips_offset, plt_comp_offset, plt_got_index entries and plt_header_is_comp members. (STUB_LW_MICROMIPS, STUB_MOVE_MICROMIPS): New macros. (STUB_LUI_MICROMIPS, STUB_JALR_MICROMIPS): Likewise. (STUB_ORI_MICROMIPS, STUB_LI16U_MICROMIPS): Likewise. (STUB_LI16S_MICROMIPS): Likewise. (MICROMIPS_FUNCTION_STUB_NORMAL_SIZE): Likewise. (MICROMIPS_FUNCTION_STUB_BIG_SIZE): Likewise. (micromips_o32_exec_plt0_entry): New variable. (mips16_o32_exec_plt_entry): Likewise. (micromips_o32_exec_plt_entry): Likewise. (mips_elf_link_hash_newfunc): Initialize use_plt_entry. (mips_elf_output_extsym): Update to use gotplt_union's plist member rather than offset. (mips_elf_gotplt_index): Likewise. Remove the VxWorks restriction. Use MIPS_ELF_GOT_SIZE to calculate GOT address. (mips_elf_count_got_symbols): Update to use gotplt_union's plist member rather than offset. (mips_elf_calculate_relocation): Handle MIPS16/microMIPS PLT entries. (_bfd_mips_elf_create_dynamic_sections): Don't set PLT sizes here. (mips_elf_make_plt_record): New function. (_bfd_mips_elf_check_relocs): Update comment. Record occurences of JAL relocations that might need a PLT entry. (_bfd_mips_elf_adjust_dynamic_symbol): Update to use gotplt_union's plist member rather than offset. Set individual PLT entry sizes here. Handle MIPS16/microMIPS PLT entries. Don't set the symbol's value in the symbol table for PLT references here. Don't set the PLT or PLT GOT section sizes here. (mips_elf_estimate_stub_size): Handle microMIPS stubs. (mips_elf_allocate_lazy_stub): Likewise. (mips_elf_lay_out_lazy_stubs): Likewise. Define a _MIPS_STUBS_ magic symbol. (mips_elf_set_plt_sym_value): New function. (_bfd_mips_elf_size_dynamic_sections): Set PLT header size and PLT and PLT GOT section sizes here. Set the symbol values in the symbol table for PLT references here. Handle microMIPS annotation of the _PROCEDURE_LINKAGE_TABLE_ magic symbol. (_bfd_mips_elf_finish_dynamic_symbol): Update to use gotplt_union's plist member rather than offset. Handle MIPS16/microMIPS PLT entries. Handle microMIPS stubs. (_bfd_mips_vxworks_finish_dynamic_symbol): Update to use gotplt_union's plist member rather than offset. Use MIPS_ELF_GOT_SIZE to calculate GOT address. (mips_finish_exec_plt): Handle microMIPS PLT. Return status. (_bfd_mips_elf_finish_dynamic_sections): Handle result from mips_finish_exec_plt. (_bfd_mips_elf_link_hash_table_create): Update to use gotplt_union's plist member rather than offset. (_bfd_mips_elf_get_synthetic_symtab): New function. include/elf/ * mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting. (ELF_ST_SET_MIPS_PLT): Likewise. gdb/ * mips-tdep.c (mips_elf_make_msymbol_special): Handle MIPS16 and microMIPS synthetic symbols. ld/ * emulparams/elf32btsmip.sh: Arrange for .got.plt to be placed as close to .plt as possible. * scripttempl/elf.sc: Handle $INITIAL_READWRITE_SECTIONS and $PLT_NEXT_DATA variables. ld/testsuite/ * ld-mips-elf/jalx-2.dd: Update for microMIPS PLT support. * ld-mips-elf/pic-and-nonpic-3a.dd: Update for the _MIPS_STUBS_ magic symbol. * ld-mips-elf/pic-and-nonpic-3b.dd: Likewise. * ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise. * ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise. * ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise. * ld-mips-elf/stub-dynsym-1-10000.d: Likewise. * ld-mips-elf/stub-dynsym-1-2fe80.d: Likewise. * ld-mips-elf/stub-dynsym-1-7fff.d: Likewise. * ld-mips-elf/stub-dynsym-1-8000.d: Likewise. * ld-mips-elf/stub-dynsym-1-fff0.d: Likewise. * ld-mips-elf/tlslib-o32.d: Likewise. opcodes/ * mips-dis.c (is_mips16_plt_tail): New function. (print_insn_mips16): Handle MIPS16 PLT entry's GOT slot address word. (is_compressed_mode_p): Handle MIPS16/microMIPS PLT entries. |
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Will Newton
|
8847944f8c |
aarch64: Revert AArch64 ifunc changes.
The AArch64 ifunc patch introduced a regression caused by incorrect PLT layout. Revert it until a fix is verified. bfd/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * configure: Regenerated. * configure.in: Remove aarch64 dependency on elf-ifunc.c. * elf64-aarch64.c: Remove objalloc.h include. (elf64_aarch64_howto_dynrelocs): Remove R_AARCH64_IRELATIVE howto. (struct elf64_aarch64_link_hash_table): Remove ifunc related members. (elf_aarch64_local_htab_hash): Remove function. (elf_aarch64_local_htab_eq): Remove function. (elf_aarch64_get_local_sym_hash): Remove function. (elf64_aarch64_link_hash_table_create): Remove local hash table initialization. (elf64_aarch64_final_link_relocate): Remove sym argument and handling of ifunc symbols. (elf64_aarch64_relocate_section): Don't pass sym argument to elf64_aarch64_final_link_relocate. (elf64_aarch64_gc_sweep_hook): Remove handling of ifunc symbols. (elf64_aarch64_adjust_dynamic_symbol): Likewise. (elf64_aarch64_check_relocs): Likewise. (elf64_aarch64_post_process_headers): Remove call to _bfd_elf_set_osabi. (elf64_aarch64_is_function_type): New function. (elf64_aarch64_allocate_dynrelocs): Remove handling of ifunc symbols. (elf_aarch64_allocate_local_dynrelocs): Remove function. (elf64_aarch64_size_dynamic_sections): Remove call to elf_aarch64_allocate_local_dynrelocs. (elf64_aarch64_create_small_pltn_entry): Remove info argument. Remove creation of R_AARCH64_IRELATIVE dynamic relocs. (elf64_aarch64_finish_dynamic_symbol): Remove handling of ifunc symbols. (elf_aarch64_finish_local_dynamic_symbol): Remove function. (elf64_aarch64_finish_dynamic_sections): Remove call to elf_aarch64_finish_local_dynamic_symbol. (elf64_aarch64_add_symbol_hook): Remove function. include/elf/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * aarch64.h: Remove R_AARCH64_IRELATIVE. ld/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Remove IREL_IN_PLT. ld/testsuite/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * ld-aarch64/aarch64-elf.exp: Remove ifunc tests. * ld-ifunc/ifunc.exp: Disable ifunc tests on AArch64. * ld-aarch64/ifunc-1-local.d: Remove. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise. |
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Will Newton
|
692e2b8bcd |
aarch64: Add support for GNU indirect functions.
Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-06-07 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elf64-aarch64.c: Include objalloc.h. (elf64_aarch64_howto_dynrelocs): Add R_AARCH64_IRELATIVE howto. (struct elf64_aarch64_link_hash_table): Add members for handling R_AARCH64_IRELATIVE relocations. (elf_aarch64_local_htab_hash): New function. (elf_aarch64_local_htab_eq): New function. (elf_aarch64_get_local_sym_hash): New function. (elf64_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elf64_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elf64_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elf64_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elf64_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elf64_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elf64_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elf64_aarch64_is_function_type): Remove function. (elf64_aarch64_allocate_dynrelocs): Call _bfd_elf_allocate_ifunc_dyn_relocs for STT_GNU_IFUNC symbols. (elf_aarch64_allocate_local_dynrelocs): New function. (elf64_aarch64_size_dynamic_sections): Call elf_aarch64_allocate_local_dynrelocs. Initialize next_irelative_index. (elf64_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elf64_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elf_aarch64_finish_local_dynamic_symbol): New function. (elf64_aarch64_finish_dynamic_sections): Call elf_aarch64_finish_local_dynamic_symbol. (elf64_aarch64_add_symbol_hook): New function. include/elf/ChangeLog: 2013-06-07 Will Newton <will.newton@linaro.org> * aarch64.h: Add R_AARCH64_IRELATIVE reloc. ld/ChangeLog: 2013-06-07 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. ld/testsuite/ChangeLog: 2013-06-07 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Add ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise. |
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Maciej W. Rozycki
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48e65d55bb | * mips.h (ELF_ST_SET_MIPS_PIC): Clear any STO_MIPS16 setting. | ||
Catherine Moore
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067ec077d7 |
2013-05-30 Paul Brook <paul@codesourcery.com>
bfd/ * bfd-in2.h: Regenerate. * elf32-mips.c (elf_mips_eh_howto): New. (bfd_elf32_bfd_reloc_type_lookup ): Support BFD_RELOC_MIPS_EH. (bfd_elf32_bfd_reloc_name_lookup): Likewise. (mips_elf32_rtype_to_howto): Support R_MIPS_EH. * elf64-mips.c (elf_mips_eh_howto): New. (bfd_elf64_bfd_reloc_type_lookup): Support BFD_RELOC_MIPS_EH. (bfd_elf64_bfd_reloc_name_lookup): Likewise. (mips_elf64_rtype_to_howto): Support R_MIPS_EH. * libbfd.h: Regenerate. * reloc.c (BFD_RELOC_MIPS_EH): New. gas/ * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH. include/elf * mips.h (R_MIPS_EH): New. |
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Yufeng Zhang
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418009c200 | Correct the relocation names for R_AARCH64_TLSDESC_LD_PREL19 and R_AARCH64_TLSDESC_ADR_PAGE21. | ||
H.J. Lu
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45901633da |
Add EM_INTEL205 to EM_INTEL209
* common.h (EM_INTEL205): New. (EM_INTEL206): Likewise. (EM_INTEL207): Likewise. (EM_INTEL208): Likewise. (EM_INTEL209): Likewise. |
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Catherine Moore
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b47468a6db |
2013-05-06 Paul Brook <paul@codesourcery.com>
include/elf/
* mips.h (R_MIPS_PC32): Update comment.
* elf64-mips.c (elf_mips_gnu_pcrel32): New.
(bfd_elf64_bfd_reloc_type_lookup, bfd_elf64_bfd_reloc_name_lookup,
mips_elf64_rtype_to_howto): Handle R_MIPS_PC32.
* elfn32-mips.c (elf_mips_gnu_pcrel32): New.
(bfd_elfn32_bfd_reloc_type_lookup, bfd_elfn32_bfd_reloc_name_lookup,
mips_elfn32_rtype_to_howto): Handle R_MIPS_PC32.
2013-05-06 Paul Brook <paul@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
(limited_pcrel_reloc_p): Likewise.
(md_apply_fix): Likewise.
(tc_gen_reloc): Likewise.
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Nick Clifton
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13761a1136 |
* archures.c: Add some more MSP430 machine numbers.
* config.bfd (msp430): Define targ_selvecs. * configure.in: Add bfd_elf32_msp430_ti_vec. * cpu-msp430.c: Add some more MSP430 machine numbers. * elf32-msp430.c Add support for MSP430X relocations. Add support for TI compiler generated relocations. Add support for sym_diff relocations. Add support for relaxing out of range short branches into long branches. Add support for MSP430 attribute section. * reloc.c: Add MSP430X relocations. * targets.c: Add bfd_elf32_msp430_ti_vec. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * readelf.c: Add support for MSP430X architecture. * readelf.exp: Expect -wi test to fail for the MSP430. * config/tc-msp430.c: Add support for the MSP430X architecture. Add code to insert a NOP instruction after any instruction that might change the interrupt state. Add support for the LARGE memory model. Add code to initialise the .MSP430.attributes section. * config/tc-msp430.h: Add support for the MSP430X architecture. * doc/c-msp430.texi: Document the new -mL and -mN command line options. * NEWS: Mention support for the MSP430X architecture. * gas/all/gas.exp: Skip the DIFF1 test for the MSP430. Expect the FORWARD test to pass for the MSP430. Skip the REDEF tests for the MSP430. Expect the 930509A test to fail for the MSP430. * gas/all/sleb128-4.d: Skip for the MSP430. * gas/elf/elf.exp: Set target_machine to msp430 for the MSP430. Skip the EHOPT0 test for the MSP430. Skip the REDEF and EQU-RELOC tests for the MSP430. * gas/elf/section2.e-msp430: New file. * gas/lns/lns-big-delta.d: Remove expectation of 20-bit addresses. * gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430. * gas/msp430/msp430x.s: New test. * gas/msp430/msp430x.d: Expected disassembly. * gas/msp430/msp430.exp: Run new test. * gas/msp430/opcode.d: Update expected disassembly. * msp430.h: Add MSP430X relocs. Add some more MSP430 machine numbers. Add values used by .MSP430.attributes section. * msp430.h: Add patterns for MSP430X instructions. * Makefile.am: Add emsp430X.c * Makefine.in: Regenerate. * configure.tgt (msp430): Add msp430X emulation. * ldmain.c (multiple_definition): Only disable relaxation if it was enabled by the user. * ldmain.h (RELAXATION_ENABLED_BY_USER): New macro. * emulparams/msp430all.sh: Add support for MSP430X. * emultempl/generic.em: (before_parse): Enable relaxation for the MSP430. * scripttempl/msp430.sc: Reorganize sections. Add .rodata section. * scripttempl/msp430_3.sc: Likewise. * NEWS: Mention support for MSP430X. * ld-elf/flags1.d: Expect this test to pass on the MSP430. * ld-elf/init-fini-arrays.d: Expect this test to fail on the MSP430. * ld-elf/merge.d: Expect this test to pass on the MSP430. * ld-elf/sec64k.exp: Skip these tests for the MSP430. * ld-gc/pr13683.d: Expect this test to fail on the MSP430. * ld-srec/srec.exp: Expect these tests to fail on the MSP430. * ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to fail on the MSP430. * msp430-dis.c: Add support for MSP430X instructions. |
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Nick Clifton
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81f5558e3d |
* elf32-h8300 (h8_relax_section): Add new relaxation of mov
@(disp:32,ERx) to mov @(disp:16,ERx). (R_H8_DISP32A16): New reloc. Comments added and corrected. * reloc.c (BFD_RELOC_H8_DISP32A16): New reloc. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * ld.texinfo (H8/300): Add description of relaxation of mov @(disp:32,ERx) to mov @(disp:16,ERx). * ld-h8300/h8300.exp: Add new relax-7 test on ELF. * ld-h8300/relax-2.s: Add other direction and .w/.l variants of mov insns. * ld-h8300/relax-2.d: Update expected disassembly. * ld-h8300/relax-7a.s: New: tests for mov @(disp:32,ERx) -> mov @(disp:16,ERx). * ld-h8300/relax-7b.s: New: Likewise. * ld-h8300/relax-7.d: New: expected disassembly. * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc R_H8_DISP32A16. * config/tc-h8300.h: Remove duplicated defines. |
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Nick Clifton
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abb3f6cca7 |
* elf-bfd.h (elfcore_write_s390_tdb): Add prototype.
* elf.c (elfcore_write_s390_tdb): New function. (elfcore_write_register_note): Call it. (elfcore_grok_s390_tdb): New function. (elfcore_grok_note): Call it. * readelf.c (get_note_type): Add NT_S390_TDB. |
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Sandra Loosemore
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36591ba149 |
2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
Andrew Jenner <andrew@codesourcery.com> Based on patches from Altera Corporation. bfd/ * Makefile.am (ALL_MACHINES): Add cpu-nios2.lo. (ALL_MACHINES_CFILES): Add cpu-nios2.c. (BFD_BACKENDS): Add elf32-nios2.lo. (BFD32_BACKENDS_CFILES): Add elf32-nios2.c. * Makefile.in: Regenerated. * configure.in: Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * configure: Regenerated. * config.bfd: Add cases for nios2. * archures.c (enum bfd_architecture): Add bfd_arch_nios2. (bfd_mach_nios2): Define. (bfd_nios2_arch): Declare. (bfd_archures_list): Add bfd_nios2_arch. * targets.c (bfd_elf32_bignios2_vec): Declare. (bfd_elf32_littlenios2_vec): Declare. (_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA. * reloc.c (enum bfd_reloc_code_real): Add Nios II relocations. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * cpu-nios2.c: New file. * elf32-nios2.c: New file. opcodes/ * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and nios2-opc.c. * Makefile.in: Regenerated. * configure.in: Add case for bfd_nios2_arch. * configure: Regenerated. * disassemble.c (ARCH_nios2): Define. (disassembler): Add case for bfd_arch_nios2. * nios2-dis.c: New file. * nios2-opc.c: New file. include/ * dis-asm.h (print_insn_big_nios2): Declare. (print_insn_little_nios2): Declare. include/elf * nios2.h: New file. include/opcode/ * nios2.h: New file. gas/ * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c. (TARGET_CPU_HFILES): Add config/tc-nios2.h. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-linux*. * config/obj-elf.c: Conditionally include elf/nios2.h. * config/tc-nios2.c: New file. * config/tc-nios2.h: New file. * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set NIOSII. * doc/as.texinfo (Overview): Add Nios II options. (Machine Dependencies): Include c-nios2.texi. * doc/c-nios2.texi: New file. * NEWS: Note Altera Nios II support. gas/testsuite/ * gas/nios2/add.d: New. * gas/nios2/add.s: New. * gas/nios2/align_fill.d: New. * gas/nios2/align_fill.s: New. * gas/nios2/align_text.d: New. * gas/nios2/align_text.s: New. * gas/nios2/and.d: New. * gas/nios2/and.s: New. * gas/nios2/branch.d: New. * gas/nios2/branch.s: New. * gas/nios2/break.d: New. * gas/nios2/break.s: New. * gas/nios2/bret.d: New. * gas/nios2/bret.s: New. * gas/nios2/cache.d: New. * gas/nios2/cache.s: New. * gas/nios2/call26.d: New. * gas/nios2/call26.s: New. * gas/nios2/call.d: New. * gas/nios2/call.s: New. * gas/nios2/cmp.d: New. * gas/nios2/cmp.s: New. * gas/nios2/comments.d: New. * gas/nios2/comments.s: New. * gas/nios2/complex.d: New. * gas/nios2/complex.s: New. * gas/nios2/ctl.d: New. * gas/nios2/ctl.s: New. * gas/nios2/custom.d: New. * gas/nios2/custom.s: New. * gas/nios2/etbt.d: New. * gas/nios2/etbt.s: New. * gas/nios2/flushda.d: New. * gas/nios2/flushda.s: New. * gas/nios2/illegal.l: New. * gas/nios2/illegal.s: New. * gas/nios2/jmp.d: New. * gas/nios2/jmp.s: New. * gas/nios2/ldb.d: New. * gas/nios2/ldb.s: New. * gas/nios2/ldh.d: New. * gas/nios2/ldh.s: New. * gas/nios2/ldw.d: New. * gas/nios2/ldw.s: New. * gas/nios2/lineseparator.d: New. * gas/nios2/lineseparator.s: New. * gas/nios2/mov.d: New. * gas/nios2/movia.d: New. * gas/nios2/movia.s: New. * gas/nios2/movi.d: New. * gas/nios2/movi.s: New. * gas/nios2/mov.s: New. * gas/nios2/mul.d: New. * gas/nios2/mul.s: New. * gas/nios2/nios2.exp: New. * gas/nios2/nor.d: New. * gas/nios2/nor.s: New. * gas/nios2/or.d: New. * gas/nios2/or.s: New. * gas/nios2/ret.d: New. * gas/nios2/ret.s: New. * gas/nios2/rol.d: New. * gas/nios2/rol.s: New. * gas/nios2/rotate.d: New. * gas/nios2/rotate.s: New. * gas/nios2/stb.d: New. * gas/nios2/stb.s: New. * gas/nios2/sth.d: New. * gas/nios2/sth.s: New. * gas/nios2/stw.d: New. * gas/nios2/stw.s: New. * gas/nios2/sub.d: New. * gas/nios2/sub.s: New. * gas/nios2/sync.d: New. * gas/nios2/sync.s: New. * gas/nios2/trap.d: New. * gas/nios2/trap.s: New. * gas/nios2/tret.d: New. * gas/nios2/tret.s: New. * gas/nios2/warn_noat.l: New. * gas/nios2/warn_noat.s: New. * gas/nios2/warn_nobreak.l: New. * gas/nios2/warn_nobreak.s: New. * gas/nios2/xor.d: New. * gas/nios2/xor.s: New. ld/ * Makefile.am (enios2elf.c): New rule. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-*-*. * emulparams/nios2elf.sh: New file. * NEWS: Note Altera Nios II support. ld/testsuite/ * ld-nios2/emit-relocs-1a.s: New. * ld-nios2/emit-relocs-1b.s: New. * ld-nios2/emit-relocs-1.d: New. * ld-nios2/emit-relocs-1.ld: New. * ld-nios2/gprel.d: New. * ld-nios2/gprel.s: New. * ld-nios2/hilo16.d: New. * ld-nios2/hilo16.s: New. * ld-nios2/hilo16_symbol.s: New. * ld-nios2/imm5.d: New. * ld-nios2/imm5.s: New. * ld-nios2/imm5_symbol.s: New. * ld-nios2/nios2.exp: New. * ld-nios2/pcrel16.d: New. * ld-nios2/pcrel16_label.s: New. * ld-nios2/pcrel16.s: New. * ld-nios2/relax_callr.d: New. * ld-nios2/relax_callr.ld: New. * ld-nios2/relax_callr.s: New. * ld-nios2/relax_cjmp.d: New. * ld-nios2/relax_cjmp.s: New. * ld-nios2/relax_jmp.ld: New. * ld-nios2/relax_section.d: New. * ld-nios2/relax_section.s: New. * ld-nios2/relax_ujmp.d: New. * ld-nios2/relax_ujmp.s: New. * ld-nios2/reloc.d: New. * ld-nios2/reloc.s: New. * ld-nios2/reloc_symbol.s: New. * ld-nios2/s16.d: New. * ld-nios2/s16.s: New. * ld-nios2/s16_symbol.s: New. * ld-nios2/u16.d: New. * ld-nios2/u16.s: New. * ld-nios2/u16_symbol.s: New. * ld-elf/indirect.exp: Skip on targets that don't support -shared -fPIC. * ld-elfcomm/elfcomm.exp: Build with -G0 for nios2. * ld-plugin/lto.exp: Skip shared library tests on targets that don't support them. Skip execution tests on non-native targets. binutils/ * readelf.c: Include elf/nios2.h. (dump_relocations): Add case for EM_ALTERA_NIOS2. (get_nios2_dynamic_type): New. (get_dynamic_type): Add case for EM_ALTERA_NIOS2. (is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case. (is_16bit_abs_reloc): Likewise. (is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases. * NEWS: Note Altera Nios II support. * MAINTAINERS: Add Nios II maintainers. |
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Nick Clifton
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78c8d46ca4 | Add support for V850E3V5 architecture | ||
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H.J. Lu
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e1ec603fec |
Define R_386_SIZE32/R_X86_64_SIZE32/R_X86_64_SIZE64
* i386.h (R_386_SIZE32): Fill it. * x86-64.h (R_X86_64_SIZE32): Likewise. (R_X86_64_SIZE64): Likewise. |
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Nick Clifton
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a3c629886c |
* common.h: Fix case of "Meta".
* metag.h: New file. * dis-asm.h (print_insn_metag): New declaration. * metag.h: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure: Regenerate. * configure.in: Add Meta. * disassemble.c: Add Meta support. * metag-dis.c: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * archures.c (bfd_mach_metag): New. * bfd-in2.h: Regenerate. * config.bfd: Add Meta. * configure: Regenerate. * configure.in: Add Meta. * cpu-metag.c: New file. * elf-bfd.h: Add Meta. * elf32-metag.c: New file. * elf32-metag.h: New file. * libbfd.h: Regenerate. * reloc.c: Add Meta relocations. * targets.c: Add Meta. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * config/tc-metag.c: New file. * config/tc-metag.h: New file. * configure.tgt: Add Meta. * doc/Makefile.am: Add Meta. * doc/Makefile.in: Regenerate. * doc/all.texi: Add Meta. * doc/as.texiinfo: Document Meta options. * doc/c-metag.texi: New file. * gas/metag/labelarithmetic.d: New file. * gas/metag/labelarithmetic.s: New file. * gas/metag/metacore12.d: New file. * gas/metag/metacore12.s: New file. * gas/metag/metacore21-invalid.l: New file. * gas/metag/metacore21-invalid.s: New file. * gas/metag/metacore21.d: New file. * gas/metag/metacore21.s: New file. * gas/metag/metacore21ext.d: New file. * gas/metag/metacore21ext.s: New file. * gas/metag/metadsp21-invalid.l: New file. * gas/metag/metadsp21-invalid.s: New file. * gas/metag/metadsp21.d: New file. * gas/metag/metadsp21.s: New file. * gas/metag/metadsp21ext.d: New file. * gas/metag/metadsp21ext.s: New file. * gas/metag/metafpu21.d: New file. * gas/metag/metafpu21.s: New file. * gas/metag/metafpu21ext.d: New file. * gas/metag/metafpu21ext.s: New file. * gas/metag/metag.exp: New file. * gas/metag/tls.d: New file. * gas/metag/tls.s: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure.tgt: Add Meta. * emulparams/elf32metag.sh: New file. * emultempl/metagelf.em: New file. * ld-elf/merge.d: Mark Meta as xfail. * ld-gc/start.d: Skip this test on Meta. * ld-gc/personality.d: Skip this test on Meta. * ld-metag/external.s: New file. * ld-metag/metag.exp: New file. * ld-metag/pcrel.d: New file. * ld-metag/pcrel.s: New file. * ld-metag/shared.d: New file. * ld-metag/shared.r: New file. * ld-metag/shared.s: New file. * ld-metag/stub.d: New file. * ld-metag/stub.s: New file. * ld-metag/stub_pic_app.d: New file. * ld-metag/stub_pic_app.r: New file. * ld-metag/stub_pic_app.s: New file. * ld-metag/stub_pic_shared.d: New file. * ld-metag/stub_pic_shared.s: New file. * ld-metag/stub_shared.d: New file. * ld-metag/stub_shared.r: New file. * ld-metag/stub_shared.s: New file. * binutils/readelf.c: (guess_is_rela): Add EM_METAG. (dump_relocations): Add EM_METAG. (get_machine_name): Correct case for Meta. (is_32bit_abs_reloc): Add support for Meta ADDR32 reloc. (is_none_reloc): Add support for Meta NONE reloc. |
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|
Yufeng Zhang
|
652451f8f2 |
include/elf/
2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com> * common.h (NT_ARM_TLS, NT_ARM_HW_BREAK, NT_ARM_HW_WATCH): New macro definitions. bfd/ 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com> * elf-bfd.h (elfcore_write_aarch_tls): Add prototype. (elfcore_write_aarch_hw_break): Likewise. (elfcore_write_aarch_hw_watch): Likewise. * elf.c (elfcore_grok_aarch_tls): New function. (elfcore_grok_aarch_hw_break): Likewise. (elfcore_grok_aarch_hw_watch): Likewise. (elfcore_grok_note): Call the new functions to handle the corresponding notes. (elfcore_write_aarch_tls): New function. (elfcore_write_aarch_hw_break): Likewise. (elfcore_write_aarch_hw_watch): Likewise. (elfcore_write_register_note): Call the new functions to handle the corresponding pseudo sections. binutils/ 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com> * readelf.c (get_note_type): Handle NT_ARM_TLS, NT_ARM_HW_BREAK and NT_ARM_HW_WATCH. |
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|
Nick Clifton
|
e407c74b5b |
* archures.c: Add support for MIPS r5900
* bfd-in2.h: Add support for MIPS r5900 * config.bfd: Add support for Sony Playstation 2 * cpu-mips.c: Add support for MIPS r5900 * elfxx-mips.c: Add support for MIPS r5900 (extension of r4000) * config/tc-mips.c: Add support for MIPS r5900 Add M_LQ_AB and M_SQ_AB to support large values for instructions lq and sq. * config/tc-mips.c (can_swap_branch_p, get_append_method): Detect some conditional short loops to fix a bug on the r5900 by NOP in the branch delay slot. * config/tc-mips.c (M_MUL): Support 3 operands in multu on r5900. * config/tc-mips.c (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I. * config/tc-mips.c (s_mipsset): Force 32 bit floating point on r5900. * configure.in: Detect CPU type when target string contains r5900 (e.g. mips64r5900el-linux-gnu). * config/tc-mips.c (mips_ip): Check parameter range of instructions mfps and mtps on r5900. * elf/mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software. * opcode/mips.h: Add support for r5900 instructions including lq and sq. * configure.tgt: Support ELF files for Sony Playstation 2 (for ps2dev and ps2sdk). * emulparams/elf32lr5900n32.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI n32. * emulparams/elf32lr5900.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI o32. * Makefile.am: Add linker scripts for Sony Playstation 2 ELF files. * opcodes/mips-dis.c: Add names for CP0 registers of r5900. * opcodes/mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for instructions sq and lq. * opcodes/mips-opc.c: Add support for MIPS r5900 CPU. Add support for 128 bit MMI (Multimedia Instructions). Add support for EE instructions (Emotion Engine). Disable unsupported floating point instructions (64 bit and undefined compare operations). Enable instructions of MIPS ISA IV which are supported by r5900. Disable 64 bit co processor instructions. Disable 64 bit multiplication and division instructions. Disable instructions for co-processor 2 and 3, because these are not supported (preparation for later VU0 support (Vector Unit)). Disable cvt.w.s because this behaves like trunc.w.s and the correct execution can't be ensured on r5900. Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This will confuse less developers and compilers. |
||
Michael Eager
|
69b06cc85f |
Microblaze: Add support for handling TLS symbol suffixes and generating
TLS relocs for General Dynamic and Local Dynamic models.
bfd/Changelog
* reloc.c: Add new relocations
* bfd-in2.h: Regenerated
* libbfd.h: Regenerated
* elf32-microblaze.c (microblaze_elf_howto_raw):
Add TLS relocations
(microblaze_elf_reloc_type_lookup): Likewise
(elf32_mb_link_hash_entry): define TLS reference types
(elf32_mb_link_hash_table): add TLS Local dynamic GOT entry
#define has_tls_reloc if section has TLS relocs
(dtprel_base), (check_unique_offset): New
(microblaze_elf_output_dynamic_relocation): output simple
dynamic relocation into SRELOC.
(microblaze_elf_relocate_section): Accommodate TLS relocations.
(microblaze_elf_check_relocs): Likewise
(update_local_sym_info): New
(microblaze_elf_copy_indirect_symbol): Add tls_mask.
(allocate_dynrelocs): Handle TLS symbol
(microblaze_elf_size_dynamic_sections): Set size and offset
(microblaze_elf_finish_dynamic_symbol): Use
microblaze_elf_output_dynamic_relocation
gas/Changelog
* config/tc-microblaze.c: Define TLS offsets
(md_relax_table): Add TLS offsets
(imm_types), (match_imm), (get_imm_otype): New to support
TLS offsets.
(tc_microblaze_fix_adjustable): Add TLS relocs.
(md_convert_frag): Support TLS offsets.
(md_apply_fix), (md_estimate_size_before_relax), (tc_gen_reloc):
Add TLS relocs
include/Changelog
* elf/microblaze.h: Add TLS relocs to START_RELOC_NUMBERS
|
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Nick Clifton
|
752937aa0c | Add copyright notices | ||
|
H.J. Lu
|
34b6002876 |
Update DF_1_XXX from Solaris
binutils/ * readelf.c (process_dynamic_section): Correct DF_1_CONFALT. Also dump DF_1_ENDFILTEE, DF_1_DISPRELDNE, DF_1_NODIRECT, DF_1_IGNMULDEF, DF_1_NOKSYMS, DF_1_NOHDR, DF_1_EDITED, DF_1_NORELOC, DF_1_SYMINTPOSE, DF_1_GLOBAUDIT and DF_1_SINGLETON. include/elf/ * common.h (DF_1_CONLFAT): Renamed to ... (DF_1_CONFALT): This. (DF_1_ENDFILTEE): New. (DF_1_DISPRELDNE): Likewise. (DF_1_DISPRELPND): Likewise. (DF_1_NODIRECT): Likewise. (DF_1_IGNMULDEF): Likewise. (DF_1_NOKSYMS): Likewise. (DF_1_NOHDR): Likewise. (DF_1_EDITED): Likewise. (DF_1_NORELOC): Likewise. (DF_1_SYMINTPOSE): Likewise. (DF_1_GLOBAUDIT): Likewise. (DF_1_SINGLETON): Likewise. |
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|
Nick Clifton
|
de863c7475 |
2012-11-09 Nick Clifton <nickc@redhat.com>
* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo. (ALL_MACHINES_CFILES): Add cpu-v850-rh850.c. * archures.c (bfd_arch_info): Add bfd_v850_rh850_arch. * config.bfd: Likewise. * configure.in: Add bfd_elf32_v850_rh850_vec. * cpu-v850.c: Update printed description. * cpu-v850_rh850.c: New file. * elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI relocs. (v850_elf_perform_relocation): Likewise. (v850_elf_final_link_relocate): Likewise. (v850_elf_relocate_section): Likewise. (v850_elf_relax_section): Likewise. (v800_elf_howto_table): New. (v850_elf_object_p): Add support for RH850 ABI values. (v850_elf_final_write_processing): Likewise. (v850_elf_merge_private_bfd_data): Likewise. (v850_elf_print_private_bfd_data): Likewise. (v800_elf_reloc_map): New. (v800_elf_reloc_type_lookup): New. (v800_elf_reloc_name_lookup): New. (v800_elf_info_to_howto): New. (bfd_elf32_v850_rh850_vec): New. (bfd_arch_v850_rh850): New. * targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI. (guess_is_rela): Add EM_V800. (dump_relocations): Likewise. (get_machine_name): Update EM_V800. (get_machine_flags): Add support for RH850 ABI flags. (is_32bit_abs_reloc): Add support for RH850 ABI reloc. * config/tc-v850.c (v850_target_arch): New. (v850_target_format): New. (set_machine): Use v850_target_arch. (md_begin): Likewise. (md_show_usage): Document new switches. (md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and -m4byte-align. * config/tc-v850.c (TARGET_ARCH) Use v850_target_arch. (TARGET_FORMAT): Use v850_target_format. * doc/c-v850.texi: Document new options. * v850.h: Add RH850 ABI values. * Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c. * Makefile.in: Regenerate. * configure.tgt (v850*-*-*): Make v850_rh850 the default emulation. Add vanilla v850 as an extra emulation. * emulparams/v850_rh850.sh: New file. * scripttempl/v850_rh850.sc: New file. * configure.in: Add bfd_v850_rh850_arch. * configure: Regenerate. * disassemble.c (disassembler): Likewise. |
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|
Nick Clifton
|
708e2187a3 |
2012-11-09 Nick Clifton <nickc@redhat.com>
* elf32-rx.c (describe_flags): New function. Returns a buffer containing a description of the E_FLAG_RX_... values set. (rx_elf_merge_private_bfd_data): Use it. (rx_elf_print_private_bfd_data): Likewise. (elf32_rx_machine): Skip EF_RX_CPU_RX check. (elf32_rx_special_sections): Define. (elf_backend_special_sections): Define. 2012-11-09 Nick Clifton <nickc@redhat.com> * readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI. 2012-11-09 Nick Clifton <nickc@redhat.com> * config/obj-elf.c (obj_elf_change_section): Allow init array sections to have the SHF_EXECINSTR attribute for the RX target. * config/tc-rx.c (elf_flags): Initialise with E_FLAG_RX_ABI. (enum options): Add OPTION_USES_GCC_ABI and OPTION_USES_RX_ABI. (md_longopts): Add -mgcc-abi and -mrx-abi. (md_parse_option): Add support for OPTION_USES_GCC_ABI and OPTION_USES_RX_ABI. * doc/as.texinfo (RX Options): Add mention of remaining RX options. * doc/c-rx.texi: Document -mgcc-abi and -mrx-abi. 2012-11-09 Nick Clifton <nickc@redhat.com> * rx.h (EF_RX_CPU_RX): Add comment. (E_FLAG_RX_ABI): Define. 2012-11-09 Nick Clifton <nickc@redhat.com> * emultempl/rxelf.em (no_flag_mismatch_warnings): Initialise to true. (PARSE_AND_LIST_LONGOPTS): Add flag-mismatch-warnings. (PARSE_AND_LIST_ARG_CASES): Add support for --flag-mismatch-warnings. |
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|
Maciej W. Rozycki
|
c266cd0290 | * mips.h (EF_MIPS_32BITMODE): Move next to lower-order bits. | ||
Tom Tromey
|
ff826ef3e2 |
binutils
* readelf.c (get_note_type): Handle NT_386_TLS, NT_386_IOPERM. include/common/elf * common.h (NT_386_TLS, NT_386_IOPERM): New defines. |
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|
Nick Clifton
|
3bfcb6528e |
bfd:
* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and
display the new ARM hard-float/soft-float ABI flags for EABI_VER5
(elf32_arm_post_process_headers): Add the hard-float/soft-float
ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5.
binutils:
* readelf.c (decode_ARM_machine_flags): Recognise and display the
new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out
the code for EABI_VER4 and EABI_VER5 to allow this.
elfcpp:
* arm.h: New enum for EABI soft- and hard-float flags.
gold:
* gold.cc (Target_arm::do_adjust_elf_header): Add the
hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC
in EABI_VER5.
include:
* elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
(EF_ARM_ABI_FLOAT_HARD): Likewise.
ld/testsuite:
* ld-arm/eabi-hard-float.s: New test source.
* ld-arm/eabi-soft-float.s: New test source.
* ld-arm/eabi-hard-float.d: New test.
* ld-arm/eabi-soft-float.d: New test.
* ld-arm/eabi-soft-float-ABI4.d: New test.
* ld-arm/eabi-soft-float-r.d: New test.
* ld-arm/arm-elf.xp: Use the new tests.
binutils:
PR binutils/14779
* configure.in: Add checks for wchar.h and mbstate_t.
* config.in: Regenerate.
* configure: Regenerate.
* readelf.c: Conditionally include wchar.h.
(print_symbol): Conditionally use mbstate_t.
|
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|
Tom Tromey
|
9ece1fa991 |
binutils
* readelf.c (get_note_type): Handle NT_SIGINFO, NT_FILE. (print_core_note): New function. (process_note): Call it. include/common/elf * common.h (NT_SIGINFO, NT_FILE): New defines. |
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Richard Earnshaw
|
f41aef5f6e |
2012-09-11 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
bfd/ * bfd-in2.h: Regenerated. * elf64-aarch64.c (elf64_aarch64_howto_table): Add R_AARCH64_GOT_LD_PREL19 reloc to HOWTO. (elf64_aarch64_reloc_map): Add reloc entry. (aarch64_resolve_relocation): Likewise. (bfd_elf_aarch64_put_addend): Likewise. (aarch64_reloc_got_type): Likewise. (elf64_aarch64_final_link_relocate): Likewise. (lf64_aarch64_check_relocs): Likewise. (elf64_aarch64_check_relocs): New case for R_AARCH64_ADR_PREL_LO21 reloc. * libbfd.h: Regenerated. * reloc.c (R_AARCH64_GOT_LD_PREL19): New reloc. gas/ * config/tc-aarch64.c (reloc_table): Add reloc to table entry. (parse_address_main): Add support for #:<reloc_op>:<symbol>. (parse_operands): Check for unused reloc. (md_apply_fix): New case for reloc. (aarch64_force_relocation): Likewise. gas/testsuite * gas/aarch64/reloc-insn.d (BFD_RELOC_AARCH64_GOT_LD_PREL19): Add expected asm for new reloc test. * gas/aarch64/reloc-insn.s (BFD_RELOC_AARCH64_GOT_LD_PREL19): Add test for reloc. include/ * elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc. ld/testsuite * ld-aarch64/aarch64-elf.exp: New reloc tests. * ld-aarch64/emit-relocs-309-low-bad.d: New file. Expected asm for test failure (lower bound overflow). * ld-aarch64/emit-relocs-309-low.d: New file. Expected asm for test success (lower bound). * ld-aarch64/emit-relocs-309-up-bad.d: New file. Expected asm for test failure (upper bound overflow). * ld-aarch64/emit-relocs-309-up.d: New file. Expected asm for test success (upper bound). * ld-aarch64/emit-relocs-309.s: New file. Asm for new reloc tests. |
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Walter Lee
|
e5b95258d9 |
Add support for constructing pc-relative addresses to the plt, by
adding the necessary assembly operators and relocations. bfd: * reloc.c (Add BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL, BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): new relocations. * elfxx-tilegx.c (tilegx_elf_howto_table): Handle new relocations. (tilegx_reloc_map): Ditto. (reloc_to_create_func): Ditto. (tilegx_elf_check_relocs): Ditto. (tilegx_elf_gc_sweep_hook): Ditto. (tilegx_elf_relocate_section): Ditto. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas: * tc-tilegx.c (O_hw0_plt): Define operator. (O_hw1_plt): Ditto. (O_hw1_last_plt): Ditto. (O_hw2_last_plt): Ditto. (md_begin): Handle new operators. (emit_tilegx_instruction): Ditto. (md_apply_fix): Ditto. * doc/c-tilegx.texi: Document new operators. include/elf: * tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation. (R_TILEGX_IMM16_X1_HW0_PLT_PCREL): Ditto. (R_TILEGX_IMM16_X0_HW1_PLT_PCREL): Ditto. (R_TILEGX_IMM16_X1_HW1_PLT_PCREL): Ditto. (R_TILEGX_IMM16_X0_HW2_PLT_PCREL): Ditto. (R_TILEGX_IMM16_X1_HW2_PLT_PCREL): Ditto. (R_TILEGX_IMM16_X0_HW3_PLT_PCREL): Ditto. (R_TILEGX_IMM16_X1_HW3_PLT_PCREL): Ditto. (R_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL): Ditto. (R_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL): Ditto. (R_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL): Ditto. (R_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL): Ditto. (R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL ): Ditto. (R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto. |
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Matthew Gretton-Dann
|
bca3892142 |
* bfd/elf32-arm.c (v8): New array.
(tag_cpu_arch_combine): Add support for ARMv8 attributes. (elf32_arm_merge_eabi_attributes): Likewise. (VFP_VERSION_COUNT): New define. * binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8. (arm_attr_tag_FP_arch): Likewise. (arm_attr_tag_Advanced_SIMD_arch): Likewise. * gas/config/tc-arm.h (arm_ext_v8): New variable. (fpu_vfp_ext_armv8): Likewise. (fpu_neon_ext_armv8): Likewise. (fpu_crypto_ext_armv8): Likewise. (arm_archs): Add armv8-a. (arm_extensions): Add crypto, fp, and simd. (arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8. (cpu_arch_ver): Add support for ARMv8. (aeabi_set_public_sttributes): Likewise. * gas/doc/c-arm.texi (ARM Options): Document new architecture and extension options for ARMv8. * gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected output. * gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase. * gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise. * include/elf/arm.h (TAG_CPU_ARCH_V8): New define. (MAX_TAG_CPU_ARCH): Update. * include/opcode/arm.h (ARM_EXT_V8): New define. (FPU_VFP_EXT_ARMV8): Likewise. (FPU_NEON_EXT_ARMV8): Likewise. (FPU_CRYPTO_EXT_ARMV8): Likewise. (ARM_AEXT_V8A): Likewise. (FPU_VFP_ARMV8): Likwise. (FPU_NEON_ARMV8): Likewise. (FPU_CRYPTO_ARMV8): Likewise. (FPU_ARCH_VFP_ARMV8): Likewise. (FPU_ARCH_NEON_VFP_ARMV8): Likewise. (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise. (ARM_ARCH_V8A): Likwise. (ARM_ARCH_V8A_FP): Likewise. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTO): Likewise. * ld/testsuite/ld-arm/arm-elf.exp: Add new testcases. * ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected output. * ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase. * ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise. |
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|
Nick Clifton
|
a06ea96464 | Add support for 64-bit ARM architecture: AArch64 | ||
Sean Keys
|
b8fdb283ea |
* m68hc11.h: #define E_M68HC11_NO_BANK_WARNING
0x000000200 |
||
|
Andreas Krebbel
|
470b557aaf |
2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* elf64-s390.c: Include elf-s390-common.c. (R_390_IRELATIVE): New reloc. (elf_s390_reloc_type_lookup): Support R_390_IRELATIVE. (RELA_ENTRY_SIZE): New macro. (elf_s390_link_hash_entry): New fields ifunc_resolver_address and *ifunc_resolver_section. (struct plt_entry): New struct. (struct elf_s390_obj_tdata): New field local_plt. (elf_s390_local_plt): New macro. (struct elf_s390_link_hash_table): New field irelifunc. (ELF64): New macro. (link_hash_newfunc): Initialize new fields. (elf_s390_check_relocs): Handle IFUNC symbols. (elf_s390_adjust_dynamic_symbol): Don't do anything for IFUNC symbols. (allocate_dynrelocs): Call s390_elf_allocate_ifunc_dyn_relocs for IFUNC symbols. (elf_s390_size_dynamic_sections): Handle IFUNC symbols. (elf_s390_relocate_section): Likewise. (elf_s390_finish_dynamic_symbol): Likewise. (elf_s390_finish_dynamic_sections): Handle local IFUNC symbols. (elf_s390_finish_ifunc_symbol): New function. (elf_s390_gc_sweep_hook): Handle local plt entries. (elf_backend_add_symbol_hook): Define. * elf32-s390.c: See elf64-s390.c changes. * elf-s390-common.c: New file. * bfd-in2.h (BFD_RELOC_390_IRELATIVE): New enum field. * libbfd.h (BFD_RELOC_390_IRELATIVE): New entry for BFD_RELOC_390_IRELATIVE. * reloc.c (BFD_RELOC_390_IRELATIVE): Document new relocation. 2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * elf/s390.h (START_RELOC_NUMBERS): Define R_390_IRELATIVE reloc. 2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * emulparams/elf_s390.sh (IREL_IN_PLT): Define. * emulparams/elf64_s390.sh (IREL_IN_PLT): Define. |
||
Iain Sandoe
|
cefc6d46de |
* common.h (AT_L1I_CACHESHAPE, AT_L1D_CACHESHAPE,
AT_L2_CACHESHAPE, AT_L3_CACHESHAPE): New defines. |
||
|
Nick Clifton
|
40551fb82e |
PR 13503
* reloc.c: Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO. * bfd-in2.h: Regenerate. * libbfd.h: Regenrate. * elf32-avr.c (elf_avr_howto_table): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8. (avr_reloc_map): Ditto. * config/tc-avr.c (avr_cons_fix_new): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8. (exp_mod_data) Ditto. And replace "hhi8" with "hlo8". (md_apply_fix): Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO. * avr.h (RELOC_NUMBERS): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8. |
||
|
Nick Clifton
|
6927f98292 |
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field. |
||
James Lemke
|
b9c361e0ad |
Add support for PowerPC VLE.
2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
|
||
|
Nick Clifton
|
99700d6feb |
PR 13503
* reloc.c: Add new ENUM for BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HHI. * bfd-in2.h: Regenerate. * libbfd.h: Regenrate. * elf32-avr.c (elf_avr_howto_table): Add entries for R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8. (avr_reloc_map): Add RELOC mappings for R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8. * config/tc-avr.c (exp_mod_pm): Remove variable. (exp_mod_data_t): New typedef. (pexp_mod_data, exp_mod_data): New variables. (avr_parse_cons_expression): Scan through exp_mod_data[] to find data expression modifiers "pm", "gs", "lo8", hi8", "hhi8", "hh8" and set pexp_mod_data accordingly to be used in avr_cons_fix_new. (avr_cons_fix_new): Handle new data expression modifiers shipped in pexp_mod_data. (md_apply_fix): Handle BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HHI. * elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8. |
||
|
Nick Clifton
|
f6c1a2d592 | Add support for Motorola XGATE embedded CPU | ||
David S. Miller
|
4d29644716 |
Add new ELF_SPARC_HWCAP_* defines for features found on SPARC-T4.
include/elf/ * sparc.h: Add new ELF_SPARC_HWCAP_* defines for crypto, pause, and compare-and-branch instructions. |
||
|
David S. Miller
|
2615994e91 |
Support R_SPARC_WDISP10 and R_SPARC_H34.
include/ * elf/sparc.h (R_SPARC_WDISP10): New reloc. * opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10. opcodes/ * sparc-dis.c (X_DISP10): Define. (print_insn_sparc): Handle '='. bfd/ * reloc.c (BFD_RELOC_SPARC_H34, BFD_RELOC_SPARC_SIZE32, BFD_RELOC_SPARC_SIZE64, BFD_RELOC_SPARC_WDISP10): New relocs. * libbfd.h: Regenerate. * bfd-in2.h: Likewise. * elfxx-sparc.c (sparc_elf_wdisp10_reloc): New function. (_bfd_sparc_elf_howto_table): Add entries for R_SPARC_H34, R_SPARC_SIZE32, R_SPARC_64, and R_SPARC_WDISP10. (_bfd_sparc_elf_reloc_type_lookup): Handle new relocs. (_bfd_sparc_elf_check_relocs): Likewise. (_bfd_sparc_elf_gc_sweep_hook): Likewise. (_bfd_sparc_elf_relocate_section): Likewise. gas/ * config/tc-sparc.c (sparc_ip): Handle '=', "%h34", "%l34", and BFD_RELOC_SPARC_H34. (md_apply_fix): Handle BFD_RELOC_SPARC_WDISP10 and BFD_RELOC_SPARC_H34. (tc_gen_reloc): Likewise. gas/testsuite/ * gas/sparc/reloc64.s: Add abs34 code model tests. * gas/sparc/reloc64.d: Update. elfcpp/ * sparc.h (R_SPARC_WDISP10): New relocation. gold/ * sparc.cc (Reloc::wdisp10): New relocation method. (Reloc::h34): Likewise. (Target_sparc::Scan::check_non_pic): Handle R_SPARC_H34. (Target_sparc::Scan::get_reference_flags): Handle R_SPARC_H34 and R_SPARC_WDISP10. (Target_sparc::Scan::local): Likewise. (Target_sparc::Scan::global): Likewise. (Target_sparc::Relocate::relocate): Likewise. |
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|
Nick Clifton
|
0a22ae8eb5 |
* mn10300.h (elf_mn10300_reloc_type): Add R_MN10300_TLS_GD,
R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE, R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD, R_MN10300_TLS_DTPOFF and R_MN10300_TLS_TPOFF. * elf-m10300.c (elf32_mn10300_link_hash_entry): Add tls_type field. (elf32_mn10300_link_hash_table): Add tls_ldm_got entry; (elf_mn10300_tdata): Define. (elf_mn10300_local_got_tls_type): Define. (elf_mn10300_howto_table): Add entries for R_MN10300_TLS_GD, R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE, R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD, R_MN10300_TLS_DTPOFF, R_MN10300_TLS_TPOFF relocs. (mn10300_reloc_map): Likewise. (elf_mn10300_tls_transition): New function. (dtpoff, tpoff, mn10300_do_tls_transition): New functions. (mn10300_elf_check_relocs): Add TLS support. (mn10300_elf_final_link_relocate): Likewise. (mn10300_elf_relocate_section): Likewise. (mn10300_elf_relax_section): Likewise. (elf32_mn10300_link_hash_newfunc): Initialise new field. (_bfd_mn10300_copy_indirect_symbol): New function. (elf32_mn10300_link_hash_table_create): Initialise new fields. (_bfd_mn10300_elf_size_dynamic_sections): Add TLS support. (_bfd_mn10300_elf_finish_dynamic_symbol): Likewise. (_bfd_mn10300_elf_reloc_type_class): Allocate an elf_mn10300_obj_tdata structure. (elf_backend_copy_indirect_symbol): Define. * reloc.c (BFD_MN10300_TLS_GD, BFD_MN10300_TLS_LD, BFD_MN10300_TLS_LDO, BFD_MN10300_TLS_GOTIE, BFD_MN10300_TLS_IE, BFD_MN10300_TLS_LE, BFD_MN10300_TLS_DPTMOD, BFD_MN10300_TLS_DTPOFF, BFD_MN10300_TLS_TPOFF): New relocations. (BFD_RELOC_MN10300_32_PCREL, BFD_RELOC_MN10300_16_PCREL): Move to alongside other MN10300 relocations. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * config/tc-mn10300.c (other_registers): Add SSP and USP. (md_assemble): Add support for TLS relocs. (mn10300_parse_name): Likewise. * readelf.c (is_16bit_abs_reloc): Add detection of R_MN10300_16. |
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Walter Lee
|
6f7be9592d |
Improve TLS support on TILE-Gx/TILEPro:
- Add support for TLS LE references. - Support linker optimization of TLS references. - Delete relocations of GOT/tp relative offsets beyond 32-bits. This brings binutils in line with the support expected in gcc 4.7, for TILE-Gx/TILEPro. bfd/ * reloc.c: Add BFD_RELOC_TILEPRO_TLS_GD_CALL, BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD, BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD, BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD, BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEPRO_TLS_IE_LOAD, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE, BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO, BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI, BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA, BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA, BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE, BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE, BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE, BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE, BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE, BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE, BFD_RELOC_TILEGX_TLS_GD_CALL, BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD, BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD, BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEGX_TLS_IE_LOAD, BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD. Delete BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT, BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT, BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT, BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT, BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT, BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT, BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT, BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT, BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD, BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD, BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD, BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD, BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD, BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD, BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD, BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD, BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE, BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE, BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE, BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE, BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE, BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE, BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE, BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE. * elf32-tilepro.c (tilepro_elf_howto_table): Update tilepro relocations. (tilepro_reloc_map): Ditto. (tilepro_info_to_howto_rela): Ditto. (reloc_to_create_func): Ditto. (tilepro_tls_translate_to_le): New. (tilepro_tls_translate_to_ie): New. (tilepro_elf_tls_transition): New. (tilepro_elf_check_relocs): Handle new tls relocations. (tilepro_elf_gc_sweep_hook): Ditto. (allocate_dynrelocs): Ditto. (tilepro_elf_relocate_section): Ditto. (tilepro_replace_insn): New. (insn_mask_X1): New. (insn_mask_X0_no_dest_no_srca): New (insn_mask_X1_no_dest_no_srca): New (insn_mask_Y0_no_dest_no_srca): New (insn_mask_Y1_no_dest_no_srca): New (srca_mask_X0): New (srca_mask_X1): New (insn_tls_le_move_X1): New (insn_tls_le_move_zero_X0X1): New (insn_tls_ie_lw_X1): New (insn_tls_ie_add_X0X1): New (insn_tls_ie_add_Y0Y1): New (insn_tls_gd_add_X0X1): New (insn_tls_gd_add_Y0Y1): New * elfxx-tilegx.c (tilegx_elf_howto_table): Update tilegx relocations. (tilegx_reloc_map): Ditto. (tilegx_info_to_howto_rela): Ditto. (reloc_to_create_func): Ditto. (tilegx_elf_link_hash_table): New field disable_le_transition. (tilegx_tls_translate_to_le): New. (tilegx_tls_translate_to_ie): New. (tilegx_elf_tls_transition): New. (tilegx_elf_check_relocs): Handle new tls relocations. (tilegx_elf_gc_sweep_hook): Ditto. (allocate_dynrelocs): Ditto. (tilegx_elf_relocate_section): Ditto. (tilegx_copy_bits): New. (tilegx_replace_insn): New. (insn_mask_X1): New. (insn_mask_X0_no_dest_no_srca): New. (insn_mask_X1_no_dest_no_srca): New. (insn_mask_Y0_no_dest_no_srca): New. (insn_mask_Y1_no_dest_no_srca): New. (insn_mask_X0_no_operand): New. (insn_mask_X1_no_operand): New. (insn_mask_Y0_no_operand): New. (insn_mask_Y1_no_operand): New. (insn_tls_ie_ld_X1): New. (insn_tls_ie_ld4s_X1): New. (insn_tls_ie_add_X0X1): New. (insn_tls_ie_add_Y0Y1): New. (insn_tls_ie_addx_X0X1): New. (insn_tls_ie_addx_Y0Y1): New. (insn_tls_gd_add_X0X1): New. (insn_tls_gd_add_Y0Y1): New. (insn_move_X0X1): New. (insn_move_Y0Y1): New. (insn_add_X0X1): New. (insn_add_Y0Y1): New. (insn_addx_X0X1): New. (insn_addx_Y0Y1): New. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ * tc-tilepro.c (O_tls_le): Define operator. (O_tls_le_lo16): Ditto. (O_tls_le_hi16): Ditto. (O_tls_le_ha16): Ditto. (O_tls_gd_call): Ditto. (O_tls_gd_add): Ditto. (O_tls_ie_load): Ditto. (md_begin): Delete old operators; handle new operators. (emit_tilepro_instruction): Ditto. (md_apply_fix): Ditto. * tc-tilegx.c (O_hw1_got): Delete operator. (O_hw2_got): Ditto. (O_hw3_got): Ditto. (O_hw2_last_got): Ditto. (O_hw1_tls_gd): Ditto. (O_hw2_tls_gd): Ditto. (O_hw3_tls_gd): Ditto. (O_hw2_last_tls_gd): Ditto. (O_hw1_tls_ie): Ditto. (O_hw2_tls_ie): Ditto. (O_hw3_tls_ie): Ditto. (O_hw2_last_tls_ie): Ditto. (O_hw0_tls_le): Define operator. (O_hw0_last_tls_le): Ditto. (O_hw1_last_tls_le): Ditto. (O_tls_gd_call): Ditto. (O_tls_gd_add): Ditto. (O_tls_ie_load): Ditto. (O_tls_add): Ditto. (md_begin): Delete old operators; handle new operators. (emit_tilegx_instruction): Ditto. (md_apply_fix): Ditto. * doc/c-tilegx.texi: Delete old operators; document new operators. * doc/c-tilepro.texi: Ditto. include/elf/ * tilegx.h (R_TILEGX_IMM16_X0_HW1_GOT): Delete. (R_TILEGX_IMM16_X1_HW1_GOT): Ditto. (R_TILEGX_IMM16_X0_HW2_GOT): Ditto. (R_TILEGX_IMM16_X1_HW2_GOT): Ditto. (R_TILEGX_IMM16_X0_HW3_GOT): Ditto. (R_TILEGX_IMM16_X1_HW3_GOT): Ditto. (R_TILEGX_IMM16_X0_HW2_LAST_GOT): Ditto. (R_TILEGX_IMM16_X1_HW2_LAST_GOT): Ditto. (R_TILEGX_IMM16_X0_HW1_TLS_GD): Ditto. (R_TILEGX_IMM16_X1_HW1_TLS_GD): Ditto. (R_TILEGX_IMM16_X0_HW2_TLS_GD): Ditto. (R_TILEGX_IMM16_X1_HW2_TLS_GD): Ditto. (R_TILEGX_IMM16_X0_HW3_TLS_GD): Ditto. (R_TILEGX_IMM16_X1_HW3_TLS_GD): Ditto. (R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD): Ditto. (R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD): Ditto. (R_TILEGX_IMM16_X0_HW1_TLS_IE): Ditto. (R_TILEGX_IMM16_X1_HW1_TLS_IE): Ditto. (R_TILEGX_IMM16_X0_HW2_TLS_IE): Ditto. (R_TILEGX_IMM16_X1_HW2_TLS_IE): Ditto. (R_TILEGX_IMM16_X0_HW3_TLS_IE): Ditto. (R_TILEGX_IMM16_X1_HW3_TLS_IE): Ditto. (R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE): Ditto. (R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE): Ditto. (R_TILEGX_IMM16_X0_HW0_TLS_LE): New relocation. (R_TILEGX_IMM16_X1_HW0_TLS_LE): Ditto. (R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE): Ditto. (R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE): Ditto. (R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE): Ditto. (R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE): Ditto. (R_TILEGX_TLS_GD_CALL): Ditto. (R_TILEGX_IMM8_X0_TLS_GD_ADD): Ditto. (R_TILEGX_IMM8_X1_TLS_GD_ADD): Ditto. (R_TILEGX_IMM8_Y0_TLS_GD_ADD): Ditto. (R_TILEGX_IMM8_Y1_TLS_GD_ADD): Ditto. (R_TILEGX_TLS_IE_LOAD): Ditto. (R_TILEGX_IMM8_X0_TLS_ADD): Ditto. (R_TILEGX_IMM8_X1_TLS_ADD): Ditto. (R_TILEGX_IMM8_Y0_TLS_ADD): Ditto. (R_TILEGX_IMM8_Y1_TLS_ADD): Ditto. * tilepro.h (R_TILEPRO_TLS_GD_CALL): New relocation. (R_TILEPRO_IMM8_X0_TLS_GD_ADD): Ditto. (R_TILEPRO_IMM8_X1_TLS_GD_ADD): Ditto. (R_TILEPRO_IMM8_Y0_TLS_GD_ADD): Ditto. (R_TILEPRO_IMM8_Y1_TLS_GD_ADD): Ditto. (R_TILEPRO_TLS_IE_LOAD): Ditto. (R_TILEPRO_IMM16_X0_TLS_LE): Ditto. (R_TILEPRO_IMM16_X1_TLS_LE): Ditto. (R_TILEPRO_IMM16_X0_TLS_LE_LO): Ditto. (R_TILEPRO_IMM16_X1_TLS_LE_LO): Ditto. (R_TILEPRO_IMM16_X0_TLS_LE_HI): Ditto. (R_TILEPRO_IMM16_X1_TLS_LE_HI): Ditto. (R_TILEPRO_IMM16_X0_TLS_LE_HA): Ditto. (R_TILEPRO_IMM16_X1_TLS_LE_HA): Ditto. include/opcode/ * tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS, TILEGX_OPC_LD_TLS. * tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS, TILEPRO_OPC_LW_TLS_SN. opcodes/ * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS. * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and TILEPRO_OPC_LW_TLS_SN. |
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H.J. Lu
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8b40760ade | Move ELF header entries to elf/ChangeLog | ||
DJ Delorie
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9cea966c22 |
[bfd]
* elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New. |
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Chung-Lin Tang
|
d0f1368214 |
2011-12-19 Chung-Lin Tang <cltang@codesourcery.com>
gas/ * config/tc-mips.c (mips_pseudo_table): Add tprelword/tpreldword entries. (mips16_percent_op): Add MIPS16 TLS relocation ops. (md_apply_fix): Add BFD_RELOC_MIPS16_TLS_* switch cases. (s_tls_rel_directive): Rename from s_dtprel_internal(). Abstract out directive string and reloc type as function parameters. Update comments. (s_dtprelword,s_dtpreldword): Change to use s_tls_rel_directive(). (s_tprelword,s_tpreldword): New functions. include/ * elf/mips.h (elf_mips_reloc_type): Add R_MIPS16_TLS_* entries. bfd/ * reloc.c (BFD_RELOC_MIPS16_TLS_GD,BFD_RELOC_MIPS16_TLS_LDM, BFD_RELOC_MIPS16_TLS_DTPREL_HI16,BFD_RELOC_MIPS16_TLS_DTPREL_LO16, BFD_RELOC_MIPS16_TLS_GOTTPREL,BFD_RELOC_MIPS16_TLS_TPREL_HI16, BFD_RELOC_MIPS16_TLS_TPREL_LO16): New relocations for MIPS16 TLS. * bfd-in2.h (bfd_reloc_code_real): Regenerate. * libbfd.h (bfd_reloc_code_real_names): Regenerate. * elf32-mips.c (elf_mips16_howto_table_rel): Add R_MIPS16_TLS_* entries. (mips16_reloc_map): Add BFD_RELOC_MIPS16_TLS_* to R_MIPS16_TLS_* mappings. * elfn32-mips.c (elf_mips16_howto_table_rel, elf_mips16_howto_table_rela): Add R_MIPS16_TLS_* entries. (mips16_reloc_map): Add BFD_RELOC_MIPS16_TLS_* to R_MIPS16_TLS_* mappings. * elf64-mips.c (mips16_elf64_howto_table_rel, mips16_elf64_howto_table_rela): Add R_MIPS16_TLS_* entries. (mips16_reloc_map): Add BFD_RELOC_MIPS16_TLS_* to R_MIPS16_TLS_* mappings. * elfxx-mips.c (TLS_RELOC_P,mips16_reloc_p, _bfd_mips_elf_check_relocs): Add cases for R_MIPS16_TLS_* relocations. (tls_gd_reloc_p): Add R_MIPS16_TLS_GD case. (tls_ldm_reloc_p): Add R_MIPS16_TLS_LDM case. (tls_gottprel_reloc_p): Add R_MIPS16_TLS_GOTTPREL case. (mips_elf_calculate_relocation): Add cases for R_MIPS16_TLS_*, R_MIPS_TLS_DTPREL32/64, and R_MIPS_TLS_TPREL32/64 relocations. |
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Ulrich Weigand
|
355b81d949 |
include/elf/ChangeLog:
* common.h (NT_S390_LAST_BREAK): Define. (NT_S390_SYSTEM_CALL): Likewise. bfd/ChangeLog: * elf-bfd.h (elfcore_write_s390_last_break): Add prototype. (elfcore_write_s390_system_call): Likewise. * elf.c (elfcore_write_s390_last_break): New function. (elfcore_write_s390_system_call): Likewise. (elfcore_write_register_note): Call them. (elfcore_grok_s390_last_break): New function. (elfcore_grok_s390_system_call): Likewise. (elfcore_grok_note): Call them. |
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DJ Delorie
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99c513f6ac |
[.]
* configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file. |
||
Joern Rennecke
|
926e2094bb |
bfd:
* cpu-epiphany.c: Reinstate full list of Copyright years.
* elf32-epiphany.c: Likewise.
cpu:
* epiphany.cpu, epiphany.opc: Likewise.
gas:
* config/tc-epiphany.c, config/tc-epiphany.h: Likewise.
* doc/c-epiphany.texi: Likewise.
include:
* elf/epiphany.h: Likewise.
|
||
|
Nick Clifton
|
cfb8c0921c |
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise. |
||
|
Alan Modra
|
3b421ab3bc |
include/elf/
* ppc64.h (R_PPC64_TOCSAVE): Add. bfd/ * elf64-ppc.c (ppc64_elf_howto_table): Add R_PPC64_TOCSAVE entry. (struct ppc_link_hash_table): Add tocsave_htab. (struct tocsave_entry): New. (tocsave_htab_hash, tocsave_htab_eq, tocsave_find): New functions. (ppc64_elf_link_hash_table_create): Create tocsave_htab.. (ppc64_elf_link_hash_table_free): ..and delete it. (build_plt_stub): Always put STD_R2_40R1 first. (ppc64_elf_size_stubs): Check for R_PPC64_TOCSAVE following reloc on plt call. If present add prologue nop location to tocsave_htab. (ppc64_elf_relocate_section): Convert prologue nop to std. Skip first insn of plt call stub when R_PPC64_TOCSAVE present. |
||
|
Nick Clifton
|
d4cb0ea0ca |
* readelf.c (get_machine_dlags): Add support for RX's PID mode.
* ld-scripts/phdrs.exp: Expect to fail for the RX. * elf32-rx.c: Add support for PID mode. (rx_elf_relocate_section): Add checks for unsafe PID relocations. Include addend in R_RX_SYM relocations. * config/rx-defs.h (rx_pid_register): New. (rx_gp_register): New. * config/rx-parse.y (rx_lex): Add support for %gpreg and %pidreg. (displacement): Add PID support. * config/tc-rx.c (rx_pid_mode): New. (rx_num_int_regs): New. (rx_pid_register): New. (rx_gp_register): New. (options): Add -mpid and -mint-register= options. (md_longopts): Likewise. (md_parse_option): Likewise. (md_show_usage): Likewise. (rx_pid_symbol): New. (rx_pidreg_symbol): New. (rx_gpreg_symbol): New. (md_begin): Support PID. (rx_validate_fix_sub): Support PID. (tc_gen_reloc): Support PID. * doc/c-rx.texi: Document PID support. * rx.h (E_FLAG_RX_PID): New. |
||
|
David S. Miller
|
9e8c70f96b |
Annotate sparc objects with cpu hardware capabilities used.
bfd/ * elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): New. * elfxx-sparc.h: Declare it. * elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Call it. * elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise. binutils/ * readelf.c (display_sparc_hwcaps): New. (display_sparc_gnu_attribute): New. (process_sparc_specific): New. (process_arch_specific): When EM_SPARC, EM_SPARC32PLUS, or EM_SPARCV9 invoke process_sparc_specific. gas/ * config/tc-sparc.c (hwcap_seen): New bitmask, defined when not TE_SOLARIS. (sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from sparc_opcode->flags of instruction into hwcap_seen. (sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if hwcap_seen is non-zero and not TE_SOLARIS. gas/testsuite/ * gas/sparc/hpcvis3.s: Update for fixed fchksum16 mnemonic. * gas/sparc/hpcvis3.d: Likewise. include/elf/ * sparc.h (Tag_GNU_Sparc_HWCAPS): New object attribute. (ELF_SPARC_HWCAP_*): New HWCAPS bitmask values. include/opcode/ * sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int. (F_MUL32, F_DIV32, F_FSMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2, F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS, F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits. opcodes/ * sparc-opc.c (sparc_opcodes): Annotate table with HWCAP flag bits. Fix "fchksm16" mnemonic. |
||
|
H.J. Lu
|
505b88fb5d |
Add R_X86_64_RELATIVE64.
2011-08-12 H.J. Lu <hongjiu.lu@intel.com> PR ld/13082 * x86-64.h (R_X86_64_RELATIVE64): New. |
||
Richard Sandiford
|
df58fc944d |
bfd/
2011-02-25 Chao-ying Fu <fu@mips.com>
Ilie Garbacea <ilie@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Richard Sandiford <rdsandiford@googlemail.com>
* archures.c (bfd_mach_mips_micromips): New macro.
* cpu-mips.c (I_micromips): New enum value.
(arch_info_struct): Add bfd_mach_mips_micromips.
* elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New
prototype.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(gprel16_reloc_p): Handle microMIPS ASE.
(literal_reloc_p): New function.
* elf32-mips.c (elf_micromips_howto_table_rel): New variable.
(_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(mips_elf_gprel32_reloc): Update comment.
(micromips_reloc_map): New variable.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(mips_elf32_rtype_to_howto): Likewise.
(mips_info_to_howto_rel): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
(bfd_elf32_bfd_relax_section): Likewise.
* elf64-mips.c (micromips_elf64_howto_table_rel): New variable.
(micromips_elf64_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf64_bfd_reloc_name_lookup): Likewise.
(mips_elf64_rtype_to_howto): Likewise.
(bfd_elf64_bfd_is_target_special_symbol): Define.
* elfn32-mips.c (elf_micromips_howto_table_rel): New variable.
(elf_micromips_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(mips_elf_n32_rtype_to_howto): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
* elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro.
(LA25_LUI_MICROMIPS_2): Likewise.
(LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise.
(LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise.
(TLS_RELOC_P): Handle microMIPS ASE.
(mips_elf_create_stub_symbol): Adjust value of stub symbol if
target is a microMIPS function.
(micromips_reloc_p): New function.
(micromips_reloc_shuffle_p): Likewise.
(got16_reloc_p, call16_reloc_p): Handle microMIPS ASE.
(got_disp_reloc_p, got_page_reloc_p): New functions.
(got_ofst_reloc_p): Likewise.
(got_hi16_reloc_p, got_lo16_reloc_p): Likewise.
(call_hi16_reloc_p, call_lo16_reloc_p): Likewise.
(hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE.
(micromips_branch_reloc_p): New function.
(tls_gd_reloc_p, tls_ldm_reloc_p): Likewise.
(tls_gottprel_reloc_p): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE.
(mips_tls_got_index, mips_elf_got_page): Likewise.
(mips_elf_create_local_got_entry): Likewise.
(mips_elf_relocation_needs_la25_stub): Likewise.
(mips_elf_calculate_relocation): Likewise.
(mips_elf_perform_relocation): Likewise.
(_bfd_mips_elf_symbol_processing): Likewise.
(_bfd_mips_elf_add_symbol_hook): Likewise.
(_bfd_mips_elf_link_output_symbol_hook): Likewise.
(mips_elf_add_lo16_rel_addend): Likewise.
(_bfd_mips_elf_check_relocs): Likewise.
(mips_elf_adjust_addend): Likewise.
(_bfd_mips_elf_relocate_section): Likewise.
(mips_elf_create_la25_stub): Likewise.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(_bfd_mips_elf_gc_sweep_hook): Likewise.
(_bfd_mips_elf_is_target_special_symbol): New function.
(mips_elf_relax_delete_bytes): Likewise.
(opcode_descriptor): New structure.
(RA): New macro.
(OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise.
(b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables.
(beq_insn_32): Likewise.
(b_insn_16, bz_insn_16): New variables.
(BZC32_REG_FIELD): New macro.
(bz_rs_insns_32, bz_rt_insns_32): New variables.
(bzc_insns_32, bz_insns_16):Likewise.
(BZ16_REG, BZ16_REG_FIELD): New macros.
(jal_insn_32_bd16, jal_insn_32_bd32): New variables.
(jal_x_insn_32_bd32): Likewise.
(j_insn_32, jalr_insn_32): Likewise.
(ds_insns_32_bd16, ds_insns_32_bd32): Likewise.
(jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise.
(JR16_REG): New macro.
(ds_insns_16_bd16): New variable.
(lui_insn): Likewise.
(addiu_insn, addiupc_insn): Likewise.
(ADDIUPC_REG_FIELD): New macro.
(MOVE32_RD, MOVE32_RS): Likewise.
(MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise.
(move_insns_32, move_insns_16): New variables.
(nop_insn_32, nop_insn_16): Likewise.
(MATCH): New macro.
(find_match): New function.
(check_br16_dslot, check_br32_dslot): Likewise.
(check_br16, check_br32): Likewise.
(IS_BITSIZE): New macro.
(check_4byte_branch): New function.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16
and microMIPS modules together.
(_bfd_mips_elf_print_private_bfd_data): Handle microMIPS ASE.
* reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation.
(BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_GPREL16): Likewise.
(BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise.
(BFD_RELOC_MICROMIPS_HI16_S): Likewise.
(BFD_RELOC_MICROMIPS_LO16): Likewise.
(BFD_RELOC_MICROMIPS_LITERAL): Likewise.
(BFD_RELOC_MICROMIPS_GOT16): Likewise.
(BFD_RELOC_MICROMIPS_CALL16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_HI16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_LO16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_SUB): Likewise.
(BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise.
(BFD_RELOC_MICROMIPS_GOT_OFST): Likewise.
(BFD_RELOC_MICROMIPS_GOT_DISP): Likewise.
(BFD_RELOC_MICROMIPS_HIGHEST): Likewise.
(BFD_RELOC_MICROMIPS_HIGHER): Likewise.
(BFD_RELOC_MICROMIPS_SCN_DISP): Likewise.
(BFD_RELOC_MICROMIPS_JALR): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GD): Likewise.
(BFD_RELOC_MICROMIPS_TLS_LDM): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
binutils/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* readelf.c (get_machine_flags): Handle microMIPS ASE.
(get_mips_symbol_other): Likewise.
gas/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* config/tc-mips.h (mips_segment_info): Add one bit for
microMIPS.
(TC_LABEL_IS_LOCAL): New macro.
(mips_label_is_local): New prototype.
* config/tc-mips.c (S0, S7): New macros.
(emit_branch_likely_macro): New variable.
(mips_set_options): Add micromips.
(mips_opts): Initialise micromips to -1.
(file_ase_micromips): New variable.
(CPU_HAS_MICROMIPS): New macro.
(hilo_interlocks): Set for microMIPS too.
(gpr_interlocks): Likewise.
(cop_interlocks): Likewise.
(cop_mem_interlocks): Likewise.
(HAVE_CODE_COMPRESSION): New macro.
(micromips_op_hash): New variable.
(micromips_nop16_insn, micromips_nop32_insn): New variables.
(NOP_INSN): Handle microMIPS ASE.
(mips32_to_micromips_reg_b_map): New macro.
(mips32_to_micromips_reg_c_map): Likewise.
(mips32_to_micromips_reg_d_map): Likewise.
(mips32_to_micromips_reg_e_map): Likewise.
(mips32_to_micromips_reg_f_map): Likewise.
(mips32_to_micromips_reg_g_map): Likewise.
(mips32_to_micromips_reg_l_map): Likewise.
(mips32_to_micromips_reg_n_map): Likewise.
(mips32_to_micromips_reg_h_map): New variable.
(mips32_to_micromips_reg_m_map): Likewise.
(mips32_to_micromips_reg_q_map): Likewise.
(micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_to_32_reg_b_map): New macro.
(micromips_to_32_reg_c_map): Likewise.
(micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map): Likewise.
(micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map): Likewise.
(micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_n_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): New macros.
(RELAX_DELAY_SLOT_16BIT): New macro.
(RELAX_DELAY_SLOT_SIZE_FIRST): Likewise.
(RELAX_DELAY_SLOT_SIZE_SECOND): Likewise.
(RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros.
(RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise.
(RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise.
(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
(RELAX_MICROMIPS_TOOFAR32): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
(INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE.
(mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p,
fsize and insns.
(mips_mark_labels): New function.
(mips16_small, mips16_ext): Remove variables, replacing with...
(forced_insn_size): ... this.
(append_insn, mips16_ip): Update accordingly.
(micromips_insn_length): New function.
(insn_length): Return the length of microMIPS instructions.
(mips_record_mips16_mode): Rename to...
(mips_record_compressed_mode): ... this. Handle microMIPS ASE.
(install_insn): Handle microMIPS ASE.
(reglist_lookup): New function.
(is_size_valid, is_delay_slot_valid): Likewise.
(md_begin): Handle microMIPS ASE.
(md_assemble): Likewise. Update for append_insn interface change.
(micromips_reloc_p): New function.
(got16_reloc_p): Handle microMIPS ASE.
(hi16_reloc_p): Likewise.
(lo16_reloc_p): Likewise.
(jmp_reloc_p): New function.
(jalr_reloc_p): Likewise.
(matching_lo_reloc): Handle microMIPS ASE.
(insn_uses_reg, reg_needs_delay): Likewise.
(mips_move_labels): Likewise.
(mips16_mark_labels): Rename to...
(mips_compressed_mark_labels): ... this. Handle microMIPS ASE.
(gpr_mod_mask): New function.
(gpr_read_mask, gpr_write_mask): Handle microMIPS ASE.
(fpr_read_mask, fpr_write_mask): Likewise.
(insns_between, nops_for_vr4130, nops_for_insn): Likewise.
(fix_loongson2f_nop, fix_loongson2f_jump): Likewise.
(MICROMIPS_LABEL_CHAR): New macro.
(micromips_target_label, micromips_target_name): New variables.
(micromips_label_name, micromips_label_expr): New functions.
(micromips_label_inc, micromips_add_label): Likewise.
(mips_label_is_local): Likewise.
(micromips_map_reloc): Likewise.
(can_swap_branch_p): Handle microMIPS ASE.
(append_insn): Add expansionp argument. Handle microMIPS ASE.
(start_noreorder, end_noreorder): Handle microMIPS ASE.
(macro_start, macro_warning, macro_end): Likewise.
(brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables.
(mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise.
(BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros.
(MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise.
(macro_build): Handle microMIPS ASE. Update for append_insn
interface change.
(mips16_macro_build): Update for append_insn interface change.
(macro_build_jalr): Handle microMIPS ASE.
(macro_build_lui): Likewise. Simplify.
(load_register): Handle microMIPS ASE.
(load_address): Likewise.
(move_register): Likewise.
(macro_build_branch_likely): New function.
(macro_build_branch_ccl): Likewise.
(macro_build_branch_rs): Likewise.
(macro_build_branch_rsrt): Likewise.
(macro): Handle microMIPS ASE.
(validate_micromips_insn): New function.
(expr_const_in_range): Likewise.
(mips_ip): Handle microMIPS ASE.
(options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS.
(md_longopts): Add mmicromips and mno-micromips.
(md_parse_option): Handle OPTION_MICROMIPS and
OPTION_NO_MICROMIPS.
(mips_after_parse_args): Handle microMIPS ASE.
(md_pcrel_from): Handle microMIPS relocations.
(mips_force_relocation): Likewise.
(md_apply_fix): Likewise.
(mips_align): Handle microMIPS ASE.
(s_mipsset): Likewise.
(s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers.
(s_dtprel_internal): Likewise.
(s_gpword, s_gpdword): Likewise.
(s_insn): Handle microMIPS ASE.
(s_mips_stab): Likewise.
(relaxed_micromips_32bit_branch_length): New function.
(relaxed_micromips_16bit_branch_length): New function.
(md_estimate_size_before_relax): Handle microMIPS ASE.
(mips_fix_adjustable): Likewise.
(tc_gen_reloc): Handle microMIPS relocations.
(mips_relax_frag): Handle microMIPS ASE.
(md_convert_frag): Likewise.
(mips_frob_file_after_relocs): Likewise.
(mips_elf_final_processing): Likewise.
(mips_nop_opcode): Likewise.
(mips_handle_align): Likewise.
(md_show_usage): Handle microMIPS options.
* symbols.c (TC_LABEL_IS_LOCAL): New macro.
(S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check.
* doc/as.texinfo (Target MIPS options): Add -mmicromips and
-mno-micromips.
(-mmicromips, -mno-micromips): New options.
* doc/c-mips.texi (-mmicromips, -mno-micromips): New options.
(MIPS ISA): Document .set micromips and .set nomicromips.
(MIPS insn): Update for microMIPS support.
gas/testsuite/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/micromips.d: New test.
* gas/mips/micromips-branch-delay.d: Likewise.
* gas/mips/micromips-branch-relax.d: Likewise.
* gas/mips/micromips-branch-relax-pic.d: Likewise.
* gas/mips/micromips-size-1.d: Likewise.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips.l: New stderr output.
* gas/mips/micromips-branch-delay.l: Likewise.
* gas/mips/micromips-branch-relax.l: Likewise.
* gas/mips/micromips-branch-relax-pic.l: Likewise.
* gas/mips/micromips-size-0.l: New list test.
* gas/mips/micromips-size-1.l: New stderr output.
* gas/mips/micromips.s: New test source.
* gas/mips/micromips-branch-delay.s: Likewise.
* gas/mips/micromips-branch-relax.s: Likewise.
* gas/mips/micromips-size-0.s: Likewise.
* gas/mips/micromips-size-1.s: Likewise.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/dli.s: Use .p2align.
* gas/mips/elf_ase_micromips.d: New test.
* gas/mips/elf_ase_micromips-2.d: Likewise.
* gas/mips/micromips@abs.d: Likewise.
* gas/mips/micromips@add.d: Likewise.
* gas/mips/micromips@alnv_ps-swap.d: Likewise.
* gas/mips/micromips@and.d: Likewise.
* gas/mips/micromips@beq.d: Likewise.
* gas/mips/micromips@bge.d: Likewise.
* gas/mips/micromips@bgeu.d: Likewise.
* gas/mips/micromips@blt.d: Likewise.
* gas/mips/micromips@bltu.d: Likewise.
* gas/mips/micromips@branch-likely.d: Likewise.
* gas/mips/micromips@branch-misc-1.d: Likewise.
* gas/mips/micromips@branch-misc-2-64.d: Likewise.
* gas/mips/micromips@branch-misc-2.d: Likewise.
* gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
* gas/mips/micromips@branch-misc-2pic.d: Likewise.
* gas/mips/micromips@branch-misc-4-64.d: Likewise.
* gas/mips/micromips@branch-misc-4.d: Likewise.
* gas/mips/micromips@branch-self.d: Likewise.
* gas/mips/micromips@cache.d: Likewise.
* gas/mips/micromips@daddi.d: Likewise.
* gas/mips/micromips@dli.d: Likewise.
* gas/mips/micromips@elf-jal.d: Likewise.
* gas/mips/micromips@elf-rel2.d: Likewise.
* gas/mips/micromips@elfel-rel2.d: Likewise.
* gas/mips/micromips@elf-rel4.d: Likewise.
* gas/mips/micromips@jal-svr4pic.d: Likewise.
* gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise.
* gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise.
* gas/mips/micromips@li.d: Likewise.
* gas/mips/micromips@loc-swap-dis.d: Likewise.
* gas/mips/micromips@loc-swap.d: Likewise.
* gas/mips/micromips@mips1-fp.d: Likewise.
* gas/mips/micromips@mips32-cp2.d: Likewise.
* gas/mips/micromips@mips32-imm.d: Likewise.
* gas/mips/micromips@mips32-sf32.d: Likewise.
* gas/mips/micromips@mips32.d: Likewise.
* gas/mips/micromips@mips32r2-cp2.d: Likewise.
* gas/mips/micromips@mips32r2-fp32.d: Likewise.
* gas/mips/micromips@mips32r2-sync.d: Likewise.
* gas/mips/micromips@mips32r2.d: Likewise.
* gas/mips/micromips@mips4-branch-likely.d: Likewise.
* gas/mips/micromips@mips4-fp.d: Likewise.
* gas/mips/micromips@mips4.d: Likewise.
* gas/mips/micromips@mips5.d: Likewise.
* gas/mips/micromips@mips64-cp2.d: Likewise.
* gas/mips/micromips@mips64.d: Likewise.
* gas/mips/micromips@mips64r2.d: Likewise.
* gas/mips/micromips@pref.d: Likewise.
* gas/mips/micromips@relax-at.d: Likewise.
* gas/mips/micromips@relax.d: Likewise.
* gas/mips/micromips@rol-hw.d: Likewise.
* gas/mips/micromips@uld2-eb.d: Likewise.
* gas/mips/micromips@uld2-el.d: Likewise.
* gas/mips/micromips@ulh2-eb.d: Likewise.
* gas/mips/micromips@ulh2-el.d: Likewise.
* gas/mips/micromips@ulw2-eb-ilocks.d: Likewise.
* gas/mips/micromips@ulw2-el-ilocks.d: Likewise.
* gas/mips/cache.d: Likewise.
* gas/mips/daddi.d: Likewise.
* gas/mips/mips32-imm.d: Likewise.
* gas/mips/pref.d: Likewise.
* gas/mips/elf-rel27.d: Handle microMIPS ASE.
* gas/mips/l_d.d: Likewise.
* gas/mips/l_d-n32.d: Likewise.
* gas/mips/l_d-n64.d: Likewise.
* gas/mips/ld.d: Likewise.
* gas/mips/ld-n32.d: Likewise.
* gas/mips/ld-n64.d: Likewise.
* gas/mips/s_d.d: Likewise.
* gas/mips/s_d-n32.d: Likewise.
* gas/mips/s_d-n64.d: Likewise.
* gas/mips/sd.d: Likewise.
* gas/mips/sd-n32.d: Likewise.
* gas/mips/sd-n64.d: Likewise.
* gas/mips/mips32.d: Update immediates.
* gas/mips/micromips@mips32-cp2.s: New test source.
* gas/mips/micromips@mips32-imm.s: Likewise.
* gas/mips/micromips@mips32r2-cp2.s: Likewise.
* gas/mips/micromips@mips64-cp2.s: Likewise.
* gas/mips/cache.s: Likewise.
* gas/mips/daddi.s: Likewise.
* gas/mips/mips32-imm.s: Likewise.
* gas/mips/elf-rel4.s: Handle microMIPS ASE.
* gas/mips/lb-pic.s: Likewise.
* gas/mips/ld.s: Likewise.
* gas/mips/mips32.s: Likewise.
* gas/mips/mips.exp: Add the micromips arch. Exclude mips16e
from micromips. Run mips32-imm.
* gas/mips/jal-mask-11.d: New test.
* gas/mips/jal-mask-12.d: Likewise.
* gas/mips/micromips@jal-mask-11.d: Likewise.
* gas/mips/jal-mask-1.s: Source for the new tests.
* gas/mips/jal-mask-21.d: New test.
* gas/mips/jal-mask-22.d: Likewise.
* gas/mips/micromips@jal-mask-12.d: Likewise.
* gas/mips/jal-mask-2.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/mips16-e.d: Add --special-syms to `objdump'.
* gas/mips/tmips16-e.d: Likewise.
* gas/mips/mipsel16-e.d: Likewise.
* gas/mips/tmipsel16-e.d: Likewise.
* gas/mips/and.s: Adjust padding.
* gas/mips/beq.s: Likewise.
* gas/mips/bge.s: Likewise.
* gas/mips/bgeu.s: Likewise.
* gas/mips/blt.s: Likewise.
* gas/mips/bltu.s: Likewise.
* gas/mips/branch-misc-2.s: Likewise.
* gas/mips/jal.s: Likewise.
* gas/mips/li.s: Likewise.
* gas/mips/mips4.s: Likewise.
* gas/mips/mips4-fp.s: Likewise.
* gas/mips/relax.s: Likewise.
* gas/mips/and.d: Update accordingly.
* gas/mips/elf-jal.d: Likewise.
* gas/mips/jal.d: Likewise.
* gas/mips/li.d: Likewise.
* gas/mips/relax-at.d: Likewise.
* gas/mips/relax.d: Likewise.
include/elf/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (R_MICROMIPS_min): New relocations.
(R_MICROMIPS_26_S1): Likewise.
(R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise.
(R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise.
(R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise.
(R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise.
(R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise.
(R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise.
(R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise.
(R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise.
(R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise.
(R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise.
(R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise.
(R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise.
(R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise.
(R_MICROMIPS_TLS_GOTTPREL): Likewise.
(R_MICROMIPS_TLS_TPREL_HI16): Likewise.
(R_MICROMIPS_TLS_TPREL_LO16): Likewise.
(R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise.
(R_MICROMIPS_max): Likewise.
(EF_MIPS_ARCH_ASE_MICROMIPS): New macro.
(STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise.
(ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise.
(STO_MICROMIPS): Likewise.
(ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise.
(ELF_ST_IS_COMPRESSED): Likewise.
(STO_MIPS_PLT, STO_MIPS_PIC): Rework.
(ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise.
(STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise.
include/opcode/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros.
(OP_MASK_STYPE, OP_SH_STYPE): Likewise.
(OP_MASK_CODE10, OP_SH_CODE10): Likewise.
(OP_MASK_TRAP, OP_SH_TRAP): Likewise.
(OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise.
(OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise.
(OP_MASK_RS3, OP_SH_RS3): Likewise.
(OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise.
(OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise.
(OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise.
(OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise.
(OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise.
(OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise.
(OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise.
(OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise.
(OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise.
(OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise.
(OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise.
(OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise.
(OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise.
(OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise.
(INSN_WRITE_GPR_S): New macro.
(INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise.
(INSN2_READ_FPR_D): Likewise.
(INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise.
(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise.
(INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise.
(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise.
(INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise.
(INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise.
(INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise.
(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise.
(CPU_MICROMIPS): New macro.
(M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values.
(M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise.
(M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise.
(M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise.
(M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise.
(M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise.
(M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise.
(M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise.
(M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise.
(M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise.
(M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise.
(M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise.
(M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise.
(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros.
(MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise.
(MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise.
(MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise.
(MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise.
(MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise.
(MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise.
(MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise.
(MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise.
(MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise.
(MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise.
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise.
(MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise.
(MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise.
(MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise.
(MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise.
(MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise.
(MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise.
(MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise.
(MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise.
(MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise.
(MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise.
(MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise.
(MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise.
(MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise.
(MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise.
(MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise.
(MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise.
(MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise.
(MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise.
(MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise.
(MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise.
(MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise.
(MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise.
(MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise.
(MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise.
(MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise.
(MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise.
(MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise.
(MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise.
(MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise.
(MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise.
(MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise.
(MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise.
(MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise.
(MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise.
(MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise.
(MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise.
(MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise.
(MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise.
(MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise.
(MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise.
(MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise.
(MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise.
(MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise.
(MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise.
(MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise.
(MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise.
(MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise.
(MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise.
(MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise.
(MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise.
(MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise.
(MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise.
(MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise.
(MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
(MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise.
(MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise.
(MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise.
(MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise.
(MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise.
(MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise.
(MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise.
(MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise.
(micromips_opcodes): New declaration.
(bfd_micromips_num_opcodes): Likewise.
ld/testsuite/
2011-02-25 Catherine Moore <clm@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* lib/ld-lib.exp (run_dump_test): Support distinct assembler
flags for the same source named multiple times.
* ld-mips-elf/jalx-1.s: New test source.
* ld-mips-elf/jalx-1.d: New test output.
* ld-mips-elf/jalx-1.ld: New test linker script.
* ld-mips-elf/jalx-2-main.s: New test source.
* ld-mips-elf/jalx-2-ex.s: Likewise.
* ld-mips-elf/jalx-2-printf.s: Likewise.
* ld-mips-elf/jalx-2.dd: New test output.
* ld-mips-elf/jalx-2.ld: New test linker script.
* ld-mips-elf/mips16-and-micromips.d: New test.
* ld-mips-elf/mips-elf.exp: Run the new tests
opcodes/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* micromips-opc.c: New file.
* mips-dis.c (micromips_to_32_reg_b_map): New array.
(micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): Likewise.
(micromips_ase): New variable.
(is_micromips): New function.
(set_default_mips_dis_options): Handle microMIPS ASE.
(print_insn_micromips): New function.
(is_compressed_mode_p): Likewise.
(_print_insn_mips): Handle microMIPS instructions.
* Makefile.am (CFILES): Add micromips-opc.c.
* configure.in (bfd_mips_arch): Add micromips-opc.lo.
* Makefile.in: Regenerate.
* configure: Regenerate.
* mips-dis.c (micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_n_map): New macro.
|
||
|
H.J. Lu
|
7a9068fe16 |
Add initial Intel K1OM support.
bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. |
||
|
Catherine Moore
|
ae17ab41b7 |
include/ChangeLog
2011-07-11 Catherine Moore <clm@codesourcery.com>
* bfdlink.h (flag_type): New enumeration.
(flag_info_list): New structure.
(flag_info): New structure.
bfd/ChangeLog
2011-07-11 Catherine Moore <clm@codesourcery.com>
* aout-adobe.c (aout_32_bfd_lookup_section_flags): New definition.
* aout-target.h (MY_bfd_lookup_section_flags): New definition.
* aout-tic30.c (MY_bfd_lookup_section_flags): New definition.
* bfd-in2.h: Regenerated.
* bfd.c (bfd_lookup_section_flags): New definition.
* binary.c (binary_bfd_lookup_section_flags): New definition.
* bout.c (b_out_bfd_lookup_section_flags): New definition.
* coff-alpha.c (_bfd_ecoff_bfd_lookup_section_flags): New definition.
* coff-mips.c (_bfd_ecoff_bfd_lookup_section_flags): New definition.
* coff-rs6000.c (rs6000coff_vec): Include
bfd_generic_lookup_section_flags.
(pmac_xcoff_vec): Likewise.
* coffcode.h (coff_bfd_lookup_section_flags): New definition.
* coff64-rs6000.c (rs6000coff64_vec): Include
bfd_generic_lookup_section_flags.
(aix5coff64_vec): Likewise.
* ecoff.c (bfd_debug_section): Initialize flag_info field.
* elf-bfd.h (elf_backend_lookup_section_flags_hook): Declare.
(bfd_elf_lookup_section_flags): Declare.
* elflink.c (bfd_elf_lookup_section_flags): New function.
* elfxx-target.h (bfd_elfNN_bfd_lookup_section_flags): Define.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_data): Add elf_backend_lookup_section_flags_hook.
* i386msdos.c (msdos_bfd_lookup_section_flags): New define.
* i386os9k.c (os9k_bfd_lookup_section_flags): New define.
* ieee.c (ieee_bfd_lookup_section_flags): New define.
* ihex.c (ihex_bfd_lookup_section_flags): New define.
* libbfd-in.h (_bfd_nolink_bfd_lookup_section_flags): Declare.
(bfd_generic_lookup_section_flags): Declare.
* libbfd.h: Regenerated.
* mach-o-target.c (bfd_mach_o_bfd_lookup_section_flags): New.
* mmo.c (mmo_bfd_lookup_section_flags): New definition.
* nlm-target.h (nlm_bfd_lookup_section_flags): New definition.
* oasys.c (oasys_bfd_lookup_section_flags): New definition.
* pef.c (bfd_pef_bfd_lookup_section_flags): New definition.
* plugin.c (bfd_plugin_bfd_lookup_section_flags): New definition.
* ppcboot.c (ppcboot_bfd_lookup_section_flags): New definition.
* reloc.c (bfd_generic_lookup_section_flags): New function.
* som.c (som_bfd_lookup_section_flags): New definition.
* srec.c (srec_bfd_lookup_section_flags): New definition.
* targets.c (flag_info): Declare.
(NAME##_bfd_lookup_section_flags): Add to LINK jump table.
(_bfd_lookup_section_flags): New.
* tekhex.c (tekhex_bfd_lookup_section_flags): New definition.
* versados.c (versados_bfd_lookup_section_flags): New definition.
* vms-alpha.c (alpha_vms_bfd_lookup_section_flag): New definition.
* xsym.c (bfd_sym_bfd_lookup_section_flags): New definition.
ld/ChangeLog
2011-07-11 Catherine Moore <clm@codesourcery.com>
* ld.h (section_flag_list): Add field to struct wildcard_spec.
* ld.texinfo (INPUT_SECTION_FLAGS): Document.
* ldgram.y (flag_info_list, flag_info): Add to union.
(INPUT_SECTION_FLAGS): New token.
(wildcard_spec): Initialize section_flag_list to NULL for
each alternative.
(sect_flag_list, sect_flags): New rules.
(input_section_spec_no_keep): Add alternatives to recognize
sect_flags.
* ldlang.c (walk_wild_consider_section): Initialize
section_flag_info field of the section struct.
(lang_add_section): Check input section flags.
(lang_add_wild): Initialize section_flag_list field of
the statement struct.
* ldlang.h (lang_input_statement_struct): Add section_flag_list field.
(lang_wild_statement_struct): Likewise.
* ldlex.l (INPUT_SECTION_FLAGS): New token.
* mri.c (mri_draw_tree): Initialize section_flag_list to NULL.
* NEWS: Announce INPUT_SECTION_FLAGS enhancement.
ld/testsuite/ChangeLog
2011-07-11 Catherine Moore <clm@cm00re.com>
* ld-scripts/section-flags-1.s: New.
* ld-scripts/section-flags-1.t: New.
* ld-scripts/section-flags-2.s: New.
* ld-scripts/section-flags-2.t: New.
* ld-scripts/section-flags.exp: New.
|
||
Thomas Schwinge
|
2bb70ae0f4 |
ELFOSABI_GNU
bfd/ * elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX alias. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf64-hppa.c: Likewise. binutils/ * elfedit.c (osabis): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX alias and ELFOSABI_HURD. Add GNU alias. * readelf.c (get_osabi_name, get_symbol_binding, get_symbol_type): Likewise. * doc/binutils.texi <elfedit>: Update accordingly. elfcpp/ * elfcpp.h (ELFOSABI): Add ELFOSABI_GNU with value of ELFOSABI_LINUX, keep ELFOSABI_LINUX as an alias. Remove ELFOSABI_HURD. gas/ * config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX alias. * config/tc-ia64.c: Likewise. include/elf/ * common.h (ELFOSABI_GNU): Define, replaces... (ELFOSABI_LINUX): ... this, kept as an alias. (ELFOSABI_HURD): Remove. ld/testsuite/ * ld-ifunc/ifunc.exp: Update for changed output. * ld-unique/unique.exp: Likewise. |
||
|
Thomas Schwinge
|
9c55345c8c |
ELFOSABI_GNU
bfd/ * elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX alias. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf64-hppa.c: Likewise. binutils/ * elfedit.c (osabis): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX alias and ELFOSABI_HURD. Add GNU alias. * readelf.c (get_osabi_name, get_symbol_binding, get_symbol_type): Likewise. * doc/binutils.texi <elfedit>: Update accordingly. elfcpp/ * elfcpp.h (ELFOSABI): Add ELFOSABI_GNU with value of ELFOSABI_LINUX, keep ELFOSABI_LINUX as an alias. Remove ELFOSABI_HURD. gas/ * config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX alias. * config/tc-ia64.c: Likewise. include/elf/ * common.h (ELFOSABI_GNU): Define, replaces... (ELFOSABI_LINUX): ... this, kept as an alias. (ELFOSABI_HURD): Remove. ld/testsuite/ * ld-ifunc/ifunc.exp: Update for changed output. * ld-unique/unique.exp: Likewise. |
||
|
Ulrich Weigand
|
faa9a424ea |
include/elf/
* common.h (NT_ARM_VFP): Define. bfd/ * elf-bfd.h (elfcore_write_arm_vfp): Add prototype. * elf.c (elfcore_grok_arm_vfp): New function. (elfcore_grok_note): Call it to handle NT_ARM_VFP notes. (elfcore_write_arm_vfp): New function. (elfcore_write_register_note): Call it to handle .reg-arm-vfp. binutils/ * readelf.c (get_note_type): Handle NT_ARM_VFP. |
||
|
Nick Clifton
|
aa137e4d51 |
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
|
||
|
Tristan Gingold
|
2ddcd4af49 |
2011-06-09 Tristan Gingold <gingold@adacore.com>
* ia64.h (Elf64_External_VMS_ORIG_DYN_Note): New struct. |
||
|
Nick Clifton
|
cc643b88f1 | Fix spelling mistakes. | ||
Paul Brook
|
63e1a0fcba |
2011-05-31 Paul Brook <paul@codesourcery.com>
bfd/ * elf32-arm.c (elf32_arm_final_link_relocate): Only do bl conversion for known functions. (elf32_arm_swap_symbol_in): Only set ST_BRANCH_TO_ARM for function symbols. include/elf/ * arm.h (arm_st_branch_type): Add ST_BRANCH_UNKNOWN. ld/testsuite/ * ld-arm/cortex-a8-far.d: Adjust expected output. * ld-arm/arm-call1.s: Give function symbol correct type. * ld-arm/arm-call2.s: Ditto. * ld-arm/farcall-group4.s: Ditto. * ld-arm/arm-elf.exp (cortex-a8-far): Define far symbols with correct type via assembly file. * ld-arm/cortex-a8-far-3.s: New file. * ld-arm/abs-call-1.s: Add Thumb tests |
||
|
Paul Brook
|
1bce6bd86f |
2011-05-09 Paul Brook <paul@codesourcery.com>
bfd/ * elf32-tic6x.c (is_tic6x_elf_unwind_section_name, elf32_tic6x_fake_sections): New functions. (elf_backend_fake_sections): Define. gas/ * config/tc-tic6x.c (streq): Define. (tic6x_get_unwind): New. (s_tic6x_cantunwind, s_tic6x_handlerdata, s_tic6x_endp, s_tic6x_personalityindex, s_tic6x_personality): New functions. (md_pseudo_table): Add "endp", "handlerdata", "personalityindex", "personality" and "cantunwind". (tic6x_regname_to_dw2regnum, tic6x_frame_initial_instructions, tic6x_start_unwind_section, tic6x_unwind_frame_regs, tic6x_pop_rts_offset_little, tic6x_pop_rts_offset_big, tic6x_unwind_reg_from_dwarf, tic6x_flush_unwind_word, tic6x_unwind_byte, tic6x_unwind_2byte, tic6x_unwind_uleb, tic6x_cfi_startproc, output_exidx_entry, tic6x_output_unwinding, tic6x_cfi_endproc): New. * config/tc-tic6x.h (TIC6X_NUM_UNWIND_REGS): Define. (tic6x_unwind_info): New. (tic6x_segment_info_type): Add marked_pr_dependency, unwind and text_unwind. (TARGET_USE_CFIPOP, tc_regname_to_dw2regnum, tc_cfi_frame_initial_instructions, DWARF2_DEFAULT_RETURN_COLUMN, DWARF2_CIE_DATA_ALIGNMENT, tc_cfi_startproc, tc_cfi_endproc, tc_cfi_section_name): Define. * doc/c-tic6x.texi: Document new unwinding directives. * dw2gencfi.c (tc_cfi_startproc, tc_cfi_endproc): Add default definitions. (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset, CFI_return_column, CFI_rel_offset, CFI_escape, CFI_signal_frame, CFI_val_encoded_addr): Move to dw2gencfi.h. (CFI_EMIT_target): Define. (dot_cfi_sections): Check tc_cfi_section_name. (dot_cfi_startproc): Use tc_cfi_startproc. (dot_cfi_endproc): Use tc_cfi_endproc. * dw2gencfi.h (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset, CFI_return_column, CFI_rel_offset, CFI_escape, CFI_signal_frame, CFI_val_encoded_addr): Move to here from dw2gencfi.c. gas/testsuite: * gas/tic6x/unwind-1.d: New test. * gas/tic6x/unwind-1.s: New test. * gas/tic6x/unwind-2.d: New test. * gas/tic6x/unwind-2.s: New test. * gas/tic6x/unwind-3.d: New test. * gas/tic6x/unwind-3.s: New test. * gas/tic6x/unwind-bad-1.d: New test. * gas/tic6x/unwind-bad-1.s: New test. * gas/tic6x/unwind-bad-1.l: New test. * gas/tic6x/unwind-bad-2.d: New test. * gas/tic6x/unwind-bad-2.s: New test. * gas/tic6x/unwind-bad-2.l: New test. include/ * elf/tic6x.h (ELF_STRING_C6000_unwind, ELF_STRING_C6000_unwind_info, ELF_STRING_C6000_unwind_once, ELF_STRING_C6000_unwind_info_once): Define. |
||
|
Nick Clifton
|
e21e5835b6 |
* elf-bfd.h (struct sdt_note): New struct.
(struct elf_obj_tdata) <sdt_note_head>: New field. * elf.c (elfobj_grok_stapsdt_note_1): New function. (elfobj_grok_stapsdt_note): Likewise. (elf_parse_notes): Added code to treat SystemTap note sections. * common.h (NT_STAPSDT): New define. |
||
Bernd Schmidt
|
c7811365ac | Move ChangeLog entry to correct directory. | ||
|
Bernd Schmidt
|
ac14530735 |
include/elf/
* tic6x.h (R_C6000_JUMP_SPLOT, R_C6000_EHTYPE, R_C6000_PCR_H16, R_C6000_PCR_L16): New relocs. (SHN_TIC6X_SCOMMON): Define. bfd/ * elf32-tic6x.h (struct elf32_tic6x_params): New. (elf32_tic6x_setup): Declare. * elf32-tic6x.c: Include <limits.h>. (ELF_DYNAMIC_LINKER, DEFAULT_STACK_SIZE, PLT_ENTRY_SIZE): Define. (struct elf32_tic6x_link_hash_table, struct elf32_link_hash_entry): New structures. (elf32_tic6x_link_hash_table, is_tic6x_elf): New macros. (tic6x_elf_scom_section, tic6x_elf_scom_symbol, tic6x_elf_scom_symbol_ptr): New static variables. (elf32_tic6x_howto_table, elf32_tic6x_howto_table_rel, elf32_tic6x_reloc_map): Add R_C6000_JUMP_SLOT, R_C6000_EHTYPE, R_C6000_PCR_H16 and R_C6000_PCR_L16. (elf32_tic6x_link_hash_newfunc, elf32_tic6x_link_hash_table_create, elf32_tic6x_link_hash_table_free, elf32_tic6x_setup, elf32_tic6x_using_dsbt, elf32_tic6x_install_rela, elf32_tic6x_create_dynamic_sections, elf32_tic6x_make_got_dynreloc, elf32_tic6x_finish_dynamic_symbol, elf32_tic6x_gc_sweep_hook, elf32_tic6x_adjust_dynamic_symbol): New static functions. (elf32_tic6x_relocate_section): For R_C6000_PCR_S21, convert branches to weak symbols as required by the ABI. Handle GOT and DSBT_INDEX relocs, and copy relocs to the output file as needed when generating DSBT output. (elf32_tic6x_check_relocs, elf32_tic6x_add_symbol_hook, elf32_tic6x_symbol_processing, elf32_tic6x_section_from_bfd_section, elf32_tic6x_allocate_dynrelocs, elf32_tic6x_size_dynamic_sections, elf32_tic6x_always_size_sections, elf32_tic6x_modify_program_headers, elf32_tic6x_finish_dynamic_sections, elf32_tic6x_plt_sym_val, elf32_tic6x_copy_private_data, elf32_tic6x_link_omit_section_dynsym): New static functions. (ELF_MAXPAGESIZE): Define to 0x1000. (bfd_elf32_bfd_copy_private_bfd_data, bfd_elf32_bfd_link_hash_table_create, bfd_elf32_bfd_link_hash_table_free, elf_backend_can_refcount, elf_backend_want_got_plt, elf_backend_want_dynbss, elf_backend_plt_readonly, elf_backend_got_header_size, elf_backend_gc_sweep_hook, elf_backend_modify_program_headers, elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol, elf_backend_check_relocs, elf_backend_add_symbol_hook, elf_backend_symbol_processing, elf_backend_link_output_symbol_hook, elf_backend_section_from_bfd_section, elf_backend_finish_dynamic_symbol, elf_backend_always_size_sections, elf32_tic6x_size_dynamic_sections, elf_backend_finish_dynamic_sections, elf_backend_omit_section_dynsym, elf_backend_plt_sym_val): Define. * bfd/reloc.c (BFD_RELOC_C6000_JUMP_SLOT, BFD_RELOC_C6000_EHTYPE, BFD_RELOC_C6000_PCR_H16, BFD_RELOC_C6000_PCR_S16): Add. * bfd/bfd-in2.h: Regenerate. * bfd/libbfd.h: Regenerate. * config.bfd: Accept tic6x-*-* instead of tic6x-*-elf. gas/ * config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New static variables. (md_begin): Initialize them. (s_tic6x_scomm): New static function. (md_pseudo_table): Add "scomm". (tc_gen_reloc): Really undo all adjustments made by bfd_install_relocation. * doc/c-tic6x.texi: Document the .scomm directive. gas/testsuite/ * gas/tic6x/scomm-directive-1.s: New test. * gas/tic6x/scomm-directive-1.d: New test. * gas/tic6x/scomm-directive-2.s: New test. * gas/tic6x/scomm-directive-2.d: New test. * gas/tic6x/scomm-directive-3.s: New test. * gas/tic6x/scomm-directive-3.d: New test. * gas/tic6x/scomm-directive-4.s: New test. * gas/tic6x/scomm-directive-4.d: New test. * gas/tic6x/scomm-directive-5.s: New test. * gas/tic6x/scomm-directive-5.d: New test. * gas/tic6x/scomm-directive-6.s: New test. * gas/tic6x/scomm-directive-6.d: New test. * gas/tic6x/scomm-directive-7.s: New test. * gas/tic6x/scomm-directive-7.d: New test. * gas/tic6x/scomm-directive-8.s: New test. * gas/tic6x/scomm-directive-8.d: New test. ld/ * emulparams/elf32_tic6x_le.sh (BIG_OUTPUT_FORMAT, EXTRA_EM_FILE, GENERATE_SHLIB_SCRIPT): New defines. (TEXT_START_ADDR): Define differently depending on target. (.got): Redefine to include "*(.dsbt)". (SDATA_START_SYMBOLS): Remove, replace with (OTHER_GOT_SYMBOLS): New. (OTHER_BSS_SECTIONS): Define only for ELF targets. * emultempl/tic6xdsbt.em: New file. * gen-doc.texi: Set C6X. * ld.texinfo: Likewise. (Options specific to C6X uClinux targets): New section. binutils/ * readelf.c (get_symbol_index_type): Handle SCOM for TIC6X. (dump_relocations): Likewise. binutils/testsuite/ * lib/binutils-common.exp (is_elf_format): Accept tic6x*-*-uclinux*. ld/testsuite/ * ld-scripts/crossref.exp: Add CFLAGS for tic6x*-*-*. * ld-elf/sec-to-seg.exp: Remove tic6x from list of targets defining pagesize to 1. * ld-tic6x/tic6x.exp: Add support for DSBT shared library/executable linking tests. * ld-tic6x/dsbt.ld: New linker script. * ld-tic6x/dsbt-be.ld: New linker script. * ld-tic6x/dsbt-overflow.ld: New linker script. * ld-tic6x/dsbt-inrange.ld: New linker script. * ld-tic6x/shlib-1.s: New test. * ld-tic6x/shlib-2.s: New test. * ld-tic6x/shlib-app-1r.s: New test. * ld-tic6x/shlib-app-1.s: New test. * ld-tic6x/shlib-1.sd: New test. * ld-tic6x/shlib-1.dd: New test. * ld-tic6x/shlib-app-1.rd: New test. * ld-tic6x/shlib-app-1rb.rd: New test. * ld-tic6x/shlib-app-1.sd: New test. * ld-tic6x/static-app-1rb.od: New test. * ld-tic6x/shlib-app-1.dd: New test. * ld-tic6x/shlib-app-1rb.sd: New test. * ld-tic6x/static-app-1b.od: New test. * ld-tic6x/static-app-1r.od: New test. * ld-tic6x/shlib-1rb.rd: New test. * ld-tic6x/shlib-app-1rb.dd: New test. * ld-tic6x/shlib-1rb.sd: New test. * ld-tic6x/shlib-1rb.dd: New test. * ld-tic6x/shlib-app-1b.od: New test. * ld-tic6x/tic6x.exp: New test. * ld-tic6x/static-app-1rb.rd: New test. * ld-tic6x/shlib-app-1r.od: New test. * ld-tic6x/static-app-1.od: New test. * ld-tic6x/static-app-1b.rd: New test. * ld-tic6x/static-app-1r.rd: New test. * ld-tic6x/static-app-1rb.sd: New test. * ld-tic6x/static-app-1b.sd: New test. * ld-tic6x/static-app-1rb.dd: New test. * ld-tic6x/static-app-1r.sd: New test. * ld-tic6x/static-app-1b.dd: New test. * ld-tic6x/shlib-1b.rd: New test. * ld-tic6x/static-app-1r.dd: New test. * ld-tic6x/shlib-app-1b.rd: New test. * ld-tic6x/shlib-1r.rd: New test. * ld-tic6x/shlib-app-1r.rd: New test. * ld-tic6x/shlib-1b.sd: New test. * ld-tic6x/static-app-1.rd: New test. * ld-tic6x/shlib-app-1b.sd: New test. * ld-tic6x/shlib-1r.sd: New test. * ld-tic6x/shlib-1b.dd: New test. * ld-tic6x/shlib-app-1r.sd: New test. * ld-tic6x/shlib-app-1b.dd: New test. * ld-tic6x/shlib-1r.dd: New test. * ld-tic6x/static-app-1.sd: New test. * ld-tic6x/shlib-app-1r.dd: New test. * ld-tic6x/static-app-1.dd: New test. * ld-tic6x/shlib-noindex.rd: New test. * ld-tic6x/shlib-noindex.dd: New test. * ld-tic6x/shlib-noindex.sd: New test. * ld-tic6x/got-reloc-local-1.s: New test. * ld-tic6x/got-reloc-local-2.s: New test. * ld-tic6x/got-reloc-local-r.d: New test. * ld-tic6x/got-reloc-global.s: New test. * ld-tic6x/got-reloc-global-addend-1.d: New test. * ld-tic6x/got-reloc-global-addend-1.s: New test. * ld-tic6x/got-reloc-global-addend-2.d: New test. * ld-tic6x/got-reloc-inrange.d: New test. * ld-tic6x/got-reloc-overflow.d: New test. * ld-tic6x/got-reloc-global-addend-2.s: New test. * ld-tic6x/dsbt-index-error.d: New test. * ld-tic6x/dsbt-index.d: New test. * ld-tic6x/dsbt-index.s: New test. * ld-tic6x/shlib-app-1.od: New test. * ld-tic6x/shlib-app-1rb.od: New test. * ld-tic6x/shlib-1.rd: New test. * ld-tic6x/weak.d: New test. * ld-tic6x/weak-be.d: New test. * ld-tic6x/weak.s: New test. * ld-tic6x/weak-data.d: New test. * ld-tic6x/common.d: New test. * ld-tic6x/common.ld: New test. * ld-tic6x/common.s: New test. |
||
|
Tristan Gingold
|
00e98fc759 |
binutils/
2011-03-31 Tristan Gingold <gingold@adacore.com> * readelf.c (get_ia64_vms_note_type): New function. (print_ia64_vms_note): Ditto. (process_note): Recognize VMS/ia64 specific notes. Display them. (process_corefile_note_segment): Decode VMS notes. include/elf 2011-03-31 Tristan Gingold <gingold@adacore.com> * ia64.h (Elf64_External_VMS_Note): New struct. (NT_VMS_MHD, NT_VMS_LNM, NT_VMS_SRC, NT_VMS_TITLE, NT_VMS_EIDC, NT_VMS_FPMODE, NT_VMS_LINKTIME, NT_VMS_IMGNAM, NT_VMS_IMGID NT_VMS_LINKID, NT_VMS_IMGBID, NT_VMS_GSTNAM, NT_VMS_ORIG_DYN) NT_VMS_PATCHTIME) New macros. |
||
Eric B. Weddington
|
8cc66334fa |
/bfd:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* archures.c: Add AVR XMEGA architecture information.
* cpu-avr.c (arch_info_struct): Likewise.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
(elf32_avr_object_p): Likewise.
/gas:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
(AVR_INSN): Change definition to match.
(avr_opcodes): Likewise, change to match.
(mcu_types): Add XMEGA architecture names and new XMEGA device names.
(md_show_usage): Add XMEGA architecture names.
(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
Add support for SPM Z+ instruction.
* doc/c-avr.texi: Add documentation for XMEGA architectures and
devices.
/include/opcode:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
New instruction set flags.
(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
/ld:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
(eavrxmega?.c): Likewise.
* configure.tgt (targ_extra_emuls): Likewise.
* emulparams/avrxmega1.sh: New file.
* emulparams/avrxmega2.sh: Likewise.
* emulparams/avrxmega3.sh: Likewise.
* emulparams/avrxmega4.sh: Likewise.
* emulparams/avrxmega5.sh: Likewise.
* emulparams/avrxmega6.sh: Likewise.
* emulparams/avrxmega7.sh: Likewise.
* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
Add avrxmega6, avrxmega7 to list of architectures for no stubs.
/opcodes:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
post-increment to support LPM Z+ instruction. Add support for 'E'
constraint for DES instruction.
(print_insn_avr): Adjust calls to avr_operand. Rename variable.
|
||
|
Richard Sandiford
|
34e77a920a |
include/elf/
* arm.h (R_ARM_IRELATIVE): New relocation. bfd/ * reloc.c (BFD_RELOC_ARM_IRELATIVE): New relocation. * bfd-in2.h: Regenerate. * elf32-arm.c (elf32_arm_howto_table_2): Rename existing definition to elf32_arm_howto_table_3 and replace with a single R_ARM_IRELATIVE entry. (elf32_arm_howto_from_type): Update accordingly. (elf32_arm_reloc_map): Map BFD_RELOC_ARM_IRELATIVE to R_ARM_IRELATIVE. (elf32_arm_reloc_name_lookup): Handle elf32_arm_howto_table_3. (arm_plt_info): New structure, split out from elf32_arm_link_hash_entry with an extra noncall_refcount field. (arm_local_iplt_info): New structure. (elf_arm_obj_tdata): Add local_iplt. (elf32_arm_local_iplt): New accessor macro. (elf32_arm_link_hash_entry): Replace plt_thumb_refcount, plt_maybe_thumb_refcount and plt_got_offset with an arm_plt_info. Change tls_type to a bitfield and add is_iplt. (elf32_arm_link_hash_newfunc): Update accordingly. (elf32_arm_allocate_local_sym_info): New function. (elf32_arm_create_local_iplt): Likewise. (elf32_arm_get_plt_info): Likewise. (elf32_arm_plt_needs_thumb_stub_p): Likewise. (elf32_arm_get_local_dynreloc_list): Likewise. (create_ifunc_sections): Likewise. (elf32_arm_copy_indirect_symbol): Update after the changes to elf32_arm_link_hash_entry. Assert the is_iplt has not yet been set. (arm_type_of_stub): Add an st_type argument. Use elf32_arm_get_plt_info to get PLT information. Assert that all STT_GNU_IFUNC references are turned into PLT references. (arm_build_one_stub): Pass the symbol type to elf32_arm_final_link_relocate. (elf32_arm_size_stubs): Pass the symbol type to arm_type_of_stub. (elf32_arm_allocate_irelocs): New function. (elf32_arm_add_dynreloc): In static objects, use .rel.iplt for all R_ARM_IRELATIVE. (elf32_arm_allocate_plt_entry): New function. (elf32_arm_populate_plt_entry): Likewise. (elf32_arm_final_link_relocate): Add an st_type parameter. Set srelgot to null for static objects. Use separate variables to record which st_value and st_type should be used when generating a dynamic relocation. Use elf32_arm_get_plt_info to find the symbol's PLT information, setting has_iplt_entry, splt, plt_offset and gotplt_offset accordingly. Check whether STT_GNU_IFUNC symbols should resolve to an .iplt entry, and change the relocation target accordingly. Broaden assert to include .iplts. Don't set sreloc for static relocations. Assert that we only generate dynamic R_ARM_RELATIVE relocations for R_ARM_ABS32 and R_ARM_ABS32_NOI. Generate R_ARM_IRELATIVE relocations instead of R_ARM_RELATIVE relocations if the target is an STT_GNU_IFUNC symbol. Pass the symbol type to arm_type_of_stub. Conditionally resolve GOT references to the .igot.plt entry. (elf32_arm_relocate_section): Update the call to elf32_arm_final_link_relocate. (elf32_arm_gc_sweep_hook): Use elf32_arm_get_plt_info to get PLT information. Treat R_ARM_REL32 and R_ARM_REL32_NOI as call relocations in shared libraries and relocatable executables. Count non-call PLT references. Use elf32_arm_get_local_dynreloc_list to get the list of dynamic relocations for a local symbol. (elf32_arm_check_relocs): Always create ifunc sections. Set isym at the same time as setting h. Use elf32_arm_allocate_local_sym_info to allocate local symbol information. Treat R_ARM_REL32 and R_ARM_REL32_NOI as call relocations in shared libraries and relocatable executables. Record PLT information for local STT_GNU_IFUNC functions as well as global functions. Count non-call PLT references. Use elf32_arm_get_local_dynreloc_list to get the list of dynamic relocations for a local symbol. (elf32_arm_adjust_dynamic_symbol): Handle STT_GNU_IFUNC symbols. Don't remove STT_GNU_IFUNC PLTs unless all references have been removed. Update after the changes to elf32_arm_link_hash_entry. (allocate_dynrelocs_for_symbol): Decide whether STT_GNU_IFUNC PLT entries should live in .plt or .iplt. Check whether the .igot.plt and .got entries can be combined. Use elf32_arm_allocate_plt_entry to allocate .plt and .(i)got.plt entries. Detect which .got entries will need R_ARM_IRELATIVE relocations and use elf32_arm_allocate_irelocs to allocate them. Likewise other non-.got dynamic relocations. (elf32_arm_size_dynamic_sections): Allocate .iplt, .igot.plt and dynamic relocations for local STT_GNU_IFUNC symbols. Check whether the .igot.plt and .got entries can be combined. Detect which .got entries will need R_ARM_IRELATIVE relocations and use elf32_arm_allocate_irelocs to allocate them. Use stashed section pointers intead of strcmp checks. Handle iplt and igotplt. (elf32_arm_finish_dynamic_symbol): Use elf32_arm_populate_plt_entry to fill in .plt, .got.plt and .rel(a).plt entries. Point STT_GNU_IFUNC symbols at an .iplt entry if non-call relocations resolve to it. (elf32_arm_output_plt_map_1): New function, split out from elf32_arm_output_plt_map. Handle .iplt entries. Use elf32_arm_plt_needs_thumb_stub_p. (elf32_arm_output_plt_map): Call it. (elf32_arm_output_arch_local_syms): Add mapping symbols for local .iplt entries. (elf32_arm_swap_symbol_in): Handle Thumb STT_GNU_IFUNC symbols. (elf32_arm_swap_symbol_out): Likewise. (elf32_arm_add_symbol_hook): New function. (elf_backend_add_symbol_hook): Define for all targets. opcodes/ * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code. gas/ * config/tc-arm.c (md_pcrel_from_section): Use S_FORCE_RELOC to determine whether a relocation is needed. (md_apply_fix, arm_apply_sym_value): Likewise. ld/testsuite/ * ld-arm/ifunc-1.s, ld-arm/ifunc-1.dd, ld-arm/ifunc-1.gd, ld-arm/ifunc-1.rd, ld-arm/ifunc-2.s, ld-arm/ifunc-2.dd, ld-arm/ifunc-2.gd, ld-arm/ifunc-2.rd, ld-arm/ifunc-3.s, ld-arm/ifunc-3.dd, ld-arm/ifunc-3.gd, ld-arm/ifunc-3.rd, ld-arm/ifunc-4.s, ld-arm/ifunc-4.dd, ld-arm/ifunc-4.gd, ld-arm/ifunc-4.rd, ld-arm/ifunc-5.s, ld-arm/ifunc-5.dd, ld-arm/ifunc-5.gd, ld-arm/ifunc-5.rd, ld-arm/ifunc-6.s, ld-arm/ifunc-6.dd, ld-arm/ifunc-6.gd, ld-arm/ifunc-6.rd, ld-arm/ifunc-7.s, ld-arm/ifunc-7.dd, ld-arm/ifunc-7.gd, ld-arm/ifunc-7.rd, ld-arm/ifunc-8.s, ld-arm/ifunc-8.dd, ld-arm/ifunc-8.gd, ld-arm/ifunc-8.rd, ld-arm/ifunc-9.s, ld-arm/ifunc-9.dd, ld-arm/ifunc-9.gd, ld-arm/ifunc-9.rd, ld-arm/ifunc-10.s, ld-arm/ifunc-10.dd, ld-arm/ifunc-10.gd, ld-arm/ifunc-10.rd, ld-arm/ifunc-11.s, ld-arm/ifunc-11.dd, ld-arm/ifunc-11.gd, ld-arm/ifunc-11.rd, ld-arm/ifunc-12.s, ld-arm/ifunc-12.dd, ld-arm/ifunc-12.gd, ld-arm/ifunc-12.rd, ld-arm/ifunc-13.s, ld-arm/ifunc-13.dd, ld-arm/ifunc-13.gd, ld-arm/ifunc-13.rd, ld-arm/ifunc-14.s, ld-arm/ifunc-14.dd, ld-arm/ifunc-14.gd, ld-arm/ifunc-14.rd, ld-arm/ifunc-15.s, ld-arm/ifunc-15.dd, ld-arm/ifunc-15.gd, ld-arm/ifunc-15.rd, ld-arm/ifunc-16.s, ld-arm/ifunc-16.dd, ld-arm/ifunc-16.gd, ld-arm/ifunc-16.rd, ld-arm/ifunc-dynamic.ld, ld-arm/ifunc-static.ld: New tests. * ld-arm/farcall-group.d, ld-arm/farcall-group-size2.d, ld-arm/farcall-mixed-lib-v4t.d, ld-arm/farcall-mixed-lib.d: Update for new stub hashes. * ld-arm/arm-elf.exp: Run them. |
||
|
Richard Sandiford
|
35fc36a8d6 |
include/elf/
* internal.h (elf_internal_sym): Add st_target_internal.
* arm.h (arm_st_branch_type): New enum.
(ARM_SYM_BRANCH_TYPE): New macro.
bfd/
* elf-bfd.h (elf_link_hash_entry): Add target_internal.
* elf.c (swap_out_syms): Set st_target_internal for each
Elf_Internal_Sym.
* elfcode.h (elf_swap_symbol_in): Likewise.
* elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise.
* elf32-sh-symbian.c (sh_symbian_relocate_section): Likewise.
* elf64-sparc.c (elf64_sparc_output_arch_syms): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise.
* elflink.c (elf_link_output_extsym): Likewise.
(bfd_elf_final_link): Likewise.
(elf_link_add_object_symbols): Copy st_target_internal
to the hash table if we see a definition.
(_bfd_elf_copy_link_hash_symbol_type): Copy target_internal.
* elf32-arm.c (elf32_arm_stub_hash_entry): Replace st_type with
a branch_type field.
(a8_erratum_fix, a8_erratum_reloc): Likewise.
(arm_type_of_stub): Replace actual_st_type with an
actual_branch_type parameter.
(arm_build_one_stub): Use branch types rather than st_types to
determine the type of branch.
(cortex_a8_erratum_scan): Likewise.
(elf32_arm_size_stubs): Likewise.
(bfd_elf32_arm_process_before_allocation): Likewise.
(allocate_dynrelocs_for_symbol): Likewise.
(elf32_arm_finish_dynamic_sections): Likewise.
(elf32_arm_final_link_relocate): Replace sym_flags parameter with
a branch_type parameter.
(elf32_arm_relocate_section): Update call accordingly.
(elf32_arm_adjust_dynamic_symbol): Don't check STT_ARM_TFUNC.
(elf32_arm_output_map_sym): Initialize st_target_internal.
(elf32_arm_output_stub_sym): Likewise.
(elf32_arm_symbol_processing): Delete.
(elf32_arm_swap_symbol_in): Convert STT_ARM_TFUNCs into STT_FUNCs.
Use st_target_internal to record the branch type.
(elf32_arm_swap_symbol_out): Use st_target_internal to test for
Thumb functions.
(elf32_arm_is_function_type): Delete.
(elf_backend_symbol_processing): Likewise.
(elf_backend_is_function_type): Likewise.
gas/
* config/tc-arm.c (arm_adjust_symtab): Set the branch type
for Thumb symbols.
ld/
* emultempl/armelf.em (gld${EMULATION_NAME}_finish): Check
eh->target_internal.
opcodes/
* arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
Use branch types instead.
(print_insn): Likewise.
|
||
|
Nick Clifton
|
8f7e76d024 |
* common.h (EM_V850): V850s now supplied by Renesas.
* readelf.c (get_machine_name): Update EM_V850 entry. |
||
|
Alan Modra
|
eba5cfbc38 | fix pr number | ||
|
Alan Modra
|
15a44d573d |
PR 12519
* internal.h (ELF_SECTION_IN_SEGMENT_1): Don't match zero size sections at start or end of PT_DYNAMIC. |
||
Nathan Sidwell
|
0855e32bf5 |
bfd/
* reloc.c (BFD_RELOC_ARM_TLS_GOTDESC, BFD_RELOC_ARM_TLS_CALL, BFD_RELOC_ARM_THM_TLS_CALL, BFD_RELOC_ARM_TLS_DESCSEQ, BFD_RELOC_ARM_THM_TLS_DESCSEQ, BFD_RELOC_ARM_TLS_DESC): New relocations. * libbfd.h: Rebuilt. * bfd-in2.h: Rebuilt. * elf32-arm.c (elf32_arm_howto_table_1): Add new relocations. (elf32_arm_reloc_map): Likewise. (tls_trampoline, dl_tlsdesc_lazy_trampoline): New PLT templates. (elf32_arm_stub_long_branch_any_tls_pic, elf32_arm_stub_long_branch_v4t_thumb_tls_pic): New stub templates. (DEF_STUBS): Add new stubs. (struct_elf_arm_obj_data): Add local_tlsdesc_gotent field. (elf32_arm_local_tlsdesc_gotent): New. (GOT_TLS_GDESC): New mask. (GOT_TLS_GD_ANY): Define. (struct elf32_arm_link_hash_entry): Add tlsdesc_got field. (elf32_arm_compute_jump_table_size): New. (struct elf32_arm_link_hash_table): Add next_tls_desc_index, num_tls_desc, dt_tlsdesc_plt, dt_tlsdesc_got, tls_trampoline, sgotplt_jump_table_size fields. (elf32_arm_link_hash_newfunc): Initialize tlsdesc_got field. (elf32_arm_link_hash_table_create): Initialize new fields. (arm_type_of_stub): Check TLS desc relocs too. (elf32_arm_stub_name): TLS desc relocs can be shared. (elf32_arm_tls_transition): Determine relaxation. (arm_stub_required_alignment): Add tls stubs. (elf32_arm_size_stubs): Likewise. (elf32_arm_tls_relax): Perform TLS relaxing. (elf32_arm_final_link_relocate): Process TLS DESC relocations. (IS_ARM_TLS_GNU_RELOC): New. (IS_ARM_TLS_RELOC): Use it. (elf32_arm_relocate_section): Perform TLS relaxing. (elf32_arm_check_relocs): Anticipate TLS relaxing, process tls desc relocations. (allocate_dynrelocs): Allocate tls desc relcoations. (elf32_arm_output_arch_local_syms): Emit tls trampoline mapping symbols. (elf32_arm_size_dynamic_sections): Allocate tls trampolines and got slots. (elf32_arm_always_size_sections): New. Create _TLS_MODULE_BASE symbol. (elf32_arm_finish_dynamic_symbol): Adjust. (arm_put_trampoline): New. (elf32_arm_finish_dynamic_sections): Emit new dynamic tags and tls trampolines. (elf_backend_always_size_sections): Define. include/elf/ * arm.h (R_ARM_TLS_DESC, R_ARM_TLS_GOTDESC, R_ARM_TLS_CALL, R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New relocations. gas/ * doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and .tlsdescseq directive. * config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc following a symbol. (s_arm_tls_descseq): New directive. (md_pseudo_table): Add it. (encode_branch): Allow TLS_CALL relocs too. (do_t_blx, do_t_branch23): Use encode_branch. (reloc_names): Add tlsdesc and tlscall. (md_apply_fix): Process tls desc relocations. (tc_gen_reloc): Likewise. (arm_fix_adjustable): Likewise. gas/testsuite/ * gas/arm/tls.s: Add tlsdesc tests. * gas/arm/tls.d: Adjust. ld/testsuite/ * ld-arm/arm-elf.exp: Added tests for new TLS handling relocations. * ld-arm/tls-descrelax-be32.d: New. * ld-arm/tls-descrelax-be32.s: New. * ld-arm/tls-descrelax-be8.d: New. * ld-arm/tls-descrelax-be8.s: New. * ld-arm/tls-descrelax-v7.d: New. * ld-arm/tls-descrelax-v7.s: New. * ld-arm/tls-descrelax.d: New. * ld-arm/tls-descrelax.s: New. * ld-arm/tls-descseq.d: New. * ld-arm/tls-descseq.r: New. * ld-arm/tls-descseq.s: New. * ld-arm/tls-gdesc-got.d: New. * ld-arm/tls-gdesc-got.s: New. * ld-arm/tls-gdesc-nlazy.g: New. * ld-arm/tls-gdesc-nlazy.s: New. * ld-arm/tls-gdesc.d: New. * ld-arm/tls-gdesc.r: New. * ld-arm/tls-gdesc.s: New. * ld-arm/tls-gdierelax.d: New. * ld-arm/tls-gdierelax.s: New. * ld-arm/tls-gdierelax2.d: New. * ld-arm/tls-gdierelax2.s: New. * ld-arm/tls-gdlerelax.d: New. * ld-arm/tls-gdlerelax.s: New. * ld-arm/tls-lib-loc.d: New. * ld-arm/tls-lib-loc.r: New. * ld-arm/tls-lib-loc.s: New. * ld-arm/tls-longplt-lib.d: New. * ld-arm/tls-longplt-lib.s: New. * ld-arm/tls-longplt.d: New. * ld-arm/tls-longplt.s: New. * ld-arm/tls-mixed.r: New. * ld-arm/tls-mixed.s: New. * ld-arm/tls-thumb1.d: New. * ld-arm/tls-thumb1.s: New. * ld-arm/arm-elf.exp: New. |
||
Mike Frysinger
|
781303cee5 |
blackfin: add support for L1 code/data flags
Add new linker options for marking programs to load into L1 memory at runtime. This needs new EF flag bits, so declare them. Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> |
||
|
Nick Clifton
|
fd50354116 |
bfd/
* archures.c (bfd_mach_mips_loongson_3a): Defined. * bfd-in2.h (bfd_mach_mips_loongson_3a): Defined. * cpu-mips.c (I_loongson_3a): New add. (arch_info_struct): Add loongson_3a. * elfxx-mips.c (_bfd_elf_mips_mach): Add loongson_3a. (mips_set_isa_flags): Add loongson_3a. (mips_mach_extensions): Add loongson_3a in MIPS64 extensions. binutils/ * readelf.c (get_machine_flags): Add loongson-3a. gas/ * config/tc-mips.c (mips_cpu_info_table): Add loongson3a in MIPS 64. * doc/c-mips.texi (MIPS cpu): Add loongson3a. include/ * elf/mips.h (E_MIPS_MACH_LS3A): Defined. * opcode/mips.h (INSN_LOONGSON_3A): Defined. (CPU_LOONGSON_3A): Defined. (OPCODE_IS_MEMBER): Add LOONGSON_3A. opcodes/ * mips-dis.c (mips_arch_choices): Add loongson3a. * mips-opc.c (IL3A): Defined as INSN_LOONGSON_3A. (mips_builtin_opcodes): Modify some instructions' membership from IL2F to IL2F|IL3A, since these instructions are supported by Loongson_3A. |
||
Joseph Myers
|
877791769e |
bfd:
* elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type): Except for Tag_ABI_compatibility, treat odd tags as strings and even ones as integers. (elf32_tic6x_obj_attrs_order, elf32_tic6x_tag_to_array_alignment, elf32_tic6x_array_alignment_to_tag): New. (elf32_tic6x_merge_attributes): Handle more attributes. Set type for merged attributes. (elf_backend_obj_attrs_order): Define. binutils: * readelf.c (display_tic6x_attribute): Handle more attributes. gas: * config/tc-tic6x.c (OPTION_MPID, OPTION_MPIC, OPTION_MNO_PIC): New enum values. (md_longopts): Add options mpid, mpic and mno-pic. (tic6x_pid_type, tic6x_pid, tic6x_pic, tic6x_pid_type_table, tic6x_pid_types, tic6x_use_pid): New. (md_parse_option): Handle new options. (md_show_usage): Output help text for new options. (tic6x_set_attributes): Set PID and PIC attributes. * doc/as.texinfo: Document -mpid=, -mpic and -mno-pic. * doc/c-tic6x.texi (TIC6X Options): Likewise. gas/testsuite: * gas/tic6x/attr-array-directive-1.d, gas/tic6x/attr-array-directive-1.s, gas/tic6x/attr-array-directive-2.d, gas/tic6x/attr-array-directive-2.s, gas/tic6x/attr-array-directive-3.d, gas/tic6x/attr-array-directive-3.s, gas/tic6x/attr-array-directive-4.d, gas/tic6x/attr-array-directive-4.s, gas/tic6x/attr-conformance-directive-1.d, gas/tic6x/attr-conformance-directive-1.s, gas/tic6x/attr-conformance-directive-2.d, gas/tic6x/attr-conformance-directive-2.s, gas/tic6x/attr-pic-directive-1.d, gas/tic6x/attr-pic-directive-1.s, gas/tic6x/attr-pic-directive-2.d, gas/tic6x/attr-pic-directive-2.s, gas/tic6x/attr-pic-opts-mno-pic.d, gas/tic6x/attr-pic-opts-mpic.d, gas/tic6x/attr-pid-directive-1.d, gas/tic6x/attr-pid-directive-1.s, gas/tic6x/attr-pid-directive-2.d, gas/tic6x/attr-pid-directive-2.s, gas/tic6x/attr-pid-opts-mpid-far.d, gas/tic6x/attr-pid-opts-mpid-near.d, gas/tic6x/attr-pid-opts-mpid-no.d, gas/tic6x/attr-stack-directive-1.d, gas/tic6x/attr-stack-directive-1.s, gas/tic6x/attr-stack-directive-2.d, gas/tic6x/attr-stack-directive-2.s, gas/tic6x/attr-wchar-directive-1.d, gas/tic6x/attr-wchar-directive-1.s, gas/tic6x/attr-wchar-directive-2.d, gas/tic6x/attr-wchar-directive-2.s: New tests. include/elf: * tic6x-attrs.h (Tag_ABI_wchar_t, Tag_ABI_stack_align_needed, Tag_ABI_stack_align_preserved, Tag_ABI_PID, Tag_ABI_PIC, Tag_ABI_array_object_alignment, Tag_ABI_array_object_align_expected, Tag_ABI_conformance): Define. ld/testsuite: * ld-tic6x/attr-array-16-16.d, ld-tic6x/attr-array-16-4.d, ld-tic6x/attr-array-16-416.d, ld-tic6x/attr-array-16-48.d, ld-tic6x/attr-array-16-8.d, ld-tic6x/attr-array-16-816.d, ld-tic6x/attr-array-16.s, ld-tic6x/attr-array-4-16.d, ld-tic6x/attr-array-4-4.d, ld-tic6x/attr-array-4-416.d, ld-tic6x/attr-array-4-48.d, ld-tic6x/attr-array-4-8.d, ld-tic6x/attr-array-4-816.d, ld-tic6x/attr-array-4.s, ld-tic6x/attr-array-416-16.d, ld-tic6x/attr-array-416-4.d, ld-tic6x/attr-array-416-416.d, ld-tic6x/attr-array-416-48.d, ld-tic6x/attr-array-416-8.d, ld-tic6x/attr-array-416-816.d, ld-tic6x/attr-array-416.s, ld-tic6x/attr-array-48-16.d, ld-tic6x/attr-array-48-4.d, ld-tic6x/attr-array-48-416.d, ld-tic6x/attr-array-48-48.d, ld-tic6x/attr-array-48-8.d, ld-tic6x/attr-array-48-816.d, ld-tic6x/attr-array-48.s, ld-tic6x/attr-array-8-16.d, ld-tic6x/attr-array-8-4.d, ld-tic6x/attr-array-8-416.d, ld-tic6x/attr-array-8-48.d, ld-tic6x/attr-array-8-8.d, ld-tic6x/attr-array-8-816.d, ld-tic6x/attr-array-8.s, ld-tic6x/attr-array-816-16.d, ld-tic6x/attr-array-816-4.d, ld-tic6x/attr-array-816-416.d, ld-tic6x/attr-array-816-48.d, ld-tic6x/attr-array-816-8.d, ld-tic6x/attr-array-816-816.d, ld-tic6x/attr-array-816.s, ld-tic6x/attr-conformance-10-10.d, ld-tic6x/attr-conformance-10-11.d, ld-tic6x/attr-conformance-10-none.d, ld-tic6x/attr-conformance-10.s, ld-tic6x/attr-conformance-11-10.d, ld-tic6x/attr-conformance-11-11.d, ld-tic6x/attr-conformance-11-none.d, ld-tic6x/attr-conformance-11.s, ld-tic6x/attr-conformance-none-10.d, ld-tic6x/attr-conformance-none-11.d, ld-tic6x/attr-conformance-none-none.d, ld-tic6x/attr-conformance-none.s, ld-tic6x/attr-pic-0.s, ld-tic6x/attr-pic-00.d, ld-tic6x/attr-pic-01.d, ld-tic6x/attr-pic-1.s, ld-tic6x/attr-pic-10.d, ld-tic6x/attr-pic-11.d, ld-tic6x/attr-pid-0.s, ld-tic6x/attr-pid-00.d, ld-tic6x/attr-pid-01.d, ld-tic6x/attr-pid-02.d, ld-tic6x/attr-pid-1.s, ld-tic6x/attr-pid-10.d, ld-tic6x/attr-pid-11.d, ld-tic6x/attr-pid-12.d, ld-tic6x/attr-pid-2.s, ld-tic6x/attr-pid-20.d, ld-tic6x/attr-pid-21.d, ld-tic6x/attr-pid-22.d, ld-tic6x/attr-stack-16-16.d, ld-tic6x/attr-stack-16-8.d, ld-tic6x/attr-stack-16-816.d, ld-tic6x/attr-stack-16.s, ld-tic6x/attr-stack-8-16.d, ld-tic6x/attr-stack-8-8.d, ld-tic6x/attr-stack-8-816.d, ld-tic6x/attr-stack-8.s, ld-tic6x/attr-stack-816-16.d, ld-tic6x/attr-stack-816-8.d, ld-tic6x/attr-stack-816-816.d, ld-tic6x/attr-stack-816.s, ld-tic6x/attr-wchar-0.s, ld-tic6x/attr-wchar-00.d, ld-tic6x/attr-wchar-01.d, ld-tic6x/attr-wchar-02.d, ld-tic6x/attr-wchar-1.s, ld-tic6x/attr-wchar-10.d, ld-tic6x/attr-wchar-11.d, ld-tic6x/attr-wchar-12.d, ld-tic6x/attr-wchar-2.s, ld-tic6x/attr-wchar-20.d, ld-tic6x/attr-wchar-21.d, ld-tic6x/attr-wchar-22.d: New tests. |
||
|
Joseph Myers
|
3cbd1c0665 |
bfd:
* elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type): Check Tag_ABI_compatibility not Tag_compatibility. (elf32_tic6x_merge_attributes): Update compatibility attribute name in comment. Return FALSE if merging common attributes fails. binutils: * readelf.c (display_tic6x_attribute): Use Tag_ABI_compatibility not hardcoded 32. Display name of this attribute. gas: * doc/c-tic6x.texi (TIC6X Directives): Mention Tag_ABI_compatibility. gas/testsuite: * gas/tic6x/attr-compatibility-directive-1.d, gas/tic6x/attr-compatibility-directive-1.s, gas/tic6x/attr-compatibility-directive-2.d, gas/tic6x/attr-compatibility-directive-2.s: New tests. include/elf: * tic6x-attrs.h (Tag_ABI_compatibility): Define. ld/testsuite: * ld-tic6x/attr-compatibility-gnu-gnu.d, ld-tic6x/attr-compatibility-gnu-other.d, ld-tic6x/attr-compatibility-gnu.s, ld-tic6x/attr-compatibility-other-gnu.d, ld-tic6x/attr-compatibility-other-other.d, ld-tic6x/attr-compatibility-other.s: New tests. |
||
|
Joseph Myers
|
b559362370 |
bfd:
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* elf32-tic6x.c (elf32_tic6x_merge_attributes): Check for mismatch
of DSBT attributes.
binutils:
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* readelf.c (display_tic6x_attribute): Handle Tag_ABI_DSBT.
gas:
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* config/tc-tic6x.c (OPTION_MDSBT, OPTION_MNO_DSBT): New enum
values.
(md_longopts): Add mdsbt and mno-dsbt.
(tic6x_dsbt): New static variable.
(md_parse_option): Handle OPTION_MDSBT and OPTION_MNO_DSBT.
(md_show_usage): Output help text for -mdsbt and -mno-dsbt.
(TAG): Add comma at the end.
(tic6x_set_attributes): Set Tag_ABI_DSBT.
* doc/as.texinfo: Document -mdsbt and -mno-dsbt.
* doc/c-tic6x.texi (TIC6X Options): Likewise.
(TIC6X Directives): Mention Tag_ABI_DSBT.
gas/testsuite:
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* gas/tic6x/attr-dsbt-directive-1.d,
gas/tic6x/attr-dsbt-directive-1.s,
gas/tic6x/attr-dsbt-directive-2.d,
gas/tic6x/attr-dsbt-directive-2.s,
gas/tic6x/attr-dsbt-opts-mdsbt.d,
gas/tic6x/attr-dsbt-opts-mno-dsbt.d: New tests.
include/elf:
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* tic6x-attrs.h (Tag_ABI_DSBT): New.
ld/testsuite:
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* ld-tic6x/attr-dsbt-0.s, ld-tic6x/attr-dsbt-00.d,
ld-tic6x/attr-dsbt-01.d, ld-tic6x/attr-dsbt-1.s,
ld-tic6x/attr-dsbt-10.d, ld-tic6x/attr-dsbt-11.d: New tests.
|
||
|
Joseph Myers
|
75fa6dc1e8 |
bfd:
* elf32-tic6x.c (elf32_tic6x_merge_arch_attributes): Update for attribute renaming. (elf_backend_obj_attrs_section): Change to ".c6xabi.attributes". binutils: * readelf.c (display_tic6x_attribute): Update for attribute renaming. gas: * config/tc-tic6x.c (tic6x_arch_attribute, tic6x_arches, md_assemble, tic6x_set_attributes): Update for attribute renaming. * doc/c-tic6x.texi: Update for attribute renaming. gas/testsuite: * gas/tic6x/attr-arch-directive-1.d, gas/tic6x/attr-arch-directive-2.d, gas/tic6x/attr-arch-directive-3.d, gas/tic6x/attr-arch-directive-4.d, gas/tic6x/attr-arch-directive-4.s, gas/tic6x/attr-arch-directive-5.d, gas/tic6x/attr-arch-directive-5.s, gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d, gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d, gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d, gas/tic6x/attr-arch-opts-none-1.d, gas/tic6x/attr-arch-opts-none-2.d, gas/tic6x/attr-arch-opts-override-1.d, gas/tic6x/attr-arch-opts-override-2.d: Update for attribute renaming and renumbering. include/elf: * tic6x-attrs.h (Tag_C6XABI_Tag_CPU_arch): Change to Tag_ISA, value 4. * tic6x.h (Values for Tag_C6XABI_Tag_CPU_arch): Rename for attribute renaming. ld: * emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Use .c6xabi.attributes, not __TI_build_attributes. ld/testsuite: * ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d, ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d, ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d, ld-tic6x/attr-arch-c64x+-c62x.d, ld-tic6x/attr-arch-c64x+-c64x+.d, ld-tic6x/attr-arch-c64x+-c64x.d, ld-tic6x/attr-arch-c64x+-c674x.d, ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d, ld-tic6x/attr-arch-c64x-c62x.d, ld-tic6x/attr-arch-c64x-c64x+.d, ld-tic6x/attr-arch-c64x-c64x.d, ld-tic6x/attr-arch-c64x-c674x.d, ld-tic6x/attr-arch-c64x-c67x+.d, ld-tic6x/attr-arch-c64x-c67x.d, ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d, ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d, ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d, ld-tic6x/attr-arch-c67x+-c62x.d, ld-tic6x/attr-arch-c67x+-c64x+.d, ld-tic6x/attr-arch-c67x+-c64x.d, ld-tic6x/attr-arch-c67x+-c674x.d, ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d, ld-tic6x/attr-arch-c67x-c62x.d, ld-tic6x/attr-arch-c67x-c64x+.d, ld-tic6x/attr-arch-c67x-c64x.d, ld-tic6x/attr-arch-c67x-c674x.d, ld-tic6x/attr-arch-c67x-c67x+.d, ld-tic6x/attr-arch-c67x-c67x.d: Update for attribute renaming. |
||
|
Nick Clifton
|
1cd986c585 | Add support for v850E2 and v850E2V3 | ||
|
Alan Modra
|
f463846733 |
include/elf/
* internal.h (ELF_TBSS_SPECIAL): New macro, extracted from.. (ELF_SECTION_SIZE): ..here. (ELF_SECTION_IN_SEGMENT_1): Add "strict" arg. (ELF_SECTION_IN_SEGMENT_STRICT): New macro. bfd/ * elf.c (assign_file_positions_for_load_sections): Check that zero size sections are allocated in segments too. (assign_file_positions_for_non_load_sections): Warn if zero size alloc sections are found here. (copy_elf_program_header): Don't drop zero size sections from segment map. (copy_private_bfd_data): Check for changes in zero size sections. binutils/ * readelf.c (process_program_headers): Don't ignore all zero size sections. ld/testsuite/ * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.r: Update. |
||
|
Alan Modra
|
ba761f19f5 |
include/elf/
* ppc64.h (R_PPC64_LO_DS_OPT): Define. bfd/ * elf64-ppc.c (toc_skip_enum): Define. (ppc64_elf_edit_toc): Use two low bits of skip array as markers. Optimize largetoc sequences. (adjust_toc_syms): Update for skip array change. (ppc64_elf_relocate_section): Handle R_PPC64_LO_DS_OPT. ld/ * emultempl/ppc64elf.em (prelim_size_sections): New function. (ppc_before_allocation): Use it. Size sections before toc edit too. |
||
|
Joseph Myers
|
59e6276b64 |
bfd:
* elf-bfd.h (LEAST_KNOWN_OBJ_ATTRIBUTE): Decrease to 2. * elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type, elf32_tic6x_merge_arch_attributes, elf32_tic6x_merge_attributes, elf32_tic6x_merge_private_bfd_data): New. (bfd_elf32_bfd_merge_private_bfd_data, elf_backend_obj_attrs_arg_type, elf_backend_obj_attrs_section, elf_backend_obj_attrs_section_type, elf_backend_obj_attrs_vendor): Define. * elf32-tic6x.h (elf32_tic6x_merge_arch_attributes): Declare. binutils: * readelf.c (display_tic6x_attribute, process_tic6x_specific): New. (process_arch_specific): Call process_tic6x_specific for EM_TI_C6000. gas: * config/tc-tic6x.c: Include elf/tic6x.h. (tic6x_arch_attribute, tic6x_seen_insns): New. (tic6x_arch_table, tic6x_arches): Add attribute values. (tic6x_use_arch): Handle attribute settings. (tic6x_attributes_set_explicitly, s_tic6x_c6xabi_attribute, tic6x_attribute_table, tic6x_attributes, tic6x_convert_symbolic_attribute): New. (md_pseudo_table): Add c6xabi_attribute. (md_assemble): Set tic6x_seen_insns and tic6x_arch_attribute. (tic6x_set_attribute_int, tic6x_set_attributes): New. (tic6x_end): Call tic6x_set_attributes. * config/tc-tic6x.h (CONVERT_SYMBOLIC_ATTRIBUTE): Define. (tic6x_convert_symbolic_attribute): Declare. gas/testsuite: * gas/elf/elf.exp: Set target_machine for tic6x-*-*. * gas/elf/section2.e-tic6x, gas/tic6x/attr-arch-directive-1.d, gas/tic6x/attr-arch-directive-1.s, gas/tic6x/attr-arch-directive-2.d, gas/tic6x/attr-arch-directive-2.s, gas/tic6x/attr-arch-directive-3.d, gas/tic6x/attr-arch-directive-3.s, gas/tic6x/attr-arch-directive-4.d, gas/tic6x/attr-arch-directive-4.s, gas/tic6x/attr-arch-directive-5.d, gas/tic6x/attr-arch-directive-5.s, gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d, gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d, gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d, gas/tic6x/attr-arch-opts-none-1.d, gas/tic6x/attr-arch-opts-none-2.d, gas/tic6x/attr-arch-opts-override-1.d, gas/tic6x/attr-arch-opts-override-2.d, gas/tic6x/empty.s: New. include/elf: * tic6x-attrs.h: New. * tic6x.h: Include elf/tic6x-attrs.h for attribute table. (C6XABI_Tag_CPU_arch_none, C6XABI_Tag_CPU_arch_C62X, C6XABI_Tag_CPU_arch_C67X, C6XABI_Tag_CPU_arch_C67XP, C6XABI_Tag_CPU_arch_C64X, C6XABI_Tag_CPU_arch_C64XP, C6XABI_Tag_CPU_arch_C674X): Define. ld: * emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Define. ld/testsuite: * ld-elf/orphan3.d: Allow section names starting '_'. * ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d, ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d, ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d, ld-tic6x/attr-arch-c62x.s, ld-tic6x/attr-arch-c64x+-c62x.d, ld-tic6x/attr-arch-c64x+-c64x+.d, ld-tic6x/attr-arch-c64x+-c64x.d, ld-tic6x/attr-arch-c64x+-c674x.d, ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d, ld-tic6x/attr-arch-c64x+.s, ld-tic6x/attr-arch-c64x-c62x.d, ld-tic6x/attr-arch-c64x-c64x+.d, ld-tic6x/attr-arch-c64x-c64x.d, ld-tic6x/attr-arch-c64x-c674x.d, ld-tic6x/attr-arch-c64x-c67x+.d, ld-tic6x/attr-arch-c64x-c67x.d, ld-tic6x/attr-arch-c64x.s, ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d, ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d, ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d, ld-tic6x/attr-arch-c674x.s, ld-tic6x/attr-arch-c67x+-c62x.d, ld-tic6x/attr-arch-c67x+-c64x+.d, ld-tic6x/attr-arch-c67x+-c64x.d, ld-tic6x/attr-arch-c67x+-c674x.d, ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d, ld-tic6x/attr-arch-c67x+.s, ld-tic6x/attr-arch-c67x-c62x.d, ld-tic6x/attr-arch-c67x-c64x+.d, ld-tic6x/attr-arch-c67x-c64x.d, ld-tic6x/attr-arch-c67x-c674x.d, ld-tic6x/attr-arch-c67x-c67x+.d, ld-tic6x/attr-arch-c67x-c67x.d, ld-tic6x/attr-arch-c67x.s: New. |
||
|
Tristan Gingold
|
28f997cf67 |
include/elf
2010-06-11 Tristan Gingold <gingold@adacore.com> * ia64.h (EF_IA_64_VMS_COMCOD, EF_IA_64_VMS_COMCOD_SUCCESS) (EF_IA_64_VMS_COMCOD_WARNING, EF_IA_64_VMS_COMCOD_ERROR) (EF_IA_64_VMS_COMCOD_ABORT, EF_IA_64_VMS_LINKAGES): Define. (VMS_LF_CALL_DEBUG, VMS_LF_NOP0BUFS, VMS_LF_P0IMAGE) (VMS_LF_MKTHREADS, VMS_LF_UPCALLS, VMS_LF_IMGSTA) (VMS_LF_INITIALIZE, VMS_LF_MAIN, VMS_LF_EXE_INIT) (VMS_LF_TBK_IN_IMG, VMS_LF_DBG_IN_IMG, VMS_LF_TBK_IN_DSF) (VMS_LF_DBG_IN_DSF, VMS_LF_SIGNATURES, VMS_LF_REL_SEG_OFF): Define. (VMS_STO_VISIBILITY, VMS_ST_VISIBILITY, VMS_STO_FUNC_TYPE) (VMS_ST_FUNC_TYPE, VMS_SFT_CODE_ADDR, VMS_SFT_SYMV_IDX) (VMS_SFT_FD, VMS_SFT_RESERVE, VMS_STO_LINKAGE, VMS_ST_LINKAGE) (VMS_STL_IGNORE, VMS_STL_RESERVE, VMS_STL_STD, VMS_STL_LNK): Define. (Elf64_External_VMS_IMAGE_FIXUP): New declaration. (Elf64_External_VMS_IMAGE_RELA): Ditto. (R_IA64_VMS_DIR8, R_IA64_VMS_DIR16LSB, R_IA64_VMS_CALL_SIGNATURE) (R_IA64_VMS_EXECLET_FUNC, R_IA64_VMS_EXECLET_DATA, R_IA64_VMS_FIX8) (R_IA64_VMS_FIX16, R_IA64_VMS_FIX32, R_IA64_VMS_FIX64) (R_IA64_VMS_FIXFD, R_IA64_VMS_ACC_LOAD, R_IA64_VMS_ACC_ADD) (R_IA64_VMS_ACC_SUB, R_IA64_VMS_ACC_MUL, R_IA64_VMS_ACC_DIV) (R_IA64_VMS_ACC_AND, R_IA64_VMS_ACC_IOR, R_IA64_VMS_ACC_EOR) (R_IA64_VMS_ACC_ASH, R_IA64_VMS_ACC_STO8, R_IA64_VMS_ACC_STO16LSH) (R_IA64_VMS_ACC_STO32LSH, R_IA64_VMS_ACC_STO64LSH): New. binutils/ 2010-06-11 Tristan Gingold <gingold@adacore.com> Doug Rupp <rupp@gnat.com> * readelf.c (is_ia64_vms): New function. (dump_relocations): Use it. (get_machine_flags): Display IA-64 OpenVMS flags. (process_program_headers): No error on OpenVMS if no .dynamic section. (struct ia64_vms_dynfixup, struct ia64_vms_dynimgrela): New declarations. (dump_ia64_vms_dynamic_fixups): New function. (dump_ia64_vms_dynamic_relocs): Ditto. (process_ia64_vms_dynamic_relocs): Ditto. (process_relocs): Handle IA-64 OpenVMS relocs. (VMS_EPOCH_OFFSET, VMS_GRANULARITY_FACTOR): New macros. (print_vms_time): New function. (dynamic_section_ia64_val): Handle DT_IA_64_VMS_LINKTIME and DT_IA_64_VMS_LNKFLAGS. (get_ia64_symbol_other): New function. (get_symbol_other): Handle EM_IA_64. |
||
|
Nick Clifton
|
8e45593ff3 |
2010-05-21 Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Andrew Stubbs <ams@codesourcery.com>
bfd/
* config.bfd (sh-*-uclinux* | sh[12]-*-uclinux*): Add
bfd_elf32_shl_vec, and FDPIC vectors to targ_selvecs.
* configure.in: Handle FDPIC vectors.
* elf32-sh-relocs.h: Add FDPIC and movi20 relocations.
* elf32-sh.c (DEFAULT_STACK_SIZE): Define.
(SYMBOL_FUNCDESC_LOCAL): Define. Use it instead of
SYMBOL_REFERENCES_LOCAL for function descriptors.
(fdpic_object_p): New.
(sh_reloc_map): Add FDPIC and movi20 relocations.
(sh_elf_info_to_howto, sh_elf_relocate_section): Handle new invalid
range.
(struct elf_sh_plt_info): Add got20 and short_plt. Update all
definitions.
(FDPIC_PLT_ENTRY_SIZE, FDPIC_PLT_LAZY_OFFSET): Define.
(fdpic_sh_plt_entry_be, fdpic_sh_plt_entry_le, fdpic_sh_plts): New.
(FDPIC_SH2A_PLT_ENTRY_SIZE, FDPIC_SH2A_PLT_LAZY_OFFSET): Define.
(fdpic_sh2a_plt_entry_be, fdpic_sh2a_plt_entry_le)
(fdpic_sh2a_short_plt_be, fdpic_sh2a_short_plt_le, fdpic_sh2a_plts):
New.
(get_plt_info): Handle FDPIC.
(MAX_SHORT_PLT): Define.
(get_plt_index, get_plt_offset): Handle short_plt.
(union gotref): New.
(struct elf_sh_link_hash_entry): Add funcdesc, rename tls_type to
got_type and adjust all uses. Add GOT_FUNCDESC.
(struct sh_elf_obj_tdata): Add local_funcdesc. Rename
local_got_tls_type to local_got_type.
(sh_elf_local_got_type): Renamed from sh_elf_local_got_tls_type. All
users changed.
(sh_elf_local_funcdesc): Define.
(struct elf_sh_link_hash_table): Add sfuncdesc, srelfuncdesc, fdpic_p,
and srofixup.
(sh_elf_link_hash_newfunc): Initialize new fields.
(sh_elf_link_hash_table_create): Set fdpic_p.
(sh_elf_omit_section_dynsym): New.
(create_got_section): Create .got.funcdesc, .rela.got.funcdesc
and .rofixup.
(allocate_dynrelocs): Allocate local function descriptors and space
for R_SH_FUNCDESC-related relocations, and for rofixups.
Handle GOT_FUNCDESC. Create fixups. Handle GOT entries which
require function descriptors.
(sh_elf_always_size_sections): Handle PT_GNU_STACK and __stacksize.
(sh_elf_modify_program_headers): New.
(sh_elf_size_dynamic_sections): Allocate function descriptors for
local symbols. Allocate .got.funcdesc contents. Allocate rofixups.
Handle local GOT entries of type GOT_FUNCDESC. Create fixups for
local GOT entries. Ensure that FDPIC libraries always have a PLTGOT
entry in the .dynamic section.
(sh_elf_add_dyn_reloc, sh_elf_got_offset, sh_elf_initialize_funcdesc)
(sh_elf_add_rofixup, sh_elf_osec_to_segment)
(sh_elf_osec_readonly_p, install_movi20_field): New functions.
(sh_elf_relocate_section): Handle new relocations, R_SH_FUNCDESC,
R_SH_GOTFUNCDESC and R_SH_GOTOFFFUNCDESC. Use sh_elf_got_offset
and .got.plt throughout to find _GLOBAL_OFFSET_TABLE_. Add rofixup
read-only section warnings. Handle undefined weak symbols. Generate
fixups for R_SH_DIR32 and GOT entries. Check for cross-segment
relocations and clear EF_SH_PIC. Handle 20-bit relocations.
Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_gc_sweep_hook): Handle R_SH_FUNCDESC, R_SH_GOTOFF20,
R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20, and R_SH_GOTOFFFUNCDESC.
Handle 20-bit relocations.
(sh_elf_copy_indirect_symbol): Copy function descriptor reference
counts.
(sh_elf_check_relocs): Handle new relocations. Make symbols
dynamic for FDPIC relocs. Account for rofixups. Error for FDPIC
symbol mismatches. Allocate a GOT for R_SH_DIR32. Allocate fixups
for R_SH_DIR32.
(sh_elf_copy_private_data): Copy PT_GNU_STACK size.
(sh_elf_merge_private_data): Copy initial flags. Do not clobber
non-mach flags. Set EF_SH_PIC for FDPIC. Reject FDPIC mismatches.
(sh_elf_finish_dynamic_symbol): Do not handle got_funcdesc entries
here. Rename sgot to sgotplt and srel to srelplt. Handle short_plt,
FDPIC descriptors, and got20. Create R_SH_FUNCDESC_VALUE for FDPIC.
Use install_movi20_field. Rename srel to srelgot. Always generate
R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_finish_dynamic_sections): Fill in the GOT pointer in rofixup.
Do not fill in reserved GOT entries for FDPIC. Correct DT_PLTGOT.
Rename sgot to sgotplt. Assert that the right number of rofixups
and dynamic relocations were allocated.
(sh_elf_use_relative_eh_frame, sh_elf_encode_eh_address): New.
(elf_backend_omit_section_dynsym): Use sh_elf_omit_section_dynsym.
(elf_backend_can_make_relative_eh_frame)
(elf_backend_can_make_lsda_relative_eh_frame)
(elf_backend_encode_eh_address): Define.
(TARGET_BIG_SYM, TARGET_BIG_NAME, TARGET_LITTLE_SYM)
(TARGET_LITTLE_NAME, elf_backend_modify_program_headers, elf32_bed):
Redefine for FDPIC vector.
* reloc.c: Add SH FDPIC and movi20 relocations.
* targets.c (_bfd_target_vector): Add FDPIC vectors.
* configure, bfd-in2.h, libbfd.h: Regenerated.
binutils/
* readelf.c (get_machine_flags): Handle EF_SH_PIC and EF_SH_FDPIC.
gas/
* config/tc-sh.c (sh_fdpic): New.
(sh_check_fixup): Handle relocations on movi20.
(parse_exp): Do not reject PIC operators here.
(build_Mytes): Check for unhandled PIC operators here. Use
sh_check_fixup for movi20.
(enum options): Add OPTION_FDPIC.
(md_longopts, md_parse_option, md_show_usage): Add --fdpic.
(sh_fix_adjustable, md_apply_fix): Handle FDPIC and movi20 relocations.
(sh_elf_final_processing): Handle --fdpic.
(sh_uclinux_target_format): New.
(sh_parse_name): Handle FDPIC relocation operators.
* config/tc-sh.h (TARGET_FORMAT): Define specially for TE_UCLINUX.
(sh_uclinux_target_format): Declare for TE_UCLINUX.
* configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): Set
em=uclinux.
* doc/c-sh.texi (SH Options): Document --fdpic.
gas/testsuite/
* gas/sh/basic.exp: Run new tests. Handle uClinux like Linux.
* gas/sh/fdpic.d: New file.
* gas/sh/fdpic.s: New file.
* gas/sh/reg-prefix.d: Force big-endian.
* gas/sh/sh2a-pic.d: New file.
* gas/sh/sh2a-pic.s: New file.
* lib/gas-defs.exp (is_elf_format): Include sh*-*-uclinux*.
include/elf/
* sh.h (EF_SH_PIC, EF_SH_FDPIC): Define.
(R_SH_FIRST_INVALID_RELOC_6, R_SH_LAST_INVALID_RELOC_6): New. Adjust
other invalid ranges.
(R_SH_GOT20, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20)
(R_SH_GOTOFFFUNCDESC, R_SH_GOTOFFFUNCDESC20, R_SH_FUNCDESC)
(R_SH_FUNCDESC_VALUE): New.
ld/
* Makefile.am (ALL_EMULATIONS): Add eshelf_fd.o and eshlelf_fd.o.
(eshelf_fd.c, eshlelf_fd.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh-*-uclinux*): Add shelf_fd and shlelf_fd
emulations.
* emulparams/shelf_fd.sh: New file.
* emulparams/shlelf_fd.sh: New file.
* emulparams/shlelf_linux.sh: Update comment.
ld/testsuite/
* ld-sh/sh.exp: Handle uClinux like Linux.
* lib/ld-lib.exp (is_elf_format): Include sh*-*-uclinux*.
* ld-sh/fdpic-funcdesc-shared.d: New file.
* ld-sh/fdpic-funcdesc-shared.s: New file.
* ld-sh/fdpic-funcdesc-static.d: New file.
* ld-sh/fdpic-funcdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesc-shared.d: New file.
* ld-sh/fdpic-gotfuncdesc-shared.s: New file.
* ld-sh/fdpic-gotfuncdesc-static.d: New file.
* ld-sh/fdpic-gotfuncdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotfuncdesci20-static.d: New file.
* ld-sh/fdpic-gotfuncdesci20-static.s: New file.
* ld-sh/fdpic-goti20-shared.d: New file.
* ld-sh/fdpic-goti20-shared.s: New file.
* ld-sh/fdpic-goti20-static.d: New file.
* ld-sh/fdpic-goti20-static.s: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesc-static.d: New file.
* ld-sh/fdpic-gotofffuncdesc-static.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.s: New file.
* ld-sh/fdpic-gotoffi20-shared.d: New file.
* ld-sh/fdpic-gotoffi20-shared.s: New file.
* ld-sh/fdpic-gotoffi20-static.d: New file.
* ld-sh/fdpic-gotoffi20-static.s: New file.
* ld-sh/fdpic-plt-be.d: New file.
* ld-sh/fdpic-plt-le.d: New file.
* ld-sh/fdpic-plt.s: New file.
* ld-sh/fdpic-plti20-be.d: New file.
* ld-sh/fdpic-plti20-le.d: New file.
* ld-sh/fdpic-stack-default.d: New file.
* ld-sh/fdpic-stack-size.d: New file.
* ld-sh/fdpic-stack.s: New file.
|
||
|
H.J. Lu
|
18ae9cc1db |
Implement generic SHF_EXCLUDE.
bfd/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * elf.c (_bfd_elf_make_section_from_shdr): Handle SHF_EXCLUDE (elf_fake_sections): Likewise. * elf32-i370.c (i370_elf_section_from_shdr): Don't handle SHF_EXCLUDE here. * elf32-ppc.c (ppc_elf_fake_sections): Likewise. binutils/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * readelf.c (get_elf_section_flags): Treat SHF_EXCLUDE as a generic flag. binutils/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * binutils-all/objcopy.exp: Run exclude-1a and exclude-1b for ELF targets. * binutils-all/exclude-1.s: New. * binutils-all/exclude-1a.d: Likewise. * binutils-all/exclude-1b.d: Likewise. gas/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * obj-elf.c (obj_elf_change_section): Handle SHF_EXCLUDE. (obj_elf_parse_section_letters): Likewise. (obj_elf_section_word): Likewise. * config/tc-ppc.c (ppc_section_letter): Removed. (ppc_section_word): Likewise. * config/tc-ppc.h (ppc_section_letter): Likewise. (ppc_section_word): Likewise. (md_elf_section_letter): Likewise. (md_elf_section_word): Likewise. * doc/as.texinfo: Document `e' and `#exclude'. gas/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * gas/elf/elf.exp: Run section8. * gas/elf/section8.d: New. * gas/elf/section8.s: Likewise. include/elf/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * common.h (SHF_EXCLUDE): New. * i370.h (SHF_EXCLUDE): Removed. * or32.h (SHF_EXCLUDE): Likewise. * ppc.h (SHF_EXCLUDE): Likewise. * sparc.h (SHF_EXCLUDE): Likewise. ld/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * ld-elf/exclude3.s: New. * ld-elf/exclude3a.d: Likewise. * ld-elf/exclude3b.d: Likewise. * ld-elf/exclude3c.d: Likewise. |
||
|
Alan Modra
|
9a83a5533e |
include/elf/
* internal.h (ELF_SECTION_SIZE): Protect macro args with parentheses. Invert logic to clarify test for .tbss. (ELF_IS_SECTION_IN_SEGMENT): Rename to.. (ELF_SECTION_IN_SEGMENT_1): ..this. Add check_vma param. Protect macro args with parentheses. (ELF_SECTION_IN_SEGMENT): Define. (ELF_IS_SECTION_IN_SEGMENT_FILE): Delete. (ELF_IS_SECTION_IN_SEGMENT_MEMORY): Delete. bfd/ * elf.c: Replace use of ELF_IS_SECTION_IN_SEGMENT and ELF_IS_SECTION_IN_SEGMENT_FILE with ELF_SECTION_IN_SEGMENT throughout file. (assign_file_positions_for_load_sections): Modify section in segment warning to ignore overlay vmas. * elf32-spu.c (spu_elf_object_p): Replace use of ELF_IS_SECTION_IN_SEGMENT_MEMORY with ELF_SECTION_IN_SEGMENT. binutils/ * readelf.c (process_program_headers): Replace use of ELF_IS_SECTION_IN_SEGMENT_MEMORY with ELF_SECTION_IN_SEGMENT. |
||
|
Matthew Gretton-Dann
|
75375b3e00 |
* ld/testsuite/ld-arm/attr-merge-2.attr: Update for changes in attribute output.
* ld/testsuite/ld-arm/attr-merge-3.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-1.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-2.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-3.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likeiwse. * ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-00.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-02.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-04.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-20.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-22.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-40.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-44.d: Likewise. * ld/testsuite/ld-arm/attr-merge.attr: Likewise. * binutils/readelf.c (arm_attr_tag_FP_arch): Rename from arm_attr_tag_VFP_arch. (arm_attr_tag_ABI_align8_needed): Remove. (arm_attr_tag_ABI_align8_preserved): Remove. (arm_attr_tag_ABI_HardFP_use): Update text strings. (arm_attr_public_tags): Add strings for ABI v2.08 attribute tags. (display_arm_attribute): Add decoding of ABI v2.08 attributes. * include/elf/arm.h (Tag_FP_arch, Tag_ABI_align_needed, Tag_ABI_align_preserved, Tag_FP_HP_extension): Add new ABI attribute tags. * gas/config/tc-arm.c (arm_convert_symbolic_attribute): Add support for new tag names in v2.08 of ARM ABI. * gas/doc/c-arm.texi: Document new tag names in ABI. * gas/testsuite/gas/arm/attr-mcpu.d: Update for new attribute tag names. * gas/testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-neon.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/testsuite/gas/arm/attr-names.d: Add test to make sure all attribute names are recognised. * gas/testsuite/gas/arm/attr-names.s: Likewise. |