Bits 20 ~ 23 of CPSR are reserved (RAZ, read as zero), but they are not
zero if the arm program runs on aarch64-linux. AArch64 tracer gets PSTATE
from arm 32-bit tracee as CPSR, but bits 20 ~ 23 are used in PSTATE. I
think kernel should clear these bits when it is read through ptrace, but
the fix in user space is still needed.
This patch fixes these two fails,
-FAIL: gdb.reverse/insn-reverse.exp: ext_reg_push_pop: compare registers on insn 0:vldr d7, [r11, #-12]
-FAIL: gdb.reverse/insn-reverse.exp: ext_reg_push_pop: compare registers on insn 0:vldr d7, [r7]
gdb:
2016-04-22 Yao Qi <yao.qi@linaro.org>
* aarch32-linux-nat.c (aarch32_gp_regcache_supply): Clear CPSR
bits 20 to 23.
gdb/gdbserver:
2016-04-22 Yao Qi <yao.qi@linaro.org>
* linux-aarch32-low.c (arm_store_gregset): Clear CPSR bits 20
to 23.
Fix the compilation failure by including arch/arm-linux.h in
aarch32-linux-nat.c.
gdb:
2016-04-20 Yao Qi <yao.qi@linaro.org>
* aarch32-linux-nat.c: Include "arch/arm-linux.h".
This patch is to move all the code about transferring
regcache <-> byte buffer for arm (aarch32) to a separate file
aarch32-linux-nat.c. Then, in the following patch, aarch64 code
can use it to do multi-arch debugging. This is a refactory patch.
gdb:
2015-07-07 Yao Qi <yao.qi@linaro.org>
* aarch32-linux-nat.c: New file.
* aarch32-linux-nat.h: New file.
* arm-linux-nat.c: Include aarch32-linux-nat.h.
(fetch_regs): Move code to aarch32-linux-nat.c. Call
aarch32_gp_regcache_supply.
(store_regs): Move code to aarch32-linux-nat.c. Call
aarch32_gp_regcache_collect.
(fetch_vfp_regs): Move code to aarch32-linux-nat.c. Call
aarch32_vfp_regcache_supply.
(store_vfp_regs): Move code to aarch32-linux-nat.c. Call
aarch32_vfp_regcache_collect.
* config/arm/linux.mh (NATDEPFILES): Add aarch32-linux-nat.o.
