This patch is to split the loop of calling gdbarch_addr_bits_remove
and insert_single_step_breakpoint into two loops.
gdb:
2016-11-08 Yao Qi <yao.qi@linaro.org>
* arm-linux-tdep.c (arm_linux_software_single_step): Write
adjusted address back to vector. Call insert_single_step_breakpoint
in a new loop.
* arm-tdep.c (arm_software_single_step): Likewise.
Both of them are used in conversion. We can remove them since the
conversion is done.
There are many architectures only have one breakpoint instruction,
so their gdbarch methods breakpoint_kind_from_pc and
sw_breakpoint_from_kind look very similar. Instead of macro, we
use template "template <size_t, const gdb_byte *> struct bp_manipulation"
for these architectures. In order to use template, I also change
breakpoint instruction of type "static const gdb_byte[]" to
"constexpr gdb_byte[]", and rename them to ARCH_break_insn.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
Pedro Alves <palves@redhat.com>
* aarch64-tdep.c (aarch64_default_breakpoint): Change it to
constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(aarch64_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* alpha-tdep.c (break_insn): Rename to alpha_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(alpha_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* arc-tdep.c (arc_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* arch-utils.h (GDBARCH_BREAKPOINT_MANIPULATION): Remove.
(struct bp_manipulation): New.
(SET_GDBARCH_BREAKPOINT_MANIPULATION): Remove.
(struct bp_manipulation_endian): New.
(BP_MANIPULATION): New.
(BP_MANIPULATION_ENDIAN): New.
* arm-tdep.c (arm_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* avr-tdep.c (avr_break_insn): Change it constexpr.
(avr_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* bfin-tdep.c (bfin_gdbarch_init): Likewise.
* cris-tdep.c (cris_gdbarch_init): Likewise.
* frv-tdep.c (breakpoint): Rename it to frv_break_insn, and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(frv_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* ft32-tdep.c (breakpoint): Rename it to ft32_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(ft32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* h8300-tdep.c (breakpoint): Rename it to h8300_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(h8300_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* hppa-tdep.c (breakpoint): Rename it to h8300_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(hppa_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* i386-tdep.c (break_insn): Rename it to i386_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(i386_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* iq2000-tdep.c (iq2000_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* lm32-tdep.c (breakpoint): Rename it to lm32_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(lm32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m32c-tdep.c (break_insn): Rename it to m32c_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m32c_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m32r-tdep.c (m32r_gdbarch_init): Likewise.
* m68hc11-tdep.c (breakpoint): Rename it to m68hc11_break_insn and
change its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m68hc11_gdbarch_init): Don't use SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m68k-tdep.c (break_insn): Rename it to m68k_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m68k_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m88k-tdep.c (break_insn): Rename it to m88k_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m88k_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* mep-tdep.c (breakpoint): Rename it to mep_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(mep_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* microblaze-tdep.c (break_insn): Rename it to
microblaze_break_insn and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(microblaze_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* mips-tdep.c (mips_gdbarch_init): Likewise.
* mn10300-tdep.c (breakpoint): Rename it to mn10300_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(mn10300_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* moxie-tdep.c (breakpoint): Rename it to moxie_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(moxie_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* msp430-tdep.c (breakpoint): Rename it to msp430_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(msp430_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* mt-tdep.c (mt_gdbarch_init): Likewise.
* nds32-tdep.c (break_insn): Rename it to nds32_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(nds32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* nios2-tdep.c (nios2_gdbarch_init): Likewise.
* rl78-tdep.c (breakpoint): Rename it to rl78_break_ins
and change its type to rl78_break_insn. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(rl78_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* rs6000-tdep.c (big_breakpoint): Change its type to
constexpr.
(little_breakpoint): Likewise.
Don't use GDBARCH_BREAKPOINT_MANIPULATION_ENDIAN.
(rs6000_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* rx-tdep.c (breakpoint): Rename it to rx_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(rx_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* s390-linux-tdep.c (breakpoint): Rename it to s390_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION
(s390_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* score-tdep.c (score_gdbarch_init): Likewise.
* sh-tdep.c (sh_gdbarch_init): Likewise.
* sh64-tdep.c (sh64_gdbarch_init): Likewise.
* sparc-tdep.c (break_insn): Rename it to sparc_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(sparc32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* spu-tdep.c (breakpoint): Rename it to spu_break_insn and change
its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(spu_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* tic6x-tdep.c (tic6x_gdbarch_init): Likewise.
* tilegx-tdep.c (breakpoint): Rename it to tilegx_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(tilegx_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* v850-tdep.c (v850_gdbarch_init): Likewise.
* vax-tdep.c (break_insn): Rename it to vax_break_insn and
change its type to constexpr.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(vax_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* xstormy16-tdep.c (breakpoint): Rename it to
xstormy16_break_insn and change its type to constexpr.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(xstormy16_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* xtensa-tdep.c (xtensa_gdbarch_init): Likewise.
GDB can determine the kind of single step breakpoint by gdbarch
breakpoint_kind_from_current_state, so global variable
arm_override_mode is no longer needed. This patch removes it.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_override_mode): Remove.
(arm_pc_is_thumb): Update.
(arm_insert_single_step_breakpoint): Update.
This patch adds a new gdbarch method breakpoint_kind_from_current_state
for single step breakpoint, and uses it in breakpoint_kind.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arch-utils.c (default_breakpoint_kind_from_current_state):
New function.
* arch-utils.h (default_breakpoint_kind_from_current_state):
Declare.
* arm-tdep.c (arm_breakpoint_kind_from_current_state): New
function.
(arm_gdbarch_init): Call
set_gdbarch_breakpoint_kind_from_current_state.
* breakpoint.c (breakpoint_kind): Call
gdbarch_breakpoint_kind_from_current_state for single step
breakpoint. Update comments.
* gdbarch.sh (breakpoint_kind_from_current_state): New.
* gdbarch.c, gdbarch.h: Regenerate.
This patch adds two gdbarch methods breakpoint_kind_from_pc and
sw_breakpoint_from_kind, and uses target_info.placed_size as "kind"
of the breakpoint. This patch updates the usages of
target_info.placed_size.
The "kind" of a breakpoint is determined by gdbarch rather than
target, so we have gdbarch method breakpoint_kind_from_pc, and we
should set target_info.placed_size out of each implementation of
target to_insert_breakpoint. In this way, each target doesn't have
to set target_info.placed_size any more.
This patch also sets target_info.placed_address before
target_insert_breakpoint too, so that target to_insert_breakpoint
can use it, see record_full_insert_breakpoint.
Before we call target_insert_breakpoint, we set
target_info.placed_address and target_info.placed_size like this,
CORE_ADDR addr = bl->target_info.reqstd_address;
bl->target_info.placed_size = gdbarch_breakpoint_kind_from_pc (bl->gdbarch, &addr);
bl->target_info.placed_address = addr;
return target_insert_breakpoint (bl->gdbarch, &bl->target_info);
target_insert_breakpoint may fail, but it doesn't matter to the "kind"
and "placed_address" of a breakpoint. They should be determined by
gdbarch.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arch-utils.h (GDBARCH_BREAKPOINT_MANIPULATION): Define
breakpoint_kind_from_pc and sw_breakpoint_from_kind.
(GDBARCH_BREAKPOINT_MANIPULATION_ENDIAN): Likewise.
(SET_GDBARCH_BREAKPOINT_MANIPULATION): Call
set_gdbarch_breakpoint_kind_from_pc and
set_gdbarch_sw_breakpoint_from_kind.
* arm-tdep.c: Add comments.
* bfin-tdep.c: Likewise.
* breakpoint.c (breakpoint_kind): New function.
(insert_bp_location): Set target_info.placed_size and
target_info.placed_address.
(bkpt_insert_location): Likewise.
* cris-tdep.c: Add comments.
* gdbarch.sh (breakpoint_kind_from_pc): New.
(sw_breakpoint_from_kind): New.
* gdbarch.c, gdbarch.h: Regenerated.
* ia64-tdep.c (ia64_memory_insert_breakpoint): Don't set
bp_tgt->placed_size.
(ia64_memory_remove_breakpoint): Don't assert
bp_tgt->placed_size.
(ia64_breakpoint_kind_from_pc): New function.
(ia64_gdbarch_init): Install ia64_breakpoint_kind_from_pc.
* m32r-tdep.c (m32r_memory_insert_breakpoint): Don't set
bp_tgt->placed_size.
* mem-break.c (default_memory_insert_breakpoint): Don't set
bp_tgt->placed_size. Call gdbarch_sw_breakpoint_from_kind.
(default_memory_remove_breakpoint): Call
gdbarch_sw_breakpoint_from_kind.
(memory_validate_breakpoint): Don't check bp_tgt->placed_size.
* mips-tdep.c: Add comments.
* mt-tdep.c: Likewise.
* nios2-tdep.c: Likewise.
* record-full.c (record_full_insert_breakpoint): Don't call
gdbarch_breakpoint_from_pc. Don't set bp_tgt->placed_address
and bp_tgt->placed_size.
* remote.c (remote_insert_breakpoint): Don't call
gdbarch_remote_breakpoint_from_pc. Use bp_tgt->placed_size.
Don't set bp_tgt->placed_address and bp_tgt->placed_size.
(remote_insert_hw_breakpoint): Likewise.
* score-tdep.c: Likewise.
* sh-tdep.c: Likewise.
* tic6x-tdep.c: Likewise.
* v850-tdep.c: Likewise.
* xtensa-tdep.c: Likewise.
This patch replaces many (but not all) uses of
make_cleanup_restore_integer with a simple RAII-based template class.
It also removes the similar restore_execution_direction cleanup in
favor of this new class. Subsequent patches will replace other
similar cleanups with this class.
The class is typically instantiated using make_scoped_restore. This
allows for template argument deduction.
2016-10-21 Tom Tromey <tom@tromey.com>
* common/scoped_restore.h: New file.
* utils.h: Include scoped_restore.h.
* top.c (execute_command_to_string): Use scoped_restore.
* python/python.c (python_interactive_command): Use
scoped_restore.
(python_command, execute_gdb_command): Likewise.
* printcmd.c (do_one_display): Use scoped_restore.
* mi/mi-main.c (exec_continue): Use scoped_restore.
* mi/mi-cmd-var.c (mi_cmd_var_assign): Use scoped_restore.
* linux-fork.c (checkpoint_command): Use scoped_restore.
* infrun.c (restore_execution_direction): Remove.
(fetch_inferior_event): Use scoped_restore.
* compile/compile.c (compile_file_command): Use
scoped_restore.
(compile_code_command, compile_print_command): Likewise.
* cli/cli-script.c (execute_user_command): Use
scoped_restore.
(while_command, if_command, script_from_file): Likewise.
* arm-tdep.c (arm_insert_single_step_breakpoint): Use
scoped_restore.
This patch shares "enum arm_breakpoint_kinds", and use ARM_BP_KIND_THUMB2
in GDB.
gdb:
2016-10-10 Yao Qi <yao.qi@linaro.org>
* arch/arm.h (enum arm_breakpoint_kinds): New.
* arm-tdep.c (arm_remote_breakpoint_from_pc): Use
ARM_BP_KIND_THUMB2.
gdb/gdbserver:
2016-10-10 Yao Qi <yao.qi@linaro.org>
* linux-aarch32-low.c (enum arm_breakpoint_kinds): Remove.
This patch is move features/arm-*.xml to features/arm/, and it is based
on Terry's patch posted here
https://sourceware.org/ml/gdb-patches/2014-06/msg00794.html
One comment to Terry's patch is about losing "arm" prefix, and the new
patch fixes this problem.
gdb:
2016-10-05 Terry Guo <terry.guo@arm.com>
Yao Qi <yao.qi@linaro.org>
* arm-tdep.c: Adjust includes.
* features/Makefile (WHICH): Add "arm/" directory to arm
target descriptions.
(XMLTOC): Likewise.
(arm/arm-with-iwmmxt.dat): Adjust the path for
dependencies.
* features/arm-core.xml: Moved to ...
* features/arm/arm-core.xml: ... it.
* features/arm-fpa.xml: Moved to ...
* features/arm/arm-fpa.xml: ... it.
* features/arm-m-profile.xml: Moved to ...
* features/arm/arm-m-profile.xm: ... it.
* features/arm-vfpv2.xml: Moved to ...
* features/arm/arm-vfpv2.xm: ... it.
* features/arm-vfpv3.xml: Moved to ...
* features/arm/arm-vfpv3.xml: ... it.
* features/arm-with-iwmmxt.c: Moved to ...
* features/arm/arm-with-iwmmxt.c: ... it.
* features/arm-with-iwmmxt.xml: Moved to ...
* features/arm/arm-with-iwmmxt.xml: ... it.
* features/arm-with-m-fpa-layout.c: Moved to ...
* features/arm/arm-with-m-fpa-layout.c: ... it.
* features/arm-with-m-fpa-layout.xml: Moved to ...
* features/arm/arm-with-m-fpa-layout.xml: ... it.
* features/arm-with-m-vfp-d16.c: Moved to ...
* features/arm/arm-with-m-vfp-d16.c: ... it.
* features/arm-with-m-vfp-d16.xml: Moved to ...
* features/arm/arm-with-m-vfp-d16.xml: ... it.
* features/arm-with-m.c: Moved to ...
* features/arm/arm-with-m.c: ... it.
* features/arm-with-m.xml: Moved to ...
* features/arm/arm-with-m.xm: ... it.
* features/arm-with-neon.c: Moved to ...
* features/arm/arm-with-neon.c: ... it.
* features/arm-with-neon.xml: Moved to ...
* features/arm/arm-with-neon.xml: ... it.
* features/arm-with-vfpv2.c: Moved to ...
* features/arm/arm-with-vfpv2.c: ... it.
* features/arm-with-vfpv2.xml: Moved to ...
* features/arm/arm-with-vfpv2.xml: ... it.
* features/arm-with-vfpv3.c: Moved to ...
* features/arm/arm-with-vfpv3.c: ... it.
* features/arm-with-vfpv3.xml: Moved to ...
* features/arm/arm-with-vfpv3.xml: ... it.
* features/xscale-iwmmxt.xml: Moved to ...
* features/arm/xscale-iwmmxt.xml: ... it.
gdb/gdbserver:
2016-10-05 Terry Guo <terry.guo@arm.com>
Yao Qi <yao.qi@linaro.org>
* Makefile.in: Adjust the path of rules.
* configure.srv: Update the path of xml files.
* regformats/arm-with-iwmmxt.dat: Regenerated.
* regformats/arm-with-neon.dat: Likewise.
* regformats/arm-with-vfpv2.dat: Likewise.
* regformats/arm-with-vfpv3.dat Likewise.
On ARMv6-M and ARMv7-M, the exception return address is sort of magic
address defined by the manual. This patch is to let GDB well handle
these magic addresses.
2016-09-27 Fredrik Hederstierna <fredrik.hederstierna@verisure.com>
* arm-tdep.c (arm_m_addr_is_magic): New function.
(arm_addr_bits_remove): Call arm_m_addr_is_magic.
(arm_m_exception_unwind_sniffer): Likewise.
When GDB determines whether type T can be part of candidate for
passing and returning in VFP registers, it calls
arm_vfp_cprc_sub_candidate recursively. However, if type T has
self-reference field, like,
class C
{
static C s;
};
arm_vfp_cprc_sub_candidate won't return. This fix is to skip calling
arm_vfp_cprc_sub_candidate if the field is static.
gdb:
2016-07-06 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_vfp_cprc_sub_candidate): Don't call
arm_vfp_cprc_sub_candidate for static field.
Nowadays, GDB can't insert breakpoint on the return address of the
exception handler on ARM M-profile, because the address is a magic
one 0xfffffff9,
(gdb) bt
#0 CT32B1_IRQHandler () at ../src/timer.c:67
#1 <signal handler called>
#2 main () at ../src/timer.c:127
(gdb) info frame
Stack level 0, frame at 0x200ffa8:
pc = 0x4ec in CT32B1_IRQHandler (../src/timer.c:67); saved pc = 0xfffffff9
called by frame at 0x200ffc8
source language c.
Arglist at 0x200ffa0, args:
Locals at 0x200ffa0, Previous frame's sp is 0x200ffa8
Saved registers:
r7 at 0x200ffa0, lr at 0x200ffa4
(gdb) x/x 0xfffffff9
0xfffffff9: Cannot access memory at address 0xfffffff9
(gdb) finish
Run till exit from #0 CT32B1_IRQHandler () at ../src/timer.c:67
Ed:15: Target error from Set break/watch: Et:96: Pseudo-address (0xFFFFFFxx) for EXC_RETURN is invalid (GDB error?)
Warning:
Cannot insert hardware breakpoint 0.
Could not insert hardware breakpoints:
You may have requested too many hardware breakpoints/watchpoints.
Command aborted.
even some debug probe can't set hardware breakpoint on the magic
address too,
(gdb) hbreak *0xfffffff9
Hardware assisted breakpoint 2 at 0xfffffff9
(gdb) c
Continuing.
Ed:15: Target error from Set break/watch: Et:96: Pseudo-address (0xFFFFFFxx) for EXC_RETURN is invalid (GDB error?)
Warning:
Cannot insert hardware breakpoint 2.
Could not insert hardware breakpoints:
You may have requested too many hardware breakpoints/watchpoints.
Command aborted.
The problem described above is quite similar to PR 8841, in which GDB
can't set breakpoint on signal trampoline, which is mapped to a read-only
page by kernel. The rationale of this patch is to skip "unwritable"
frames when looking for caller frames in command "finish", and a new
gdbarch method code_of_frame_writable is added. This patch fixes
the problem on ARM cortex-m target, but it can be used to fix
PR 8841 too.
gdb:
2016-05-10 Yao Qi <yao.qi@arm.com>
* arch-utils.c (default_code_of_frame_writable): New function.
* arch-utils.h (default_code_of_frame_writable): Declare.
* arm-tdep.c (arm_code_of_frame_writable): New function.
(arm_gdbarch_init): Install gdbarch method
code_of_frame_writable if the target is M-profile.
* frame.c (skip_unwritable_frames): New function.
* frame.h (skip_unwritable_frames): Declare.
* gdbarch.sh (code_of_frame_writable): New.
* gdbarch.c, gdbarch.h: Re-generated.
* infcmd.c (finish_command): Call skip_unwritable_frames.
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (elf32_arm_size_stubs): Use new macros
ARM_GET_SYM_BRANCH_TYPE and ARM_SET_SYM_BRANCH_TYPE to respectively get
and set branch type of a symbol.
(bfd_elf32_arm_process_before_allocation): Likewise.
(elf32_arm_relocate_section): Likewise and fix identation along the
way.
(allocate_dynrelocs_for_symbol): Likewise.
(elf32_arm_finish_dynamic_symbol): Likewise.
(elf32_arm_swap_symbol_in): Likewise.
(elf32_arm_swap_symbol_out): Likewise.
gas/
* config/tc-arm.c (arm_adjust_symtab): Use ARM_SET_SYM_BRANCH_TYPE to
set branch type of a symbol.
gdb/
* arm-tdep.c (arm_elf_make_msymbol_special): Use
ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.
include/
* arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
enumerator.
(NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
(ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
(ARM_SYM_BRANCH_TYPE): Replace by ...
(ARM_GET_SYM_BRANCH_TYPE): This and ...
(ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
BFD_ASSERT is defined or not.
ld/
* emultempl/armelf.em (gld${EMULATION_NAME}_finish): Use
ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.
opcodes/
* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
branch type of a symbol.
(print_insn): Likewise.
2016-04-18 Yao Qi <yao.qi@linaro.org>
Revert:
2016-04-15 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (thumb_stack_frame_destroyed_p): Return zero if
PC is far from the end of function.
thumb_stack_frame_destroyed_p scans the instructions from PC to the
end of the function, but if PC is far from the end of pc, we don't
have to scan, because PC should be in epilogue if it is still
far from the end of the function. The criterion I use here is 16
bytes, which is more than 4 instructions.
Regression tested on aarch64-linux with mutli-arch debug.
gdb:
2016-04-15 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (thumb_stack_frame_destroyed_p): Return zero if
PC is far from the end of function.
Variable 'func''s type is CORE_ADDR, so it should be compared with 0
rather than NULL. This causes a build error.
This patch fixes this.
gdb:
2016-03-30 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_epilogue_frame_this_id): Check 'func' against
0 rather than NULL.
Nowadays, GDB can't unwind successfully from epilogue on arm,
(gdb) bt
#0 0x76ff65a2 in shr1 () from /home/yao/Source/gnu/build/gdb/testsuite/gdb.reverse/shr1.sl
#1 0x0000869e in main () at /home/yao/Source/gnu/build/gdb/testsuite/../../../binutils-gdb/gdb/testsuite/gdb.reverse/solib-reverse.c:34
Backtrace stopped: previous frame inner to this frame (corrupt stack?)
(gdb) disassemble shr1
Dump of assembler code for function shr1:
....
0x76ff659a <+10>: adds r7, #12
0x76ff659c <+12>: mov sp, r7
0x76ff659e <+14>: ldr.w r7, [sp], #4
0x76ff65a2 <+18>: bx lr
End of assembler dump.
in this case, prologue unwinder is used. It analyzes the prologue and
get the offsets of saved registers to SP. However, in epilogue, the
SP has been restored, prologue unwinder gets the registers from the
wrong address, and even the frame id is wrong.
In reverse debugging, this case (program stops at the last instruction
of function) happens quite frequently due to the reverse execution.
There are many test fails due to missing epilogue unwinder.
This adds epilogue unwinder, but the frame cache is still get by
prologue unwinder except that SP is fixed up separately, because SP
is restored in epilogue.
This patch fixes many fails in solib-precsave.exp, and solib-reverse.exp.
gdb:
2016-03-30 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c: (arm_make_epilogue_frame_cache): New function.
(arm_epilogue_frame_this_id): New function.
(arm_epilogue_frame_prev_register): New function.
(arm_epilogue_frame_sniffer): New function.
(arm_epilogue_frame_unwind): New.
(arm_gdbarch_init): Append unwinder arm_epilogue_frame_unwind.
This patch is to refactor arm_stack_frame_destroyed_p, so that the code
can be used in both arm_stack_frame_destroyed_p and arm epilogue
unwinder I am going to add in the next patch. In fact, the code
is the same in two places, but checking whether it is thumb mode
is slightly different. arm_stack_frame_destroyed_p uses
arm_pc_is_thumb, and epilogue unwinder should use arm_frame_is_thumb.
gdb:
2016-03-30 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_stack_frame_destroyed_p): Rename it ...
(arm_stack_frame_destroyed_p_1): ... here. Don't call
arm_pc_is_thumb.
(arm_stack_frame_destroyed_p): Call
thumb_stack_frame_destroyed_p and
arm_stack_frame_destroyed_p_1.
This patch is to support some ARM median instructions in process
record. With this patch applied, these fails are fixed:
-FAIL: gdb.reverse/break-precsave.exp: run to end of main
-FAIL: gdb.reverse/break-precsave.exp: go to end of main forward
-FAIL: gdb.reverse/break-precsave.exp: end of record log
-FAIL: gdb.reverse/break-reverse.exp: continue to breakpoint: end
-FAIL: gdb.reverse/break-reverse.exp: end of record log
-FAIL: gdb.reverse/until-precsave.exp: run to end of main
-FAIL: gdb.reverse/until-precsave.exp: advance to marker2
-FAIL: gdb.reverse/until-precsave.exp: until func, not called by current frame
-FAIL: gdb.reverse/until-precsave.exp: reverse-advance to marker2
-FAIL: gdb.reverse/until-precsave.exp: reverse-finish from marker2
-FAIL: gdb.reverse/until-precsave.exp: reverse-advance to final return of factorial
-FAIL: gdb.reverse/until-precsave.exp: reverse-until to entry of factorial
-FAIL: gdb.reverse/until-reverse.exp: advance to marker2
-FAIL: gdb.reverse/until-reverse.exp: until func, not called by current frame
-FAIL: gdb.reverse/until-reverse.exp: reverse-advance to marker2
-FAIL: gdb.reverse/until-reverse.exp: reverse-finish from marker2
-FAIL: gdb.reverse/until-reverse.exp: reverse-advance to final return of factorial
-FAIL: gdb.reverse/until-reverse.exp: reverse-until to entry of factorial
gdb:
2016-03-21 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_record_media): New.
(arm_record_ld_st_reg_offset): Call arm_record_media.
ARM process record gets the wrong register number for VMOV (from core
register to single-precision register). That is, we should record
the D register rather than the S pseudo register. The patch also
removes the condition "bit (arm_insn_r->arm_insn, 20)" check, which
has been checked above.
It fixes the following internal error,
(gdb) PASS: gdb.reverse/finish-precsave.exp: BP at end of main
continue^M
Continuing.^M
../../binutils-gdb/gdb/regcache.c:649: internal-error: regcache_raw_read: Assertion `regnum >= 0 && regnum < regcache->descr->nr_raw_registers' failed.^M
A problem internal to GDB has been detected,FAIL: gdb.reverse/finish-precsave.exp: run to end of main (GDB internal error)
gdb:
2016-03-04 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_record_vdata_transfer_insn): Simplify the
condition check. Record the right D register number.
This patch removes the printing "Process record does not support",
and do the print by calling arm_record_unsupported_insn in the
caller. Also, call arm_record_extension_space only when condition
is 0xf.
gdb:
2016-03-04 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_record_extension_space): Remove code
printing "Process record does not support".
(arm_record_data_proc_misc_ld_str): Likewise.
(decode_insn): Call arm_record_extension_space if condition
is 0xf. Call arm_record_unsupported_insn if ret isn't
ARM_RECORD_SUCCESS. Use 'ret' instead of 'insn_id' to hold
the value of thumb2_record_decode_insn_handler.
This patch fixes various bugs in arm_record_exreg_ld_st_insn, and use
gdb.reverse/insn-reverse.c to test more arm instructions.
- Set flag SINGLE_REG correctly. In the arch reference manual,
SING_REG is true when the bit 8 of instruction is zero.
- Record the right D registers for instructions changing S registers.
- Fix the order of length and address in record_buf_mem array.
- Shift the offset by 2 instead of by 24.
This patch also fixes one internal error,
(gdb) PASS: gdb.reverse/finish-precsave.exp: BP at end of main
continue^M
Continuing.^M
../../binutils-gdb/gdb/utils.c:1072: internal-error: virtual memory exhausted.^M
A problem internal to GDB has been detected,FAIL: gdb.reverse/finish-precsave.exp: run to end of main (GDB internal error)
gdb:
2016-02-26 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_record_exreg_ld_st_insn): Set 'single_reg'
per bit 8. Check bit 20 instead of bit 4 for VMOV
instruction. Record D registers for instructions changing
S registers. Change of the order of length and address
in record_buf_mem array.
gdb/testsuite:
2016-02-26 Yao Qi <yao.qi@linaro.org>
* gdb.reverse/insn-reverse.c [__arm__] (ext_reg_load): New.
[__arm__] (ext_reg_mov, ext_reg_push_pop): New.
(testcases): Update.
When GDB decodes these thumb special data instructions, such as 'mov sp, r7'
the Rd is got incorrectly. According to the arch reference manual, the Rd
is DN:Rdn, in which DN is bit 7 and Rdn is bits 0 to 2. This patch fixes it.
gdb:
2016-02-26 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (thumb_record_ld_st_reg_offset): Fix the register
number of Rd.
This patch fixes the various code format issues in arm process record
in arm-tdep.c, such as using tab instead of spaces.
gdb:
2016-02-22 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c: Fix code format issues.
Method syscall_next_pc of struct arm_get_next_pcs_ops has an argument
PC, which is not necessary, because PC can be got from regcache in
'struct arm_get_next_pcs'. This patch removes the PC argument of
syscall_next_pc.
gdb:
2016-02-16 Yao Qi <yao.qi@linaro.org>
* arch/arm-get-next-pcs.h (struct arm_get_next_pcs_ops)
<syscall_next_pc>: Remove argument PC. Callers updated.
* arm-linux-tdep.c (arm_linux_get_next_pcs_syscall_next_pc):
Remove argument PC. Get pc from regcache_read_pc.
* arm-tdep.c (arm_get_next_pcs_syscall_next_pc): Remove
argument PC.
gdb/gdbserver:
2016-02-16 Yao Qi <yao.qi@linaro.org>
* linux-arm-low.c (get_next_pcs_syscall_next_pc): Remove argument
PC. Get pc from regcache_read_pc.
When I exercise GDBserver software single step, I see the following
error, which has been already handled by GDB properly.
In GDBserver log, we can see, GDBserver tries to single step instruction
on 0xb6e0a6e4, and destination address is 0xffff0fe0,
stop pc is 0xb6e0a6e4
Writing f001f0e7 to 0xffff0fe0 in process 7132
Failed to insert breakpoint at 0xffff0fe0 (Input/output error).
Failed to insert breakpoint at 0xffff0fe0 (-1).
(gdb) disassemble __aeabi_read_tp,+8
Dump of assembler code from 0xb6e0a6e0 to 0xb6e0a6e8:
0xb6e0a6e0 <__aeabi_read_tp+0>: mvn r0, #61440 ; 0xf000
0xb6e0a6e4 <__aeabi_read_tp+4>: sub pc, r0, #31
however, it fails inserting breakpoint there. This problem has already
fixed by GDB, see comments in arm-linux-tdep.c:arm_linux_software_single_step
/* The Linux kernel offers some user-mode helpers in a high page. We can
not read this page (as of 2.6.23), and even if we could then we
couldn't set breakpoints in it, and even if we could then the atomic
operations would fail when interrupted. They are all called as
functions and return to the address in LR, so step to there
instead. */
so we need to do the same thing in GDB side as well. This patch adds
a new field fixup in arm_get_next_pcs_ops, so that we can fix up PC
for arm-linux target. In this way, both GDB and GDBserver can single
step instructions going to kernel helpers.
gdb:
2016-02-12 Yao Qi <yao.qi@linaro.org>
* arch/arm-get-next-pcs.c (arm_get_next_pcs): Call
self->ops->fixup if it isn't NULL.
* arch/arm-get-next-pcs.h: Include gdb_vecs.h.
(struct arm_get_next_pcs_ops) <fixup>: New field.
* arch/arm-linux.c: Include common-regcache.h and
arch/arm-get-next-pcs.h.
(arm_linux_get_next_pcs_fixup): New function.
* arch/arm-linux.h (arm_linux_get_next_pcs_fixup): Declare.
* arm-linux-tdep.c (arm_linux_get_next_pcs_ops): Initialize
it with arm_linux_get_next_pcs_fixup.
(arm_linux_software_single_step): Move code to
arm_linux_get_next_pcs_fixup.
* arm-tdep.c (arm_get_next_pcs_ops): Initialize it.
gdb/gdbserver:
2016-02-12 Yao Qi <yao.qi@linaro.org>
* linux-arm-low.c (get_next_pcs_ops): Initialize it with
arm_linux_get_next_pcs_fixup.
This function is never used, since it is superseded by
arm_linux_displaced_step_copy_insn.
gdb/ChangeLog:
* arm-tdep.c (arm_displaced_step_copy_insn): Remove.
(ARM displaced stepping support): Remove reference to
arm_displaced_step_copy_insn in comment.
* arm-tdep.h (arm_displaced_step_copy_insn): Remove.
* arm-linux-tdep.c (arm_linux_displaced_step_copy_insn): Remove
reference to arm_displaced_step_copy_insn in comment.
Almost obvious... change the type of some insn parameters, so that it
matches the rest of the code.
gdb/ChangeLog:
* arm-tdep.c (thumb_copy_unmodified_16bit): Change type of insn.
(thumb_copy_b): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
Nowadays, get_next_pcs in linux_target_ops has two parameters PC
and REGCACHE. Parameter PC looks redundant because it can be go
from REGCACHE. The patch is to remove PC from the arguments for
various functions.
gdb:
2016-01-26 Yao Qi <yao.qi@linaro.org>
* arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw):
Remove argument pc. Get pc by regcache_read_pc. Callers updated.
(arm_deal_with_atomic_sequence_raw): Likewise.
(thumb_get_next_pcs_raw): Likewise.
(arm_get_next_pcs_raw): Likewise.
(arm_get_next_pcs): Remove argument pc. Callers updated.
* arch/arm-get-next-pcs.h (arm_get_next_pcs): Update declaration.
gdb/gdbserver:
2016-01-26 Yao Qi <yao.qi@linaro.org>
* linux-arm-low.c (arm_gdbserver_get_next_pcs): Remove argument pc.
* linux-low.c (install_software_single_step_breakpoints): Don't
call regcache_read_pc.
* linux-low.h (struct linux_target_ops) <get_next_pcs>: Remove
argument pc.
Field syscall_next_pc in struct gdbarch_tdep was to calculate the
next pc of syscall instruction. On linux target, syscall_next_pc
is set to arm_linux_syscall_next_pc, to do linux specific things.
However, after we have struct arm_get_next_pcs_ops, we can do the
same thing in struct arm_get_next_pcs_ops field syscall_next_pc,
so syscall_next_pc in struct gdbarch_tdep is not needed any more.
gdb:
2016-01-14 Yao Qi <yao.qi@linaro.org>
* arm-linux-tdep.c (arm_linux_get_next_pcs_syscall_next_pc):
Declare.
(arm_linux_get_next_pcs_ops): Install
arm_linux_get_next_pcs_syscall_next_pc.
(arm_linux_syscall_next_pc): Change to ...
(arm_linux_get_next_pcs_syscall_next_pc): ... it.
(arm_linux_init_abi): Don't set tdep->syscall_next_pc.
* arm-tdep.c (arm_get_next_pcs_syscall_next_pc): Declare.
(arm_get_next_pcs_syscall_next_pc): Make it static. Don't
call tdep->syscall_next_pc.
* arm-tdep.h (struct gdbarch_tdep) <syscall_next_pc>: Remove.
(arm_get_next_pcs_syscall_next_pc): Remove.
This patch makes thumb2_breakpoint static. When writing this patch,
I find the only reason we keep thumb2_breakpoint extern is that it
is used as an argument passed to arm_gdbserver_get_next_pcs. However,
field arm_thumb2_breakpoint is only used in a null check in
thumb_get_next_pcs_raw, so I wonder why do need to pass thumb2_breakpoint
to arm_gdbserver_get_next_pcs.
thumb2_breakpoint was added by Daniel Jacobowitz in order to support
single-step IT block
https://sourceware.org/ml/gdb-patches/2010-01/msg00624.html the logic
there was if we have 32-bit thumb-2 breakpoint defined, we can safely
single-step IT block, otherwise, we can't. Daniel didn't want to use
16-bit thumb BKPT instruction, because it triggers even on instruction
which should be executed. Secondly, using 16-bit thumb illegal
instruction on top of 32-bit thumb instruction may break the meaning of
original IT blocks, because the other 16-bit can be regarded as an
instruction. See more explanations from Daniel's kernel patch
http://www.spinics.net/lists/arm-kernel/msg80476.html
Let us back to this patch, GDB/GDBserver can safely single step
IT block if thumb2_breakpoint is defined, but the single step logic
doesn't have to know the thumb-2 breakpoint instruction. Only
breakpoint insertion mechanism decides to use which breakpoint
instruction. In the software single step code, instead of pass
thumb2_breakpoint, we can pass a boolean variable
has_thumb2_breakpoint indicate whether the target has thumb-2
breakpoint defined, which is equivalent to the original code.
Regression tested on arm-linux. No regression.
gdb:
2016-01-14 Yao Qi <yao.qi@linaro.org>
* arch/arm-get-next-pcs.c (arm_get_next_pcs_ctor): Change
argument arm_thumb2_breakpoint to has_thumb2_breakpoint.
(thumb_get_next_pcs_raw): Check has_thumb2_breakpoint
instead.
* arch/arm-get-next-pcs.h (struct arm_get_next_pcs)
<arm_thumb2_breakpoint>: Remove.
<has_thumb2_breakpoint>: New field.
(arm_get_next_pcs_ctor): Update declaration.
* arm-linux-tdep.c (arm_linux_software_single_step): Pass
1 to arm_get_next_pcs_ctor.
* arm-tdep.c (arm_software_single_step): Pass 0 to
arm_get_next_pcs_ctor.
gdb/gdbserver:
2016-01-14 Yao Qi <yao.qi@linaro.org>
* linux-aarch32-low.c (thumb2_breakpoint): Make it static.
* linux-aarch32-low.h (thumb2_breakpoint): Remove declaration.
* linux-arm-low.c (arm_gdbserver_get_next_pcs): Pass 1 to
arm_get_next_pcs_ctor.
This patch fixes the cxx build broken by commit : d9311bfaf5.
Pushed as obvious.
gdb/ChangeLog:
* arm-tdep.c (arm_get_next_pcs_read_memory_unsigned_integer): Cast
to enum bfd_endian)
This patch teaches GDBServer how to software single step on ARM
linux by sharing code with GDB.
The arm_get_next_pcs function in GDB is now shared with GDBServer. So
that GDBServer can use the function to return the possible addresses of
the next PC.
A proper shared context was also needed so that we could share the code,
this context is described in the arm_get_next_pcs structure.
Testing :
No regressions, tested on ubuntu 14.04 ARMv7 and x86.
With gdbserver-{native,extended} / { -marm -mthumb }
gdb/ChangeLog:
* Makefile.in (ALL_TARGET_OBS): Append arm-get-next-pcs.o,
arm-linux.o.
(ALLDEPFILES): Append arm-get-next-pcs.c, arm-linux.c
(arm-linux.o): New rule.
(arm-get-next-pcs.o): New rule.
* arch/arm-get-next-pcs.c: New file.
* arch/arm-get-next-pcs.h: New file.
* arch/arm-linux.h: New file.
* arch/arm-linux.c: New file.
* arm.c: Include common-regcache.c.
(thumb_advance_itstate): Moved from arm-tdep.c.
(arm_instruction_changes_pc): Likewise.
(thumb_instruction_changes_pc): Likewise.
(thumb2_instruction_changes_pc): Likewise.
(shifted_reg_val): Likewise.
* arm.h (submask): Move macro from arm-tdep.h
(bit): Likewise.
(bits): Likewise.
(sbits): Likewise.
(BranchDest): Likewise.
(thumb_advance_itstate): Moved declaration from arm-tdep.h
(arm_instruction_changes_pc): Likewise.
(thumb_instruction_changes_pc): Likewise.
(thumb2_instruction_changes_pc): Likewise.
(shifted_reg_val): Likewise.
* arm-linux-tdep.c: Include arch/arm.h, arch/arm-get-next-pcs.h
arch/arm-linux.h.
(arm_linux_get_next_pcs_ops): New struct.
(ARM_SIGCONTEXT_R0, ARM_UCONTEXT_SIGCONTEXT,
ARM_OLD_RT_SIGFRAME_SIGINFO, ARM_OLD_RT_SIGFRAME_UCONTEXT,
ARM_NEW_RT_SIGFRAME_UCONTEXT, ARM_NEW_SIGFRAME_MAGIC): Move stack
layout defines to arch/arm-linux.h.
(arm_linux_sigreturn_next_pc_offset): Move to arch/arm-linux.c.
(arm_linux_software_single_step): Adjust for arm_get_next_pcs
implementation.
* arm-tdep.c: Include arch/arm-get-next-pcs.h.
(arm_get_next_pcs_ops): New struct.
(submask): Move macro to arm.h.
(bit): Likewise.
(bits): Likewise.
(sbits): Likewise.
(BranchDest): Likewise.
(thumb_instruction_changes_pc): Move to arm.c
(thumb2_instruction_changes_pc): Likewise.
(arm_instruction_changes_pc): Likewise.
(shifted_reg_val): Likewise.
(thumb_advance_itstate): Likewise.
(thumb_get_next_pc_raw): Move to arm-get-next-pcs.c.
(arm_get_next_pc_raw): Likewise.
(arm_get_next_pc): Likewise.
(thumb_deal_with_atomic_sequence_raw): Likewise.
(arm_deal_with_atomic_sequence_raw): Likewise.
(arm_deal_with_atomic_sequence): Likewise.
(arm_get_next_pcs_read_memory_unsigned_integer): New function.
(arm_get_next_pcs_addr_bits_remove): Likewise.
(arm_get_next_pcs_syscall_next_pc): Likewise.
(arm_get_next_pcs_is_thumb): Likewise.
(arm_software_single_step): Adjust for arm_get_next_pcs
implementation.
* arm-tdep.h: (arm_get_next_pc): Remove declaration.
(arm_get_next_pcs_read_memory_unsigned_integer):
New declaration.
(arm_get_next_pcs_addr_bits_remove): Likewise.
(arm_get_next_pcs_syscall_next_pc): Likewise.
(arm_get_next_pcs_is_thumb): Likewise.
(arm_deal_with_atomic_sequence: Remove declaration.
* common/gdb_vecs.h: Add CORE_ADDR vector definition.
* configure.tgt (aarch64*-*-linux): Add arm-get-next-pcs.o,
arm-linux.o.
(arm*-wince-pe): Add arm-get-next-pcs.o.
(arm*-*-linux*): Add arm-get-next-pcs.o, arm-linux.o,
arm-get-next-pcs.o
(arm*-*-netbsd*,arm*-*-knetbsd*-gnu): Add arm-get-next-pcs.o.
(arm*-*-openbsd*): Likewise.
(arm*-*-symbianelf*): Likewise.
(arm*-*-*): Likewise.
* symtab.h: Move CORE_ADDR vector definition to gdb_vecs.h.
gdb/gdbserver/ChangeLog:
* Makefile.in (SFILES): Append arch/arm-linux.c,
arch/arm-get-next-pcs.c.
(arm-linux.o): New rule.
(arm-get-next-pcs.o): New rule.
* configure.srv (arm*-*-linux*): Add arm-get-next-pcs.o,
arm-linux.o.
* linux-aarch32-low.c (arm_abi_breakpoint): Remove macro. Moved
to linux-aarch32-low.c.
(arm_eabi_breakpoint, arm_breakpoint): Likewise.
(arm_breakpoint_len, thumb_breakpoint): Likewise.
(thumb_breakpoint_len, thumb2_breakpoint): Likewise.
(thumb2_breakpoint_len): Likewise.
(arm_is_thumb_mode): Make non-static.
* linux-aarch32-low.h (arm_abi_breakpoint): New macro. Moved
from linux-aarch32-low.c.
(arm_eabi_breakpoint, arm_breakpoint): Likewise.
(arm_breakpoint_len, thumb_breakpoint): Likewise.
(thumb_breakpoint_len, thumb2_breakpoint): Likewise.
(thumb2_breakpoint_len): Likewise.
(arm_is_thumb_mode): New declaration.
* linux-arm-low.c: Include arch/arm-linux.h
aarch/arm-get-next-pcs.h, sys/syscall.h.
(get_next_pcs_ops): New struct.
(get_next_pcs_addr_bits_remove): New function.
(get_next_pcs_is_thumb): New function.
(get_next_pcs_read_memory_unsigned_integer): Likewise.
(arm_sigreturn_next_pc): Likewise.
(get_next_pcs_syscall_next_pc): Likewise.
(arm_gdbserver_get_next_pcs): Likewise.
(struct linux_target_ops) <arm_gdbserver_get_next_pcs>:
Initialize.
* linux-low.h: Move CORE_ADDR vector definition to gdb_vecs.h.
* server.h: Include gdb_vecs.h.
This patch is in preparation for software single step support on ARM in
GDBServer. It refactors arm_*_software_single_step and sub-functions to
use regcache instead of frame to access registers so that the code can be
shared more easily between GDB and GDBServer.
Note also that since the intention is at some point to get rid of frame
completely in that function, memory reads have also been replaced by
read_memory_unsigned_integer rather than get_frame_memory_unsigned.
No regressions, tested on ubuntu 14.04 ARMv7 and x86.
With gdbserver-{native,extended} / { -marm -mthumb }
gdb/ChangeLog:
* arm-linux-tdep.c (arm_linux_sigreturn_next_pc_offset): New function.
(arm_linux_sigreturn_next_pc): Likewise.
(arm_linux_syscall_next_pc): Use regcache instead of frame.
(arm_linux_software_single_step): Likewise.
* arm-tdep.c (arm_is_thumb): New function.
(shifted_reg_va): Use regcache instead of frame.
(thumb_get_next_pc_raw): Likewise.
(arm_get_next_pc_raw): Likewise.
(arm_get_next_pc): Likewise.
(thumb_deal_with_atomic_sequence_raw): Likewise.
(arm_deal_with_atomic_sequence_raw): Likewise.
(arm_deal_with_atomic_sequence): Likewise.
(arm_software_single_step): Likewise.
* arm-tdep.h (struct gdbarch_tdep): Use regcache for syscall_next_pc.
(arm_get_next_pc): Use regcache.
(arm_deal_with_atomic_sequence): Likewise.
(arm_is_thumb): New declaration.
* regcache.c (regcache_raw_get_unsigned): New function.
* regcache.h (regcache_raw_get_unsigned): New function declaration.
This patch is in preparation for software single stepping support on ARM
it shares some functions and definitions that will be needed.
No regressions, tested on ubuntu 14.04 ARMv7 and x86.
With gdbserver-{native,extended} / { -marm -mthumb }
Not tested: wince/bsd build.
gdb/ChangeLog:
* arch/arm.c (bitcount): Move from arm-tdep.c.
(condition_true): Likewise.
* arch/arm.h (Instruction Definitions): Move form arm-tdep.h.
(condition_true): Move defenition from arm-tdep.h.
(bitcount): Likewise.
* arm-tdep.c (condition_true): Move to arch/arm.c.
(bitcount): Likewise.
* arm-tdep.h (Instruction Definitions): Move to arch/arm.h.
* arm-wince-tdep.c: Include arch/arm.h.
* armnbsd-tdep.c: Likewise.
The following issue has been observed on arm-android, trying to step
over the following line of code:
Put_Line (">>> " & Integer'Image (Message (I)));
Below is a copy of the GDB transcript:
(gdb) cont
Breakpoint 1, q.dump (message=...) at q.adb:11
11 Put_Line (">>> " & Integer'Image (Message (I)));
(gdb) next
0x00016000 in system.concat_2.str_concat_2 ()
The expected behavior for the "next" command is to step over
the call to Put_Line and stop at line 12:
(gdb) next
12 I := I + 1;
What happens during the next step is that the code for line 11
above make a call to system.concat_2.str_concat_2 (to implement
the '&' string concatenation operator) before making the call
to Put_Line. While stepping, GDB stops eventually stops at the
first instruction of that function, and fails to detect that
it's a function call from where we were before, and so decides
to stop stepping.
And the reason why it fails to detect that we landed inside a function
call is because it fails to unwind from that function:
(gdb) bt
#0 0x00016000 in system.concat_2.str_concat_2 ()
#1 0x0001bc74 in ?? ()
Debugging GDB, I found that GDB decides to use the ARM unwind info
for that function, which contains the following data:
0x16000 <system__concat_2__str_concat_2>: 0x80acb0b0
Compact model index: 0
0xac pop {r4, r5, r6, r7, r8, r14}
0xb0 finish
0xb0 finish
But, in fact, using that data is wrong, in this case, because
it mentions a pop of 6 registers, and therefore hints at a frame
size of 24 bytes. The problem is that, because we're at the first
instruction of the function, the 6 registers haven't been pushed
to the stack yet. In other words, using the ARM unwind entry above,
GDB is tricked into thinking that the frame size is 24 bytes, and
that the return address (r14) is available on the stack.
One visible manifestation of this issue can been seen by looking
at the value of the stack pointer, and the frame's base address:
(gdb) p /x $sp
$2 = 0xbee427b0
(gdb) info frame
Stack level 0, frame at 0xbee427c8:
^^^^^^^^^^
||||||||||
The frame's base address should be equal to the value of the stack
pointer at entry. And you eventually get the correct frame address,
as well as the correct backtrace if you just single-step one additional
instruction, past the push:
(gdb) x /i $pc
=> 0x16000 <system__concat_2__str_concat_2>:
push {r4, r5, r6, r7, r8, lr}
(gdb) stepi
(gdb) bt
#0 0x00016004 in system.concat_2.str_concat_2 ()
#1 0x00012b6c in q.dump (message=...) at q.adb:11
#2 0x00012c3c in q () at q.adb:19
Digging further, I found that GDB tries to use the ARM unwind info
only when sure that it is relevant, as explained in the following
comment:
/* The ARM exception table does not describe unwind information
for arbitrary PC values, but is guaranteed to be correct only
at call sites. We have to decide here whether we want to use
ARM exception table information for this frame, or fall back [...]
There is one case where it decides that the info is relevant,
described in the following comment:
/* We also assume exception information is valid if we're currently
blocked in a system call. The system library is supposed to
ensure this, so that e.g. pthread cancellation works.
For that, it just parses the instruction at the address it believes
to be the point of call, and matches it against an "svc" instruction.
For instance, for a non-thumb instruction, it is at...
get_frame_pc (this_frame) - 4
... and the code checking looks like the following.
if (safe_read_memory_integer (get_frame_pc (this_frame) - 4, 4,
byte_order_for_code, &insn)
&& (insn & 0x0f000000) == 0x0f000000 /* svc */)
exc_valid = 1;
However, the reason why this doesn't work in our case is that
because we are at the first instruction of a function in the innermost
frame. That frame can't possibly be making a call, and therefore
be stuck on a system call.
What the code above ends up doing is checking the instruction
just before the start of our function, which in our case is not
even an actual instruction, but unlucky for us, happens to match
the pattern it is looking for, thus leading GDB to improperly
trust the ARM unwinding data.
gdb/ChangeLog:
* arm-tdep.c (arm_exidx_unwind_sniffer): Do not check for a frame
stuck on a system call if the given frame is the innermost frame.
When I build GDB with -fsanitize=address, and run testsuite,
some gdb.base/*.exp test triggers the ERROR below,
=================================================================
==7646==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x603000242810 at pc 0x487844 bp 0x7fffe32e84e0 sp 0x7fffe32e84d8
READ of size 4 at 0x603000242810 thread T0
#0 0x487843 in push_stack_item /home/yao/SourceCode/gnu/gdb/git/gdb/arm-tdep.c:3405
#1 0x48998a in arm_push_dummy_call /home/yao/SourceCode/gnu/gdb/git/gdb/arm-tdep.c:3960
In that path, GDB passes value on stack, in an INT_REGISTER_SIZE slot,
but the value contents' length can be less than INT_REGISTER_SIZE, so
the contents will be accessed out of the bound. This patch adds an
array buf[INT_REGISTER_SIZE], and copy val to buf before writing them
to stack.
gdb:
2015-11-16 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_push_dummy_call): New array buf. Store regval
to buf. Pass buf instead of val to push_stack_item.
This patch teaches GDB to support gnu vector in inferior calls. As a
result, fails in gdb.base/gnu_vector.exp are fixed. The calling
convention of gnu vector isn't documented in the AAPCS, because it
is the GCC extension. I checked the gcc/config/arm/arm.c, understand
how GCC pass arguments and return values, and do the same in GDB side.
The patch is tested with both hard float and soft float on arm-linux.
gdb:
2015-11-13 Yao Qi <yao.qi@linaro.org>
PR tdep/19051
* arm-tdep.c (arm_type_align): Return the right alignment
value for vector.
(arm_vfp_cprc_sub_candidate): Return true for 64-bit and
128-bit vector types.
(arm_return_in_memory): Handel vector type.
Current arm_return_in_memory isn't friendly to adding new things in it.
Moreover, a lot of stuff are about APCS, which is not used nowadays (AAPCS
is being used). This patch is to refactor arm_return_in_memory, so that
some code can be shared for both APCS and AAPCS at the beginning of
arm_return_in_memory, and then each ABI (APCS and AAPCS) are processed
separately.
gdb:
2015-11-13 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_return_in_memory): Rewrite it.
(arm_return_value): Call arm_return_in_memory for
TYPE_CODE_COMPLEX.
