Commit Graph

383 Commits

Author SHA1 Message Date
James Bowman
81b42bcab1 FT32B is a new FT32 family member. It has a code compression scheme, which requires the use of linker relaxations. The change is quite large, so submission is in several parts.
Part 2 adds a relaxation pass, which actually implements the code compression scheme.

bfd	* archures.c: Add bfd_mach_ft32b.
	* cpu-ft32.c: Add arch_info_struct.
	* elf32-ft32.c: Add R_FT32_RELAX, SC0, SC1,
	DIFF32. (ft32_elf_relocate_section): Add clauses
	for R_FT32_SC0, SC1, DIFF32.  (ft32_reloc_shortable,
	elf32_ft32_is_diff_reloc, elf32_ft32_adjust_diff_reloc_value,
	elf32_ft32_adjust_reloc_if_spans_insn,
	elf32_ft32_relax_delete_bytes, elf32_ft32_relax_is_branch_target,
	ft32_elf_relax_section): New function.
	* reloc.c: Add BFD_RELOC_FT32_RELAX, SC0, SC1, DIFF32.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

gas	* config/tc-ft32.c (md_assemble): add relaxation reloc
	BFD_RELOC_FT32_RELAX.  (md_longopts): Add "norelax" and
	"no-relax". (md_apply_fix): Add reloc BFD_RELOC_FT32_DIFF32.
	(relaxable_section, ft32_validate_fix_sub, ft32_force_relocation,
	ft32_allow_local_subtract): New function.
	* config/tc-ft32.h: remove unused MD_PCREL_FROM_SECTION.
	* testsuite/gas/ft32/insnsc.s: New test exercising all FT32B
	shortcodes.

include	* elf/ft32.h: Add R_FT32_RELAX, SC0, SC1, DIFF32.
2017-11-01 15:33:24 +00:00
James Bowman
3b4b0a629a FT32: support for FT32B processor - part 1
FT32B is a new FT32 family member. It has a code
compression scheme, which requires the use of linker
relaxations. The change is quite large, so submission
is in several parts.

Part 1 adds a 15-bit instruction field, and CPU-specific functions for
the code compression that are used in binutils and GDB.

bfd/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-ft32.c: Add HOWTO R_FT32_15.
	* reloc.c: Add BFD_RELOC_FT32_15.

gas/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
	K15.
	(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.

include/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* elf/ft32.h: Add R_FT32_15.
	* opcode/ft32.h: Replace FT32_FLD_K8 with K15.
	(ft32_shortcode, sc_compar, ft32_split_shortcode,
	ft32_merge_shortcode, ft32_merge_shortcode): New functions.

opcodes/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15.
	* opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with
	K15. Add jmpix pattern.

sim/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
2017-10-12 18:41:29 -07:00
Nick Clifton
47aeb64c10 Improve "unrecognized relocation" error messages to add the suggestion that the linker might be out of date.
PR 21803
	* reloc.c (_bfd_unrecognized_reloc): New function.  Reports
	an unrecognized reloc and sets the bfd_error value.
	* libbfd.h: Regenerate.
	* elf32-arm.c (elf32_arm_final_link_relocate): Use the new
	function.
	* elf32-i386.c (elf_i386_relocate_section): Likewise.
	* elf32-tilepro.c (tilepro_elf_relocate_section): Likewise.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_relocate_section): Likewise.
	* elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise.
2017-07-24 11:27:33 +01:00
John Eric Martin
684d5a10b1 [ARC] Add JLI support.
The following relocation types were added to GCC/binutils:

ARC_JLI_SECTOFF is a relocation type in Metaware that is now used by
GCC as well to adjust the index of function calls to functions with
attribute jli_call_always.

bfd/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-arc.c (JLI): Define.
	* reloc.c: Add JLI relocations.

gas/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/jli-1.d: New file.
	* testsuite/gas/arc/jli-1.s: Likewise.
	* testsuite/gas/arc/taux.d: Update for jli_base.

include/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* elf/arc-reloc.def: Add JLI relocs howto.
	* opcode/arc-func.h (replace_jli): New function.

ld/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* emulparams/arcelf.sh (JLI_START_TABLE): Define.
	* scripttempl/elfarc.sc: Handle jlitab section.
	* scripttempl/elfarcv2.sc: Likewise.
	* testsuite/ld-arc/arc.exp: Add JLI test.
	* testsuite/ld-arc/jli-script.ld: New file.
	* testsuite/ld-arc/jli-simple.dd: Likewise.
	* testsuite/ld-arc/jli-simple.rd: Likewise.
	* testsuite/ld-arc/jli-simple.s: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.s: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.d: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.err: Likewise.

opcode/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* arc-opc.c (UIMM10_6_S_JLIOFF): Define.
	(UIMM3_23): Adjust accordingly.
	* arc-regs.h: Add/correct jli_base register.
	* arc-tbl.h (jli_s): Likewise.
2017-07-19 09:56:55 +02:00
Kuan-Lin Chen
a6cbf936e3 RISC-V: Use pc-relative relocation for FDE initial location
The symbol address in .eh_frame may be adjusted in
_bfd_elf_discard_section_eh_frame, and the content of .eh_frame will be
adjusted in _bfd_elf_write_section_eh_frame. Therefore, we cannot insert
a relocation whose addend symbol is in .eh_frame. Othrewise, the value
may be adjusted twice.

bfd/ChangeLog
2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>

	* elfnn-riscv.c (perform_relocation): Support the new
	R_RISCV_32_PCREL relocation.
	(riscv_elf_relocate_section): Likewise.
	* elfxx-riscv.c (howto_table): Likewise.
	(riscv_reloc_map): Likewise.
	* bfd-in2.h (BFD_RELOC_RISCV_32_PCREL): New relocation.
	* libbfd.h: Regenerate.

gas/ChangeLog
2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>

	* config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a
	R_RISCV_32_PCREL relocation.

include/ChangeLog
2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>

	* elf/riscv.h (R_RISCV_32_PCREL): New.
2017-06-26 18:26:40 -07:00
Alan Modra
7dba9362c1 Rewrite __start and __stop symbol handling
This arranges for __start and __stop symbols to be defined before
garbage collection, for all target formats.  That should allow the
COFF and PE --gc-sections to keep a singleton orphan input section,
a feature lost by 2017-06-13 commit cbd0eecf26.  The fancier ELF
treatment of keeping all input sections associated with a __start or
__stop symbol, from 2015-10-23 commit 1cce69b9dc, is retained.

.startof. and .sizeof. symbols are deliberately not defined before
garbage collection, so these won't affect garbage collection of
sections.

The patch also ensures __start, __stop, .startof. and .sizeof. symbols
are defined before target size_dynamic_sections is called, albeit
with a preliminary value, so that target code doesn't need to cope
with a symbol changing from undefined at size_dynamic_sections to
defined at relocate_section.

Also, a number of problems with the testcases have been fixed.

	PR ld/20022
	PR ld/21557
	PR ld/21562
	PR ld/21571
include/
	* bfdlink.h (struct bfd_link_hash_entry): Delete undef.section.
bfd/
	* targets.c (struct bfd_target): Add _bfd_define_start_stop.
	(BFD_JUMP_TABLE_LINK): Likewise.
	* elf-bfd.h (bfd_elf_define_start_stop): Declare.
	* elflink.c (_bfd_elf_gc_mark_rsec): Update comment.
	(bfd_elf_define_start_stop): New function.
	* linker.c (bfd_generic_define_start_stop): New function.
	* coff64-rs6000.c (rs6000_xcoff64_vec, rs6000_xcoff64_aix_vec): Init
	new field.
	* aout-adobe.c (aout_32_bfd_define_start_stop): Define.
	* aout-target.h (MY_bfd_define_start_stop): Define.
	* aout-tic30.c (MY_bfd_define_start_stop): Define.
	* binary.c (binary_bfd_define_start_stop): Define.
	* bout.c (b_out_bfd_define_start_stop): Define.
	* coff-alpha.c (_bfd_ecoff_bfd_define_start_stop): Define.
	* coff-mips.c (_bfd_ecoff_bfd_define_start_stop): Define.
	* coff-rs6000.c (_bfd_xcoff_bfd_define_start_stop): Define.
	* coffcode.h (coff_bfd_define_start_stop): Define.
	* elfxx-target.h (bfd_elfNN_bfd_define_start_stop): Define.
	* i386msdos.c (msdos_bfd_define_start_stop): Define.
	* i386os9k.c (os9k_bfd_define_start_stop): Define.
	* ieee.c (ieee_bfd_define_start_stop): Define.
	* ihex.c (ihex_bfd_define_start_stop): Define.
	* libbfd-in.h (_bfd_nolink_bfd_define_start_stop): Define.
	* mach-o-target.c (bfd_mach_o_bfd_define_start_stop): Define.
	* mmo.c (mmo_bfd_define_start_stop): Define.
	* nlm-target.h (nlm_bfd_define_start_stop): Define.
	* oasys.c (oasys_bfd_define_start_stop): Define.
	* pef.c (bfd_pef_bfd_define_start_stop): Define.
	* plugin.c (bfd_plugin_bfd_define_start_stop): Define.
	* ppcboot.c (ppcboot_bfd_define_start_stop): Define.
	* som.c (som_bfd_define_start_stop): Define.
	* srec.c (srec_bfd_define_start_stop): Define.
	* tekhex.c (tekhex_bfd_define_start_stop): Define.
	* versados.c (versados_bfd_define_start_stop): Define.
	* vms-alpha.c (vms_bfd_define_start_stop): Define.
	(alpha_vms_bfd_define_start_stop): Define.
	* xsym.c (bfd_sym_bfd_define_start_stop): Define.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
ld/
	* emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Don't set
	__start/__stop syms here.
	* ldlang.c (lang_set_startof): Delete.
	(start_stop_syms, start_stop_count, start_stop_alloc): New vars.
	(lang_define_start_stop, lang_init_start_stop, foreach_start_stop,
	undef_start_stop, lang_undef_start_stop, lang_init_startof_sizeof,
	set_start_stop, lang_finalize_start_stop): New functions.
	(lang_process): Call _start_stop functions.
	* testsuite/ld-elf/pr21562a.d: Use xfail rather than notarget.
	Correct typos and list of xfail targets.
	* testsuite/ld-elf/pr21562b.d: Likewise.
	* testsuite/ld-elf/pr21562c.d: Likewise.
	* testsuite/ld-elf/pr21562d.d: Likewise.
	* testsuite/ld-elf/pr21562e.d: Likewise.
	* testsuite/ld-elf/pr21562f.d: Likewise.
	* testsuite/ld-elf/pr21562g.d: Likewise.
	* testsuite/ld-elf/pr21562h.d: Likewise.
	* testsuite/ld-elf/pr21562i.d: Likewise.
	* testsuite/ld-elf/pr21562j.d: Likewise.
	* testsuite/ld-elf/pr21562k.d: Likewise.
	* testsuite/ld-elf/pr21562l.d: Likewise.
	* testsuite/ld-elf/pr21562m.d: Likewise.
	* testsuite/ld-elf/pr21562n.d: Likewise.
	* testsuite/ld-elf/sizeofa.d: Likewise.  Adjust to pass for generic ELF.
	* testsuite/ld-elf/sizeofb.d: Likewise.
	* testsuite/ld-elf/startofa.d: Likewise.
	* testsuite/ld-elf/startofb.d: Likewise.
2017-06-16 23:38:28 +09:30
Jose E. Marchesi
2318686590 bfd: new BFD target entry point _bfd_set_reloc.
This patch adds a new entry point to the BFD_JUMP_TABLE_RELOCS.  The
previous common implementation `bfd_set_reloc', in bfd/bfd.c, has been
moved to bfd/reloc.c with the name `_bfd_generic_set_reloc', and all
BFD targets has been adapted to use it.

This patch doesn't introduce any change on functionality, but prepares
the ground for further work.

bfd/ChangeLog:

    2017-05-10  Jose E. Marchesi  <jose.marchesi@oracle.com>

    	* targets.c (BFD_JUMP_TABLE_RELOCS): Add NAME##_set_reloc.
    	(struct bfd_target): New field _bfd_set_reloc.
    	* bfd.c (bfd_set_reloc): Call backend _set_bfd.
    	* reloc.c (_bfd_generic_set_reloc): New function.
    	* coffcode.h (coff_set_reloc): Define to _bfd_generic_set_reloc.
    	* nlm-target.h (nlm_set_reloc): Likewise.
    	* coff-rs6000.c (_bfd_xcoff_set_reloc): Likewise.
    	* aout-tic30.c (MY_set_reloc): Likewise.
    	* aout-target.h (MY_set_reloc): Likewise.
    	* elfxx-target.h (bfd_elfNN_set_reloc): Likewise.
    	* coff-alpha.c (_bfd_ecoff_set_reloc): Likewise.
    	* mach-o-target.c (bfd_mach_o_set_reloc): Likewise.
    	* vms-alpha.c (alpha_vms_set_reloc): Likewise.
    	* aout-adobe.c (aout_32_set_reloc): Likewise.
    	* bout.c (b_out_set_reloc): Likewise.
    	* coff-mips.c (_bfd_ecoff_set_reloc): Likewise.
    	* i386os9k.c (aout_32_set_reloc): Likewise.
    	* ieee.c (ieee_set_reloc): Likewise.
    	* oasys.c (oasys_set_reloc): Likewise.
    	* som.c (som_set_reloc): Likewise.
    	* versados.c (versados_set_reloc): Likewise.
    	* coff64-rs6000.c (rs6000_xcoff64_vec): Add
    	_bfd_generic_set_reloc.
    	(rs6000_xcoff64_aix_vec): LIkewise.
    	* libbfd.c (_bfd_norelocs_set_reloc): New function.
    	* libbfd-in.h: Prototype for _bfd_norelocs_set_reloc.
    	* i386msdos.c (msdos_set_reloc): Define to
    	_bfd_norelocs_set_reloc.
    	* elfcode.h (elf_set_reloc): Define.
    	* bfd-in2.h: Regenerated.
2017-05-10 18:45:30 +02:00
Pip Cet
f96bd6c2d7 Add support for the WebAssembly file format and the wasm32 ELF conversion to gas and the binutils.
binutils * readelf.c: Add support for wasm32 ELF format WebAssembly files.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_none_reloc_): Likewise.
	* NEWS: Mention the new support.
	* testsuite/lib/binutils-common.exp (is_elf_format): Mark wasm32
	as ELF target.
	(supports_gnu_unique): Mark wasm32 as supporting STB_GNU_UNIQUE.
	* testsuite/binutils-all/nm.exp: Mark wasm32 as requiring .size annotations.
	* testsuite/binutils-all/wasm32: New directory.
	* testsuite/binutils-all/wasm32/create-wasm.d: New file.
	* testsuite/binutils-all/wasm32/create-wasm.s: Likewise.
	* testsuite/binutils-all/wasm32/custom-section.d: Likewise.
	* testsuite/binutils-all/wasm32/custom-section.s: Likewise.
	* testsuite/binutils-all/wasm32/invalid-wasm-1.d: Likewise.
	* testsuite/binutils-all/wasm32/invalid-wasm-1.s: Likewise.
	* testsuite/binutils-all/wasm32/long-sections.d: Likewise.
	* testsuite/binutils-all/wasm32/long-sections.s: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm.d: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm.s: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm-2.d: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm-2.s: Likewise.
	* testsuite/binutils-all/wasm32/prepared-section.d: Likewise.
	* testsuite/binutils-all/wasm32/prepared-section.s: Likewise.
	* testsuite/binutils-all/wasm32/wasm32.exp: New file, run tests.

gas	* config/tc-wasm32.h: New file: Add WebAssembly assembler target.
	* config/tc-wasm32.c: New file: Add WebAssembly assembler target.
	* Makefile.am: Add WebAssembly assembler target.
	* configure.tgt: Add WebAssembly assembler target.
	* doc/c-wasm32.texi: New file: Start documenting WebAssembly
	assembler.
	* doc/all.texi: Define WASM32.
	* doc/as.texinfo: Add WebAssembly entries.
	* NEWS: Mention the new support.
	* Makefile.in: Regenerate.
	* po/gas.pot: Regenerate.
	* po/POTFILES.in: Regenerate.
	* testsuite/gas/wasm32: New directory.
	* testsuite/gas/wasm32/allinsn.d: New file.
	* testsuite/gas/wasm32/allinsn.s: New file.
	* testsuite/gas/wasm32/illegal.l: New file.
	* testsuite/gas/wasm32/illegal.s: New file.
	* testsuite/gas/wasm32/illegal-2.l: New file.
	* testsuite/gas/wasm32/illegal-2.s: New file.
	* testsuite/gas/wasm32/illegal-3.l: New file.
	* testsuite/gas/wasm32/illegal-3.s: New file.
	* testsuite/gas/wasm32/illegal-4.l: New file.
	* testsuite/gas/wasm32/illegal-4.s: New file.
	* testsuite/gas/wasm32/illegal-5.l: New file.
	* testsuite/gas/wasm32/illegal-5.s: New file.
	* testsuite/gas/wasm32/illegal-6.l: New file.
	* testsuite/gas/wasm32/illegal-6.s: New file.
	* testsuite/gas/wasm32/illegal-7.l: New file.
	* testsuite/gas/wasm32/illegal-7.s: New file.
	* testsuite/gas/wasm32/illegal-8.l: New file.
	* testsuite/gas/wasm32/illegal-8.s: New file.
	* testsuite/gas/wasm32/illegal-9.l: New file.
	* testsuite/gas/wasm32/illegal-9.s: New file.
	* testsuite/gas/wasm32/illegal-10.l: New file.
	* testsuite/gas/wasm32/illegal-10.s: New file.
	* testsuite/gas/wasm32/illegal-11.l: New file.
	* testsuite/gas/wasm32/illegal-11.s: New file.
	* testsuite/gas/wasm32/illegal-12.l: New file.
	* testsuite/gas/wasm32/illegal-12.s: New file.
	* testsuite/gas/wasm32/illegal-13.l: New file.
	* testsuite/gas/wasm32/illegal-13.s: New file.
	* testsuite/gas/wasm32/illegal-14.l: New file.
	* testsuite/gas/wasm32/illegal-14.s: New file.
	* testsuite/gas/wasm32/illegal-15.l: New file.
	* testsuite/gas/wasm32/illegal-15.s: New file.
	* testsuite/gas/wasm32/illegal-16.l: New file.
	* testsuite/gas/wasm32/illegal-16.s: New file.
	* testsuite/gas/wasm32/illegal-17.l: New file.
	* testsuite/gas/wasm32/illegal-17.s: New file.
	* testsuite/gas/wasm32/illegal-18.l: New file.
	* testsuite/gas/wasm32/illegal-18.s: New file.
	* testsuite/gas/wasm32/illegal-19.l: New file.
	* testsuite/gas/wasm32/illegal-19.s: New file.
	* testsuite/gas/wasm32/illegal-20.l: New file.
	* testsuite/gas/wasm32/illegal-20.s: New file.
	* testsuite/gas/wasm32/illegal-21.l: New file.
	* testsuite/gas/wasm32/illegal-21.s: New file.
	* testsuite/gas/wasm32/illegal-22.l: New file.
	* testsuite/gas/wasm32/illegal-22.s: New file.
	* testsuite/gas/wasm32/illegal-24.l: New file.
	* testsuite/gas/wasm32/illegal-24.s: New file.
	* testsuite/gas/wasm32/illegal-25.l: New file.
	* testsuite/gas/wasm32/illegal-25.s: New file.
	* testsuite/gas/wasm32/reloc.d: New file.
	* testsuite/gas/wasm32/reloc.s: New file.
	* testsuite/gas/wasm32/wasm32.exp: New tests for WebAssembly
	architecture.

opcodes * configure.ac: Add (empty) bfd_wasm32_arch target.
	* configure: Regenerate
	* po/opcodes.pot: Regenerate.

include	* opcode/wasm.h: New file to support wasm32 architecture.
	* elf/wasm32.h: Add R_WASM32_32 relocation.

bfd	* elf32-wasm32.c: Add relocation code, two relocs.
	* reloc.c: Add wasm32 relocations.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
	* bfd/po/bfd.pot: Regenerate.
2017-03-30 10:57:21 +01:00
Nick Clifton
f955cccff3 Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12.
PR binutils/21202
include	* elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to
	R_AARCH64_TLSDESC_LD64_LO12.
	(R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to
	R_AARCH64_TLSDESC_ADD_LO12_NC.

bfd	* reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to
	BFD_RELOC_AARCH64_TLSDESC_LD64_LO12.
	(BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to
	BFD_RELOC_AARCH64_TLSDESC_ADD_LO12.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc
	names.
	(IS_AARCH64_TLSDESC_RELOC): Likewise.
	(elfNN_aarch64_howto_table): Likewise.
	(aarch64_tls_transition_without_check): Likewise.
	(aarch64_reloc_got_type): Likewise.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_tls_relax): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

gas	* config/tc-aarch64.c (reloc_table): Rename
	BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to
	BFD_RELOC_AARCH64_TLSDESC_LD64_LO12.  Rname
	BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to
	BFD_RELOC_AARCH64_TLSDESC_ADD_LO12.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.
	* testsuite/gas/aarch64/tls.d: Update regexp.

ld	* testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 09:58:04 +00:00
Alan Modra
7ba71655a4 PowerPC addpcis fix
This came up because I was looking at ld/tmpdir/addpcis.o and noticed
the odd addends on REL16DX_HA.  They ought to both be -4.  The error
crept in due REL16DX_HA howto being pc-relative (as indeed it should
be), and code at gas/write.c:1001 after this comment
	      /* Make it pc-relative.  If the back-end code has not
		 selected a pc-relative reloc, cancel the adjustment
		 we do later on all pc-relative relocs.  */
*not* cancelling the pc-relative adjustment.  So I've made a dummy
non-relative split reloc so that the generic code handles this, rather
than attempting to add hacks later in md_apply_fix which would not be
very robust.  Having the new internal reloc also makes it easy to
support

 addpcis rx,sym@ha

as an equivalent to

 addpcis rx,(sym-0f)@ha
0:

The patch also fixes overflow checking, which must test whether the
addi will overflow too since @l relocs don't have any overflow check.

Lastly, since I was poking at md_apply_fix, I arranged to have the
generic gas/write.c code emit errors for subtraction expressions where
we lack reloc support.

include/
	* elf/ppc64.h (R_PPC64_16DX_HA): New.  Expand fake reloc comment.
	* elf/ppc.h (R_PPC_16DX_HA): Likewise.
bfd/
	* reloc.c (BFD_RELOC_PPC_16DX_HA): New.
	* elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_16DX_HA>): New howto.
	(ppc64_elf_reloc_type_lookup): Translate new bfd reloc.
	(ppc64_elf_ha_reloc): Correct overflow test on REL16DX_HA.
	(ppc64_elf_relocate_section): Likewise.
	* elf32-ppc.c (ppc_elf_howto_raw <R_PPC_16DX_HA>): New howto.
	(ppc_elf_reloc_type_lookup): Translate new bfd reloc.
	(ppc_elf_check_relocs): Handle R_PPC_16DX_HA to pacify gcc.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis.
	(md_apply_fix): Remove fx_subsy check.  Move code converting to
	pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA.  Remove code
	emiiting errors on seeing fx_pcrel set on unexpected relocs, as
	that is done now by the generic code via..
	* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define.
	(TC_VALIDATE_FIX_SUB): Define.
ld/
	* testsuite/ld-powerpc/addpcis.d: Define ext1 and ext2 at
	limits of addpcis range.
2017-02-28 11:59:47 +10:30
Pedro Alves
7ec22e0f1e bfd: Rename bsd_write_armap and coff_write_armap
Give these bfd-internal symbols with external linkage a _bfd_ prefix
to avoid collisions in the global symbol namespace.

bfd/ChangeLog:
2017-02-17  Pedro Alves  <palves@redhat.com>

	* archive.c (bsd_write_armap): Rename to ...
	(_bfd_bsd_write_armap): ... this.
	(coff_write_armap): Rename to ...
	(_bfd_coff_write_armap): ... this.
	* libbfd-in.h (bsd_write_armap): Rename to ...
	(_bfd_bsd_write_armap): ... this.
	(coff_write_armap): Rename to ...
	(_bfd_coff_write_armap): ... this.
	* aout-target.h, aout-tic30.c: Adjust all users.
	* libbfd.h: Regenerate.
2017-02-17 01:26:12 +00:00
Pedro Alves
c7c3d11bea bfd: Rename real_{ftell, fseek, fopen}
Give these bfd-internal symbols with external linkage a _bfd_ prefix
to avoid collisions in the global symbol namespace.

bfd/ChangeLog:
2017-02-17  Pedro Alves  <palves@redhat.com>

	* bfdio.c (real_ftell): Rename to ...
	(_bfd_real_ftell): ... this.
	(real_fseek): Rename to ...
	(_bfd_real_fseek): ... this.
	(real_fopen): Rename to ...
	(_bfd_real_fopen): ... this.
	* libbfd-in.h (real_ftell): Rename to ...
	(_bfd_real_ftell): ... this.
	(real_fseek): Rename to ...
	(_bfd_real_fseek): ... this.
	(real_fopen): Rename to ...
	(_bfd_real_fopen): ... this.
	* cache.c, dwarf2.c, opncls.c: Adjust all callers.
	* libbfd.h: Regenerate.
2017-02-17 01:26:12 +00:00
Pedro Alves
4265548c65 bfd: Rename read_{signed,unsigned}_leb128, safe_read_leb128
Give these bfd-internal symbols with external linkage a _bfd_ prefix
to avoid collisions in the global symbol namespace.

bfd/ChangeLog:
2017-02-17  Pedro Alves  <palves@redhat.com>

	* dwarf2.c, elf-attrs.c, elf32-nds32.c: Adjust all callers.
	* libbfd.c (read_unsigned_leb128): Rename to ...
	(_bfd_read_unsigned_leb128): ... this.
	(read_signed_leb128): Rename to ...
	(_bfd_read_signed_leb128): ... this.
	(safe_read_leb128): Rename to ...
	(_bfd_safe_read_leb128): ... this.
	* libbfd-in.h (read_unsigned_leb128): Rename to ...
	(_bfd_read_unsigned_leb128): ... this.
	(read_signed_leb128): Rename to ...
	(_bfd_read_signed_leb128): ... this.
	(safe_read_leb128): Rename to ...
	(_bfd_safe_read_leb128): ... this.
	* libbfd.h: Renegerate.
2017-02-17 01:26:11 +00:00
Alan Modra
2571583aed Update year range in copyright notice of all files. 2017-01-02 14:08:56 +10:30
Dimitar Dimitrov
889294f6ff PRU BFD support
include/
	* elf/common.h: Add PRU ELF.
	* elf/pru.h: New file.
	* opcode/pru.h: New file.
	* dis-asm.h (print_insn_pru): Declare.
bfd/
	* archures.c: Add bfd_arch_pru.
	* Makefile.am: Add PRU target.
	* config.bfd: Ditto.
	* configure.ac: Ditto.
	* elf-bfd.h (enum elf_target_id): Add PRU_ELF_DATA.
	* targets.c: Add pru_elf32_vec.
	* reloc.c: Add PRU relocations.
	* cpu-pru.c: New file.
	* elf32-pru.c: New file.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
	* bfd-in2.h: Regenerate
	* libbfd.h: Regenerate.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2016-12-31 12:02:09 +10:30
Alan Modra
b9fc2576a1 Remove "collect" forms of generic linker add symbols functions
Nothing calls them and they were in the way of a bug fix.

	* linker.c (generic_link_add_symbols): Delete.  Merge into..
	(_bfd_generic_link_add_symbols): ..here.
	(generic_link_check_archive_element_no_collect): Delete.
	(generic_link_check_archive_element_collect): Likewise.
	(generic_link_add_object_symbols): Remove "collect" param.  Update
	callers.
	(generic_link_add_symbol_list): Likewise.
	(generic_link_check_archive_element): Likewise.  Call
	bfd_link_add_symbols rather than generic_link_add_object_symbols.
	* libbfd-in.h (_bfd_generic_link_add_symbols_collect): Delete.
	* libbfd.h: Regenerate.
2016-12-24 00:15:58 +10:30
Alan Modra
f0d19df99d Don't make_bfd_vms_lib archive functions NULL
Contrary to the comment, they can in fact be called.

	* libbfd-in.h (_bfd_vms_lib_slurp_armap): Use _bfd_noarchive function.
	(_bfd_vms_lib_slurp_extended_name_table: Likewise.
	(_bfd_vms_lib_construct_extended_name_table: Likewise.
	(_bfd_vms_lib_truncate_arname: Likewise.
	(_bfd_vms_lib_write_armap: Likewise.
	(_bfd_vms_lib_read_ar_hdr: Likewise.
	(_bfd_vms_lib_write_ar_hdr: Likewise.
	* libbfd.h: Regenerate.
2016-12-22 00:42:49 +10:30
Andrew Waterman
45f764234a Rework RISC-V relocations
Before this commit we didn't cleanly support CFI directives because the
internal offsets used to get relaxed which broke them.  This patch
significantly reworks how we handle linker relaxations:

 * DWARF is now properly supported

 * There is a ".option norelax" to disable relaxations, for when users
   write assembly that can't be relaxed (if it's to be later patched up,
   for example).

 * There is an additional _RELAX relocation that specifies when previous
   relocations can be relaxed.

We're in the process of documenting the RISC-V ELF ABI, which will
include documentation of our relocations

  https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md

but we expect that this relocation set will remain ABI compatible in the
future (ie, it's safe to release).

Thanks to Kuan-Lin Chen for figuring out how to correctly relax the
debug info!

include/
	* elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32.
bfd/
	* reloc.c (BFD_RELOC_RISCV_TPREL_I): New relocation.
	(BFD_RELOC_RISCV_TPREL_S): Likewise.
	(BFD_RELOC_RISCV_RELAX): Likewise.
	(BFD_RELOC_RISCV_CFA): Likewise.
	(BFD_RELOC_RISCV_SUB6): Likewise.
	(BFD_RELOC_RISCV_SET8): Likewise.
	(BFD_RELOC_RISCV_SET8): Likewise.
	(BFD_RELOC_RISCV_SET16): Likewise.
	(BFD_RELOC_RISCV_SET32): Likewise.
	* elfnn-riscv.c (perform_relocation): Handle the new
	relocations.
	(_bfd_riscv_relax_tls_le): Likewise.
	(_bfd_riscv_relax_align): Likewise.
	(_bfd_riscv_relax_section): Likewise.
	(howto_table): Likewise.
	(riscv_reloc_map): Likewise.
	(relax_func_t): New type.
	(_bfd_riscv_relax_call): Add reserve_size argument, which
	controls the maximal offset pessimism.  Correct type of max_alignment.
	(_bfd_riscv_relax_lui): Likewise.
	(_bfd_riscv_relax_tls_le): Likewise.
	(_bfd_riscv_relax_align): Likewise.
	(_bfd_riscv_relax_section): Compute the required reserve size
	when relocating and use it to when calling relax_func.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
gas/
	* config/tc-riscv.c (riscv_set_options): Add relax.
	(riscv_opts): Likewise.
	(s_riscv_option): Add relax and norelax.
	(riscv_apply_const_reloc): New function.
	(append_insn): Move constant relocation handling to
	riscv_apply_const_reloc.
	(md_pcrel_from): Likewise.
	(parse_relocation): Skip BFD_RELOC_UNUSED.
	(md_pcrel_from): Handle BFD_RELOC_RISCV_SUB6,
	BFD_RELOC_RISCV_RELAX, BFD_RELOC_RISCV_CFA.
	(md_apply_fix): Likewise.
	(riscv_pre_output_hook): New function.
	* config/tc-riscv.h (md_pre_output_hook): Define.
	(riscv_pre_output_hook): Declare.
	(DWARF_CIE_DATA_ALIGNMENT): Always -4.
2016-12-20 12:26:33 +10:30
Nick Clifton
e23eba971d Add support for RISC-V architecture.
bfd	* Makefile.am: Add entries for riscv32-elf and riscv64-elf.
	* config.bdf: Likewise.
	* configure.ac: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* archures.c: Add bfd_riscv_arch.
	* reloc.c: Add riscv relocs.
	* targets.c: Add riscv_elf32_vec and riscv_elf64_vec.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id.
	* elfnn-riscv.c: New file.
	* elfxx-riscv.c: New file.
	* elfxx-riscv.h: New file.

binutils* readelf.c (guess_is_rela): Add EM_RISCV.
	(get_machine_name): Likewise.
	(dump_relocations): Add support for riscv relocations.
	(get_machine_flags): Add support for riscv flags.
	(is_32bit_abs_reloc): Add R_RISCV_32.
	(is_64bit_abs_reloc): Add R_RISCV_64.
	(is_none_reloc): Add R_RISCV_NONE.
	* testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv.
	Expect the debug_ranges test to fail.

gas	* Makefile.am: Add riscv files.
	* Makefile.in: Regenerate.
	* NEWS: Mention the support for this architecture.
	* configure.in: Define a default architecture.
	* configure: Regenerate.
	* configure.tgt: Add entries for riscv.
	* doc/as.texinfo: Likewise.
	* testsuite/gas/all/gas.exp: Expect the redef tests to fail.
	* testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail.
	* config/tc-riscv.c: New file.
	* config/tc-riscv.h: New file.
	* doc/c-riscv.texi: New file.
	* testsuite/gas/riscv: New directory.
	* testsuite/gas/riscv/riscv.exp: New file.
	* testsuite/gas/riscv/t_insns.d: New file.
	* testsuite/gas/riscv/t_insns.s: New file.

ld	* Makefile.am: Add riscv files.
	* Makefile.in: Regenerate.
	* NEWS: Mention the support for this target.
	* configure.tgt: Add riscv entries.
	* emulparams/elf32lriscv-defs.sh: New file.
	* emulparams/elf32lriscv.sh: New file.
	* emulparams/elf64lriscv-defs.sh: New file.
	* emulparams/elf64lriscv.sh: New file.
	* emultempl/riscvelf.em: New file.

opcodes	* configure.ac: Add entry for bfd_riscv_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add support for riscv.
	(disassembler_usage): Likewise.
	* riscv-dis.c: New file.
	* riscv-opc.c: New file.

include	* dis-asm.h: Add prototypes for print_insn_riscv and
	print_riscv_disassembler_options.
	* elf/riscv.h: New file.
	* opcode/riscv-opc.h: New file.
	* opcode/riscv.h: New file.
2016-11-01 16:45:57 +00:00
Alan Modra
50e03d47b7 Pass link_info to _bfd_merge_private_bfd_data
Most BFD linker functions take a bfd_link_info param, which reinforces
the fact that they are linker functions and allow access to linker
callbacks, eg. einfo for printing errors.  I was going to use einfo
for --fatal-warnings support before I decided a better way was the
patch commit 4519d071.

bfd/
	* targets.c (bfd_target <_bfd_merge_private_bfd_data>): Replace
	obfd param with struct bfd_link_info param.  Update all callers.
	* linker.c (bfd_merge_private_bfd_data): Likewise.
	(_bfd_generic_verify_endian_match): Likewise.
	* aoutf1.h (sunos_merge_private_bfd_data): Likewise.
	* coff-arm.c (coff_arm_merge_private_bfd_data): Likewise.
	* elf-attrs.c (_bfd_elf_merge_object_attributes): Likewise.
	* elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Likewise.
	(_bfd_elf_merge_object_attributes): Likewise.
	* elf-m10300.c (_bfd_mn10300_elf_merge_private_bfd_data): Likewise.
	* elf-s390-common.c (elf_s390_merge_obj_attributes): Likewise.
	* elf32-arc.c (arc_elf_merge_private_bfd_data): Likewise.
	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Likewise.
	(elf32_arm_merge_private_bfd_data): Likewise.
	* elf32-bfin.c (elf32_bfin_merge_private_bfd_data): Likewise.
	* elf32-cr16.c (_bfd_cr16_elf_merge_private_bfd_data): Likewise.
	* elf32-cris.c (cris_elf_merge_private_bfd_data): Likewise.
	* elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise.
	* elf32-h8300.c (elf32_h8_merge_private_bfd_data): Likewise.
	* elf32-i370.c (i370_elf_merge_private_bfd_data): Likewise.
	* elf32-iq2000.c (iq2000_elf_merge_private_bfd_data): Likewise.
	* elf32-m32c.c (m32c_elf_merge_private_bfd_data): Likewise.
	* elf32-m32r.c (m32r_elf_merge_private_bfd_data): Likewise.
	* elf32-m68hc1x.c (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise.
	* elf32-m68hc1x.h (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise.
	* elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Likewise.
	* elf32-mcore.c (mcore_elf_merge_private_bfd_data): Likewise.
	* elf32-mep.c (mep_elf_merge_private_bfd_data): Likewise.
	* elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Likewise.
	(elf32_msp430_merge_private_bfd_data): Likewise.
	* elf32-mt.c (mt_elf_merge_private_bfd_data): Likewise.
	* elf32-nds32.c (nds32_elf_merge_private_bfd_data): Likewise.
	* elf32-nios2.c (nios2_elf32_merge_private_bfd_data): Likewise.
	* elf32-or1k.c (elf32_or1k_merge_private_bfd_data): Likewise.
	* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Likewise.
	(ppc_elf_merge_obj_attributes): Likewise.
	(ppc_elf_merge_private_bfd_data): Likewise.
	* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Likewise.
	* elf32-rx.c (rx_elf_merge_private_bfd_data): Likewise.
	* elf32-s390.c (elf32_s390_merge_private_bfd_data): Likewise.
	* elf32-score.c (s3_elf32_score_merge_private_bfd_data): Likewise.
	(elf32_score_merge_private_bfd_data): Likewise.
	* elf32-score.h (s7_elf32_score_merge_private_bfd_data): Likewise.
	* elf32-score7.c (s7_elf32_score_merge_private_bfd_data): Likewise.
	* elf32-sh.c (sh_merge_bfd_arch, sh_elf_merge_private_data): Likewise.
	* elf32-sh64.c (sh64_elf_merge_private_data): Likewise.
	* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Likewise.
	* elf32-tic6x.c (elf32_tic6x_merge_attributes): Likewise.
	(elf32_tic6x_merge_private_bfd_data): Likewise.
	* elf32-v850.c (v850_elf_merge_private_bfd_data): Likewise.
	* elf32-vax.c (elf32_vax_merge_private_bfd_data): Likewise.
	* elf32-visium.c (visium_elf_merge_private_bfd_data): Likewise.
	* elf32-xtensa.c (elf_xtensa_merge_private_bfd_data): Likewise.
	* elf64-ia64-vms.c (elf64_ia64_merge_private_bfd_data): Likewise.
	* elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Likewise.
	* elf64-s390.c (elf64_s390_merge_private_bfd_data): Likewise.
	* elf64-sh64.c (sh_elf64_merge_private_data): Likewise.
	* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_merge_private_bfd_data): Likewise.
	* elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): Likewise.
	* elfxx-mips.c (mips_elf_merge_obj_e_flags): Likewise.
	(mips_elf_merge_obj_attributes): Likewise.
	(_bfd_mips_elf_merge_private_bfd_data): Likewise.
	* elfxx-mips.h (_bfd_mips_elf_merge_private_bfd_data): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): Likewise.
	* elfxx-sparc.h (_bfd_sparc_elf_merge_private_bfd_data): Likewise.
	* elfxx-target.h (bfd_elfNN_bfd_merge_private_bfd_data): Likewise.
	* elfxx-tilegx.c (_bfd_tilegx_elf_merge_private_bfd_data): Likewise.
	* elfxx-tilegx.h (_bfd_tilegx_elf_merge_private_bfd_data): Likewise.
	* libbfd-in.h (_bfd_generic_bfd_merge_private_bfd_data): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
ld/
	* ldlang.c (lang_check): Update bfd_merge_private_bfd_data call.
2016-10-07 11:24:41 +10:30
Alan Modra
1047201fd0 bfd_merge_private_bfd_data tidy
bfd_merge_private_bfd_data and _bfd_generic_verify_endian_match are
linker functions, so move them to linker.c.

bfd/
	* Makefile.am (LIBBFD_H_FILES): Update.
	* doc/Makefile.am (LIBBFD_H_DEP): Likewise.
	* cpu-sh.c (sh_merge_bfd_arch): Move to..
	* elf32-sh.c: ..here, and make static.
	* elf32-arc.c (arc_elf_merge_private_bfd_data): Delete extraneous
	error.
	* elf32-cris.c (cris_elf_merge_private_bfd_data): Don't call
	_bfd_generic_verify_endian_match.
	* elf32-microblaze.c (microblaze_elf_merge_private_bfd_data): Delete.
	(bfd_elf32_bfd_merge_private_bfd_data): Define as
	_bfd_generic_verify_endian_match.
	* elf32-mt.c (mt_elf_merge_private_bfd_data): Don't test
	boolean == FALSE.
	* elf32-xgate.c (_bfd_xgate_elf_merge_private_bfd_data): Delete.
	(bfd_elf32_bfd_merge_private_bfd_data): Don't define.
	* elf32-xgate.h (_bfd_xgate_elf_merge_private_bfd_data): Delete.
	* libbfd-in.h (_bfd_generic_verify_endian_match): Delete.
	* libbfd.c (_bfd_generic_verify_endian_match): Move to..
	* linker.c: ..here, and make internal.
	* bfd.c (bfd_merge_private_bfd_data): Move to..
	* linker.c: ..here.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
opcodes/
	* sh-opc.h (sh_merge_bfd_arch): Delete prototype.
2016-10-07 11:24:21 +10:30
Alan Modra
52d45da3f2 Make bfd_error_handler_type like vprintf
It was like printf, which means you can't use bfd_set_error_handler to
hook in a function to do something and then call the original handler.

The patch also deletes some unused functions and makes pointers local.

bfd/
	* bfd-in.h: Include stdarg.h.
	* bfd.c (bfd_error_handler_type): Make like vprintf.
	(_bfd_error_internal): Rename from _bfd_error_handler.  Make static.
	(error_handler_internal): New function, split out from..
	(_bfd_default_error_handler): ..here.  Rename to _bfd_error_handler.
	(bfd_set_error_handler): Update.
	(bfd_get_error_handler, bfd_get_assert_handler): Delete.
	(_bfd_assert_handler): Make static.
	* coffgen.c (null_error_handler): Update params.
	* elf-bfd.h (struct elf_backend_data <link_order_error_handler>):
	Don't use bfd_error_handler_type.
	* elf64-mmix.c (mmix_dump_bpo_gregs): Likewise.
	* elfxx-target.h (elf_backend_link_order_error_handler): Default
	to _bfd_error_handler.
	* libbfd-in.h (_bfd_default_error_handler): Don't declare.
	(bfd_assert_handler_type): Likewise.
	(_bfd_error_handler): Update.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
ld/
	* ldlang.c (ignore_bfd_errors): Update params.
2016-09-30 11:38:39 +09:30
Cupertino Miranda
a87aa054a6 Fixes to legacy ARC relocations.
Added support for ARC_SDA_12 reloc.
Fixed ARC_N32_ME.
Added ME (middle-endian) to ARC_SDA_12 reloc.

bfd/ChangeLog:

Cupertino Miranda  <cmiranda@synopsys.com>
	* reloc.c: Fixed type in ARC_SECTOFF relocations. Added ARC_SDA_12
	relocation.
	* bfd-in2.h: Regenerated from the previous changes.
	* libbfd.h: Regenerated from the previous changes.

include/ChangeLog:

Cupertino Miranda  <cmiranda@synopsys.com>
	* elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
	SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
	* opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12 relocation.
2016-08-26 12:09:17 +02:00
Alan Modra
00dad9a491 Don't include libbfd.h outside of bfd, part 2
Make bfd_default_set_arch_mach available to a bunch of gas backend
files.

bfd/
	* archures.c (bfd_default_set_arch_mach): Make available in bfd.h.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-epiphany.c: Don't include libbfd.h.
	* config/tc-frv.c: Likewise.
	* config/tc-ip2k.c: Likewise.
	* config/tc-iq2000.c: Likewise.
	* config/tc-m32c.c: Likewise.
	* config/tc-mep.c: Likewise.
	* config/tc-mt.c: Likewise.
	* config/tc-nios2.c: Likewise.
2016-07-16 13:27:30 +09:30
Alan Modra
76e7a75123 Don't include libbfd.h outside of bfd, part 1
Make BFD_ALIGN available to objcopy.  Fix assertions.  Don't use
bfd_log2 in ppc32elf.em or bfd_malloc in xtensaelf.em and bucomm.c.

bfd/
	* libbfd-in.h (BFD_ALIGN): Move to..
	* bfd-in.h: ..here.
	* elf32-ppc.h (struct ppc_elf_params): Add pagesize.
	* elf32-ppc.c (default_params): Adjust init.
	(ppc_elf_link_params): Set pagesize_p2.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
binutils/
	* ar.c: Don't include libbfd.h.
	* objcopy.c: Likewise.
	* bucomm.c (bfd_get_archive_filename): Use xmalloc rather than
	bfd_malloc.
gas/
	* config/bfin-parse.y: Don't include libbfd.h.
	* config/tc-bfin.c: Likewise.
	* config/tc-rl78.c: Likewise.
	* config/tc-rx.c: Likewise.
	* config/tc-metag.c: Likewise.
	(create_dspreg_htabs, create_scond_htab): Use gas_assert not BFD_ASSERT.
	* Makefile.am: Update dependencies.
	* Makefile.in: Regenerate.
ld/
	* ldlang.c: Don't include libbfd.h.
	* emultempl/nds32elf.em: Likewise.
	* emultempl/ppc64elf.em: Likewise.
	* emultempl/ppc32elf.em: Likewise.
	(pagesize): Delete.
	(params): Update init.
	(ppc_after_open_output): Use params.pagesize.  Don't call bfd_log2.
	(PARSE_AND_LIST_ARGS_CASES): Use params.pagesize.
	* emultempl/sh64elf.em: Don't include libbfd.h.
	(after_allocation): Use ASSERT, not BFD_ASSERT.
	* emultempl/xtensaelf.em: Don't include libbfd.h.
	(replace_insn_sec_with_prop_sec): Use xmalloc, not bfd_malloc.
	* Makefile.am: Update dependencies.
	* Makefile.in: Regenerate.
2016-07-16 13:25:11 +09:30
Maciej W. Rozycki
c9775dde32 MIPS16: Add R_MIPS16_PC16_S1 branch relocation support
For R_MIPS16_PC16_S1 the calculation is `(sign_extend(A) + S - P) >> 1'
and the usual MIPS16 bit shuffling applies to relocated field handling,
as per the encoding of the branch target in the extended form of the
MIPS16 B, BEQZ, BNEZ, BTEQZ and BTNEZ instructions.

	include/
	* elf/mips.h (R_MIPS16_PC16_S1): New relocation.

	bfd/
	* elf32-mips.c (elf_mips16_howto_table_rel): Add
	R_MIPS16_PC16_S1.
	(mips16_reloc_map): Likewise.
	* elf64-mips.c (mips16_elf64_howto_table_rel): Likewise.
	(mips16_elf64_howto_table_rela): Likewise.
	(mips16_reloc_map): Likewise.
	* elfn32-mips.c (elf_mips16_howto_table_rel): Likewise.
	(elf_mips16_howto_table_rela): Likewise.
	(mips16_reloc_map): Likewise.
	* elfxx-mips.c (mips16_branch_reloc_p): New function.
	(mips16_reloc_p): Handle R_MIPS16_PC16_S1.
	(b_reloc_p): Likewise.
	(mips_elf_calculate_relocation): Likewise.
	(_bfd_mips_elf_check_relocs): Likewise.
	* reloc.c (BFD_RELOC_MIPS16_16_PCREL_S1): New relocation.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

	gas/
	* config/tc-mips.c (mips16_reloc_p): Handle
	BFD_RELOC_MIPS16_16_PCREL_S1.
	(b_reloc_p): Likewise.
	(limited_pcrel_reloc_p): Likewise.
	(md_pcrel_from): Likewise.
	(md_apply_fix): Likewise.
	(tc_gen_reloc): Likewise.
	(md_convert_frag): Likewise.
	(mips_fix_adjustable): Update comment.
	* testsuite/gas/mips/mips16-branch-reloc-2.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-reloc-3.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-addend-2.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-addend-3.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-absolute.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-reloc-2.l: Remove file.
	* testsuite/gas/mips/mips16-branch-reloc-3.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-2.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-3.l: Remove file.
	* testsuite/gas/mips/mips16-branch-absolute.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-2.s: Add padding.
	* testsuite/gas/mips/branch-weak.s: Adjust alignment, avoid
	implicit instruction padding, avoid MIPS16 JR->JRC conversion.
	* testsuite/gas/mips/branch-weak-6.d: New test.
	* testsuite/gas/mips/branch-weak-7.d: New test.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/mips16-branch-2.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-3.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-addend-2.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-addend-3.d: New test.
	* testsuite/ld-mips-elf/mips16-branch.s: New test source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-06-28 01:29:56 +01:00
H.J. Lu
e6cc316af9 Enable 64-bit archives in ar and ranlib
Since existing ld and gold support the 64-bit (MIPS) ELF archives, we
can use the 64-bit (MIPS) ELF archives as 64-bit archives.  Since the
plugin target is used to create archive in plugin-enabled ar, we need
a way to enable 64-bit archives in the plugin target.  This patch adds
--enable-64-bit-archive to bfd to force 64-bit archives in ar and
ranlib.  Since both 64-bit MIPS and s390 ELF targets currently use
64-bit archives, 64-bit archives are enabled by default for them.
64-bit archive is generated automatically if the archive is too big.

Tested on Linux/x86 and Linux/x86-64 with existing ld and gold.

bfd/

	PR binutils/14625
	* archive.c (bfd_slurp_armap): Replace
	bfd_elf64_archive_slurp_armap with
	_bfd_archive_64_bit_slurp_armap.
	(bsd_write_armap): Call _bfd_archive_64_bit_write_armap if
	BFD64 is defined and the archive is too big.
	(coff_write_armap): Likewise.
	* archive64.c (bfd_elf64_archive_slurp_armap): Renamed to ...
	(_bfd_archive_64_bit_slurp_armap): This.
	(bfd_elf64_archive_write_armap): Renamed to ...
	(_bfd_archive_64_bit_write_armap): This.
	* configure.ac: Add --enable-64-bit-archive.
	(want_64_bit_archive): New.  Set to true by default for 64-bit
	MIPS and s390 ELF targets.
	(USE_64_BIT_ARCHIVE): New AC_DEFINE.
	* config.in: Regenerated.
	* configure: Likewise.
	* elf64-mips.c (bfd_elf64_archive_functions): Removed.
	(bfd_elf64_archive_slurp_armap): Likewise.
	(bfd_elf64_archive_write_armap): Likewise.
	(bfd_elf64_archive_slurp_extended_name_table): Likewise.
	(bfd_elf64_archive_construct_extended_name_table): Likewise.
	(bfd_elf64_archive_truncate_arname): Likewise.
	(bfd_elf64_archive_read_ar_hdr): Likewise.
	(bfd_elf64_archive_write_ar_hdr): Likewise.
	(bfd_elf64_archive_openr_next_archived_file): Likewise.
	(bfd_elf64_archive_get_elt_at_index): Likewise.
	(bfd_elf64_archive_generic_stat_arch_elt): Likewise.
	(bfd_elf64_archive_update_armap_timestamp): Likewise.
	* elf64-s390.c (bfd_elf64_archive_functions): Removed.
	(bfd_elf64_archive_slurp_armap): Likewise.
	(bfd_elf64_archive_write_armap): Likewise.
	(bfd_elf64_archive_slurp_extended_name_table): Likewise.
	(bfd_elf64_archive_construct_extended_name_table): Likewise.
	(bfd_elf64_archive_truncate_arname): Likewise.
	(bfd_elf64_archive_read_ar_hdr): Likewise.
	(bfd_elf64_archive_write_ar_hdr): Likewise.
	(bfd_elf64_archive_openr_next_archived_file): Likewise.
	(bfd_elf64_archive_get_elt_at_index): Likewise.
	(bfd_elf64_archive_generic_stat_arch_elt): Likewise.
	(bfd_elf64_archive_update_armap_timestamp): Likewise.
	* elfxx-target.h (TARGET_BIG_SYM): Use _bfd_archive_64_bit on
	BFD_JUMP_TABLE_ARCHIVE if USE_64_BIT_ARCHIVE is defined and
	bfd_elfNN_archive_functions isn't defined.
	(TARGET_LITTLE_SYM): Likewise.
	* libbfd-in.h (_bfd_archive_64_bit_slurp_armap): New prototype.
	(_bfd_archive_64_bit_write_armap): Likewise.
	(_bfd_archive_64_bit_slurp_extended_name_table): New macro.
	(_bfd_archive_64_bit_construct_extended_name_table): Likewise.
	(_bfd_archive_64_bit_truncate_arname): Likewise.
	(_bfd_archive_64_bit_read_ar_hdr): Likewise.
	(_bfd_archive_64_bit_write_ar_hdr): Likewise.
	(_bfd_archive_64_bit_openr_next_archived_file): Likewise.
	(_bfd_archive_64_bit_get_elt_at_index): Likewise.
	(_bfd_archive_64_bit_generic_stat_arch_elt): Likewise.
	(_bfd_archive_64_bit_update_armap_timestamp): Likewise.
	* libbfd.h: Regenerated.
	* plugin.c (plugin_vec): Use _bfd_archive_64_bit on
	BFD_JUMP_TABLE_ARCHIVE if USE_64_BIT_ARCHIVE is defined.

binutils/

	PR binutils/14625
	* NEWS: Mention --enable-64-bit-archive.
2016-05-25 09:47:03 -07:00
Jim Wilson
b7f28d873c Enable R_AARCH64_NONE for 64-bit code.
* elfnn-aarch64.c: Unconditionally enable R_AARCH64_NULL and
	R_AARCH64_NONE.  Use HOWTO64 for R_AARCH64_NULL.
	* relocs.c: Add BFD_RELOC_AARCH64_NULL.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
2016-05-23 16:38:21 -07:00
Nick Clifton
4f3b23b390 Add support for non-ELF targets to check their relocs.
bfd	* aout-adobe.c: Use _bfd_generic_link_check_relocs.
	* aout-target.h: Likewise.
	* aout-tic30.c: Likewise.
	* binary.c: Likewise.
	* bout.c: Likewise.
	* coff-alpha.c: Likewise.
	* coff-rs6000.c: Likewise.
	* coff64-rs6000.c: Likewise.
	* coffcode.h: Likewise.
	* i386msdos.c: Likewise.
	* i386os9k.c: Likewise.
	* ieee.c: Likewise.
	* ihex.c: Likewise.
	* libbfd-in.h: Likewise.
	* libecoff.h: Likewise.
	* mach-o-target.c: Likewise.
	* mmo.c: Likewise.
	* nlm-target.h: Likewise.
	* oasys.c: Likewise.
	* pef.c: Likewise.
	* plugin.c: Likewise.
	* ppcboot.c: Likewise.
	* som.c: Likewise.
	* srec.c: Likewise.
	* tekhex.c: Likewise.
	* versados.c: Likewise.
	* vms-alpha.c: Likewise.
	* xsym.c: Likewise.
	* elfxx-target.h: Use _bfd_elf_link_check_relocs.
	* linker.c (bfd_link_check_relocs): New function.
	(_bfd_generic_link_check_relocs): New function.
	* targets.c (BFD_JUMP_TABLE_LINK): Add initialization of
	_bfd_link_check_relocs field.
	(struct bfd_target)L Add _bfd_link_check_relocs field.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

ld	* ldlang.c (lang_check_relocs): Use bfd_link_check_relocs in
	prefernce to _bfd_elf_link_check_relocs.  Drop test for ELF
	targets.  Do not stop the checks when problems are encountered.

include	* bfdlink.h: Add prototype for bfd_link_check_relocs.
2016-04-21 15:43:00 +01:00
Andrew Burgess
4b0c052e45 arc/nps400 : New cmem instructions and associated relocation
Add support for arc/nps400 cmem instructions, these load and store
instructions are hard-wired to access "0x57f00000 + 16-bit-offset".

Supporting this relocation required some additions to the arc relocation
handling in the bfd library, as well as the standard changes required to
add a new relocation type.

There's a test of the new instructions in the assembler, and a test of
the relocation in the linker.

bfd/ChangeLog:

	* reloc.c: Add BFD_RELOC_ARC_NPS_CMEM16 entry.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-arc.c: Add 'opcode/arc.h' include.
	(struct arc_relocation_data): Add symbol_name.
	(arc_special_overflow_checks): New function.
	(arc_do_relocation): Use arc_special_overflow_checks, reindent as
	required, add an extra comment.
	(elf_arc_relocate_section): Setup symbol_name in reloc_data.

gas/ChangeLog:

	* testsuite/gas/arc/nps400-3.d: New file.
	* testsuite/gas/arc/nps400-3.s: New file.

include/ChangeLog:

	* elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
	* opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.

ld/ChangeLog:

	* testsuite/ld-arc/arc.exp: New file.
	* testsuite/ld-arc/nps-1.s: New file.
	* testsuite/ld-arc/nps-1a.d: New file.
	* testsuite/ld-arc/nps-1b.d: New file.
	* testsuite/ld-arc/nps-1b.err: New file.

opcodes/ChangeLog:

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.
2016-04-14 17:16:46 +01:00
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Mickael Guene
72d98d16ed [ARM] Add support for thumb1 pcrop relocations.
To support thumb1 execute-only code we need to support four new
relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC,
R_ARM_THM_ALU_ABS_G2_NC and  R_ARM_THM_ALU_ABS_G3_NC).
These relocations allow the static linker to finalize construction
of symbol address.
Typical sequence of code to get address of the symbol foo is then
the following :
	movs	r3, #:upper8_15:#foo
	lsls	r3, #8
	adds	r3, #:upper0_7:#foo
	lsls	r3, #8
	adds	r3, #:lower8_15:#foo
	lsls	r3, #8
	adds	r3, #:lower0_7:#foo
This will give following sequence of text and relocations after
assembly :
   4:	2300      	movs	r3, #0
			4: R_ARM_THM_ALU_ABS_G3_NC	foo
   6:	021b      	lsls	r3, r3, #8
   8:	3300      	adds	r3, #0
			8: R_ARM_THM_ALU_ABS_G2_NC	foo
   a:	021b      	lsls	r3, r3, #8
   c:	3300      	adds	r3, #0
			c: R_ARM_THM_ALU_ABS_G1_NC	foo
   e:	021b      	lsls	r3, r3, #8
  10:	3300      	adds	r3, #0
			10: R_ARM_THM_ALU_ABS_G0_NC	foo
2015-12-16 10:19:51 +01:00
Alan Modra
006589cfa1 R_PPC64_ENTRY
Add a new relocation that marks large-model entry code, for edit back
to medium-model.

include/elf/
	* ppc64.h (R_PPC64_ENTRY): Define.
bfd/
	* reloc.c (BFD_RELOC_PPC64_ENTRY): New.
	* elf64-ppc.c (reloc_howto_type ppc64_elf_howto_raw): Add
	entry for R_PPC64_ENTRY.
	(LD_R2_0R12, ADD_R2_R2_R12, LIS_R2, ADDIS_R2_R12): Define.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_ENTRY.
	(ppc64_elf_relocate_section): Edit code at R_PPC64_ENTTY.  Use
	new insn defines.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
2015-12-07 13:14:53 +10:30
Tristan Gingold
f075eb5e6b binutils: add support for arm-*-darwin and aarch64-*-darwin.
Currently only in bfd and binutils.

ChangeLog/
	* configure.ac: Add aarch64-*-darwin* and arm-*-darwin*.
	* configure: Regenerate.

bfd/ChangeLog/
	* targets.c (aarch64_mach_o_vec, arm_mach_o_vec): Declare.
	(_bfd_target_vector): Add new vectors.
	* reloc.c (BFD_RELOC_MACH_O_SUBTRACTOR32)
	(BFD_RELOC_MACH_O_SUBTRACTOR64, BFD_RELOC_MACH_O_ARM64_ADDEND)
	(BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21)
	(BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12)
	(BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT): New relocations.
	(BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32)
	(BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64): Remove.
	* mach-o-x86-64.c (bfd_mach_o_x86_64_swap_reloc_out): Change
	name of subtractor relocations.
	* config.bfd: Handle aarch64-*-darwin*, arm-*-darwin*.
	* Makefile.am (BFD32_BACKENDS): Add mach-o-arm.lo.
	(BFD32_BACKENDS_CFILES): Add mach-o-arm.c.
	(BFD64_BACKENDS): Add mach-o-aarch64.lo.
	(BFD64_BACKENDS_CFILES): Add mach-o-aarch64.c.
	* configure.ac: Handle aarch64_mach_o_vec and arm_mach_o_vec.
	* mach-o-aarch64.c: New file.
	* mach-o-arm.c: New file.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
2015-11-20 14:53:06 +01:00
Peter Bergner
a680de9a98 Add assembler, disassembler and linker support for power9.
include/opcode/
	* ppc.h (PPC_OPCODE_POWER9): New define.
	(PPC_OPCODE_VSX3): Likewise.

opcodes/
	* ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries.
	Add PPC_OPCODE_VSX3 to the vsx entry.
	(powerpc_init_dialect): Set default dialect to power9.
        * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd,
        insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1,
        extract_l1 insert_xtq6, extract_xtq6): New static functions.
        (insert_esync): Test for illegal L operand value.
	(DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6,
	XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA,
	XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK,
	XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3,
	PPCVSX3): New defines.
	(powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu,
	fcmpo, ftdiv, ftsqrt>: Use XBF_MASK.
	<mcrxr>: Use XBFRARB_MASK.
	<addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq.,
	bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc.,
	cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first,
	cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx,
	lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll,
	lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw,
	modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last,
	rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx,
	stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx,
	subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh,
	vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
	vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd,
	vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d,
	vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx,
	vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq,
	vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd,
	vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait,
	xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp,
	xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp,
	xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz,
	xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp,
	xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp,
	xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo,
	xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo,
	xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo,
	xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp,
	xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp,
	xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp,
	xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw,
	xxinsertw, xxperm, xxpermr, xxspltib>: New instructions.
	<doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9.
	<tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands.

include/elf/
	* ppc.h (R_PPC_REL16DX_HA): New reloction.
	* ppc64.h (R_PPC64_REL16DX_HA): Likewise.

bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
	(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
	(ppc_elf_addr16_ha_reloc): Likewise.
	(ppc_elf_check_relocs): Likewise.
	(ppc_elf_relocate_section): Likewise.
	(is_insn_dq_form): Handle lxv and stxv instructions.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA.
	(ppc64_elf_ha_reloc): Likewise.
	(ppc64_elf_check_relocs): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
	* reloc.c (BFD_RELOC_PPC_REL16DX_HA): New.

elfcpp/
	* powerpc.h (R_POWERPC_REL16DX_HA): Define.

gas/
	* doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9.
	* doc/c-ppc.texi (PowerPC-Opts):  Likewise.
	* config/tc-ppc.c (md_show_usage): Likewise.
	(md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA.
	(md_apply_fix): Likewise.
	(ppc_handle_align): Handle power9's group ending nop.

gas/testsuite/
	* gas/ppc/altivec3.s: New test.
	* gas/ppc/altivec3.d: Likewise.
	* gas/ppc/vsx3.s: Likewise.
	* gas/ppc/vsx3.d: Likewise.
	* gas/ppc/power9.s: Likewise.
	* gas/ppc/power9.d: Likewise.
	* gas/ppc/ppc.exp: Run them.
	* gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests.
	* gas/ppc/power8.d: Likewise.
	* gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ...
	<lxvd2x, stxvd2x>: ...to this.
	* gas/ppc/vsx.d: Likewise.

gold/
	* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
	(Powerpc_relocate_functions::addr16dx_ha): Likewise.
	(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.

ld/testsuite/
	* ld-powerpc/addpcis.d: New test.
	* ld-powerpc/addpcis.s: New test.
	* ld-powerpc/powerpc.exp: Run it.
2015-11-11 19:52:52 -06:00
Cupertino Miranda
6f4b1afcdc Fix errors in the gas testsuite for the ARC target.
bfd	* reloc.c (BFD_RELOC_ARC_32_PCREL): New entry.
	(ARC_TLS_DTPOFF): Arrange it in order.
	* elf32-arc.c (arc_elf_howto_ini): Update formula.
	(get_middle_endian_relocation): New function.
	(PDATA): Define.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

elf	* arc-reloc.def (ARC_32_PCREL): New definition.

gas	* config/tc-arc.c (tokenize_arguments): Avoid creating unused
	symbols when parsing relocation types.
	(md_apply_fix): Handle TLS relocations. Fix BFD_RELOC_ARC_32_PCREL
	relocation.
	(arc_check_reloc): Emit BFD_RELOC_ARC_32_PCREL relocation.
2015-10-28 13:48:00 +00:00
H.J. Lu
56ceb5b540 Add R_X86_64_[REX_]GOTPCRELX support to gas and ld
This patch adds support for the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in

https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0

to gas and ld.  It updates gas to generate R_X86_64_GOTPCRELX,
R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory
operand, foo@GOTPCREL(%rip).  With the locally defined symbol, foo, we
convert

  mov foo@GOTPCREL(%rip), %reg

to

   lea foo(%rip), %reg

and convert

   call/jmp *foo@GOTPCREL(%rip)
to

   nop call foo/jmp foo nop

When PIC is false, convert

   test %reg, foo@GOTPCREL(%rip)
to

test $foo, %reg

and convert

   binop foo@GOTPCREL(%rip), %reg

to

   binop $foo, %reg

where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.

bfd/

	* elf64-x86-64.c: Include opcode/i386.h.
	(x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.
	(R_X86_64_standard): Replace R_X86_64_PLT32_BND with
	R_X86_64_REX_GOTPCRELX.
	(x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and
	BFD_RELOC_X86_64_REX_GOTPCRELX.
	(need_convert_mov_to_lea): Renamed to ...
	(need_convert_load): This.
	(elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.  Replace need_convert_mov_to_lea with
	need_convert_load.
	(elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.
	(elf_x86_64_size_dynamic_sections): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_convert_mov_to_lea): Renamed to ...
	(elf_x86_64_convert_load): This.  Replace need_convert_mov_to_lea
	with need_convert_load.  Support R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX transformations.
	* reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New.
	(BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX.
	(tc_gen_reloc): Likewise.
	(i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or
	BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set.
	* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return
	true for BFD_RELOC_X86_64_GOTPCRELX and
	BFD_RELOC_X86_64_REX_GOTPCRELX.

gas/testsuite/

	* gas/i386/i386.exp: Run x86-64-gotpcrel.
	* gas/i386/x86-64-gotpcrel.d: New file.
	* gas/i386/x86-64-gotpcrel.s: Likewise.
	* gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
	* gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with
	R_X86_64_REX_GOTPCRELX.
	* gas/i386/ilp32/x86-64-localpic.d: Likewise.

include/elf/

	* x86-64.h (R_X86_64_GOTPCRELX): New.
	(R_X86_64_REX_GOTPCRELX): Likewise.

ld/testsuite/

	* ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL
	with R_X86_64_REX_GOTPCRELX.
	* ld-x86-64/plt-main1.rd: Likewise.
	* ld-x86-64/plt-main3.rd: Likewise.
	* ld-x86-64/plt-main4.rd: Likewise.
	* ld-x86-64/gotpcrel1.dd: New file.
	* ld-x86-64/gotpcrel1.out: Likewise.
	* ld-x86-64/gotpcrel1a.S: Likewise.
	* ld-x86-64/gotpcrel1b.c: Likewise.
	* ld-x86-64/gotpcrel1c.c: Likewise.
	* ld-x86-64/gotpcrel1d.S: Likewise.
	* ld-x86-64/load1.s: Likewise.
	* ld-x86-64/load1a.d: Likewise.
	* ld-x86-64/load1b.d: Likewise.
	* ld-x86-64/load1c.d: Likewise.
	* ld-x86-64/load1d.d: Likewise.
	* ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d
	tests.  Run gotpcrel1 test.
2015-10-22 04:49:38 -07:00
H.J. Lu
02a866936d Add R_386_GOT32X support to gas and ld
This patch adds support for the R_386_GOT32X relocation proposed in

https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I

to gas and ld.  It updates gas to generate R_386_GOT32X relocation for
memory operand, foo@GOT[(%reg)].  We must encode "mov foo@GOT, %eax"
with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be
transformed to "lea foo, %eax".  With the locally defined symbol, foo,
we convert

   mov foo@GOT[(%reg1)], %reg2
to
   lea foo[@GOTOFF(%reg1)], %reg2

and convert

   call/jmp *foo@GOT[(%reg)]
to

   nop call foo/jmp foo nop

When PIC is false, convert

   test %reg1, foo@GOT[(%reg2)]
to
   test $foo, %reg1

and convert

binop foo@GOT[(%reg1)], %reg2

to

binop $foo, %reg2

where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.

bfd/

	* elf32-i386.c: Include opcode/i386.h.
	(elf_howto_table): Add R_386_GOT32X.
	(R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X.
	(elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X.
	(need_convert_mov_to_lea): Renamed to ...
	(need_convert_load): This.
	(elf_i386_check_relocs): Handle R_386_GOT32X.  Replace
	need_convert_mov_to_lea with need_convert_load.
	(elf_i386_gc_sweep_hook): Handle R_386_GOT32X.
	(elf_i386_size_dynamic_sections): Likewise.
	(elf_i386_relocate_section): Likewise.
	(elf_i386_convert_mov_to_lea): Renamed to ...
	(elf_i386_convert_load): This.  Replace need_convert_mov_to_lea
	with need_convert_load.  Support R_386_GOT32X transformations.
	* reloc.c (BFD_RELOC_386_GOT32X): New.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_386_GOT32X.
	(tc_gen_reloc): Likewise.
	(match_template): Force 0x8b encoding for "mov foo@GOT, %eax".
	(output_disp): Check for "call/jmp *mem", "mov mem, %reg",
	"test %reg, mem" and "binop mem, %reg" where binop is one of
	adc, add, and, cmp, or, sbb, sub, xor instructions.  Set
	fx_tcbit if the REX prefix is generated.  Set fx_tcbit2 if
	BFD_RELOC_386_GOT32X should be generated.
	(i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2
	is set.

gas/testsuite/

	* gas/i386/got.d: New file.
	* gas/i386/got.s: Likewise.
	* gas/i386/i386.exp: Run got.
	* gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X.
	* gas/i386/mixed-mode-reloc32.d: Likewise.
	* gas/i386/reloc32.d: Likewise.

include/elf/

	* i386.h (R_386_GOT32X): New relocation.

ld/testsuite/

	* ld-i386/branch1.d: New file.
	* ld-i386/branch1.s: Likewise.
	* ld-i386/call1.d: Likewise.
	* ld-i386/call1.s: Likewise.
	* ld-i386/call2.d: Likewise.
	* ld-i386/call2.s: Likewise.
	* ld-i386/got1.dd: Likewise.
	* ld-i386/got1.out: Likewise.
	* ld-i386/got1a.S: Likewise.
	* ld-i386/got1b.c: Likewise.
	* ld-i386/got1c.c: Likewise.
	* ld-i386/got1d.S: Likewise.
	* ld-i386/jmp1.d: Likewise.
	* ld-i386/jmp1.s: Likewise.
	* ld-i386/jmp2.d: Likewise.
	* ld-i386/jmp2.s: Likewise.
	* ld-i386/load1.d: Likewise.
	* ld-i386/load1.s: Likewise.
	* ld-i386/load2.d: Likewise.
	* ld-i386/load2.s: Likewise.
	* ld-i386/load3.d: Likewise.
	* ld-i386/load3.s: Likewise.
	* ld-i386/load4.s: Likewise.
	* ld-i386/load4a.d: Likewise.
	* ld-i386/load4b.d: Likewise.
	* ld-i386/load5.s: Likewise.
	* ld-i386/load5a.d: Likewise.
	* ld-i386/load5b.d: Likewise.
	* ld-i386/load6.d: Likewise.
	* ld-i386/load6.s: Likewise.
	* ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2,
	load1, load2, load3, load4a, load4b, load5a, load5b and load6
	tests.  Run got1 test.
2015-10-22 04:47:07 -07:00
Nick Clifton
886a250647 New ARC implementation.
bfd	* archures.c: Remove support for older ARC. Added support for new
	ARC cpus (ARC600, ARC601, ARC700, ARCV2).
	* bfd-in2.h: Likewise.
	* config.bfd: Likewise.
	* cpu-arc.c: Likewise.
	* elf32-arc.c: Totally changed file with a refactored
	inplementation of the ARC port.
	* libbfd.h: Added ARC specific relocation types.
	* reloc.c: Likewise.

gas     * config/tc-arc.c: Revamped file for ARC support.
        * config/tc-arc.h: Likewise.
        * doc/as.texinfo: Add new ARC options.
        * doc/c-arc.texi: Likewise.

ld	* configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
	* emulparams/arcebelf_prof.sh: New file
	* emulparams/arcebelf.sh: Likewise.
	* emulparams/arceblinux_prof.sh: Likewise.
	* emulparams/arceblinux.sh: Likewise.
	* emulparams/arcelf_prof.sh: Likewise.
	* emulparams/arcelf.sh: Likewise.
	* emulparams/arclinux_prof.sh: Likewise.
	* emulparams/arclinux.sh: Likewise.
	* emulparams/arcv2elfx.sh: Likewise.
	* emulparams/arcv2elf.sh: Likewise.
	* emultempl/arclinux.em: Likewise.
	* scripttempl/arclinux.sc: Likewise.
	* scripttempl/elfarc.sc: Likewise.
	* scripttempl/elfarcv2.sc: Likewise
	* Makefile.am: Add new ARC emulations.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new feature.

opcodes * arc-dis.c: Revamped file for ARC support
	* arc-dis.h: Likewise.
	* arc-ext.c: Likewise.
	* arc-ext.h: Likewise.
	* arc-opc.c: Likewise.
	* arc-fxi.h: New file.
	* arc-regs.h: Likewise.
	* arc-tbl.h: Likewise.

binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
	and ARCv2.
	(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Likewise.
	* NEWS: Mention the new feature.

include	* dis-asm.h (arc_get_disassembler): Correct declaration.
	* arc-reloc.def: Macro file with definition of all relocation
	types.
	* arc.h: Changed macros for the newly supported ARC cpus.  Altered
	enum defining the supported relocations.
	* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
	macro for EM_ARC_COMPACT2.
        * arc-func.h: New file.
        * arc.h: Likewise.
2015-10-07 14:20:19 +01:00
Renlin Li
3b957e5b07 [Binutils][AARCH64]Add TLS IE large memory support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and
	AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Make
	TLSIE_MOVW_GOTTPREL_G1 check overflow.
	(aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1
	and TLSIE_MOVW_GOTTPREL_G0_NC.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): Add two entries for
	gottprel_g0_nc and gottprel_g1.
	(process_movw_reloc_info): Add support.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gottprel_g0_nc.d: New.
	* gas/aarch64/reloc-gottprel_g0_nc.s: New.
	* gas/aarch64/reloc-gottprel_g1.d: New.
	* gas/aarch64/reloc-gottprel_g1.s: New.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/tls-large-ie.d: New.
	* ld-aarch64/tls-large-ie.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li
3e8286c0d2 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g0_nc.d: New.
	* gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li
1aa66fb152 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g1.s: New.
	* gas/aarch64/reloc-tlsgd_g1.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li
ca632371ce [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry
	MOVW_GOTOFF_G0_NC.
	* libbfd.h: Regnerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g0_nc.
	(process_movw_reloc_info): Support gotoff_g0_nc.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g0_nc.s: New.
	* gas/aarch64/reloc-gotoff_g0_nc.d: New.
2015-10-02 17:56:07 +01:00
Renlin Li
654248e7f7 [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G1): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	MOVW_GOTOFF_G1.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g1.
	(process_movw_reloc_info): Support newly added modifier.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g1.s: New.
	* gas/aarch64/reloc-gotoff_g1.d: New.
2015-10-02 17:56:07 +01:00
Jiong Wang
4c5625238c [AArch64][5/6] GAS support TLSLD load/store relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c: New entries, including
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC.
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation types support for
  dtprel_lo12.
  (ldst_lo12_determine_real_reloc_type): Support
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  (parse_operands): Likewise.
  (md_apply_fix): Likewise
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-ldst8.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldstc.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst8.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
2015-08-19 16:54:39 +01:00
Jiong Wang
49df5539f9 [AArch64][3/6] GAS support TLSLD move/add relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers,
  "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
  "dtprel_g1_nc", "dtprel_g2".
  (md_apply_fix): Support new relocation types.
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_g0.s: New testcase.
  * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g2.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0.d: New expectation file.
  * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g2.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19 16:36:22 +01:00
Jiong Wang
13289c10e2 [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
2015-08-19 16:28:08 +01:00
H.J. Lu
1b7868733d Remove trailing spaces in bfd 2015-08-12 04:32:43 -07:00
Jiong Wang
70151fb54a [AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers
  "dtprel_lo12".
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11 21:26:31 +01:00
Jiong Wang
a12fad50d2 [AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
2015-08-11 21:25:51 +01:00