PyFile_FromString and PyFile_AsFile have been removed in Python 3.
There is no obvious replacement that works here, and we can't just
pass our FILE* to a DLL in Windows because it may use a different
C runtime.
So we just call a Python function which reads and executes file
contents. Care must be taken to execute it in the context of
__main__.
Tested by inverting the ifdef and running the testsuite on Debian
Linux (even without the patch, I failed at running the testsuite
on Windows). I did test with both Python 2 and 3.
gdb/ChangeLog:
2019-08-22 Christian Biesinger <cbiesinger@google.com>
* python/lib/gdb/__init__.py (_execute_file): New function.
* python/python.c (python_run_simple_file): Call gdb._execute_file
on Windows.
This racy fail message, reported in PR24929:
...
FAIL: gdb.multi/multi-term-settings.exp: inf1_how=attach: inf2_how=attach: \
stop with control-c
...
does not make clear which gdb_test fails here:
...
if {$expect_ttou} {
gdb_test "" "Quit" "stop with control-c"
} else {
gdb_test "" "received signal SIGINT.*" "stop with control-c"
}
...
Fix this by making the gdb_test message argument more informative.
Tested on x86_64-linux.
gdb/testsuite/ChangeLog:
2019-08-22 Tom de Vries <tdevries@suse.de>
* gdb.multi/multi-term-settings.exp (coretest): Make gdb_test messages
more informative.
This patch adds support for following CPUs:
Cortex-M35P, Cortex-A77, Cortex-A76AE.
Related specifications can be found at https://developer.arm.com/ip-products/processors.
gas/ChangeLog:
* config/tc-arm.c: New entries for Cortex-M35P, Cortex-A77,
and Cortex-A76AE.
* doc/c-arm.texi: Document new processors.
* testsuite/gas/arm/cpu-cortex-a76ae.d: New test.
* testsuite/gas/arm/cpu-cortex-a77.d: New test.
* testsuite/gas/arm/cpu-cortex-m35p.d: New test.
bfd/ChangeLog:
* cpu-arm.c: New entries for Cortex-M35P, Cortex-A77, Cortex-A76AE.
* atof-generic.c (atof_generic): Do not ignore leading zeros if
they appear after a decimal point.
* testsuite/gas/all/float.s: Extend test to include a number with
a leading decimal point followed by several zeroes.
* testsuite/gas/i386/fp.s: Likewise.
* testsuite/gas/i386/fp.d: Update expected output.
The Fortran parser contains some code that looks like it was probably
inherited from the C/C++ parser as it checks to see if the current
language is C++, which should never be true when we're in the Fortran
parser.
gdb/ChangeLog:
* f-exp.y (yylex): Remove is_a_field_of_this local variable, and
all uses as this was never set to anything but a zero value.
This patch fixes a few linker crashes due to TLS code reaching an assert when it
shouldn't.
The first scenario is with weak TLS symbols that remain weak during linking. In
this case the mid-end would not have seen a TLS symbol and so wouldn't have
allocated the TLS section. We currently assert here and the linker crashes with
a not very useful message.
This patch changes this to return the value 0 for the TLS symbol in question
emulating what lld and gold and other BFD targets do. However because weak TLS
is implementation defined and we don't define any behavior for it I also emit a
warning to the user to inform them of such.
Secondly when a strong TLS reference is undefined. The linker crashes even after
it correctly reported that there is an undefined reference. This changes it so
that it gracefully exits and reports a useful error.
bfd/ChangeLog:
PR ld/24601
* elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS.
Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation.
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it.
* elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning
for weak TLS.
ld/ChangeLog:
PR ld/24601
* testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New.
* testsuite/ld-aarch64/undef-tls.d: New test.
* testsuite/ld-aarch64/undef-tls.s: New test.
* testsuite/ld-aarch64/weak-tls.d: New test.
* testsuite/ld-aarch64/weak-tls.s: New test.
The syntax of the directive is:
.float16 <0-n decimal numbers>
e.g.
.float16 0.5
.float16 10.2, NaN, 452.09
The floats will always be encoded using the binary16 format as described in the
IEEE 754-2008 standard. There is no need to support Arm's alternative half-precision
format since AArch64 only supports the IEEE format.
gas * config/tc-aarch64.c: Add float16 directive and add "Hh" to
acceptable float characters.
* doc/c-aarch64.texi: Documentation for float16 directive.
* testsuite/gas/aarch64/float16-be.d: New test.
* testsuite/gas/aarch64/float16-le.d: New test.
* testsuite/gas/aarch64/float16.s: New test.
* NEWS: Add NEWS entry.
This patch removes use of st_target_internal to cache the result of
comparing symbol names against CMSE_PREFIX. The problem with setting
a bit in st_target_internal in swap_symbol_in is that calling
bfd_elf_sym_name from swap_symbol_in requires symtab_hdr, and you
don't know for sure whether swap_symbol_in is operating on dynsyms
(and thus elf_tdata (abfd)->dynsymtab_hdr should be used) or on the
normal symtab (thus elf_tdata (abfd)->symtab_hdr). You can make an
educated guess based on abfd->flags & DYNAMIC but that relies on
knowing a lot about calls to bfd_elf_get_elf_syms, and is fragile in
the face of possible future changes.
include/
* elf/arm.h (ARM_GET_SYM_CMSE_SPCL, ARM_SET_SYM_CMSE_SPCL): Delete.
bfd/
* elf32-arm.c (cmse_scan): Don't use ARM_GET_SYM_CMSE_SPCL,
instead recognize CMSE_PREFIX in symbol name.
(elf32_arm_gc_mark_extra_sections): Likewise.
(elf32_arm_filter_cmse_symbols): Don't test ARM_GET_SYM_CMSE_SPCL.
(elf32_arm_swap_symbol_in): Don't invoke ARM_SET_SYM_CMSE_SPCL.
Running 'with' without arguments crashes GDB. This fixes it.
gdb/ChangeLog:
2019-08-21 Bogdan Harjoc <harjoc@gmail.com>
* cli/cli-cmds.c (with_command_1): Error out if no arguments.
gdb/testsuite/ChangeLog:
2019-08-21 Pedro Alves <palves@redhat.com>
* gdb.base/with.exp: Test "with" with no arguments.
gdb/ChangeLog:
2019-08-21 Christian Biesinger <cbiesinger@google.com>
* tui/tui-data.h (tui_gen_win_info): Add an =default
move constructor, required by some GCC versions.
Chengdu Haiguang IC Design Co., Ltd (Hygon) is a Joint Venture between
AMD and Haiguang Information Technology Co.,Ltd., which aims at
providing high performance x86 processors for the China server market.
Its first generation processor codename is Dhyana, which originates
from AMD technology and shares most of the architecture with AMD's
family 17h, but with different CPU Vendor ID("HygonGenuine")/Family
series number(Family 18h).
gdb/ChangeLog:
2019-08-21 Jinke Fan <fanjinke51@yeah.net>
* go32-nat.c (go32_sysinfo): Add hygon_p.
The test-case gdb-caching-proc.exp tests each gdb_caching_proc in
gdb/testsuite/lib/*.exp. However, the order of .exp file being tested can
change from run to run, because of using glob.
Fix this by sorting the glob result.
Tested on x86_64-linux.
gdb/testsuite/ChangeLog:
2019-08-21 Tom de Vries <tdevries@suse.de>
* gdb.base/gdb-caching-proc.exp: Sort files.
Turning various calls into methods has made it possible to now change
some tui_data_window methods to be private.
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-regs.h (struct tui_data_window) <last_regs_line_no,
line_from_reg_element_no, first_reg_element_no_inline,
display_all_data, delete_data_content_windows,
erase_data_content>: Now private.
This removes the HILITE and NO_HILITE defines from tui-data.h, in
favor of simply passing a bool to box_win.
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-wingeneral.c (box_win): Change type of highlight_flag.
(tui_unhighlight_win, tui_highlight_win)
(tui_win_info::make_window): Update.
* tui/tui-data.h (HILITE, NO_HILITE): Remove.
Some #defines in tui-data.h are only used in tui-stack.c, so move them
there.
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-data.h (PROC_PREFIX, LINE_PREFIX, PC_PREFIX)
(MIN_LINE_WIDTH, MIN_PROC_WIDTH, MAX_TARGET_WIDTH)
(MAX_PID_WIDTH): Move to tui-stack.c.
* tui/tui-stack.c (PROC_PREFIX, LINE_PREFIX, PC_PREFIX)
(MIN_LINE_WIDTH, MIN_PROC_WIDTH, MAX_TARGET_WIDTH)
(MAX_PID_WIDTH): Move from tui-data.h.
I combined several small changes into one patch here. I believe I
started by noticing that the "title" is not needed by tui_gen_win_info
and could be self-managing (i.e. std::string). Moving this revealed
that "can_box" is also a property of tui_win_info and not
tui_gen_win_info; and this in turn caused the changes to
tui_make_window and box_win.
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-wingeneral.h (tui_make_window): Don't declare.
* tui/tui-wingeneral.c (box_win): Change type of win_info.
(box_win): Update.
(tui_gen_win_info::make_window): Rename from tui_make_window.
(tui_win_info::make_window): New method.
(tui_gen_win_info::make_visible): Update.
* tui/tui-source.c (tui_source_window::set_contents): Update.
* tui/tui-regs.c (tui_data_window::show_register_group): Update.
(tui_data_window::display_registers_from): Update.
* tui/tui-layout.c (tui_gen_win_info::resize): Update.
* tui/tui-data.h (struct tui_gen_win_info) <make_window>:
Declare.
<can_box>: Remove.
<title>: Remove.
(struct tui_win_info) <make_window>: Declare.
<can_box>: Now virtual.
<title>: New member.
* tui/tui-data.c (~tui_gen_win_info): Don't free title.
* tui/tui-command.c (tui_cmd_window::resize): Update.
There's no need for tui_data_window::display_regs any more (if there
ever was). All the paths through data window construction will end up
setting this to true. This patch removes the member.
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-regs.h (struct tui_data_window) <display_regs>: Remove.
* tui/tui-regs.c (tui_data_window::show_registers): Update.
(tui_data_window::check_register_values): Update.
tui_data_window::regs_content is currently a vector of unique_ptr.
However, due to the way this is managed now, there is no need to keep
the pointers -- it can simply be a vector of the objects themselves.
This patch removes this extra layer of indirection.
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-regs.h (struct tui_data_window): Use
DISABLE_COPY_AND_ASSIGN.
<regs_content>: Change type, removing unique_ptr.
<tui_data_window>: Add move constructor.
* tui/tui-regs.c (tui_data_window::show_registers)
(tui_data_window::show_register_group)
(tui_data_window::display_registers_from)
(tui_data_window::display_registers_from)
(tui_data_window::first_data_item_displayed)
(tui_data_window::delete_data_content_windows)
(tui_data_window::rerender, tui_data_window::refresh_window)
(tui_data_window::check_register_values): Update.
This changes tui_check_register_values to be a method on
tui_data_window. An additional check in tui_register_changed is
needed, because TUI_DATA_WIN could be NULL at this point.
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-regs.h (struct tui_data_window) <check_register_values>:
Declare.
(tui_check_register_values): Don't declare.
* tui/tui-regs.c (tui_data_window::check_register_values): Rename
from tui_check_register_values.
* tui/tui-hooks.c (tui_register_changed): Update.
This moves tui_reg_layout later in tui-regs.c, closer to where it is
used.
It also changes tui_show_registers not to enable the TUI or change the
layout -- this is already done by this point by all the callers.
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-regs.c (tui_reg_layout): Move later.
(tui_show_registers): Don't enable TUI mode or change layout.
This changes tui_data_item_window::content to be a unique_xmalloc_ptr
and fixes up the fallout. It also removes a parameter from
tui_expand_tabs, as it was only ever given one value.
This also removes some tab-handling code from
tui_data_window::display_registers_from. Because the content can only
be set by tui_register_format, and because that calls tui_expand_tabs,
it's not possible to see a tab here.
gdb/ChangeLog
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-regs.h (struct tui_data_item_window)
<~tui_data_item_window>: Remove.
<content>: Now a unique_xmalloc_ptr.
* tui/tui-regs.c (tui_register_format): Return a
unique_xmalloc_ptr.
(tui_get_register): Update.
(~tui_data_item_window): Remove.
(tui_data_window::display_registers_from, tui_display_register):
Update.
* tui/tui-io.h (tui_expand_tabs): Update.
* tui/tui-io.c (tui_expand_tabs): Return a unique_xmalloc_ptr.
Remove "col" parameter.
The field tui_data_item_window::value is not used, so remove it.
gdb/ChangeLog
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-regs.h (struct tui_data_item_window) <value>: Remove
field.
* tui/tui-regs.c (~tui_data_item_window): Update.
This moves a couple of functions earlier in tui-regs.c. Previously
they were in the "command" section of the file, but really they belong
in the "window implementation" section.
gdb/ChangeLog
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-regs.c (tui_register_format, tui_get_register): Move
earlier.
tui_reg_command has an unnecessary NULL check. The preceding call to
tui_reg_layout will ensure the window exists. This patch removes the
check.
gdb/ChangeLog
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-regs.c (tui_reg_command): Remove NULL check.
The TUI has a few #defines that hold user-visible strings. As these
are only used in a single spot, this patch removes the defines,
preferring direct use of the string where needed. Furthermore, now
the strings are wrapped in _(), which is friendlier for i18n purposes.
gdb/ChangeLog
2019-08-20 Tom Tromey <tom@tromey.com>
* tui/tui-source.h (struct tui_source_window): Update.
* tui/tui-regs.c (tui_show_registers): Update.
* tui/tui-disasm.h (struct tui_disasm_window): Update.
* tui/tui-data.h (NO_SRC_STRING, NO_DISASSEM_STRING)
(NO_REGS_STRING): Remove defines.
Related specifications can be found at
https://developer.arm.com/ip-products/processors.
gas * NEWS: Mention the Arm and AArch64 new processors.
* config/tc-aarch64.c: New entries for Cortex-A34, Cortex-A65,
Cortex-A77, cortex-A65AE, and Cortex-A76AE.
* doc/c-aarch64.texi: Document new CPUs.
* testsuite/gas/aarch64/cpu-cortex-a34.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a65.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a65ae.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a76ae.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a77.d: New test.
* testsuite/gas/aarch64/nop-asm.s: New test.
bfd * cpu-aarch64.c: New entries for Cortex-A34, Cortex-A65,
Cortex-A77, cortex-A65AE, and Cortex-A76AE.
We currently use a padding NOP after a Thumb to Arm interworking veneer (BX pc).
The NOP is never executed but may result in a performance penalty on some cores.
For this reason this patch changes the NOPs after Thumb to Arm veneers into B .-2
and adds a note to this in the source code for future reference.
bfd/ChangeLog:
* elf32-arm.c (elf32_thumb2_plt_entry, elf32_arm_plt_thumb_stub,
elf32_arm_stub_long_branch_v4t_thumb_thumb,
elf32_arm_stub_long_branch_v4t_thumb_arm,
elf32_arm_stub_short_branch_v4t_thumb_arm,
elf32_arm_stub_long_branch_v4t_thumb_arm_pic,
elf32_arm_stub_long_branch_v4t_thumb_thumb_pic,
elf32_arm_stub_long_branch_v4t_thumb_tls_pic): Change nop to branch to
previous instruction.
ld/ChangeLog:
* testsuite/ld-arm/cortex-a8-fix-b-plt.d: Update Testcase.
* testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise.
* testsuite/ld-arm/cortex-a8-fix-bcc-plt.d: Likewise.
* testsuite/ld-arm/farcall-cond-thumb-arm.d: Likewise.
* testsuite/ld-arm/farcall-mixed-app.d: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.d: Likewise.
* testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm.d: Likewise.
* testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise.
* testsuite/ld-arm/farcall-thumb-thumb.d: Likewise.
* testsuite/ld-arm/fix-arm1176-on.d: Likewise.
* testsuite/ld-arm/ifunc-10.dd: Likewise.
* testsuite/ld-arm/ifunc-2.dd: Likewise.
* testsuite/ld-arm/ifunc-4.dd: Likewise.
* testsuite/ld-arm/ifunc-6.dd: Likewise.
* testsuite/ld-arm/ifunc-8.dd: Likewise.
* testsuite/ld-arm/jump-reloc-veneers-long.d: Likewise.
* testsuite/ld-arm/mixed-app.d: Likewise.
* testsuite/ld-arm/thumb2-b-interwork.d: Likewise.
* testsuite/ld-arm/tls-longplt.d: Likewise.
* testsuite/ld-arm/tls-thumb1.d: Likewise.
When running a pascal test with the stabs target board:
...
$ test=gdb.pascal/case-insensitive-symbols.exp
$ cd build/gdb/testsuite
$ make check RUNTESTFLAGS="$test --target_board=stabs"
...
we get:
...
nr of untested testcases 1
nr of unsupported tests 1
...
due to:
...
Error: Illegal parameter: -gstabs+^M
Error: /usr/bin/ppcx64 returned an error exitcode^M
...
OTOH, when running the same pascal test without the stabs target board:
...
$ make check RUNTESTFLAGS="$test"
...
we get:
...
nr of expected passes 20
...
But when subsequently again running with the stabs target board:
...
$ make check RUNTESTFLAGS="$test --target_board=stabs"
...
we now get:
...
nr of expected passes 20
...
The problem is that gdb_compile_pascal determines success based on existence
of the exec after compilation:
...
if ![file exists $destfile] {
unsupported "Pascal compilation failed: $result"
return "Pascal compilation failed."
}
...
without removing the exec before compilation, which allows a stale exec to
make it seem as if compilation has succeeded.
Fix this by removing the stale exec before compilation.
gdb/testsuite/ChangeLog:
2019-08-20 Tom de Vries <tdevries@suse.de>
* lib/pascal.exp (gdb_compile_pascal): Remove $destfile before
compilation.
For remotes which do not support btrace at all, we can save several
round trips for each thread. This is especially significant when your
remote is a kernel with 100s or 1000s of threads and latency is
intercontinental.
Previously, with target, remote, and infrun debugging enabled, one
might see:
Sending packet: $Hg18aee#43...Ack
Packet received: OK
Sending packet: $Hg186f7#eb...Ack
Packet received: OK
remote:target_xfer_partial (24, , 0x805454000, 0x0, 0x0, 4096) = -1, 0
repeated for all non-exited threads.
Afterwards, if the remote does not specify 'qXfer:btrace-conf:read+'
in qSupported stub features, these unnecessary thread switches are
avoided.
gdb/ChangeLog:
* remote.c (remote_target::remote_btrace_maybe_reopen): Avoid
unnecessary thread walk if remote doesn't support the packet.
gas/
* config/tc-mips.c (mips_move_labels): Retain ISA mode bit
when moving labels in text segments.
(mips_align): Indicate text mode when aligning labels in
text segments.
* gas/testsuite/gas/mips/insn-isa-mode.d: New test.
* gas/testsuite/gas/mips/insn-isa-mode.s: New test source.
* gas/testsuite/gas/mips/mips.exp: Run the new test.
value_has_field had a mis-indented line. This fixes it.
gdb/ChangeLog
2019-08-19 Tom Tromey <tromey@adacore.com>
* python/py-value.c (value_has_field): Fix indentation.
Sergio pointed out that commit commit aa3b6533 ("Allow nested function
displays") regressed a few gdb.fortran tests. I was able to reproduce
these failures with gcc head.
The bug is that some spots calling contained_in will in fact do the
wrong thing if nested functions are considered as contained. In the
particular case of the Fortran regression, it was the call in
block_innermost_frame, being called from get_hosting_frame -- in this
case, the caller is specifically trying to avoid the nested case.
This patch fixes the problem by adding an "allow_nested" parameter to
contained_in, essentially reverting the change for most callers.
gdb/ChangeLog
2019-08-19 Tom Tromey <tromey@adacore.com>
* printcmd.c (do_one_display, info_display_command): Update.
* block.h (contained_in): Return bool. Add allow_nested
parameter.
* block.c (contained_in): Return bool. Add allow_nested
parameter.
Currently, no release of GNU Source Highlight supports Rust. However,
I've checked in a patch to do so there, and I plan to make a new
release sometime this summer.
This patch prepares gdb for that by adding support for Rust to the
source highlighting code.
Because Source Highlight will throw an exception if the language is
unrecognized, this also changes gdb to ignore exceptions here. This
will cause gdb to fall back to un-highlighted source text.
This updates gdb's configure script to reject the combination of
Source Highlight and -static-libstdc++. This is done because it's not
possible to use -static-libstdc++ and then catch exceptions from a
shared library.
Tested with the current and development versions of Source Highlight.
gdb/ChangeLog
2019-08-19 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
* configure.ac: Disallow the combination of -static-libstdc++ and
source highlight.
* source-cache.c (get_language_name): Handle rust.
(source_cache::get_source_lines): Ignore highlighting exceptions.
gdb should normally not be linked with -static-libstdc++. Currently
this has not caused problems, but it's incompatible with catching an
exception thrown from a shared library -- and a subsequent patch
changes gdb to do just this.
This patch adds a new --with-static-standard-libraries flag to the
top-level configure. It defaults to "auto", which means enabled if
gcc is being built, and disabled otherwise.
ChangeLog
2019-08-19 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
* configure.ac: Add --with-static-standard-libraries.
A customer reported a case where addr2line was very slow. We tracked
this down to some N^2 behavior in _bfd_dwarf2_find_symbol_bias in the
unusual case where no function can be found.
This patch fixes the bug, and reduces the runtime for a particular
request from 127 seconds to 1 second.
bfd/ChangeLog
2019-08-19 Tom Tromey <tromey@adacore.com>
* dwarf2.c (_bfd_dwarf2_find_symbol_bias): Create hash table
holding symbols.
Given 32-bit pointers and a 64-bit bfd_size_type, it is relatively
easy to construct a value of augmentation_data_len (eg. 0x100000000)
that won't fail pointer checks but will print without bounds.
PR 24898
* dwarf.c (display_debug_frames): Use the read_cie check and error
for augmentation data length.
These are done in ppc64_elf_edit_toc, which now also garbage collects
unused GOT entries. The checks for legitimate instructions weren't
being done for the GOT relocs, unless the file also happened to have a
toc section.
* elf64-ppc.c (struct ppc64_elf_obj_tdata): Rename has_gotrel
to has_optrel.
(struct _ppc64_elf_section_data): Likewise.
(ppc64_elf_check_relocs): Set has_optrel for more relocs.
(ppc64_elf_edit_toc): Do ha/lo insn checks in GOT loop rather
than TOC loop. Check PLT16 insns too.
The tests were failing due to md_atof trying to do word-wise endian
switching on the float16 (for little-endian targets sometimes
multi word values have their word order changed).
However since a float16 is only 1 word wide, it would end up writing
incorrect data, as you cannot switch the word order of just one word.
* config/tc-arm.c (md_atof): Add precision check. Formatting.
