Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
that image properties such as endianness can be checked.
More strongly document the expected behavour of each of the sim_*
interfaces.
Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN. Use in sim_config.
* interp.c: #include bfd.h.
(target_byte_order): Delete.
(sim_kind, myname, big_endian_p): New static locals.
(sim_open): Set sim_kind, myname. Move call to set_endianness to
after argument parsing. Recognize -E arg, set endianness accordingly.
(sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
load file into simulator. Set PC from bfd.
(sim_create_inferior): Return SIM_RC. Delete arg start_address.
(set_endianness): Use big_endian_p instead of target_byte_order.
* Make-common.in (CSEARCH): Do not include the gdb directory in
the search path.
* Make-common.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_INLINE,
SIM_WARNING): Drop, requiring the simulator specific Makefile.in
to explicitly incorporate these.
* aclocal.m4 (--enable-sim-alignment); New option. Strongly
specify the alignment restrictions of the target architecture -
without this option all alignment restrictions are accomodated.
(--enable-sim-assert): New option. Conditionally compile in
assertion statements.
(--enable-sim-float): New option. Strongly specify the target's
floating point support.
(--enable-sim-hardware): New option. Specify the hardware devices
included in the simulation.
(--enable-sim-packages): New option. Specify the hardware
packages included in the simulation.
(--enable-sim-regparm): New option. Specify that parameters be
passed in registers instead of on the stack.
(--enable-sim-reserved-bits): New option. Specify that reserved
bits within an instruction are are correctly set.
(--enable-sim-smp): New option. Specify the level of SMP support
to be included in the simulator.
(--enable-sim-stdcall): New option. Specify an alternative
function call convention.
(--enable-sim-xor-endian): New option. Configure xor-endian
support used by some targets to implement bi-endian support.
(SignalException): Pass floating point cases to mips16_entry.
(ValueFPR): Don't restrict fmt_single and fmt_word to even
registers.
(StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
or fmt_word.
(COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
and then set the state to fmt_uninterpreted.
(COP_SW): Temporarily set the state to fmt_word while calling
ValueFPR.