Linker adds indirect symbols for versioned symbol aliases, which are
created by ".symver foo, foo@FOO", by checking symbol type, value and
section so that references to foo will be replaced by references to
foo@FOO if foo and foo@FOO have the same symbol type, value and section.
But in IR, since all symbols of the same type have the same value and
section, we can't tell if a symbol is an alias of another symbol by
their types, values and sections. We shouldn't add indirect symbols
for versioned symbol aliases in IR.
bfd/
PR ld/30281
* elflink.c (elf_link_add_object_symbols): Don't add indirect
symbols for ".symver foo, foo@FOO" aliases in IR.
ld/
PR ld/30281
* testsuite/ld-plugin/lto.exp: Add PR ld/30281 test.
* testsuite/ld-plugin/pr30281.t: New file.
* testsuite/ld-plugin/pr30281.c: Likewise.
(cherry picked from commit 79cfb928f5)
We noticed that a warning message about the use of scalar fp16
instructions being UNPREDICTABLE when conditionalized in an IT
block referenced the specific A-class architecture revision
ARMv8.2-A.
Many of these instructions are now also part of ARMv8.1-M, so
the warning message had become misleading. Here we just change
the message to not specify an architecture revision at all and
update all testing accordingly. This was done with a simple
find-n-replace within the binutils sources. No tests have
regressed for the arm target.
gas/ChangeLog:
* config/tc-arm.c (do_scalar_fp16_v82_encode): Remove
ARMv8.2-A from the warning message.
(do_neon_movhf): Likewise
* testsuite/gas/arm/armv8-2-fp16-scalar-bad.l: Likewise
* testsuite/gas/arm/mve-vaddsub-it-bad.l: Likewise
* testsuite/gas/arm/mve-vcvtne-it-bad.l: Likewise
* testsuite/gas/arm/mve-vcvtne-it.d: Likewise
Previously we had experienced issues with assembling a "VCVTNE" instruction
in the presence of the MVE architecture extension, because it could be
interpreted both as:
* The base instruction VCVT + NE for IT predication when inside an IT block.
* The MVE instruction VCVTN + E in the Else of a VPT block.
Given a C reproducer of:
```
int test_function(float value)
{
int ret_val = 10;
if (value != 0.0)
{
ret_val = (int) value;
}
return ret_val;
}
```
GCC generates a VCVTNE instruction based on the `truncsisf2_vfp`
pattern, which will look like:
`vcvtne.s32.f32 s-reg, s-reg`
This still triggers an error due to being misidentified as "vcvtn+e"
Similar errors were found with other type combinations and instruction
patterns (these have all been added to the testing of this patch).
This class of errors was previously worked around by:
https://sourceware.org/pipermail/binutils/2020-August/112728.html
which addressed this by looking at the operand types, however,
that isn't adequate to cover all the extra cases that have been
found. Instead, we add some special-casing logic earlier when
the instructions are parsed that is conditional on whether we are
in a VPT block or not, when the instruction is parsed.
gas/ChangeLog:
* config/tc-arm.c (opcode_lookup): Add special vcvtn handling.
* testsuite/gas/arm/mve-vcvtne-it-bad.l: Add further testing.
* testsuite/gas/arm/mve-vcvtne-it-bad.s: Likewise.
* testsuite/gas/arm/mve-vcvtne-it.d: Likewise.
* testsuite/gas/arm/mve-vcvtne-it.s: Likewise.
