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519 Commits

Author SHA1 Message Date
Mark Alexander
2902e8ab51 * support.h: Undo previous change to SIGTRAP 
and SIGQUIT values.
 1996-12-31 15:05:46 +00:00
Ian Lance Taylor
7e6c297e82 * interp.c (store_word, load_word): New static functions. 
(mips16_entry): New static function.
	(SignalException): Look for mips16 entry and exit instructions.
	(simulate): Use the correct index when setting fpr_state after
	doing a pending move.
 1996-12-30 22:37:30 +00:00
Mark Alexander
0049ba7a8d * interp.c: Fix byte-swapping code throughout to work on 
both little- and big-endian hosts.
 1996-12-29 17:47:25 +00:00
Mark Alexander
2510786bd4 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent 
with gdb/config/i386/xm-windows.h.
 1996-12-29 17:20:47 +00:00
Mark Alexander
39bf0ef4e6 * gencode.c (build_instruction): Work around MSVC++ code gen bug 
that messes up arithmetic shifts.
 1996-12-28 06:51:58 +00:00
Michael Meissner
ee3f2d4f6a Allow exit to work normally under gdb 1996-12-27 19:50:03 +00:00
Angela Marie Thomas
280f90e1a0 add flush_cache PMON routine 1996-12-25 06:14:26 +00:00
Stu Grossman
dbeec76839 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for 
SIGTRAP and SIGQUIT for _WIN32.
 1996-12-20 19:05:28 +00:00
Ian Lance Taylor
deffd638b5 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to 
force a 64 bit multiplication.
	(build_instruction) [OR]: In mips16 mode, don't do anything if the
	destination register is 0, since that is the default mips16 nop
	instruction.
 1996-12-19 19:08:46 +00:00
Jeff Law
d657034d38 * interp.c (sim_resume): Handle 0xff as a single byte insn. 
* simops.c: Fix overflow computation for "add" and "inc"
        instructions.
 1996-12-18 17:15:21 +00:00
David Edelsohn
5c8f1c0183 Getting there ... 1996-12-17 21:08:20 +00:00
Jeff Law
093e9a32d3 * simops.c: Handle "break" instruction. 1996-12-16 22:31:37 +00:00
Rob Savoye
af68520381 Link with SIM_EXTRA_LIBS, not just EXTRA_LIBS, which is never set. 1996-12-16 22:16:24 +00:00
Ian Lance Taylor
063443cf01 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI. 
(build_endian_shift): Don't check proc64.
	(build_instruction): Always set memval to uword64.  Cast op2 to
	uword64 when shifting it left in memory instructions.  Always use
	the same code for stores--don't special case proc64.
 1996-12-16 21:47:23 +00:00
Martin Hunt
dbdae3de36 Mon Dec 16 13:39:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com> 
* interp.c (xfer_mem): Change unified memory to 0x0.
 1996-12-16 21:39:47 +00:00
Ian Lance Taylor
aaff84371e * gencode.c (build_mips16_operands): Fix base PC value for PC 
relative operands.
	(build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
	jal instruction.
	* interp.c (simJALDELAYSLOT): Define.
 	(JALDELAYSLOT): Define.
	(INDELAYSLOT, INJALDELAYSLOT): Define.
	(simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
 1996-12-16 20:01:15 +00:00
Jeff Law
16d2e2b670 * simops.c: Fix restoring the PC for "ret" and "retf" instructions. 1996-12-16 17:08:10 +00:00
Jim Wilson
51c6d73375 For NEC 4100/4300 project: Add little endian support and misc cleanups. 
* gencode.c (build_instruction): Use !ByteSwapMem instead of
	BigEndianMem.
	* interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
	(BigEndianMem): Rename to ByteSwapMem and change sense.
	(BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
	BigEndianMem references to !ByteSwapMem.
	(set_endianness): New function, with prototype.
	(sim_open): Call set_endianness.
	(sim_info): Use simBE instead of BigEndianMem.
	(xfer_direct_word, xfer_direct_long, swap_direct_word,
	swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
	xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
	ifdefs, keeping the prototype declaration.
	(swap_word): Rewrite correctly.
	(ColdReset): Delete references to CONFIG.  Delete endianness related
	code; moved to set_endianness.
 1996-12-11 22:04:46 +00:00
Jeff Law
191c9d73de * gencode.c (write_opcodes): Also write out the format of the 
opcode.
        * mn10300_sim.h (simops): Add "format" field.
        * interp.c (sim_resume): Deal with endianness issues here.
 1996-12-11 16:58:33 +00:00
Jeff Law
95d18eb74d * simops.c (REG0_4): Define. 
Use REG0_4 for indexed loads/stores.
Fixes bugs exposed after minor codegen improvements in the compiler.
 1996-12-10 22:10:07 +00:00
Jim Wilson
6429b29698 For NEC 4100/4300 project 
* gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
	* interp.c (CHECKHILO): Define away.
	(simSIGINT): New macro.
	(membank_size): Increase from 1MB to 2MB.
	(control_c): New function.
	(sim_resume): Rename parameter signal to signal_number.  Add local
	variable prev.  Call signal before and after simulate.
	(sim_stop_reason): Add simSIGINT support.
	(sim_warning, sim_error, dotrace, SignalException): Define as stdarg
	functions always.
	(sim_warning): Delete call to SignalException.  Do call printf_filtered
	if logfh is NULL.
	(AddressTranslation): Add #ifdef DEBUG around debugging message and
	a call to sim_warning.
 1996-12-10 19:39:55 +00:00
Michael Meissner
3fbe064171 New revision from Andrew 1996-12-10 16:12:48 +00:00
David Edelsohn
966f47b470 * callback.c: #include <stdlib.h> 
(os_error): New function.
	(default_callback): Add os_error.
 1996-12-09 02:27:59 +00:00
Jeff Law
2e8f4133d7 * simops.c (REG0_16): Fix typo. 1996-12-07 16:54:57 +00:00
Jeff Law
5084d8e513 Add missing semicolons in last change. 1996-12-07 00:36:50 +00:00
Jeff Law
b2f7a7e5b3 * simops.c: Call abort for any instruction that's not currently 
simulated.
 1996-12-06 21:49:27 +00:00
Jeff Law
9f4a551e11 * simops.c: Define accessor macros to extract register 
values from instructions.  Use them consistently.
 1996-12-06 21:47:21 +00:00
Jeff Law
7c52bf32f2 * interp.c: Delete unused global variable "OP". 
(sim_resume): Remove unused variable "opcode".
        * simops.c: Fix some uninitialized variable problems, add
        parens to fix various -Wall warnings.
Fixing assorted -Wall problems.
 1996-12-06 21:33:48 +00:00
Jeff Law
fc038f5656 Opps. Forgot something in last change. 1996-12-06 21:20:17 +00:00
Jeff Law
d252301029 * gencode.c (write_header): Add "insn" and "extension" arguments 
to the OP_* declarations.
        (write_template): Similarly for function templates.
        * interp.c (insn, extension): Remove global variables.  Instead
        pass them as arguments to the OP_* functions.
        * mn10300_sim.h: Remove decls for "insn" and "extension".
        * simops.c (OP_*): Accept "insn" and "extension" as arguments
        instead of using globals.
Starting to clean things up.
 1996-12-06 21:19:37 +00:00
Jeff Law
e5a7a53799 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" 
Fixes remaining hangs while running c-torture execution tests.
Only 12 c-torture execution failures left:

  * 920625-1.c fails all 6 execution tests.

  * 960521-1.c fails all 6 execution tests.
 1996-12-06 07:57:21 +00:00
Jeff Law
4d8ced6cb1 * simops.c: Fix thinkos in last change to "inc dn". 1996-12-06 05:30:24 +00:00
Jeff Law
61ecca95c0 * simops.c: "add imm,sp" does not effect the condition codes. 
"inc dn" does effect the condition codes.
Just something I noticed.
 1996-12-04 18:02:00 +00:00
Jeff Law
e4e1302293 * simops.c: Treat both operands as signed values for 
"div" instruction.
Fixes another dozen c-torture execution failures.
 1996-12-04 05:00:49 +00:00
Rob Savoye
a665caa644 * configure.in: Look for libtermcap.a. 
* Makefile.in: Only link in -ltermcap if it exists.
	* erc32.c: Update to version 2.6a. Fix uart handling.
	* exec.c: Update to version 2.6a. Add sparclite support.
	* float.c: Update to version 2.6a. Convert comments to
	preprocessor warnings. Add __setfpucw() for i385 hosts so floating
	point exceptions work.
	* func.c: Update to version 2.6a. Fix uart handling, add support
	for user error traps.
	* help.c: Update to version 2.6a. Add help note on user error
	traps.
	* interf.c: Update to version 2.6a. Fix uart handling, and add
	sparclite support.
	* examples/gccx: Use sparclite cross compiler, not native gcc.
	* examples/srt0.S: Use "mov" rather than "wr" for manipulating
	the psr register.
 1996-12-04 00:56:56 +00:00
Jeff Law
20e1ab85bf * simops.c: Fix simulation of division instructions. 
Fix typos/thinkos in several "cmp" and "sub" instructions.
Another couple dozen c-torture failures fixed.
 1996-12-04 00:42:01 +00:00
Jeff Law
216e65571a * simomps.c: Fix carry bit handling in "sub" and "cmp" 
instructions.
Another dozen execution failures fixed.
 1996-12-02 20:12:08 +00:00
Jeff Law
fcfaf40d78 * simops.c: Fix "mov imm8,an" and "mov imm16,dn". 
Fixes 80 or so c-torture execution failures.  400 to go.
 1996-12-02 19:35:55 +00:00
Jeff Law
b7b89deb44 * simops.c: Fix overflow computation for many instructions. 
Fixes several hangs in the c-torture execution tests.  Also fixes about
40 failures.
 1996-12-02 08:35:20 +00:00
Jeff Law
af388638ae * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)". 
Along with some compiler, bfd, assembler changes this fixes 90 or so
c-torture execution failures.
 1996-12-02 07:38:10 +00:00
Jeff Law
c8f0171f5f * simops.c: Fix "mov am, dn". 
Fixes more c-torture problems.
 1996-12-02 04:23:37 +00:00
Jeff Law
6db7fc49d2 * simops.c: Fix more bugs in "add imm,an" and 
"add imm,dn".
Fixes a half-dozen (of several hundred :( c-torture failures.
 1996-12-01 23:10:04 +00:00
Jeff Law
6e7a01c144 * simops.c: Fix bugs in "movm" and "add imm,an". 
main(){write (0, "hello world\n", 13);} works!
 1996-11-27 23:20:24 +00:00
Jeff Law
3bb3fe44e0 * simops.c: Don't lose the upper 24 bits of the return 
pointer in "call" and "calls" instructions.  Rough cut
        at emulated system calls.
 1996-11-27 18:36:54 +00:00
Jeff Law
de0dce7c5c * simops.c: Implement the remaining 5, 6 and 7 byte instructions. 
Everything except the extended instructions, the loop instructions,
trap, rti, and rtm.
 1996-11-27 17:56:10 +00:00
Jeff Law
ecb4b5a357 * simops.c Implement remaining 4 byte instructions. 1996-11-27 17:19:44 +00:00
Ian Lance Taylor
279cca90f4 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD 
16 bit instructions.
 1996-11-27 16:54:21 +00:00
Jeff Law
2e35551c74 * simops.c Implement remaining 3 byte instructions. 
Moving right along...
 1996-11-27 16:51:30 +00:00
Jeff Law
f5f13c1d73 * simops.c: Implement remaining 2 byte instructions. Call 
abort for instructions we're not implementing now.
 1996-11-27 16:25:03 +00:00
Ian Lance Taylor
350d33b87f Actually check in the right change to interp.c. 1996-11-27 16:01:34 +00:00