Commit Graph

3303 Commits

Author SHA1 Message Date
Joel Brobecker
d0a5a356aa include "config.h" instead of BFD's sysdep.h in d10v/interp.c
The change of include file introduces some new warnings about functions
being used without a prototype. So a few more system includes have been
added to compensate for that.

sim/d10v/ChangeLog:

        * interp.c: #include "config.h" instead of "sysdep.h".
        Add conditional include of string.h or strings.h, as well as
        conditional include of stdlib.h.
2012-06-19 22:46:57 +00:00
Mike Frysinger
2668799911 sim: cr16: include config.h rather than sysdep.h from bfd 2012-06-17 23:34:17 +00:00
Mike Frysinger
a6c2b87eec sim: moxie: fix build by including config.h first 2012-06-17 23:33:42 +00:00
Hans-Peter Nilsson
e8c21678a4 * interp.c: Include config.h first. Do not include sysdep.h. 2012-06-17 18:56:31 +00:00
Joel Brobecker
9a210f3097 sim/erc32/sys.h: Include "config.h".
This file includes "gdb/callback.h", which includes "bfd.h", which
itself verifies that "config.h" was included earlier.

sim/erc32/ChangeLog:

        * sys.h: Include "config.h".
2012-06-15 17:20:30 +00:00
Joel Brobecker
5f3ef9d035 Define PACKAGE macro in all sims' config.h.
Some of the common includes in include/gdb such as callback.h
include bfd.h.  But there was a recent change in bfd-in.h to
require that config.h be included before bfd.h can be included:

    /* PR 14072: Ensure that config.h is included first.  */
    #if !defined PACKAGE && !defined PACKAGE_VERSION
    #error config.h must be included before this header
    #endif

PACKAGE_VERSION is always defined by default by the AC_INIT autoconf
macro, but PACKAGE isn't.  This patch updates the SIM_AC_COMMON macro
to define it, and then regenerates all configure scripts and config.in
files.

sim/common/changeLog:

        * acinclude.m4 (SIM_AC_COMMON): Define PACKAGE.
        * config.in, configure: Regenerate.

sim/ChangeLog:

        * configure: Regenerate.

sim/arm/ChangeLog:

        * config.in, configure: Regenerate.

sim/avr/ChangeLog:

	* config.in, configure: Regenerate.

sim/bfin/ChangeLog:

	* config.in, configure: Regenerate.

sim/cr16/ChangeLog:

	* config.in, configure: Regenerate.

sim/cris/ChangeLog:

	* config.in, configure: Regenerate.

sim/d10v/ChangeLog:

	* config.in, configure: Regenerate.

sim/erc32/ChangeLog:

	* config.in, configure: Regenerate.

sim/frv/ChangeLog:

	* config.in, configure: Regenerate.

sim/h8300/ChangeLog:

	* config.in, configure: Regenerate.

sim/iq2000/ChangeLog:

	* config.in, configure: Regenerate.

sim/lm32/ChangeLog:

	* config.in, configure: Regenerate.

sim/m32c/ChangeLog:

	* config.in, configure: Regenerate.

sim/m32r/ChangeLog:

	* config.in, configure: Regenerate.

sim/m68hc11/ChangeLog:

	* config.in, configure: Regenerate.

sim/mcore/ChangeLog:

	* config.in, configure: Regenerate.

sim/microblaze/ChangeLog:

	* config.in, configure: Regenerate.

sim/mips/ChangeLog:

	* config.in, configure: Regenerate.

sim/mn10300/ChangeLog:

	* config.in, configure: Regenerate.

sim/moxie/ChangeLog:

	* config.in, configure: Regenerate.

sim/ppc/ChangeLog:

	* configure: Regenerate.

sim/rl78/ChangeLog:

	* config.in, configure: Regenerate.

sim/rx/ChangeLog:

	* config.in, configure: Regenerate.

sim/sh/ChangeLog:

	* config.in, configure: Regenerate.

sim/sh64/ChangeLog:

	* config.in, configure: Regenerate.

sim/v850/ChangeLog:

	* config.in, configure: Regenerate.

sim/testsuite/ChangeLog:

	* configure: Regenerate.
2012-06-15 17:20:10 +00:00
Nick Clifton
b0f0569128 * wrapper.c (sim_create_inferior): Treat WMMX2 binaries as iWMMXt
binaries (for now).
2012-06-13 10:07:11 +00:00
Michael Eager
8fe6640e15 Move config.h to start of includes. 2012-06-06 21:50:03 +00:00
Michael Eager
f5546abd5e Add #include "config.h". 2012-06-06 15:05:23 +00:00
Pedro Alves
2c1fa544e1 2012-05-24 Pedro Alves <palves@redhat.com>
* sim-signal.h (sim_signal_to_target): Rename to ...
	(sim_signal_to_gdb_signal): ... this.
	* sim-signal.c (sim_signal_to_target): Rename to ...
	(sim_signal_to_gdb_signal): ... this.
	* sim-reason.c (sim_stop_reason): Adjust to rename.
2012-05-24 17:38:54 +00:00
Pedro Alves
a493e3e2e4 gdb/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.

gdb/gdbserver/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.

include/gdb/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        * gdb/signals.def: Replace TARGET_SIGNAL_ with GDB_SIGNAL_
	throughout.

sim/arm/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.

sim/avr/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.

sim/common/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.

sim/cr16/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.

sim/d10v/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.

sim/erc32/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.

sim/m32c/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.

sim/ppc/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.

sim/rl78/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.

sim/rx/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

        Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
2012-05-24 16:51:47 +00:00
Pedro Alves
2ea286498f gdb/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

	Replace target_signal with gdb_signal throughout.

gdb/gdbserver/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

	Replace target_signal with gdb_signal throughout.

include/gdb/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

	Replace target_signal with gdb_signal throughout.

sim/common/
2012-05-24  Pedro Alves  <palves@redhat.com>

	PR gdb/7205

	Replace target_signal with gdb_signal throughout.
2012-05-24 16:39:15 +00:00
Hans-Peter Nilsson
3550b23619 PR 14072
* interp.c: Include config.h before system header files.
2012-05-20 05:34:23 +00:00
Nick Clifton
a6ff997ce8 PR 14072
* wrapper.c: Include config.h before system header files.

	* callback.c: Include config.h before system header files.
	* cgen-trace.c: Likewise.
	* cgen-utils.c: Likewise.
	* gentmap.c: Likewise.

	* sim-if.c: Include config.h before system header files.

	* compile.c: Include config.h before system header files.
	* sim-main.h: Likewise.

	* gdb-if.c: Include config.h before system header files.
	* load.c: Likewise.
	* syscalls.c: Likewise.
	* trace.c: Likewise.

	* interp.c: Include config.h before system header files.
2012-05-19 16:46:16 +00:00
Mike Frysinger
050396e533 sim: bfin: new PINT model
Newer BF54x parts feature an updated GPIO block where all the interrupt
handling is split off, so create a new model for the pin interrupts.

This is missing the port forwarding aspects, but at least the register
interface should be there.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 06:13:06 +00:00
Mike Frysinger
07c5891d6c sim: bfin: new GPIO model
Newer BF54x parts feature an updated GPIO block, so create a new
model for it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 06:11:41 +00:00
Mike Frysinger
740d60f83d sim: bfin: add shift astat tests
These are randomly generated tests to track down issues in ASTAT
handling with shift insns.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 05:59:55 +00:00
Mike Frysinger
c0c463826f sim: bfin: fix ASTAT issues in immediate shifts
More ASTAT directed fixes, but this time at the dsp32shift insns.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 05:56:32 +00:00
Mike Frysinger
ef0b041e05 sim: bfin: fix ASTAT/correctness issues with arithmetic shifts
This improves some of the arithmetic shifts to better match the
hardware (especially wrt ASTAT behavior).  We hit areas where
the published documentation is thin so we have to rely on tests
run on the hardware to figure out how things should behave.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 05:52:38 +00:00
Mike Frysinger
e0dc84cdd4 sim: bfin: more astat tests
These are the randomly generated tests that directed some of the recent
astat related fixes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 05:24:57 +00:00
Mike Frysinger
e8c9a03df0 sim: bfin: enable some parallel tests
Now that we check for valid sub-insns in parallel insns, we can
enable the tests that explicitly validate those code paths.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 04:18:56 +00:00
Mike Frysinger
ab04c00066 sim: bfin: more parallel insn checks
Now that we keep track of the exact parallel insn slot we're in, we can
make sure that the current insn being decoded is valid for that slot.
This brings us much closer to the hardware in flagging invalid parallel
insn combinations.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 03:59:10 +00:00
Mike Frysinger
99265d6b00 sim: bfin: keep track of the exact position of parallel insns
Some insns need to know which slot they're in to determine whether they
are valid.  So add an enum for each slot, and check that rather than the
overall insn len.  This makes tracking things in the code much clearer.
However, this code is functionally the same, so a follow up patch will
leverage this more to properly flag invalid parallel insn combos.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 03:49:30 +00:00
Mike Frysinger
8faad9bd0f sim: bfin: unify se_all helpers more
Now that we have the se_all helpers together and working, we can see
what pieces are duplicated in each test and unify them in the common
header file.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 03:42:43 +00:00
Mike Frysinger
a8a0e37c8b sim: bfin: drop excess space in negation insn
The amod1 helper includes a leading space so it can expand into the empty
string when need be, which means the caller need not add spacing itself.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-08 20:48:20 +00:00
Mike Frysinger
ffbc20d913 sim: fix spelling typo 2012-04-02 05:21:59 +00:00
Mike Frysinger
1d18e9892e sim: bfin: throw VEC_ILGAL_I with 32bit insn in group1/group2 slots
Parallel insns can only do one 32bit, then two 16bits.  So if we see
a 2nd 32bit insn after the first 32bit in a parallel insn, abort.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 04:31:46 +00:00
Mike Frysinger
2fa7a0570b sim: bfin: simplify field width processing and fix build warnings
This fix the build time warning:
warning: format not a string literal, argument types not checked [-Wformat-nonliteral]

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 04:23:40 +00:00
Mike Frysinger
02bb38cc80 sim: bfin: fix unused bfrom handling for BF535
machs.c: In function 'bfin_model_cpu_init':
machs.c:1657:1: warning: 'bfrom' may be used uninitialized
	in this function [-Wuninitialized]

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 04:21:03 +00:00
Mike Frysinger
e4967d72f9 sim: bfin: fix build warning/style with auxvt_size
Fix warning about mixing decls and code by moving auxvt_size decl
down to the scope where it is used.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 02:39:12 +00:00
Mike Frysinger
8d72c97073 sim: bfin: fix typo in BF54x SIC init
The current code triggers a warning:
dv-bfin_sic.c: In function 'bfin_sic_finish':
dv-bfin_sic.c:930:41: warning: operation on 'sic-><U78e8>.bf54x.iwr1'
	may be undefined [-Wsequence-point]

This points out the IWR2 register was not being setup because of a typo.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-31 18:48:20 +00:00
Mike Frysinger
a4a66f7132 sim: bfin: include devices.h to fix build warnings
The place where these funcs get defined do not include the header that
declares their prototypes.  Add that to fix -Wmissing-prototypes:

devices.c:59:1: warning: no previous prototype for 'dv_bfin_mmr_invalid'
devices.c:66:1: warning: no previous prototype for 'dv_bfin_mmr_require'
devices.c:99:1: warning: no previous prototype for 'dv_bfin_mmr_check'
devices.c:159:14: warning: no previous prototype for 'dv_get_bus_num'

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-31 18:44:43 +00:00
Kevin Buettner
2aaed97917 Commit gdb and sim support for v850e2 and v850e2v3 on behalf of
Rathish C <Rathish.C@kpitcummins.com>.
2012-03-29 00:57:19 +00:00
Mike Frysinger
e6ab98cd1c sim: add bugzilla marking 2012-03-27 04:18:05 +00:00
Mike Frysinger
a35a332283 sim: add a proper sim_core_trans_addr prototype
The common code has a sim_core_trans_addr() helper that only the m32r code
uses.  Move the inline extern in the m32r code to the proper common header.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-26 02:18:43 +00:00
Mike Frysinger
44ac5dbe32 sim: bfin: skip .c/.S tests if no compiler is available
Similar to logic in the cris exp, attempt a simple compile and if it fails
(presumably due to the compiler being broken), skip all the related tests.
Fortunately, most tests (~600 out of ~800) are pure assembly, so people should
still get pretty good coverage.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-25 16:51:46 +00:00
Mike Frysinger
45e4eeb430 sim: bfin: disable redundant test that makes 32bit gas angry 2012-03-25 07:56:12 +00:00
Mike Frysinger
8f784a0e6a sim: bfin: fix typos in large constants in tests
Truncate constants that are larger than 32bits but get loaded into 32bit
registers.  These high bits don't get used and don't really make sense.
2012-03-25 06:43:43 +00:00
Hans-Peter Nilsson
f914e38494 * nrun.c: Add #ifdef HAVE_CONFIG_H and associated includes stanza
missing in last change.
2012-03-24 09:31:09 +00:00
Mike Frysinger
2232061b1c [PATCH] sim: make sure to include strsignal prototype
Before POSIX standardized strsignal(), old systems would hide the
prototype unless the normal extension defines were enabled.  So use
the AC_USE_SYSTEM_EXTENSIONS helper for that.

Then make sure we include string.h ourselves in nrun.c rather than
relying on implicit includes via other sim headers.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-24 05:38:43 +00:00
Mike Frysinger
ad03ad841d sim: testsuite: regen configure after rl78 addition 2012-03-24 05:37:10 +00:00
Mike Frysinger
a9c90fc78f sim: cris: update testsuite output after strsignal change 2012-03-24 05:33:42 +00:00
Mike Frysinger
8fe8b60120 sim: testsuite: regen configure after rl78 addition 2012-03-23 04:30:55 +00:00
Mike Frysinger
abcee8fd25 sim: rx: fix warnings with AC_DEFINE
This lets `autoheader` work again.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-23 04:00:59 +00:00
Mike Frysinger
ac0aacdffa sim: sync build_warnings handling with gdb
The sim code gets the logic for SIM_AC_OPTION_WARNINGS from gdb, but
it hasn't been updated in a good long while.  Sync with the latest
gdb code.

There is a sim specific change in here: we disable -Werror for now.
This is because all sim code atm contains warnings.  Will probably
have to slowly add a white list of targets which can tolerate this
until everyone is updated.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-23 03:27:44 +00:00
Mike Frysinger
af209c380f sim: cris: update testsuite output after strsignal change 2012-03-21 04:50:01 +00:00
Mike Frysinger
5c73fae010 sim/testsuite/: split up arch-specific changelogs 2012-03-21 04:46:59 +00:00
Mike Frysinger
565904581b sim: bfin: add exhaustive parallel-insn tests 2012-03-19 05:39:45 +00:00
Mike Frysinger
5f2804c950 sim: bfin: unify se_all*opcodes tests
The current se_all*opcodes tests are very similar in how they work.
In preparation for adding more tests along these lines, unify the
common bits into a framework that others can include and build off
of easily.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 05:34:30 +00:00
Mike Frysinger
6aafca16ed sim: bfin: add tests for new shift behavior 2012-03-19 05:25:50 +00:00