* archures.c (bfd_mach_i386_nacl, bfd_mach_i386_i386_nacl): New macros.
(bfd_mach_x86_64_nacl, bfd_mach_x64_32_nacl): New macros.
* cpu-i386.c (bfd_arch_i386_onebyte_nop_fill): New function.
(bfd_i386_nacl_arch): New variable.
(bfd_x86_64_nacl_arch, bfd_x64_32_nacl_arch): New variables.
(bfd_x64_32_arch_intel_syntax): Link them into the list.
* bfd-in2.h: Regenerate.
ld/
* emulparams/elf_i386_nacl.sh (ARCH): Set to i386:nacl.
* emulparams/elf_x86_64_nacl.sh (ARCH): Set to i386:x86-64:nacl.
* emulparams/elf32_x86_64_nacl.sh (ARCH): Set to i386:x64-32:nacl.
ld/testsuite/
* ld-x86-64/x86-64.exp (Mixed x86_64 and i386 input test 1):
Loosen string match to admit i386:x86-64*.
(Mixed x86_64 and i386 input test 2): Likewise.
* ld-x86-64/ilp32-2.d: Likewise.
* ld-x86-64/ilp32-3.d: Likewise.
* ld-x86-64/lp64-2.d: Likewise.
* ld-x86-64/lp64-3.d: Likewise.
* ld-x86-64/ia32-2.d: Likewise, and i386.* too.
* ld-x86-64/ia32-3.d: Likewise.
* elfxx-mips.h (_bfd_mips_elf_get_synthetic_symtab): New
prototype.
* elf32-mips.c (elf_backend_plt_sym_val): Remove macro.
(bfd_elf32_get_synthetic_symtab): New macro.
* elfxx-mips.c (plt_entry): New structure.
(mips_elf_link_hash_entry): Add use_plt_entry member.
(mips_elf_link_hash_table): Rename plt_entry_size member to
plt_mips_entry_size. Add plt_comp_entry_size, plt_mips_offset,
plt_comp_offset, plt_got_index entries and plt_header_is_comp
members.
(STUB_LW_MICROMIPS, STUB_MOVE_MICROMIPS): New macros.
(STUB_LUI_MICROMIPS, STUB_JALR_MICROMIPS): Likewise.
(STUB_ORI_MICROMIPS, STUB_LI16U_MICROMIPS): Likewise.
(STUB_LI16S_MICROMIPS): Likewise.
(MICROMIPS_FUNCTION_STUB_NORMAL_SIZE): Likewise.
(MICROMIPS_FUNCTION_STUB_BIG_SIZE): Likewise.
(micromips_o32_exec_plt0_entry): New variable.
(mips16_o32_exec_plt_entry): Likewise.
(micromips_o32_exec_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize use_plt_entry.
(mips_elf_output_extsym): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_gotplt_index): Likewise. Remove the VxWorks
restriction. Use MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_elf_count_got_symbols): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_calculate_relocation): Handle MIPS16/microMIPS PLT
entries.
(_bfd_mips_elf_create_dynamic_sections): Don't set PLT sizes
here.
(mips_elf_make_plt_record): New function.
(_bfd_mips_elf_check_relocs): Update comment. Record occurences
of JAL relocations that might need a PLT entry.
(_bfd_mips_elf_adjust_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Set individual
PLT entry sizes here. Handle MIPS16/microMIPS PLT entries.
Don't set the symbol's value in the symbol table for PLT
references here. Don't set the PLT or PLT GOT section sizes
here.
(mips_elf_estimate_stub_size): Handle microMIPS stubs.
(mips_elf_allocate_lazy_stub): Likewise.
(mips_elf_lay_out_lazy_stubs): Likewise. Define a _MIPS_STUBS_
magic symbol.
(mips_elf_set_plt_sym_value): New function.
(_bfd_mips_elf_size_dynamic_sections): Set PLT header size and
PLT and PLT GOT section sizes here. Set the symbol values in
the symbol table for PLT references here. Handle microMIPS
annotation of the _PROCEDURE_LINKAGE_TABLE_ magic symbol.
(_bfd_mips_elf_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Handle
MIPS16/microMIPS PLT entries. Handle microMIPS stubs.
(_bfd_mips_vxworks_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Use
MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_finish_exec_plt): Handle microMIPS PLT. Return status.
(_bfd_mips_elf_finish_dynamic_sections): Handle result from
mips_finish_exec_plt.
(_bfd_mips_elf_link_hash_table_create): Update to use
gotplt_union's plist member rather than offset.
(_bfd_mips_elf_get_synthetic_symtab): New function.
include/elf/
* mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting.
(ELF_ST_SET_MIPS_PLT): Likewise.
gdb/
* mips-tdep.c (mips_elf_make_msymbol_special): Handle MIPS16 and
microMIPS synthetic symbols.
ld/
* emulparams/elf32btsmip.sh: Arrange for .got.plt to be placed
as close to .plt as possible.
* scripttempl/elf.sc: Handle $INITIAL_READWRITE_SECTIONS and
$PLT_NEXT_DATA variables.
ld/testsuite/
* ld-mips-elf/jalx-2.dd: Update for microMIPS PLT support.
* ld-mips-elf/pic-and-nonpic-3a.dd: Update for the _MIPS_STUBS_
magic symbol.
* ld-mips-elf/pic-and-nonpic-3b.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
* ld-mips-elf/stub-dynsym-1-10000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-2fe80.d: Likewise.
* ld-mips-elf/stub-dynsym-1-7fff.d: Likewise.
* ld-mips-elf/stub-dynsym-1-8000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-fff0.d: Likewise.
* ld-mips-elf/tlslib-o32.d: Likewise.
opcodes/
* mips-dis.c (is_mips16_plt_tail): New function.
(print_insn_mips16): Handle MIPS16 PLT entry's GOT slot address
word.
(is_compressed_mode_p): Handle MIPS16/microMIPS PLT entries.
* config.bfd (msp430): Define targ_selvecs.
* configure.in: Add bfd_elf32_msp430_ti_vec.
* cpu-msp430.c: Add some more MSP430 machine numbers.
* elf32-msp430.c Add support for MSP430X relocations.
Add support for TI compiler generated relocations.
Add support for sym_diff relocations.
Add support for relaxing out of range short branches into long
branches.
Add support for MSP430 attribute section.
* reloc.c: Add MSP430X relocations.
* targets.c: Add bfd_elf32_msp430_ti_vec.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* readelf.c: Add support for MSP430X architecture.
* readelf.exp: Expect -wi test to fail for the MSP430.
* config/tc-msp430.c: Add support for the MSP430X architecture.
Add code to insert a NOP instruction after any instruction that
might change the interrupt state.
Add support for the LARGE memory model.
Add code to initialise the .MSP430.attributes section.
* config/tc-msp430.h: Add support for the MSP430X architecture.
* doc/c-msp430.texi: Document the new -mL and -mN command line
options.
* NEWS: Mention support for the MSP430X architecture.
* gas/all/gas.exp: Skip the DIFF1 test for the MSP430.
Expect the FORWARD test to pass for the MSP430.
Skip the REDEF tests for the MSP430.
Expect the 930509A test to fail for the MSP430.
* gas/all/sleb128-4.d: Skip for the MSP430.
* gas/elf/elf.exp: Set target_machine to msp430 for the MSP430.
Skip the EHOPT0 test for the MSP430.
Skip the REDEF and EQU-RELOC tests for the MSP430.
* gas/elf/section2.e-msp430: New file.
* gas/lns/lns-big-delta.d: Remove expectation of 20-bit
addresses.
* gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430.
* gas/msp430/msp430x.s: New test.
* gas/msp430/msp430x.d: Expected disassembly.
* gas/msp430/msp430.exp: Run new test.
* gas/msp430/opcode.d: Update expected disassembly.
* msp430.h: Add MSP430X relocs.
Add some more MSP430 machine numbers.
Add values used by .MSP430.attributes section.
* msp430.h: Add patterns for MSP430X instructions.
* Makefile.am: Add emsp430X.c
* Makefine.in: Regenerate.
* configure.tgt (msp430): Add msp430X emulation.
* ldmain.c (multiple_definition): Only disable relaxation if it
was enabled by the user.
* ldmain.h (RELAXATION_ENABLED_BY_USER): New macro.
* emulparams/msp430all.sh: Add support for MSP430X.
* emultempl/generic.em: (before_parse): Enable relaxation for the
MSP430.
* scripttempl/msp430.sc: Reorganize sections. Add .rodata
section.
* scripttempl/msp430_3.sc: Likewise.
* NEWS: Mention support for MSP430X.
* ld-elf/flags1.d: Expect this test to pass on the MSP430.
* ld-elf/init-fini-arrays.d: Expect this test to fail on the
MSP430.
* ld-elf/merge.d: Expect this test to pass on the MSP430.
* ld-elf/sec64k.exp: Skip these tests for the MSP430.
* ld-gc/pr13683.d: Expect this test to fail on the MSP430.
* ld-srec/srec.exp: Expect these tests to fail on the MSP430.
* ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to
fail on the MSP430.
* msp430-dis.c: Add support for MSP430X instructions.
* metag.h: New file.
* dis-asm.h (print_insn_metag): New declaration.
* metag.h: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure: Regenerate.
* configure.in: Add Meta.
* disassemble.c: Add Meta support.
* metag-dis.c: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* archures.c (bfd_mach_metag): New.
* bfd-in2.h: Regenerate.
* config.bfd: Add Meta.
* configure: Regenerate.
* configure.in: Add Meta.
* cpu-metag.c: New file.
* elf-bfd.h: Add Meta.
* elf32-metag.c: New file.
* elf32-metag.h: New file.
* libbfd.h: Regenerate.
* reloc.c: Add Meta relocations.
* targets.c: Add Meta.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* config/tc-metag.c: New file.
* config/tc-metag.h: New file.
* configure.tgt: Add Meta.
* doc/Makefile.am: Add Meta.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Add Meta.
* doc/as.texiinfo: Document Meta options.
* doc/c-metag.texi: New file.
* gas/metag/labelarithmetic.d: New file.
* gas/metag/labelarithmetic.s: New file.
* gas/metag/metacore12.d: New file.
* gas/metag/metacore12.s: New file.
* gas/metag/metacore21-invalid.l: New file.
* gas/metag/metacore21-invalid.s: New file.
* gas/metag/metacore21.d: New file.
* gas/metag/metacore21.s: New file.
* gas/metag/metacore21ext.d: New file.
* gas/metag/metacore21ext.s: New file.
* gas/metag/metadsp21-invalid.l: New file.
* gas/metag/metadsp21-invalid.s: New file.
* gas/metag/metadsp21.d: New file.
* gas/metag/metadsp21.s: New file.
* gas/metag/metadsp21ext.d: New file.
* gas/metag/metadsp21ext.s: New file.
* gas/metag/metafpu21.d: New file.
* gas/metag/metafpu21.s: New file.
* gas/metag/metafpu21ext.d: New file.
* gas/metag/metafpu21ext.s: New file.
* gas/metag/metag.exp: New file.
* gas/metag/tls.d: New file.
* gas/metag/tls.s: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure.tgt: Add Meta.
* emulparams/elf32metag.sh: New file.
* emultempl/metagelf.em: New file.
* ld-elf/merge.d: Mark Meta as xfail.
* ld-gc/start.d: Skip this test on Meta.
* ld-gc/personality.d: Skip this test on Meta.
* ld-metag/external.s: New file.
* ld-metag/metag.exp: New file.
* ld-metag/pcrel.d: New file.
* ld-metag/pcrel.s: New file.
* ld-metag/shared.d: New file.
* ld-metag/shared.r: New file.
* ld-metag/shared.s: New file.
* ld-metag/stub.d: New file.
* ld-metag/stub.s: New file.
* ld-metag/stub_pic_app.d: New file.
* ld-metag/stub_pic_app.r: New file.
* ld-metag/stub_pic_app.s: New file.
* ld-metag/stub_pic_shared.d: New file.
* ld-metag/stub_pic_shared.s: New file.
* ld-metag/stub_shared.d: New file.
* ld-metag/stub_shared.r: New file.
* ld-metag/stub_shared.s: New file.
* binutils/readelf.c: (guess_is_rela): Add EM_METAG.
(dump_relocations): Add EM_METAG.
(get_machine_name): Correct case for Meta.
(is_32bit_abs_reloc): Add support for Meta ADDR32 reloc.
(is_none_reloc): Add support for Meta NONE reloc.
* bfd-in2.h: Add support for MIPS r5900
* config.bfd: Add support for Sony Playstation 2
* cpu-mips.c: Add support for MIPS r5900
* elfxx-mips.c: Add support for MIPS r5900 (extension of r4000)
* config/tc-mips.c: Add support for MIPS r5900
Add M_LQ_AB and M_SQ_AB to support large values for instructions lq and sq.
* config/tc-mips.c (can_swap_branch_p, get_append_method): Detect some conditional short loops to fix a bug on the r5900 by NOP in the branch delay slot.
* config/tc-mips.c (M_MUL): Support 3 operands in multu on r5900.
* config/tc-mips.c (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
* config/tc-mips.c (s_mipsset): Force 32 bit floating point on r5900.
* configure.in: Detect CPU type when target string contains r5900 (e.g. mips64r5900el-linux-gnu).
* config/tc-mips.c (mips_ip): Check parameter range of instructions mfps and mtps on r5900.
* elf/mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software.
* opcode/mips.h: Add support for r5900 instructions including lq and sq.
* configure.tgt: Support ELF files for Sony Playstation 2 (for ps2dev and ps2sdk).
* emulparams/elf32lr5900n32.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI n32.
* emulparams/elf32lr5900.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI o32.
* Makefile.am: Add linker scripts for Sony Playstation 2 ELF files.
* opcodes/mips-dis.c: Add names for CP0 registers of r5900.
* opcodes/mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for instructions sq and lq.
* opcodes/mips-opc.c: Add support for MIPS r5900 CPU.
Add support for 128 bit MMI (Multimedia Instructions).
Add support for EE instructions (Emotion Engine).
Disable unsupported floating point instructions (64 bit and undefined compare operations).
Enable instructions of MIPS ISA IV which are supported by r5900.
Disable 64 bit co processor instructions.
Disable 64 bit multiplication and division instructions.
Disable instructions for co-processor 2 and 3, because these are not supported (preparation for later VU0 support (Vector Unit)).
Disable cvt.w.s because this behaves like trunc.w.s and the correct execution can't be ensured on r5900.
Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This will confuse less developers and compilers.
* emulparams/elf_nacl.sh (nacl_rodata_addr): New shell function.
(RODATA_ADDR, SHLIB_RODATA_ADDR): Use it to base the calculation
on SEGMENT_START("text-segment", ...) rather than ... alone.
* Makefile.am (earmelf_nacl.c, earmelfb_nacl.c): Add missing
dependency on $(srcdir)/emulparams/elf_nacl.sh.
* Makefile.in: Regenerate.
* emulparams/elf32bmip.sh: Make _gp hidden.
* emulparams/elf32bmipn32-defs.sh: Likewise.
* emulparams/elf32mipswindiss.sh: Likewise.
* scripttempl/mips.sc: Likewise.
ld/testsuite/
* ld-mips-elf/rel32-o32.d: Adjust section VMAs after the removal
of _gp from the global scope.
* ld-mips-elf/rel32-n32.d: Likewise.
* ld-mips-elf/rel64.d: Likewise.
* elf64-s390.c: Include elf-s390-common.c.
(R_390_IRELATIVE): New reloc.
(elf_s390_reloc_type_lookup): Support R_390_IRELATIVE.
(RELA_ENTRY_SIZE): New macro.
(elf_s390_link_hash_entry): New fields ifunc_resolver_address and
*ifunc_resolver_section.
(struct plt_entry): New struct.
(struct elf_s390_obj_tdata): New field local_plt.
(elf_s390_local_plt): New macro.
(struct elf_s390_link_hash_table): New field irelifunc.
(ELF64): New macro.
(link_hash_newfunc): Initialize new fields.
(elf_s390_check_relocs): Handle IFUNC symbols.
(elf_s390_adjust_dynamic_symbol): Don't do anything for IFUNC
symbols.
(allocate_dynrelocs): Call s390_elf_allocate_ifunc_dyn_relocs for
IFUNC symbols.
(elf_s390_size_dynamic_sections): Handle IFUNC symbols.
(elf_s390_relocate_section): Likewise.
(elf_s390_finish_dynamic_symbol): Likewise.
(elf_s390_finish_dynamic_sections): Handle local IFUNC symbols.
(elf_s390_finish_ifunc_symbol): New function.
(elf_s390_gc_sweep_hook): Handle local plt entries.
(elf_backend_add_symbol_hook): Define.
* elf32-s390.c: See elf64-s390.c changes.
* elf-s390-common.c: New file.
* bfd-in2.h (BFD_RELOC_390_IRELATIVE): New enum field.
* libbfd.h (BFD_RELOC_390_IRELATIVE): New entry for
BFD_RELOC_390_IRELATIVE.
* reloc.c (BFD_RELOC_390_IRELATIVE): Document new relocation.
2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* elf/s390.h (START_RELOC_NUMBERS): Define R_390_IRELATIVE reloc.
2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* emulparams/elf_s390.sh (IREL_IN_PLT): Define.
* emulparams/elf64_s390.sh (IREL_IN_PLT): Define.
source.
(eelf64ppc_fbsd.c): Add rules to build this file.
* Makefile.in: Regenerate.
* configure.tgt: Add target definition for powerpc64-*-freebsd*.
Adjust powerpc-*-freebsd*.
* emultempl/ppc64elf.em: Add a mechanism to override the default
value of 0 for plt_static_chain.
* emulparams/elf32ppc_fbsd.sh (OUTPUT_FORMAT): Override the default.
* emulparams/elf64ppc_fbsd.sh (OUTPUT_FORMAT): Likewise.
(DEFAULT_PLT_STATIC_CHAIN): Define to 1.
* tic6x.h (R_C6000_JUMP_SPLOT, R_C6000_EHTYPE,
R_C6000_PCR_H16, R_C6000_PCR_L16): New relocs.
(SHN_TIC6X_SCOMMON): Define.
bfd/
* elf32-tic6x.h (struct elf32_tic6x_params): New.
(elf32_tic6x_setup): Declare.
* elf32-tic6x.c: Include <limits.h>.
(ELF_DYNAMIC_LINKER, DEFAULT_STACK_SIZE, PLT_ENTRY_SIZE): Define.
(struct elf32_tic6x_link_hash_table, struct elf32_link_hash_entry):
New structures.
(elf32_tic6x_link_hash_table, is_tic6x_elf): New macros.
(tic6x_elf_scom_section, tic6x_elf_scom_symbol,
tic6x_elf_scom_symbol_ptr): New static variables.
(elf32_tic6x_howto_table, elf32_tic6x_howto_table_rel,
elf32_tic6x_reloc_map): Add R_C6000_JUMP_SLOT, R_C6000_EHTYPE,
R_C6000_PCR_H16 and R_C6000_PCR_L16.
(elf32_tic6x_link_hash_newfunc, elf32_tic6x_link_hash_table_create,
elf32_tic6x_link_hash_table_free, elf32_tic6x_setup,
elf32_tic6x_using_dsbt, elf32_tic6x_install_rela,
elf32_tic6x_create_dynamic_sections, elf32_tic6x_make_got_dynreloc,
elf32_tic6x_finish_dynamic_symbol, elf32_tic6x_gc_sweep_hook,
elf32_tic6x_adjust_dynamic_symbol): New static functions.
(elf32_tic6x_relocate_section): For R_C6000_PCR_S21, convert branches
to weak symbols as required by the ABI.
Handle GOT and DSBT_INDEX relocs, and copy relocs to the output file
as needed when generating DSBT output.
(elf32_tic6x_check_relocs, elf32_tic6x_add_symbol_hook,
elf32_tic6x_symbol_processing, elf32_tic6x_section_from_bfd_section,
elf32_tic6x_allocate_dynrelocs, elf32_tic6x_size_dynamic_sections,
elf32_tic6x_always_size_sections, elf32_tic6x_modify_program_headers,
elf32_tic6x_finish_dynamic_sections, elf32_tic6x_plt_sym_val,
elf32_tic6x_copy_private_data, elf32_tic6x_link_omit_section_dynsym):
New static functions.
(ELF_MAXPAGESIZE): Define to 0x1000.
(bfd_elf32_bfd_copy_private_bfd_data,
bfd_elf32_bfd_link_hash_table_create,
bfd_elf32_bfd_link_hash_table_free, elf_backend_can_refcount,
elf_backend_want_got_plt, elf_backend_want_dynbss,
elf_backend_plt_readonly, elf_backend_got_header_size,
elf_backend_gc_sweep_hook, elf_backend_modify_program_headers,
elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol,
elf_backend_check_relocs, elf_backend_add_symbol_hook,
elf_backend_symbol_processing, elf_backend_link_output_symbol_hook,
elf_backend_section_from_bfd_section,
elf_backend_finish_dynamic_symbol, elf_backend_always_size_sections,
elf32_tic6x_size_dynamic_sections, elf_backend_finish_dynamic_sections,
elf_backend_omit_section_dynsym, elf_backend_plt_sym_val): Define.
* bfd/reloc.c (BFD_RELOC_C6000_JUMP_SLOT, BFD_RELOC_C6000_EHTYPE,
BFD_RELOC_C6000_PCR_H16, BFD_RELOC_C6000_PCR_S16): Add.
* bfd/bfd-in2.h: Regenerate.
* bfd/libbfd.h: Regenerate.
* config.bfd: Accept tic6x-*-* instead of tic6x-*-elf.
gas/
* config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New
static variables.
(md_begin): Initialize them.
(s_tic6x_scomm): New static function.
(md_pseudo_table): Add "scomm".
(tc_gen_reloc): Really undo all adjustments made by
bfd_install_relocation.
* doc/c-tic6x.texi: Document the .scomm directive.
gas/testsuite/
* gas/tic6x/scomm-directive-1.s: New test.
* gas/tic6x/scomm-directive-1.d: New test.
* gas/tic6x/scomm-directive-2.s: New test.
* gas/tic6x/scomm-directive-2.d: New test.
* gas/tic6x/scomm-directive-3.s: New test.
* gas/tic6x/scomm-directive-3.d: New test.
* gas/tic6x/scomm-directive-4.s: New test.
* gas/tic6x/scomm-directive-4.d: New test.
* gas/tic6x/scomm-directive-5.s: New test.
* gas/tic6x/scomm-directive-5.d: New test.
* gas/tic6x/scomm-directive-6.s: New test.
* gas/tic6x/scomm-directive-6.d: New test.
* gas/tic6x/scomm-directive-7.s: New test.
* gas/tic6x/scomm-directive-7.d: New test.
* gas/tic6x/scomm-directive-8.s: New test.
* gas/tic6x/scomm-directive-8.d: New test.
ld/
* emulparams/elf32_tic6x_le.sh (BIG_OUTPUT_FORMAT, EXTRA_EM_FILE,
GENERATE_SHLIB_SCRIPT): New defines.
(TEXT_START_ADDR): Define differently depending on target.
(.got): Redefine to include "*(.dsbt)".
(SDATA_START_SYMBOLS): Remove, replace with
(OTHER_GOT_SYMBOLS): New.
(OTHER_BSS_SECTIONS): Define only for ELF targets.
* emultempl/tic6xdsbt.em: New file.
* gen-doc.texi: Set C6X.
* ld.texinfo: Likewise.
(Options specific to C6X uClinux targets): New section.
binutils/
* readelf.c (get_symbol_index_type): Handle SCOM for TIC6X.
(dump_relocations): Likewise.
binutils/testsuite/
* lib/binutils-common.exp (is_elf_format): Accept tic6x*-*-uclinux*.
ld/testsuite/
* ld-scripts/crossref.exp: Add CFLAGS for tic6x*-*-*.
* ld-elf/sec-to-seg.exp: Remove tic6x from list of targets defining
pagesize to 1.
* ld-tic6x/tic6x.exp: Add support for DSBT shared library/executable
linking tests.
* ld-tic6x/dsbt.ld: New linker script.
* ld-tic6x/dsbt-be.ld: New linker script.
* ld-tic6x/dsbt-overflow.ld: New linker script.
* ld-tic6x/dsbt-inrange.ld: New linker script.
* ld-tic6x/shlib-1.s: New test.
* ld-tic6x/shlib-2.s: New test.
* ld-tic6x/shlib-app-1r.s: New test.
* ld-tic6x/shlib-app-1.s: New test.
* ld-tic6x/shlib-1.sd: New test.
* ld-tic6x/shlib-1.dd: New test.
* ld-tic6x/shlib-app-1.rd: New test.
* ld-tic6x/shlib-app-1rb.rd: New test.
* ld-tic6x/shlib-app-1.sd: New test.
* ld-tic6x/static-app-1rb.od: New test.
* ld-tic6x/shlib-app-1.dd: New test.
* ld-tic6x/shlib-app-1rb.sd: New test.
* ld-tic6x/static-app-1b.od: New test.
* ld-tic6x/static-app-1r.od: New test.
* ld-tic6x/shlib-1rb.rd: New test.
* ld-tic6x/shlib-app-1rb.dd: New test.
* ld-tic6x/shlib-1rb.sd: New test.
* ld-tic6x/shlib-1rb.dd: New test.
* ld-tic6x/shlib-app-1b.od: New test.
* ld-tic6x/tic6x.exp: New test.
* ld-tic6x/static-app-1rb.rd: New test.
* ld-tic6x/shlib-app-1r.od: New test.
* ld-tic6x/static-app-1.od: New test.
* ld-tic6x/static-app-1b.rd: New test.
* ld-tic6x/static-app-1r.rd: New test.
* ld-tic6x/static-app-1rb.sd: New test.
* ld-tic6x/static-app-1b.sd: New test.
* ld-tic6x/static-app-1rb.dd: New test.
* ld-tic6x/static-app-1r.sd: New test.
* ld-tic6x/static-app-1b.dd: New test.
* ld-tic6x/shlib-1b.rd: New test.
* ld-tic6x/static-app-1r.dd: New test.
* ld-tic6x/shlib-app-1b.rd: New test.
* ld-tic6x/shlib-1r.rd: New test.
* ld-tic6x/shlib-app-1r.rd: New test.
* ld-tic6x/shlib-1b.sd: New test.
* ld-tic6x/static-app-1.rd: New test.
* ld-tic6x/shlib-app-1b.sd: New test.
* ld-tic6x/shlib-1r.sd: New test.
* ld-tic6x/shlib-1b.dd: New test.
* ld-tic6x/shlib-app-1r.sd: New test.
* ld-tic6x/shlib-app-1b.dd: New test.
* ld-tic6x/shlib-1r.dd: New test.
* ld-tic6x/static-app-1.sd: New test.
* ld-tic6x/shlib-app-1r.dd: New test.
* ld-tic6x/static-app-1.dd: New test.
* ld-tic6x/shlib-noindex.rd: New test.
* ld-tic6x/shlib-noindex.dd: New test.
* ld-tic6x/shlib-noindex.sd: New test.
* ld-tic6x/got-reloc-local-1.s: New test.
* ld-tic6x/got-reloc-local-2.s: New test.
* ld-tic6x/got-reloc-local-r.d: New test.
* ld-tic6x/got-reloc-global.s: New test.
* ld-tic6x/got-reloc-global-addend-1.d: New test.
* ld-tic6x/got-reloc-global-addend-1.s: New test.
* ld-tic6x/got-reloc-global-addend-2.d: New test.
* ld-tic6x/got-reloc-inrange.d: New test.
* ld-tic6x/got-reloc-overflow.d: New test.
* ld-tic6x/got-reloc-global-addend-2.s: New test.
* ld-tic6x/dsbt-index-error.d: New test.
* ld-tic6x/dsbt-index.d: New test.
* ld-tic6x/dsbt-index.s: New test.
* ld-tic6x/shlib-app-1.od: New test.
* ld-tic6x/shlib-app-1rb.od: New test.
* ld-tic6x/shlib-1.rd: New test.
* ld-tic6x/weak.d: New test.
* ld-tic6x/weak-be.d: New test.
* ld-tic6x/weak.s: New test.
* ld-tic6x/weak-data.d: New test.
* ld-tic6x/common.d: New test.
* ld-tic6x/common.ld: New test.
* ld-tic6x/common.s: New test.
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* archures.c: Add AVR XMEGA architecture information.
* cpu-avr.c (arch_info_struct): Likewise.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
(elf32_avr_object_p): Likewise.
/gas:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
(AVR_INSN): Change definition to match.
(avr_opcodes): Likewise, change to match.
(mcu_types): Add XMEGA architecture names and new XMEGA device names.
(md_show_usage): Add XMEGA architecture names.
(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
Add support for SPM Z+ instruction.
* doc/c-avr.texi: Add documentation for XMEGA architectures and
devices.
/include/opcode:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
New instruction set flags.
(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
/ld:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
(eavrxmega?.c): Likewise.
* configure.tgt (targ_extra_emuls): Likewise.
* emulparams/avrxmega1.sh: New file.
* emulparams/avrxmega2.sh: Likewise.
* emulparams/avrxmega3.sh: Likewise.
* emulparams/avrxmega4.sh: Likewise.
* emulparams/avrxmega5.sh: Likewise.
* emulparams/avrxmega6.sh: Likewise.
* emulparams/avrxmega7.sh: Likewise.
* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
Add avrxmega6, avrxmega7 to list of architectures for no stubs.
/opcodes:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
post-increment to support LPM Z+ instruction. Add support for 'E'
constraint for DES instruction.
(print_insn_avr): Adjust calls to avr_operand. Rename variable.
Add new linker options for marking programs to load into L1 memory
at runtime. This needs new EF flag bits, so declare them.
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* emulparams/elf32_sparc_sol2.sh (OUTPUT_FORMAT): Set to
elf32-sparc-sol2.
* emulparams/elf64_sparc_sol2.sh (OUTPUT_FORMAT): Set to
elf64-sparc-sol2.
gas:
* config/tc-sparc.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define as
elf32-sparc-sol2.
(ELF64_TARGET_FORMAT): Define as elf64-sparc-sol2.
bfd:
* elfxx-sparc.c (tpoff): Define bed, static_tls_size.
Consider static_tls_alignment.
* elf32-sparc.c (TARGET_BIG_SYM): Redefine to
bfd_elf32_sparc_sol2_vec.
(TARGET_BIG_NAME): Redefine to elf32-sparc-sol2.
(elf32_bed): Redefine to elf32_sparc_sol2_bed.
(elf_backend_static_tls_alignment): Redefine to 8.
Include elf32-target.h.
(elf_backend_static_tls_alignment): Undef again for VxWorks.
* elf64-sparc.c (TARGET_BIG_SYM): Redefine to
bfd_elf64_sparc_sol2_vec.
(TARGET_BIG_NAME): Redefine to elf64-sparc-sol2.
(ELF_OSABI): Undef.
(elf64_bed): Redefine to elf64_sparc_sol2_bed.
(elf_backend_static_tls_alignment): Redefine to 16.
Include elf64-target.h.
* config.bfd (sparc-*-solaris2.[0-6]): Split from sparc-*-elf*.
Set targ_defvec to bfd_elf32_sparc_sol2_vec.
[BFD64] (sparc-*-solaris2*): Set targ_defvec to
bfd_elf32_sparc_sol2_vec.
Replace bfd_elf64_sparc_vec by bfd_elf64_sparc_sol2_vec in
targ_selvecs.
* configure.in: Handle bfd_elf32_sparc_sol2_vec,
bfd_elf64_sparc_sol2_vec.
* configure: Regenerate.
* targets.c (bfd_elf32_sparc_sol2_vec): Declare.
(bfd_elf64_sparc_sol2_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_sparc_sol2_vec,
bfd_elf64_sparc_sol2_vec.
basever_syms to global_syms.
Emit global_syms into .dynamic section for all executables and
shared objects.
(elf_solaris2_after_allocation): New function.
(LDEMUL_AFTER_ALLOCATION): Use it.
* emulparams/solaris2.sh: New file.
* emulparams/elf32_sparc_sol2.sh: Use it.
* emulparams/elf64_sparc_sol2.sh: Likewise.
* emulparams/elf_i386_sol2.sh: Likewise.
* emulparams/elf_x86_64_sol2.sh: Likewise.
* Makefile.am (eelf32_sparc_sol2.c): Depend on
$(srcdir)/emulparams/solaris2.sh.
(eelf64_sparc_sol2.c): Likewise.
(eelf_x86_64_sol2.c): Likewise.
(eelf_i386_sol2.c): Likewise.
* Makefile.in: Regenerate.
Joseph Myers <joseph@codesourcery.com>
Andrew Stubbs <ams@codesourcery.com>
bfd/
* config.bfd (sh-*-uclinux* | sh[12]-*-uclinux*): Add
bfd_elf32_shl_vec, and FDPIC vectors to targ_selvecs.
* configure.in: Handle FDPIC vectors.
* elf32-sh-relocs.h: Add FDPIC and movi20 relocations.
* elf32-sh.c (DEFAULT_STACK_SIZE): Define.
(SYMBOL_FUNCDESC_LOCAL): Define. Use it instead of
SYMBOL_REFERENCES_LOCAL for function descriptors.
(fdpic_object_p): New.
(sh_reloc_map): Add FDPIC and movi20 relocations.
(sh_elf_info_to_howto, sh_elf_relocate_section): Handle new invalid
range.
(struct elf_sh_plt_info): Add got20 and short_plt. Update all
definitions.
(FDPIC_PLT_ENTRY_SIZE, FDPIC_PLT_LAZY_OFFSET): Define.
(fdpic_sh_plt_entry_be, fdpic_sh_plt_entry_le, fdpic_sh_plts): New.
(FDPIC_SH2A_PLT_ENTRY_SIZE, FDPIC_SH2A_PLT_LAZY_OFFSET): Define.
(fdpic_sh2a_plt_entry_be, fdpic_sh2a_plt_entry_le)
(fdpic_sh2a_short_plt_be, fdpic_sh2a_short_plt_le, fdpic_sh2a_plts):
New.
(get_plt_info): Handle FDPIC.
(MAX_SHORT_PLT): Define.
(get_plt_index, get_plt_offset): Handle short_plt.
(union gotref): New.
(struct elf_sh_link_hash_entry): Add funcdesc, rename tls_type to
got_type and adjust all uses. Add GOT_FUNCDESC.
(struct sh_elf_obj_tdata): Add local_funcdesc. Rename
local_got_tls_type to local_got_type.
(sh_elf_local_got_type): Renamed from sh_elf_local_got_tls_type. All
users changed.
(sh_elf_local_funcdesc): Define.
(struct elf_sh_link_hash_table): Add sfuncdesc, srelfuncdesc, fdpic_p,
and srofixup.
(sh_elf_link_hash_newfunc): Initialize new fields.
(sh_elf_link_hash_table_create): Set fdpic_p.
(sh_elf_omit_section_dynsym): New.
(create_got_section): Create .got.funcdesc, .rela.got.funcdesc
and .rofixup.
(allocate_dynrelocs): Allocate local function descriptors and space
for R_SH_FUNCDESC-related relocations, and for rofixups.
Handle GOT_FUNCDESC. Create fixups. Handle GOT entries which
require function descriptors.
(sh_elf_always_size_sections): Handle PT_GNU_STACK and __stacksize.
(sh_elf_modify_program_headers): New.
(sh_elf_size_dynamic_sections): Allocate function descriptors for
local symbols. Allocate .got.funcdesc contents. Allocate rofixups.
Handle local GOT entries of type GOT_FUNCDESC. Create fixups for
local GOT entries. Ensure that FDPIC libraries always have a PLTGOT
entry in the .dynamic section.
(sh_elf_add_dyn_reloc, sh_elf_got_offset, sh_elf_initialize_funcdesc)
(sh_elf_add_rofixup, sh_elf_osec_to_segment)
(sh_elf_osec_readonly_p, install_movi20_field): New functions.
(sh_elf_relocate_section): Handle new relocations, R_SH_FUNCDESC,
R_SH_GOTFUNCDESC and R_SH_GOTOFFFUNCDESC. Use sh_elf_got_offset
and .got.plt throughout to find _GLOBAL_OFFSET_TABLE_. Add rofixup
read-only section warnings. Handle undefined weak symbols. Generate
fixups for R_SH_DIR32 and GOT entries. Check for cross-segment
relocations and clear EF_SH_PIC. Handle 20-bit relocations.
Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_gc_sweep_hook): Handle R_SH_FUNCDESC, R_SH_GOTOFF20,
R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20, and R_SH_GOTOFFFUNCDESC.
Handle 20-bit relocations.
(sh_elf_copy_indirect_symbol): Copy function descriptor reference
counts.
(sh_elf_check_relocs): Handle new relocations. Make symbols
dynamic for FDPIC relocs. Account for rofixups. Error for FDPIC
symbol mismatches. Allocate a GOT for R_SH_DIR32. Allocate fixups
for R_SH_DIR32.
(sh_elf_copy_private_data): Copy PT_GNU_STACK size.
(sh_elf_merge_private_data): Copy initial flags. Do not clobber
non-mach flags. Set EF_SH_PIC for FDPIC. Reject FDPIC mismatches.
(sh_elf_finish_dynamic_symbol): Do not handle got_funcdesc entries
here. Rename sgot to sgotplt and srel to srelplt. Handle short_plt,
FDPIC descriptors, and got20. Create R_SH_FUNCDESC_VALUE for FDPIC.
Use install_movi20_field. Rename srel to srelgot. Always generate
R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_finish_dynamic_sections): Fill in the GOT pointer in rofixup.
Do not fill in reserved GOT entries for FDPIC. Correct DT_PLTGOT.
Rename sgot to sgotplt. Assert that the right number of rofixups
and dynamic relocations were allocated.
(sh_elf_use_relative_eh_frame, sh_elf_encode_eh_address): New.
(elf_backend_omit_section_dynsym): Use sh_elf_omit_section_dynsym.
(elf_backend_can_make_relative_eh_frame)
(elf_backend_can_make_lsda_relative_eh_frame)
(elf_backend_encode_eh_address): Define.
(TARGET_BIG_SYM, TARGET_BIG_NAME, TARGET_LITTLE_SYM)
(TARGET_LITTLE_NAME, elf_backend_modify_program_headers, elf32_bed):
Redefine for FDPIC vector.
* reloc.c: Add SH FDPIC and movi20 relocations.
* targets.c (_bfd_target_vector): Add FDPIC vectors.
* configure, bfd-in2.h, libbfd.h: Regenerated.
binutils/
* readelf.c (get_machine_flags): Handle EF_SH_PIC and EF_SH_FDPIC.
gas/
* config/tc-sh.c (sh_fdpic): New.
(sh_check_fixup): Handle relocations on movi20.
(parse_exp): Do not reject PIC operators here.
(build_Mytes): Check for unhandled PIC operators here. Use
sh_check_fixup for movi20.
(enum options): Add OPTION_FDPIC.
(md_longopts, md_parse_option, md_show_usage): Add --fdpic.
(sh_fix_adjustable, md_apply_fix): Handle FDPIC and movi20 relocations.
(sh_elf_final_processing): Handle --fdpic.
(sh_uclinux_target_format): New.
(sh_parse_name): Handle FDPIC relocation operators.
* config/tc-sh.h (TARGET_FORMAT): Define specially for TE_UCLINUX.
(sh_uclinux_target_format): Declare for TE_UCLINUX.
* configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): Set
em=uclinux.
* doc/c-sh.texi (SH Options): Document --fdpic.
gas/testsuite/
* gas/sh/basic.exp: Run new tests. Handle uClinux like Linux.
* gas/sh/fdpic.d: New file.
* gas/sh/fdpic.s: New file.
* gas/sh/reg-prefix.d: Force big-endian.
* gas/sh/sh2a-pic.d: New file.
* gas/sh/sh2a-pic.s: New file.
* lib/gas-defs.exp (is_elf_format): Include sh*-*-uclinux*.
include/elf/
* sh.h (EF_SH_PIC, EF_SH_FDPIC): Define.
(R_SH_FIRST_INVALID_RELOC_6, R_SH_LAST_INVALID_RELOC_6): New. Adjust
other invalid ranges.
(R_SH_GOT20, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20)
(R_SH_GOTOFFFUNCDESC, R_SH_GOTOFFFUNCDESC20, R_SH_FUNCDESC)
(R_SH_FUNCDESC_VALUE): New.
ld/
* Makefile.am (ALL_EMULATIONS): Add eshelf_fd.o and eshlelf_fd.o.
(eshelf_fd.c, eshlelf_fd.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh-*-uclinux*): Add shelf_fd and shlelf_fd
emulations.
* emulparams/shelf_fd.sh: New file.
* emulparams/shlelf_fd.sh: New file.
* emulparams/shlelf_linux.sh: Update comment.
ld/testsuite/
* ld-sh/sh.exp: Handle uClinux like Linux.
* lib/ld-lib.exp (is_elf_format): Include sh*-*-uclinux*.
* ld-sh/fdpic-funcdesc-shared.d: New file.
* ld-sh/fdpic-funcdesc-shared.s: New file.
* ld-sh/fdpic-funcdesc-static.d: New file.
* ld-sh/fdpic-funcdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesc-shared.d: New file.
* ld-sh/fdpic-gotfuncdesc-shared.s: New file.
* ld-sh/fdpic-gotfuncdesc-static.d: New file.
* ld-sh/fdpic-gotfuncdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotfuncdesci20-static.d: New file.
* ld-sh/fdpic-gotfuncdesci20-static.s: New file.
* ld-sh/fdpic-goti20-shared.d: New file.
* ld-sh/fdpic-goti20-shared.s: New file.
* ld-sh/fdpic-goti20-static.d: New file.
* ld-sh/fdpic-goti20-static.s: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesc-static.d: New file.
* ld-sh/fdpic-gotofffuncdesc-static.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.s: New file.
* ld-sh/fdpic-gotoffi20-shared.d: New file.
* ld-sh/fdpic-gotoffi20-shared.s: New file.
* ld-sh/fdpic-gotoffi20-static.d: New file.
* ld-sh/fdpic-gotoffi20-static.s: New file.
* ld-sh/fdpic-plt-be.d: New file.
* ld-sh/fdpic-plt-le.d: New file.
* ld-sh/fdpic-plt.s: New file.
* ld-sh/fdpic-plti20-be.d: New file.
* ld-sh/fdpic-plti20-le.d: New file.
* ld-sh/fdpic-stack-default.d: New file.
* ld-sh/fdpic-stack-size.d: New file.
* ld-sh/fdpic-stack.s: New file.
the new $RELOCATEABLE_OUTPUT_FORMAT, if set.
(OUTPUT_FORMAT): Use the variable $OUTPUT_FORMAT.
(ENTRY): Don't emit for relocateable links.
(/DISCARD/): Don't discard .gnu.warning.* for relocateable links.
* emulparams/mmo.sh (RELOCATEABLE_OUTPUT_FORMAT): Set, to
elf64-mmix.
* emulparams/elf64mmix.sh (OTHER_TEXT_SECTIONS): Empty, don't
provide "Main" or set "_start.", for relocateable links.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
(elf_mips_copy_howto): ...this howto. Clear the size fields.
(mips_vxworks_jump_slot_howto_rela): Replace with...
(elf_mips_jump_slot_howto): ...this howto.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_plt_readonly): Define.
(elf_backend_plt_sym_val): Define for non-VxWorks targets.
(mips_vxworks_bfd_reloc_type_lookup): Delete.
(mips_vxworks_bfd_reloc_name_lookup): Likewise.
(mips_vxworks_rtype_to_howto): Likewise.
(elf_backend_want_dynbss): Don't define for VxWorks.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_got_symbol_offset): Don't define.
* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
* elfxx-mips.c (mips_elf_la25_stub): New structure.
(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
and "has_nonpic_branches" fields. Remove "is_relocation_target" and
"is_branch_target".
(mips_elf_link_hash_table): Add blank lines. Add
"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
"la25_stubs" and "add_stub_section" fields.
(mips_htab_traverse_info): New structure.
(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
(MIPS_RESERVED_GOTNO): Delete.
(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
(mips_elf_link_hash_newfunc): Update after the changes to
mips_elf_link_hash_entry.
(mips_elf_check_mips16_stubs): Replace the DATA parameter with
an INFO parameter. Don't look through warnings symbols here;
do it in mips_elf_check_symbols instead.
(mips_elf_create_stub_symbol): New function.
(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
(mips_elf_gotplt_index): Check for VxWorks.
(mips_elf_output_dynamic_relocation): Take the relocation index
as an extra parameter. Do not increment reloc_count here.
(mips_elf_initialize_tls_slots): Update the calls to
mips_elf_output_dynamic_relocation accordingly.
(mips_elf_multi_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Don't allocate reserved GOT
entries here. Unconditionally create .got.plt, but don't
set its alignment here.
(mips_elf_relocation_needs_la25_stub): New function.
(mips_elf_calculate_relocation): Redirect branches and jumps to
a non-PIC stub if one exists. Check !h->has_static_relocs instead
of !htab->is_vxworks when deciding whether to create dynamic
relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
_bfd_elf_create_dynamic_sections. Unconditionally set up
htab->splt and htab->sdynbss. Set htab->srelplt to ".rel.plt"
if !htab->is_vxworks. Add non-VxWorks values of
htab->plt_header_size and htab->plt_entry_size.
(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
non-branch static relocations. Set has_nonpic_branches when an la25
stub might be required. Set can_make_dynamic_p to TRUE if R_MIPS_32,
R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
rather than duplicating the condition. Do not make them dynamic
for read-only sections in non-PIC executable objects.
Do not protect this code with dynobj == NULL || htab->sgot == NULL;
handle each group of cases separately. Add a default case that
sets has_static_relocs for non-GOT relocations that cannot be
made dynamic. Don't set is_relocation_target and is_branch_target.
Reject non-PIC static relocations in shared objects.
(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
htab->use_plts_and_copy_relocs instead of htab->is_vxworks
to select PLT and copy-reloc handling. Set the alignment of
.plt and .got.plt when allocating the first entry. Generalize
code to handle REL as well as RELA sections and 64-bit as well as
32-bit GOT entries. Complain if we find a static-only reloc
against an externally-defined symbol and if we cannot create
dynamic relocations for it. Allocate copy relocs using
mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
Skip reserved .got.plt entries.
(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
instead of mips_elf_check_mips16_stubs to process each symbol.
Do the traversal for relocatable objects too.
(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
is empty. Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
to non-VxWorks targets. Only add DT_REL{,A}, DT_REL{,A}SZ and
DT_REL{,A}ENT if .rel.dyn is nonempty. Create a symbol for the
PLT. Allocate a nop at the end of the PLT. Allocate DT_MIPS_PLTGOT.
(mips_elf_create_la25_stub_info): New function.
(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
and copy relocs where necessary. Check pointer_equality_needed.
(mips_finish_exec_plt): New function.
(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
to the beginning of htab->sgot. Use htab->reserved_gotno instead
of MIPS_RESERVED_GOTNO. Assert htab->use_plts_and_copy_relocs
instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
Use mips_finish_exec_plt to create non-VxWorks PLT headers. Set
DT_MIPS_PLTGOT.
(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
from the indirect symbol to the direct symbol. Also copy
has_nonpic_branches for indirect symbols.
(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
DT_MIPS_RWPLT.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): Set
use_plts_and_copy_relocs to TRUE. Use TRUE rather than 1
when setting is_vxworks.
(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
each la25_stub.
(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
as PIC. Generalize message about linking PIC and non-PIC.
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
functions.
* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
* bfd-in2.h: Regenerated.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
STO_MIPS_PIC.
(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
(dump_relocations, debug_apply_relocations): Don't handle it here.
(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
(print_mips_pltgot_entry): New function.
(process_mips_specific): Dump the PLT GOT.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
(md_longopts): Add -call_nonpic.
(md_parse_option): Handle OPTION_CALL_NONPIC.
(md_show_usage): Add -call_nonpic.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
* gas/mips/mips.exp: Run it.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
two variables.
* emulparams/elf32bmipn32-defs.sh: Likewise.
* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
(is_mips_elf): New macro.
(stub_file, stub_bfd): New variables.
(hook_stub_info): New structure.
(hook_in_stub): New function.
(mips_add_stub_section): Likewise.
(mips_create_output_section_statements): Likewise.
(mips_before_allocation): Likewise.
(real_func): New variable.
(mips_for_each_input_file_wrapper): New function.
(mips_lang_for_each_input_file): Likewise.
(lang_for_each_input_file): Define.
(LDEMUL_BEFORE_ALLOCATION): Likewise.
(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* ld-mips-elf/mips16-pic-3a.s,
ld-mips-elf/mips16-pic-3b.s,
ld-mips-elf/mips16-pic-3.dd,
ld-mips-elf/mips16-pic-3.gd,
ld-mips-elf/mips16-pic-3.rd,
ld-mips-elf/mips16-pic-3.inc,
ld-mips-elf/pic-and-nonpic-1a.s,
ld-mips-elf/pic-and-nonpic-1b.s,
ld-mips-elf/pic-and-nonpic-1.ld,
ld-mips-elf/pic-and-nonpic-1.dd,
ld-mips-elf/pic-and-nonpic-1.nd,
ld-mips-elf/pic-and-nonpic-1-rel.dd,
ld-mips-elf/pic-and-nonpic-1-rel.nd,
ld-mips-elf/pic-and-nonpic-2a.s,
ld-mips-elf/pic-and-nonpic-2b.s,
ld-mips-elf/pic-and-nonpic-2.d,
ld-mips-elf/pic-and-nonpic-3a.s,
ld-mips-elf/pic-and-nonpic-3a.ld,
ld-mips-elf/pic-and-nonpic-3a.dd,
ld-mips-elf/pic-and-nonpic-3a.gd,
ld-mips-elf/pic-and-nonpic-3a.sd,
ld-mips-elf/pic-and-nonpic-3b.s,
ld-mips-elf/pic-and-nonpic-3b.ld,
ld-mips-elf/pic-and-nonpic-3b.ad,
ld-mips-elf/pic-and-nonpic-3b.dd,
ld-mips-elf/pic-and-nonpic-3b.gd,
ld-mips-elf/pic-and-nonpic-3b.nd,
ld-mips-elf/pic-and-nonpic-3b.pd,
ld-mips-elf/pic-and-nonpic-3b.rd,
ld-mips-elf/pic-and-nonpic-3b.sd,
ld-mips-elf/pic-and-nonpic-3-error.d,
ld-mips-elf/pic-and-nonpic-4a.s,
ld-mips-elf/pic-and-nonpic-4b.s,
ld-mips-elf/pic-and-nonpic-4b.ld,
ld-mips-elf/pic-and-nonpic-4b.ad,
ld-mips-elf/pic-and-nonpic-4b.dd,
ld-mips-elf/pic-and-nonpic-4b.gd,
ld-mips-elf/pic-and-nonpic-4b.nd,
ld-mips-elf/pic-and-nonpic-4b.rd,
ld-mips-elf/pic-and-nonpic-4b.sd,
ld-mips-elf/pic-and-nonpic-4-error.d,
ld-mips-elf/pic-and-nonpic-5a.s,
ld-mips-elf/pic-and-nonpic-5b.s,
ld-mips-elf/pic-and-nonpic-5b.ld,
ld-mips-elf/pic-and-nonpic-5b.ad,
ld-mips-elf/pic-and-nonpic-5b.dd,
ld-mips-elf/pic-and-nonpic-5b.gd,
ld-mips-elf/pic-and-nonpic-5b.nd,
ld-mips-elf/pic-and-nonpic-5b.rd,
ld-mips-elf/pic-and-nonpic-5b.sd,
ld-mips-elf/pic-and-nonpic-5b.pd,
ld-mips-elf/pic-and-nonpic-6.ld,
ld-mips-elf/pic-and-nonpic-6-o32a.s,
ld-mips-elf/pic-and-nonpic-6-o32b.s,
ld-mips-elf/pic-and-nonpic-6-o32c.s,
ld-mips-elf/pic-and-nonpic-6-o32.ad,
ld-mips-elf/pic-and-nonpic-6-o32.dd,
ld-mips-elf/pic-and-nonpic-6-o32.gd,
ld-mips-elf/pic-and-nonpic-6-o32.nd,
ld-mips-elf/pic-and-nonpic-6-o32.pd,
ld-mips-elf/pic-and-nonpic-6-o32.rd,
ld-mips-elf/pic-and-nonpic-6-o32.sd,
ld-mips-elf/pic-and-nonpic-6-n32a.s,
ld-mips-elf/pic-and-nonpic-6-n32b.s,
ld-mips-elf/pic-and-nonpic-6-n32c.s,
ld-mips-elf/pic-and-nonpic-6-n32.ad,
ld-mips-elf/pic-and-nonpic-6-n32.dd,
ld-mips-elf/pic-and-nonpic-6-n32.gd,
ld-mips-elf/pic-and-nonpic-6-n32.nd,
ld-mips-elf/pic-and-nonpic-6-n32.pd,
ld-mips-elf/pic-and-nonpic-6-n32.rd,
ld-mips-elf/pic-and-nonpic-6-n32.sd,
ld-mips-elf/pic-and-nonpic-6-n64a.s,
ld-mips-elf/pic-and-nonpic-6-n64b.s,
ld-mips-elf/pic-and-nonpic-6-n64c.s,
ld-mips-elf/pic-and-nonpic-6-n64.ad,
ld-mips-elf/pic-and-nonpic-6-n64.dd,
ld-mips-elf/pic-and-nonpic-6-n64.gd,
ld-mips-elf/pic-and-nonpic-6-n64.nd,
ld-mips-elf/pic-and-nonpic-6-n64.pd,
ld-mips-elf/pic-and-nonpic-6-n64.rd,
ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
* elf32-spu.c (spu_elf_special_sections): Add "._ea".
(spu_elf_relocate_section): Handle relocations against symbols
defined in ._ea specially.
binutils/
* embedspu.sh: Take note of R_SPU_PPU32/64 relocs without a symbol,
and if present, put image in ".data.speelf". Put program handle
in ".data.spehandle".
ld/emulparams/
* elf32_spu.sh (OTHER_SECTIONS): Add "._ea".
* elf32ppc.sh: If building with spu support, put ".data.spehandle"
sections at the start of ".data" and provide a symbol to locate
the directory of embedded spe programs.
ld/testsuite/
* ld-spu/ear.s: Align various sections.
* ld-spu/embed.rd: Update.
* genscript.sh: Add support for generating a .xa script for use with the --auto-import option.
* ld.texinfo: Document the new behaviour of the --auto-import option.
* ldint.texinfo: Document new script generation.
* emulparams/i386pe.sh (GENERATE_AUTO_IMPORT): Define.
* emulparams/i386pe_posix.sh (GENERATE_AUTO_IMPORT): Define.
* emulparams/i386pep.sh (GENERATE_AUTO_IMPORT): Define.
* emultemp/pe.em (..._get_script): Support the use of the auto import script.
* scripttempl/pe.sc: Put the .rdata input sections into the .data output section when creating an auto import script.
* scripttempl/pep.sc: Likewise.
* emulparams/elf32bmip.sh (OTHER_GOT_RELOC_SECTIONS): Define.
* emulparams/elf32bmipn32-defs.sh (OTHER_GOT_RELOC_SECTIONS): Likewise.
ld/testsuite/
* ld-mips-elf/rel32-o32.d: Bump the section number of .text by 1
to account for the fact that .rel.dyn is now before .text in the
section table.
* ld-mips-elf/rel32-n32.d: Likewise.
* ld-mips-elf/rel64.d: Likewise.
* bfd/elf64-sparc.c: Add FreeBSD support.
(elf64_sparc_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_sparc_freebsd_vec.
* bfd/config.bfd (sparc64-*-freebsd*): Set targ_defvec to bfd_elf64_sparc_freebsd_vec.
* bfd/configure.in: Add entry for bfd_elf64_sparc_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-sparc.c (md_parse_option): Treat any target starting with elf32-sparc
as a viable target for the -32 switch and any target starting with elf64-sparc as a
viable target for the -64 switch.
(sparc_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64
while for 32-bit ELF flavoured output use ELF_TARGET_FORMAT.
* gas/config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf64_sparc_fbsd.sh (OUTPUT_FORMAT): Define as elf64-sparc-freebsd.
* Makefile.am (eelf64bmip.c): Depend on emulparams/elf64bmip-defs.sh.
(eelf64btsmip.c, eelf64ltsmip.c): Likewise.
* Makefile.in: Regenerate.
* emulparams/elf32bmipn32-defs.sh (INITIAL_READONLY_SECTIONS): Include
.reginfo rather than .MIPS.options.
* emulparams/elf64bmip-defs.sh: New file.
* emulparams/elf64bmip.sh: Include it.
(COMMONPAGESIZE): Delete.
* emulparams/elf64btsmip.sh: As for elf64bmip.sh.
ld/testsuite/
* ld-mips-elf/branch-misc-1.d: Set the start address to 0x20000000.
* ld-mips-elf/jalbal.d: Likewise 0x200000a0.
* ld-mips-elf/jaloverflow-2.d: Likewise 0x20000000.
* ld-mips-elf/reloc-3-n32.d: Likewise.
* ld-mips-elf/reloc-3.d: Likewise.
* ld-mips-elf/textrel-1.d: Don't require a specific file offset for
.dynamic.
* emulparams/elf32xtensa.sh: Set MAXPAGESIZE here instead of including
xtensa-config.sh.
* Makefile.am (eelf32xtensa.c): Remove dependency on xtensa-config.sh.
* Makefile.in: Regenerate.
* elf32-xtensa.c (xtensa_get_property_section_name): Delete.
(xtensa_get_property_section): New.
(xtensa_read_table_entries): Use xtensa_get_property_section.
(relax_property_section, xtensa_get_property_predef_flags): Handle
group name suffixes in property section names.
(match_section_group): New.
gas/
* config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
(INIT_LITERAL_SECTION_NAME): Delete.
(lit_state struct): Remove segment names, init_lit_seg, and
fini_lit_seg. Add lit_prefix and current_text_seg.
(init_literal_head_h, init_literal_head): Delete.
(fini_literal_head_h, fini_literal_head): Delete.
(xtensa_begin_directive): Move argument parsing to
xtensa_literal_prefix function.
(xtensa_end_directive): Deallocate lit_prefix field of lit_state.
(xtensa_literal_prefix): Parse the directive argument here and
record it in the lit_prefix field. Remove code to derive literal
section names.
(linkonce_len): New.
(get_is_linkonce_section): Use linkonce_len. Check for any
".gnu.linkonce.*" section, not just text sections.
(md_begin): Remove initialization of deleted lit_state fields.
(xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
to init_literal_head and fini_literal_head.
(xtensa_move_literals): Likewise. Skip literals for .init and .fini
when traversing literal_head list.
(match_section_group): New.
(cache_literal_section): Rewrite to determine the literal section
name on the fly, create the section and return it.
(xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
(xtensa_switch_to_non_abs_literal_fragment): Likewise.
(xtensa_create_property_segments, xtensa_create_xproperty_segments):
Use xtensa_get_property_section from bfd.
(retrieve_xtensa_section): Delete.
* doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
description to refer to plural literal sections and add xref to
the Literal Directive section.
(Literal Directive): Describe new rules for deriving literal section
names. Add footnote for special case of .init/.fini with
--text-section-literals.
(Literal Prefix Directive): Replace old naming rules with xref to the
Literal Directive section.
ld/
* emulparams/elf32xtensa.sh (.xt.prop): Add .xt.prop.*.
* scripttempl/elfxtensa.sc (.text): Add .literal.*.
* Makefile.am: Add rules to build pe-arm-wince.lo and pei-arm-wince.lo objects.
* Makefile.in: Regenerate.
* pe-arm-wince.c: New file.
* pei-arm-wince.c: New file.
* pei-arm.c: Remove ARM_WINCE block.
* pe-arm.c: Remove ARM_WINCE block. Rename
bfd_arm_pe_allocate_interworking_sections,
bfd_arm_pe_get_bfd_for_interworking, and
bfd_arm_pe_process_before_allocation to
bfd_armpe_allocate_interworking_sections,
bfd_armpe_get_bfd_for_interworking, and
bfd_armpe_process_before_allocation. Move them before including bfd.h.
* bfd.c: ARM wince bfd format names were renamed. Adjust.
* coff-arm.c [ARM_WINCE]: Adjust so Windows CE doesn't end up with unexpected/conflicting relocs.
* targets.c: The arm-wince-pe target got its own new vector. Adjust.
* config.bfd: Likewise.
* configure.in: Likewise.
* configure: Regenerate.
binutils
* configure.in: Split arm-pe and arm-wince-pe. Build dlltool with -DDLLTOOL_ARM_WINCE for Windows CE case.
* configure: Regenerate.
* dlltool.c: Add support for arm-wince.
gas
* Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
* Makefile.in: Regenerate.
* config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were renamed. Adjust.
ld
* Makefile.am: Split arm-wince into its own emulation.
* Makefile.in: Regenerate.
* configure.tgt: Set targ_emul to arm_wince_pe for ARM Windows CE targets.
* pe-dll.c : Define PE_ARCH_arm_wince.
(pe_detail_list): Add PE_ARCH_arm_wince case.
(make_one): Handle PE_ARCH_arm_epoc and PE_ARCH_arm_wince cases.
* emulparams/arm_wince_pe.sh: New file.
* emultempl/pe.em: Handle new TARGET_IS_arm_wince_pe define.
Remap bfd_arm_allocate_interworking_sections, bfd_arm_get_bfd_for_interworking and
bfd_arm_process_before_allocation for arm-pe and arm-wince-pe targets too.
(gld_${EMULATION_NAME}_recognized_file): Handle arm-wince and arm-epoc bfd format names.
2006-08-02 Richard Sandiford <richard@codesourcery.com>
Kazu Hirata <kazu@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
* config.bfd (sh-*-vxworks): Use bfd_elf32_shvxworks_vec and
bfd_elf32_shlvxworks_vec.
* configure.in (bfd_elf32_sh64_vec): Add elf-vxworks.lo.
(bfd_elf32_sh64l_vec, bfd_elf32_sh64lin_vec): Likewise.
(bfd_elf32_sh64blin_vec, bfd_elf32_sh64lnbsd_vec): Likewise.
(bfd_elf32_sh64nbsd_vec, bfd_elf32_sh_vec): Likewise.
(bfd_elf32_shblin_vec, bfd_elf32_shl_vec): Likewise.
(bfd_elf32_shl_symbian_vec, bfd_elf32_shlin_vec): Likewise.
(bfd_elf32_shlnbsd_vec, bfd_elf32_shnbsd_vec): Likewise.
(bfd_elf32_shlvxworks_vec, bfd_elf32_shvxworks_vec): New stanzas.
* configure: Regenerate.
* Makefile.am: Regenerate dependencies.
* Makefile.in: Regenerate.
* elf-vxworks.c (elf_vxworks_gott_symbol_p): New function.
(elf_vxworks_add_symbol_hook): Use it.
(elf_vxworks_link_output_symbol_hook): Likewise. Use the hash
table entry to check for weak undefined symbols and to obtain
the original bfd.
(elf_vxworks_emit_relocs): Use target_index instead of this_idx.
* elf32-sh-relocs.h: New file, split from elf32-sh.c.
(R_SH_DIR32): Use SH_PARTIAL32 for the partial_inplace field,
SH_SRC_MASK32 for the src_mask field, and SH_ELF_RELOC for the
special_function field.
(R_SH_REL32): Use SH_PARTIAL32 and SH_SRC_MASK32 here too.
(R_SH_REL32, R_SH_TLS_GD_32, R_SH_TLS_LD_32): Likewise.
(R_SH_TLS_LDO_32, R_SH_TLS_IE_32, R_SH_TLS_LE_32): Likewise.
(R_SH_TLS_DTPMOD32, R_SH_TLS_DTPOFF32, R_SH_TLS_TPOFF32): Likewise.
(R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT): Likewise.
(R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Likewise.
(SH_PARTIAL32, SH_SRC_MASK32, SH_ELF_RELOC): Undefine at end of file.
* elf32-sh.c: Include elf32-vxworks.h.
(MINUS_ONE): Define.
(sh_elf_howto_table): Include elf32-sh-relocs.h with SH_PARTIAL32
set to TRUE, SH_SRC_MASK32 set to 0xffffffff, and SH_ELF_RELOC set
to sh_elf_reloc.
(sh_vxworks_howto_table): New variable. Include elf32-sh-relocs.h
with SH_PARTIAL32 set to FALSE, SH_SRC_MASK32 set to 0, and
SH_ELF_RELOC set to bfd_elf_generic_reloc.
(vxworks_object_p, get_howto_table): New functions.
(sh_elf_reloc_type_lookup): Fix typo. Use get_howto_table.
(sh_elf_info_to_howto): Use get_howto_table.
(sh_elf_relax_section): Honor the partial_inplace field of the
R_SH_DIR32 howto.
(sh_elf_relax_delete_bytes): Likewise.
(elf_sh_plt_info): New structure.
(PLT_ENTRY_SIZE): Replace both definitions with...
(ELF_PLT_ENTRY_SIZE): ...this new macro, with separate definitions for
INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(elf_sh_plt0_entry_be): Update sizes of both definitions accordingly.
(elf_sh_plt0_entry_le): Likewise.
(elf_sh_plt_entry_be, elf_sh_plt_entry_le): Likewise.
(elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le): Likewise.
(elf_sh_plts): New structure, with separate definitions for
INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(elf_sh_plt0_entry): Delete both definitions.
(elf_sh_plt_entry, elf_sh_pic_plt_entry): Likewise.
(elf_sh_sizeof_plt, elf_sh_plt_plt0_offset): Likewise.
(elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset): Likewise.
(elf_sh_plt_reloc_offset): Likewise.
(movi_shori_putval): Delete in favor of...
(install_plt_field): ...this new function, with separate definitions
for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(get_plt_info): New function, with separate definitions
for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(elf_sh_plt0_linker_offset, elf_sh_plt0_gotid_offset): Delete.
(VXWORKS_PLT_HEADER_SIZE, VXWORKS_PLT_ENTRY_SIZE): New macros.
(vxworks_sh_plt0_entry_be, vxworks_sh_plt0_entry_le): New constants.
(vxworks_sh_plt_entry_be, vxworks_sh_plt_entry_le): Likewise.
(vxworks_sh_pic_plt_entry_be, vxworks_sh_pic_plt_entry_le): Likewise.
(get_plt_index, get_plt_offset): New functions.
(elf_sh_link_hash_table): Add srelplt2, plt_info and vxworks_p fields.
(sh_elf_link_hash_table_create): Initialize them.
(sh_elf_create_dynamic_sections): Call
elf_vxworks_create_dynamic_sections for VxWorks.
(allocate_dynrelocs): Use htab->plt_info to get the size of PLT
entries. Allocate relocation entries in .rela.plt.unloaded if
generating a VxWorks executable.
(sh_elf_always_size_sections): New function.
(sh_elf_size_dynamic_sections): Extend .rela.plt handling to
.rela.plt.unloaded.
(sh_elf_relocate_section): Use get_howto_table. Honor
partial_inplace when calculating the addend for dynamic
relocations. Use get_plt_index.
(sh_elf_finish_dynamic_symbol): Use get_plt_index, install_plt_field
and htab->plt_info. Fill in the bra .plt offset for VxWorks
executables. Populate .rela.plt.unloaded. Do not make
_GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
(sh_elf_finish_dynamic_sections): Use install_plt_field and
htab->plt_info. Handle cases where there is no special PLT header.
Populate the first relocation in .rela.plt.unloaded and fix up
the remaining entries.
(sh_elf_plt_sym_val): Use get_plt_info.
(elf_backend_always_size_sections): Define.
(TARGET_BIG_SYM, TARGET_BIG_NAME): Override for VxWorks.
(TARGET_LITTLE_SYM, TARGET_BIG_SYM): Likewise.
(elf32_bed, elf_backend_want_plt_sym): Likewise.
(elf_symbol_leading_char, elf_backend_want_got_underscore): Likewise.
(elf_backend_grok_prstatus, elf_backend_grok_psinfo): Likewise.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_link_output_symbol_hook): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_final_write_processing): Likewise.
(ELF_MAXPAGESIZE, ELF_COMMONPAGESIZE): Likewise.
* targets.c (bfd_elf32_shlvxworks_vec): Declare.
(bfd_elf32_shvxworks_vec): Likewise.
(_bfd_target_vector): Include bfd_elf32_shlvxworks_vec and
bfd_elf32_shvxworks_vec.
gas/
* config/tc-sh.c (apply_full_field_fix): New function.
(md_apply_fix): Use it instead of md_number_to_chars. Do not fill
in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
(tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
* config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
ld/
2006-08-02 Richard Sandiford <richard@codesourcery.com>
Kazu Hirata <kazu@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
* Makefile.am (ALL_EMULATIONS): Add eshelf_vxworks.o and
eshlelf_vxworks.o.
(eshelf_vxworks.c, eshlelf_vxworks.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh-*-vxworks): Use shelf_vxworks and
shlelf_vxworks.
* emulparams/shelf_vxworks.sh: New file.
* emulparams/shlelf_vxworks.sh: Likewise.
* emulparams/vxworks.sh (FINI): Prefix _etext with ${SYMPREFIX}.
(OTHER_END_SYMBOLS): Likewise _ehdr.
(DATA_END_SYMBOLS): Likewise _edata.
* emultempl/vxworks.em (vxworks_after_open): Check whether output_bfd
is indeed an ELF file before dealing with --force-dynamic.
ld/testsuite/
* ld-sh/rd-sh.exp: Treat vxworks1-static.d specially.
* ld-sh/sh-vxworks.exp: New file.
* ld-sh/sh.exp: Extend sh-linux SIZEOF_HEADERS handling to
sh-*-vxworks.
* ld-sh/vxworks1-le.dd, ld-sh/vxworks1-lib-le.dd,
* ld-sh/vxworks1-lib.dd, ld-sh/vxworks1-lib.nd,
* ld-sh/vxworks1-lib.rd, ld-sh/vxworks1-lib.s,
* ld-sh/vxworks1-static.d, ld-sh/vxworks1.dd,
* ld-sh/vxworks1.ld, ld-sh/vxworks1.rd, ld-sh/vxworks1.s,
* ld-sh/vxworks2-static.sd, ld-sh/vxworks2.s,
* ld-sh/vxworks2.sd, ld-sh/vxworks3-le.dd,
* ld-sh/vxworks3-lib-le.dd, ld-sh/vxworks3-lib.dd,
* ld-sh/vxworks3-lib.s, ld-sh/vxworks3.dd, ld-sh/vxworks3.s,
* ld-sh/vxworks4.d, ld-sh/vxworks4a.s, ld-sh/vxworks4b.s,
* ld-sh/reloc1.s, ld-sh/reloc1.d: New tests.
* bfd/elf64-x86-64.c: Add FreeBSD support.
(elf64_x86_64_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_x86_64_freebsd_vec.
* bfd/config.bfd (x64_64-*-freebsd*): Add bfd_elf64_x86_64_freebsd_vec to the targ_selvecs.
* bfd/configure.in: Add entry for bfd_elf64_x86_64_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-i386.c (md_parse_option): Treat any target starting with elf64_x86_64 as a viable target for the -64 switch.
(i386_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64.
* gas/config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf_x86_64_fbsd.sh (OUTPUT_FORMAT): Define as elf64-x86-64-freebsd.
2006-06-12 Fred Fish <fnf@specifix.com>
* emulparams/elf32bmip.sh (OTHER_SECTIONS): Keep the
".mdebug.<abi>" and ".gcc_compiled_long<size>" sections
generated by mips gcc.
* elf32-mips.c: Expand comment about ABI-mandated pagesize values.
(ELF_MAXPAGESIZE, ELF_COMMONPAGESIZE): define in a more obvious way.
* elf64-mips.c, elfn32-mips.c (ELF_MAXPAGESIZE): Fix value for IRIX6.
Delete old comments.
(ELF_COMMONPAGESIZE): Define in a more obvious way.
[ ld/ChangeLog ]
* emulparams/elf64bmip.sh, emulparams/elf64btsmip.sh (COMMONPAGESIZE):
Define.
[ ld/testsuite/ChangeLog ]
* ld-mips-elf/multi-got-no-shared.d: Adjust for recent change of
ELF_MAXPAGESIZE.
Daniel Jacobowitz <dan@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
Zack Weinberg <zack@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
bfd/
* bfd-in2.h: Regenerate.
* config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas.
* configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza.
(bfd_elf32_littlemips_vxworks_vec): Likewise.
(bfd_elf32_bigmips_vec): Add elf-vxworks.lo.
(bfd_elf32_littlemips_vec): Likewise.
(bfd_elf32_nbigmips_vec): Likewise.
(bfd_elf32_nlittlemips_vec): Likewise.
(bfd_elf32_ntradbigmips_vec): Likewise.
(bfd_elf32_ntradlittlemips_vec): Likewise.
(bfd_elf32_tradbigmips_vec): Likewise.
(bfd_elf32_tradlittlemips_vec): Likewise.
(bfd_elf64_bigmips_vec): Likewise.
(bfd_elf64_littlemips_vec): Likewise.
(bfd_elf64_tradbigmips_vec): Likewise.
(bfd_elf64_tradlittlemips_vec): Likewise.
* elf32-mips.c: Include elf-vxworks.h.
(mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto
instead of calling mips_elf32_rtype_to_howto directly.
(mips_vxworks_copy_howto_rela): New reloc howto.
(mips_vxworks_jump_slot_howto_rela): Likewise.
(mips_vxworks_bfd_reloc_type_lookup): New function.
(mips_vxworks_rtype_to_howto): Likewise.
(mips_vxworks_final_write_processing): Likewise.
(TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks.
(TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise.
(elf_backend_want_got_plt): Likewise.
(elf_backend_want_plt_sym): Likewise.
(elf_backend_got_symbol_offset): Likewise.
(elf_backend_want_dynbss): Likewise.
(elf_backend_may_use_rel_p): Likewise.
(elf_backend_may_use_rela_p): Likewise.
(elf_backend_default_use_rela_p): Likewise.
(elf_backend_got_header_size: Likewise.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_finish_dynamic_symbol): Likewise.
(bfd_elf32_bfd_link_hash_table_create): Likewise.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_link_output_symbol_hook): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_final_write_processing: Likewise.
(elf_backend_additional_program_headers): Likewise.
(elf_backend_modify_segment_map): Likewise.
(elf_backend_symbol_processing): Likewise.
* elfxx-mips.c: Include elf-vxworks.h.
(mips_elf_link_hash_entry): Add is_relocation_target and
is_branch_target fields.
(mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt,
srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields.
(MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros.
(MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument.
Return 3 for VxWorks.
(ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a
mips_elf_link_hash_table. Return 0 for VxWorks.
(MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a
mips_elf_link_hash_table. Update the call to ELF_MIPS_GP_OFFSET.
(mips_vxworks_exec_plt0_entry): New variable.
(mips_vxworks_exec_plt_entry): Likewise.
(mips_vxworks_shared_plt0_entry): Likewise.
(mips_vxworks_shared_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize the new hash_entry fields.
(mips_elf_rel_dyn_section): Change the bfd argument to a
mips_elf_link_hash_table. Use MIPS_ELF_REL_DYN_NAME to get
the name of the section.
(mips_elf_initialize_tls_slots): Update the call to
mips_elf_rel_dyn_section.
(mips_elf_gotplt_index): New function.
(mips_elf_local_got_index): Add an input_section argument.
Update the call to mips_elf_create_local_got_entry.
(mips_elf_got_page): Likewise.
(mips_elf_got16_entry): Likewise.
(mips_elf_create_local_got_entry): Add bfd_link_info and input_section
arguments. Create dynamic relocations for each entry on VxWorks.
(mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE.
(mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE
and MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Update the uses of
MIPS_ELF_GOT_MAX_SIZE. Create .got.plt on VxWorks.
(is_gott_symbol): New function.
(mips_elf_calculate_relocation): Use a dynobj local variable.
Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and
mips_elf_got_page_entry. Set G to the .got.plt entry when calculating
VxWorks R_MIPS_CALL* relocations. Calculate and use G for all GOT
relocations on VxWorks. Add dynamic relocations for references
to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Don't
create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64
in VxWorks executables.
(mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument.
Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry.
Don't allocate a null entry on VxWorks.
(mips_elf_create_dynamic_relocation): Update the call to
mips_elf_rel_dyn_section. Use absolute rather than relative
relocations for VxWorks, and make them RELA rather than REL.
(_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic
read-only on VxWorks. Update the call to mips_elf_rel_dyn_section.
Create the .plt, .rela.plt, .dynbss and .rela.bss sections on
VxWorks. Likewise create the _PROCEDURE_LINKAGE_TABLE symbol.
Call elf_vxworks_create_dynamic_sections for VxWorks and
initialize the plt_header_size and plt_entry_size fields.
(_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be
used in VxWorks executables. Don't allocate dynamic relocations
for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables.
Set is_relocation_target for each symbol referenced by a relocation.
Allocate .rela.dyn entries for relocations against the special
VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Create GOT
entries for all VxWorks R_MIPS_GOT16 relocations. Don't allocate
a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*,
R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations. Update the calls
to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations.
Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26
relocations. Don't set no_fn_stub on VxWorks.
(_bfd_mips_elf_adjust_dynamic_symbol): Update the call to
mips_elf_allocate_dynamic_relocations.
(_bfd_mips_vxworks_adjust_dynamic_symbol): New function.
(_bfd_mips_elf_always_size_sections): Do not allocate GOT page
entries for VxWorks, and do not create multiple GOTs.
(_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME.
Handle .got specially for VxWorks. Update the uses of
MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations.
Check for sgotplt and splt. Allocate the .rel(a).dyn contents last,
once its final size is known. Set DF_TEXTREL for VxWorks. Add
DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL
tags on VxWorks. Do not add the MIPS-specific tags for VxWorks.
(_bfd_mips_vxworks_finish_dynamic_symbol): New function.
(mips_vxworks_finish_exec_plt): Likewise.
(mips_vxworks_finish_shared_plt): Likewise.
(_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call
to mips_elf_rel_dyn_section. Use a VxWorks-specific value of
DT_PLTGOT. Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL,
DT_PLTRELSZ and DT_JMPREL. Update the uses of MIPS_RESERVED_GOTNO
and mips_elf_rel_dyn_section. Use a different GOT header for
VxWorks. Don't sort .rela.dyn on VxWorks. Finish the PLT on VxWorks.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): New function.
(_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_
on VxWorks. Update the call to ELF_MIPS_GP_OFFSET.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(_bfd_mips_vxworks_link_hash_table_create): Likewise.
* libbfd.h: Regenerate.
* Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h.
(elf32-mips.lo): Likewise.
* Makefile.in: Regenerate.
* reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare.
* targets.c (bfd_elf32_bigmips_vxworks_vec): Declare.
(bfd_elf32_littlemips_vxworks_vec): Likewise.
(_bfd_target_vector): Add entries for them.
gas/
* config/tc-mips.c (mips_target_format): Handle vxworks targets.
(md_begin): Complain about -G being used for PIC. Don't change
the text, data and bss alignments on VxWorks.
(reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
generating VxWorks PIC.
(load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
(macro): Likewise, but do not treat la $25 specially for
VxWorks PIC, and do not handle jal.
(OPTION_MVXWORKS_PIC): New macro.
(md_longopts): Add -mvxworks-pic.
(md_parse_option): Don't complain about using PIC and -G together here.
Handle OPTION_MVXWORKS_PIC.
(md_estimate_size_before_relax): Always use the first relaxation
sequence on VxWorks.
* config/tc-mips.h (VXWORKS_PIC): New.
gas/testsuite/
* gas/mips/vxworks1.s, gas/mips/vxworks1.d,
* gas/mips/vxworks1-xgot.d: New tests.
* gas/mips/mips.exp: Run them. Do not run other tests on VxWorks.
include/elf/
* mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs.
ld/
* configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use
separate VxWorks emulations.
* emulparams/elf32ebmipvxworks.sh: New file.
* emulparams/elf32elmipvxworks.sh: New file.
* Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and
eelf32elmipvxworks.o.
(eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd,
* ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd,
* ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s,
* ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd,
* ld-mips/vxworks2-static.sd: New tests.
* ld-mips/mips-elf.exp: Run them.
* configure.in (bfd_elf32_bigarm_vec): Include elf-vxworks.lo.
(bfd_elf32_bigarm_symbian_vec): Likewise.
(bfd_elf32_bigarm_vxworks_vec): Likewise.
(bfd_elf32_littlearm_vec): Likewise.
(bfd_elf32_littlearm_symbian_vec): Likewise.
(bfd_elf32_littlearm_vxworks_vec): Likewise.
* configure: Regenerate.
* elf32-arm.c: Include libiberty.h and elf-vxworks.h.
(RELOC_SECTION, RELOC_SIZE, SWAP_RELOC_IN, SWAP_RELOC_OUT): New macros.
(elf32_arm_vxworks_bed): Add forward declaration.
(elf32_arm_howto_table_1): Fix the masks for R_ASM_ABS12.
(elf32_arm_vxworks_exec_plt0_entry): New table.
(elf32_arm_vxworks_exec_plt_entry): Likewise.
(elf32_arm_vxworks_shared_plt_entry): Likewise.
(elf32_arm_link_hash_table): Add vxworks_p and srelplt2 fields.
(reloc_section_p): New function.
(create_got_section): Use RELOC_SECTION.
(elf32_arm_create_dynamic_sections): Likewise. Call
elf_vxworks_create_dynamic_sections for VxWorks targets.
Choose between the two possible values of plt_header_size
and plt_entry_size.
(elf32_arm_link_hash_table_create): Initialize vxworks_p and srelplt2.
(elf32_arm_abs12_reloc): New function.
(elf32_arm_final_link_relocate): Call it. Allow the creation of
dynamic R_ARM_ABS12 relocs on VxWorks. Use reloc_section_p,
RELOC_SIZE, SWAP_RELOC_OUT and RELOC_SECTION. Initialize the
r_addend fields of relocs. On rela targets, skip any code that
adjusts in-place addends. When using _bfd_link_final_relocate
to perform a final relocation, pass rel->r_addend as the addend
argument.
(elf32_arm_merge_private_bfd_data): If one of the bfds is a VxWorks
object, ignore flags that are not standard on VxWorks.
(elf32_arm_check_relocs): Allow the creation of dynamic R_ARM_ABS12
relocs on VxWorks. Use reloc_section_p.
(elf32_arm_adjust_dynamic_symbol): Use RELOC_SECTION and RELOC_SIZE.
(allocate_dynrelocs): Use RELOC_SIZE. Account for the size of
.rela.plt.unloaded relocs on VxWorks targets.
(elf32_arm_size_dynamic_sections): Use RELOC_SIZE. Check for
.rela.plt.unloaded as well as .rel(a).plt. Add DT_RELA* tags
instead of DT_REL* tags on RELA targets.
(elf32_arm_finish_dynamic_symbol): Use RELOC_SECTION, RELOC_SIZE
and SWAP_RELOC_OUT. Initialize r_addend fields. Handle VxWorks
PLT entries. Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
(elf32_arm_finish_dynamic_sections): Use RELOC_SECTION, RELOC_SIZE
and SWAP_RELOC_OUT. Initialize r_addend fields. Handle DT_RELASZ
like DT_RELSZ. Handle the VxWorks form of initial PLT entry.
Correct the .rela.plt.unreloaded symbol indexes.
(elf32_arm_output_symbol_hook): Call the VxWorks version of this
hook on VxWorks targets.
(elf32_arm_vxworks_link_hash_table_create): Set vxworks_p to true.
Minor formatting tweak.
(elf32_arm_vxworks_final_write_processing): New function.
(elf_backend_add_symbol_hook): Override for VxWorks and reset
for Symbian.
(elf_backend_final_write_processing): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_want_plt_sym): Likewise.
(ELF_MAXPAGESIZE): Likewise.
(elf_backend_may_use_rel_p): Minor formatting tweak.
(elf_backend_may_use_rela_p): Likewise.
(elf_backend_default_use_rela_p): Likewise.
(elf_backend_rela_normal): Likewise.
* Makefile.in (elf32-arm.lo): Depend on elf-vxworks.h.
gas/
* config/tc-arm.c (md_apply_fix): Install a value of zero into a
BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
R_ARM_ABS12 reloc.
(tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
gas/testsuite/
* gas/arm/abs12.s, gas/arm/abs12.d: New test.
* gas/arm/pic.d: Skip for *-*-vxworks*...
* gas/arm/pic_vxworks.d: ...use this version instead.
* gas/arm/unwind_vxworks.d: Fix expected output.
ld/
* emulparams/armelf_vxworks.sh: Include vxworks.sh.
(MAXPAGESIZE): Define.
* emulparams/vxworks.sh: Undefine.
* Makefile.am (earmelf_vxworks.c): Depend on vxworks.sh and vxworks.em.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd,
* ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd,
* ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s,
* ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd,
* ld-arm/vxworks2-static.sd: New tests.
* ld-arm/arm-elf.exp: Run them.
* elf32-ppc.c (ppc_elf_plt_type): New enumeration.
(ppc_elf_link_hash_table): Replace old_got and new_got with
plt_type and can_use_new_plt.
(ppc_elf_create_dynamic_sections): Add SEC_HAS_CONTENTS,
SEC_LOAD and SEC_READONLY to the VxWorks .plt flags.
(ppc_elf_check_relocs): Set can_use_new_plt instead of new_plt.
Move from plt_type == PLT_UNSET to PLT_OLD instead of setting old_plt.
(ppc_elf_select_plt_layout): Move from plt_type == PLT_UNSET to
either plt_type == PLT_OLD or plt_type == PLT_NEW. Assert that
this function should not be called for VxWorks targets.
(ppc_elf_tls_setup): Use plt_type instead of old_got.
(allocate_got): Likewise. Rearrange so that max_before_header
is only used for PLT_OLD and PLT_NEW.
(allocate_dynrelocs): Use plt_type instead of old_got and is_vxworks.
(ppc_elf_size_dynamic_sections): Likewise.
(ppc_elf_relax_section): Likewise.
(ppc_elf_relocate_section): Likewise.
(ppc_elf_finish_dynamic_symbol): Likewise.
(ppc_elf_vxworks_link_hash_table_create): Initialize plt_type.
ld/
* emulparams/elf32ppccommon.sh: New file, extracted from...
* emulparams/elf32ppc.sh: ...here.
* emulparams/elf32ppcvxworks.sh: Include elf32ppccommon.sh
instead of elf32ppc.sh.
(BSS_PLT): Remove override.
* Makefile.am (eelf32lppc.c): Depend on elf32ppccommons.h.
(eelf32lppcnto.c, eelf32lppcsim.c, eelf32ppcnto.c): Likewise.
(eelf32ppc.c, eelf32ppc_fbsd.c, eelf32ppcsimm): Likewise.
(eelf32ppclinux.c): Likewise.
(eelf32ppcvxworks.c): Likewise. Add missing vxworks.sh dependency.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-powerpc/vxworks1-lib.s, ld-powerpc/vxworks1-lib.dd,
* ld-powerpc/vxworks1-lib.rd, ld-powerpc/vxworks1.s,
* ld-powerpc/vxworks1.dd, ld-powerpc/vxworks1.rd,
* ld-powerpc/vxworks1.ld, ld-powerpc/vxworks1.sd: New test.
* ld-powerpc/powerpc.exp: Run it.
2005-07-14 Jim Blandy <jimb@redhat.com>
* configure.in: Add cases for Renesas m32c.
* configure: Regenerated.
bfd/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for m32c-*-elf (Renesas m32c and m16c).
* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
(ALL_MACHINES_CFILES): Add cpu-m32c.c.
(BFD32_BACKENDS): Add elf32-m32c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
* Makefile.in: Regenerated.
* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
arch and mach codes.
(bfd_m32c_arch): New arch info object.
(bfd_archures_list): List bfd_m32c_arch.
* bfd-in2.h: Regenerated.
* config.bfd: Add case for the m32c.
* configure.in: Add case for the m32c.
* configure: Regenerated.
* cpu-m32c.c, elf32-m32c.c: New files.
* libbfd.h: Regenerated.
* targets.c (bfd_elf32_m32c_vec): Declare.
(_bfd_target_vector): List bfd_elf32_m32c_vec.
binutils/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* readelf.c: #include "elf/m32c.h"
(guess_is_rela, dump_relocations, get_machine_name): Add cases for
EM_M32C.
* Makefile.am (readelf.o): Update dependencies.
* Makefile.in: Regenerated.
cpu/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
gas/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C.
* Makefile.am (CPU_TYPES): List m32c.
(TARGET_CPU_CFILES): List config/tc-m32c.c.
(TARGET_CPU_HFILES): List config/tc-m32c.h.
* configure.in: Add case for m32c.
* configure.tgt: Add cases for m32c and m32c-*-elf.
* configure: Regenerated.
* config/tc-m32c.c, config/tc-m32c.h: New files.
* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set M32C.
* doc/as.texinfo: Add text for the M32C-specific options and line
comment characters, and refer to c-m32c.texi.
* doc/c-m32c.texi: New file.
include/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* dis-asm.h (print_insn_m32c): New declaration.
include/elf/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for Renesas M32C and M16C.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
ld/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
(eelf32m32c.c): New target.
* Makefile.in: Regenerated.
* configure.tgt: Add case for m32c-*-elf.
* emulparams/elf32m32c.sh: New file.
opcodes/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
* m32c-desc.h, m32c-opc.h: New.
* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
m32c-opc.c.
(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
m32c-ibld.lo, m32c-opc.lo.
(CLEANFILES): List stamp-m32c.
(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
(CGEN_CPUS): Add m32c.
(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
(m32c_opc_h): New variable.
(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
(m32c-opc.lo): New rules.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_m32c_arch.
* configure: Regenerated.
* disassemble.c (ARCH_m32c): New.
[ARCH_m32c]: #include "m32c-desc.h".
(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
(disassemble_init_for_target) [ARCH_m32c]: Same.
* cgen-ops.h, cgen-types.h: New files.
* Makefile.am (HFILES): List them.
* Makefile.in: Regenerated.
bfd/
* config.bfd: Use bfd_elf32_i386_vxworks_vec for i?86-*-vxworks.
* configure.in: Add bfd_elf32_i386_vxworks_vec. i386 targets need
elf-vxworks.lo.
* configure: Regenerate.
* Makefile.am (BFD32_BACKENDS): Add elf-vxworks.lo.
(BFD32_BACKENDS_CFILES): Add elf-vxworks.c.
(elf32-i386.lo): Depend on elf-vxworks.h.
(elf-vxworks.lo): New rule.
* Makefile.in: Regenerate.
* elf-bfd.h (elf_backend_data): Update type of
elf_backend_emit_relocs.
(_bfd_elf_link_output_relocs): Update prototype.
* elflink.c (_bfd_elf_link_output_relocs): Always use
bed->elf_backend_emit_relocs when outputting relocations.
* elfxx-target.h (elf_backend_emit_relocs): Default to
_bfd_elf_link_output_relocs.
* targets.c (bfd_elf32_i386_vxworks_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_i386_vxworks_vec.
* elf32-i386.c: Add elf32-i386-vxworks target BFD.
(elf_i386_plt0_entry): Remove padding.
(elf_i386_pic_plt0_entry): Ditto.
(PLTRESOLVE_RELOCS_SHLIB, PLTRESOLVE_RELOCS): Define.
(PLT_NON_JUMP_SLOT_RELOCS): Define.
(elf_i386_link_hash_table): Add srelplt2, hgot, hplt, is_vxworks and
plt0_pad_byte fields.
(elf_i386_link_hash_table_create): Zero them.
(elf_i386_create_dynamic_sections): Create static relocation section.
(allocate_dynrelocs): Allocate space for static PLT relocations.
(elf_i386_size_dynamic_sections): Save shortcuts to PLT and GOT
symbols. Give PLT symbols function type. Don't strip PLT sections
if we have exported symbols from them.
(elf_i386_finish_dynamic_symbol): Fill in VxWorks PLT static
relocation section. Don't mark _GLOBAL_OFFSET_TABLE_ as absolute on
VxWorks.
(elf_i386_finish_dynamic_sections): Allow different pad bytes.
Add relocation for GOT location. Fill in PLT static relocations.
(elf_i386_vxworks_link_hash_table_create): New function.
(elf_i386_vxworks_link_output_symbol_hook): New function.
* elf-vxworks.h: New file.
gas/
* config/tc-i386.h (ELF_TARGET_FORMAT): Define for TE_VXWORKS.
gas/testsuite/
* gas/i386/i386.exp: Don't run divide test on vxworks.
ld/
* Makefile.am: Add eelf_i386_vxworks.
* Makefile.in: Regenerate.
* configure.tgt: Make i?86-*-vxworks use targ_emul=elf_i386_vxworks.
* emulparams/elf_i386_vxworks.sh: New file.
* emulparams/vxworks.sh: New file.
* scripttempl/elf.sc: Add DATA_END_SYMBOLS and ETEXT_NAME.
* elf32-ppc.c (ppc_elf_create_linker_section): Set SEC_LINKER_CREATED
on section. Correct comment, and add FIXME.
(ppc_elf_additional_program_headers): Don't bump header count for
interp. Test SEC_ALLOC, not SEC_LOAD, and don't test size.
(ppc_elf_size_dynamic_sections): Don't strip sdata and sdata2, but
do allocate memory if they need it.
ld/
* emulparams/elf32ppclinux.sh (OTHER_READWRITE_SECTION): Delete.
(OTHER_RELRO_SECTIONS): Set this instead.
ld/testsuite/
* ld-powerpc/tlsexe32.d: Update.
* ld-powerpc/tlsexe32.g: Update.
* ld-powerpc/tlsexe32.r: Update.
* ld-powerpc/tlsexe32.t: Update.
* ld-powerpc/tlsso32.d: Update.
* ld-powerpc/tlsso32.g: Update.
* ld-powerpc/tlsso32.r: Update.
* ld-powerpc/tlsso32.t: Update.
SymbianOS.
* emulparams/armsymbian.sh (OTHER_READONLY_SECTIONS): Define, so
as to include .ARM.exidx$${Base,Limit}.
* ld/scripttempl/armbpabi.sc: Move .plt to end of text segment.
Define IMAGE$$ER_RO$${Base,Limit} and SHT$$INIT_ARRAY$${Base,Limit}.
Put .init_array, .fini_array, etc. into the read-only data
segment.
