gas/
* config/tc-arm.c (do_neon_dyadic_if_i): Remove.
(do_neon_dyadic_if_i_d): Avoid setting U bit.
(do_neon_mac_maybe_scalar): Ditto.
(do_neon_dyadic_narrow): Force operand type to NT_integer.
(insns): Remove out of date comments.
gas/testsuite/
* gas/arm/neon-cov.s: Test .u and .s aliases for .i suffixes.
* gas/arm/neon-cov.d: Adjust expected output.
opcodes/
* arm-dis.c (neon_opcode): Fix suffix on VMOVN.
* elf32-xtensa.c (xtensa_get_property_section_name): Delete.
(xtensa_get_property_section): New.
(xtensa_read_table_entries): Use xtensa_get_property_section.
(relax_property_section, xtensa_get_property_predef_flags): Handle
group name suffixes in property section names.
(match_section_group): New.
gas/
* config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
(INIT_LITERAL_SECTION_NAME): Delete.
(lit_state struct): Remove segment names, init_lit_seg, and
fini_lit_seg. Add lit_prefix and current_text_seg.
(init_literal_head_h, init_literal_head): Delete.
(fini_literal_head_h, fini_literal_head): Delete.
(xtensa_begin_directive): Move argument parsing to
xtensa_literal_prefix function.
(xtensa_end_directive): Deallocate lit_prefix field of lit_state.
(xtensa_literal_prefix): Parse the directive argument here and
record it in the lit_prefix field. Remove code to derive literal
section names.
(linkonce_len): New.
(get_is_linkonce_section): Use linkonce_len. Check for any
".gnu.linkonce.*" section, not just text sections.
(md_begin): Remove initialization of deleted lit_state fields.
(xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
to init_literal_head and fini_literal_head.
(xtensa_move_literals): Likewise. Skip literals for .init and .fini
when traversing literal_head list.
(match_section_group): New.
(cache_literal_section): Rewrite to determine the literal section
name on the fly, create the section and return it.
(xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
(xtensa_switch_to_non_abs_literal_fragment): Likewise.
(xtensa_create_property_segments, xtensa_create_xproperty_segments):
Use xtensa_get_property_section from bfd.
(retrieve_xtensa_section): Delete.
* doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
description to refer to plural literal sections and add xref to
the Literal Directive section.
(Literal Directive): Describe new rules for deriving literal section
names. Add footnote for special case of .init/.fini with
--text-section-literals.
(Literal Prefix Directive): Replace old naming rules with xref to the
Literal Directive section.
ld/
* emulparams/elf32xtensa.sh (.xt.prop): Add .xt.prop.*.
* scripttempl/elfxtensa.sc (.text): Add .literal.*.
* config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
merging with previous long opcode.
gas/testsuite:
* gas/arm/unwind.s: Test not merging iWMMXt register save with
previous long opcode.
* gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Update.
* Makefile.am: Add rules to build pe-arm-wince.lo and pei-arm-wince.lo objects.
* Makefile.in: Regenerate.
* pe-arm-wince.c: New file.
* pei-arm-wince.c: New file.
* pei-arm.c: Remove ARM_WINCE block.
* pe-arm.c: Remove ARM_WINCE block. Rename
bfd_arm_pe_allocate_interworking_sections,
bfd_arm_pe_get_bfd_for_interworking, and
bfd_arm_pe_process_before_allocation to
bfd_armpe_allocate_interworking_sections,
bfd_armpe_get_bfd_for_interworking, and
bfd_armpe_process_before_allocation. Move them before including bfd.h.
* bfd.c: ARM wince bfd format names were renamed. Adjust.
* coff-arm.c [ARM_WINCE]: Adjust so Windows CE doesn't end up with unexpected/conflicting relocs.
* targets.c: The arm-wince-pe target got its own new vector. Adjust.
* config.bfd: Likewise.
* configure.in: Likewise.
* configure: Regenerate.
binutils
* configure.in: Split arm-pe and arm-wince-pe. Build dlltool with -DDLLTOOL_ARM_WINCE for Windows CE case.
* configure: Regenerate.
* dlltool.c: Add support for arm-wince.
gas
* Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
* Makefile.in: Regenerate.
* config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were renamed. Adjust.
ld
* Makefile.am: Split arm-wince into its own emulation.
* Makefile.in: Regenerate.
* configure.tgt: Set targ_emul to arm_wince_pe for ARM Windows CE targets.
* pe-dll.c : Define PE_ARCH_arm_wince.
(pe_detail_list): Add PE_ARCH_arm_wince case.
(make_one): Handle PE_ARCH_arm_epoc and PE_ARCH_arm_wince cases.
* emulparams/arm_wince_pe.sh: New file.
* emultempl/pe.em: Handle new TARGET_IS_arm_wince_pe define.
Remap bfd_arm_allocate_interworking_sections, bfd_arm_get_bfd_for_interworking and
bfd_arm_process_before_allocation for arm-pe and arm-wince-pe targets too.
(gld_${EMULATION_NAME}_recognized_file): Handle arm-wince and arm-epoc bfd format names.
to use ARM instructions on non-ARM-supporting cores.
(autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
mode automatically based on cpu variant.
(md_begin): Call above function.
* coff-arm.c (coff_arm_rtype_to_howto) [COFF_WITH_PE]: Handle ARM_SECREL.
(coff_arm_reloc_type_lookup): Map BFD_RELOC_32_SECREL to ARM_SECREL.
* pe-arm.c [COFF_SECTION_ALIGNMENT_ENTRIES]: Define.
* pei-arm.c [TARGET_UNDERSCORE]: Define for ARM_WINCE like in pe-arm.c.
[COFF_SECTION_ALIGNMENT_ENTRIES]: Define.
* config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF only block.
(pe_directive_secrel) [TE_PE]: New function.
(md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file, loc, loc_mark_labels.
[TE_PE]: Handle secrel32.
(output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn call.
(output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
(arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
(md_section_align): Only round section sizes here for AOUT targets.
(tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
(tc_pe_dwarf2_emit_offset): New function.
(md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
(cons_fix_new_arm): Handle O_secrel.
* config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out of OBJ_ELF only block.
[TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare tc_pe_dwarf2_emit_offset.
* ld-pe/pe.exp: Enable tests on arm-wince-pe.
* ld-pe/secrel.d: Adjust test to work on arm-wince-pe too.
2006-08-02 Richard Sandiford <richard@codesourcery.com>
Kazu Hirata <kazu@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
* config.bfd (sh-*-vxworks): Use bfd_elf32_shvxworks_vec and
bfd_elf32_shlvxworks_vec.
* configure.in (bfd_elf32_sh64_vec): Add elf-vxworks.lo.
(bfd_elf32_sh64l_vec, bfd_elf32_sh64lin_vec): Likewise.
(bfd_elf32_sh64blin_vec, bfd_elf32_sh64lnbsd_vec): Likewise.
(bfd_elf32_sh64nbsd_vec, bfd_elf32_sh_vec): Likewise.
(bfd_elf32_shblin_vec, bfd_elf32_shl_vec): Likewise.
(bfd_elf32_shl_symbian_vec, bfd_elf32_shlin_vec): Likewise.
(bfd_elf32_shlnbsd_vec, bfd_elf32_shnbsd_vec): Likewise.
(bfd_elf32_shlvxworks_vec, bfd_elf32_shvxworks_vec): New stanzas.
* configure: Regenerate.
* Makefile.am: Regenerate dependencies.
* Makefile.in: Regenerate.
* elf-vxworks.c (elf_vxworks_gott_symbol_p): New function.
(elf_vxworks_add_symbol_hook): Use it.
(elf_vxworks_link_output_symbol_hook): Likewise. Use the hash
table entry to check for weak undefined symbols and to obtain
the original bfd.
(elf_vxworks_emit_relocs): Use target_index instead of this_idx.
* elf32-sh-relocs.h: New file, split from elf32-sh.c.
(R_SH_DIR32): Use SH_PARTIAL32 for the partial_inplace field,
SH_SRC_MASK32 for the src_mask field, and SH_ELF_RELOC for the
special_function field.
(R_SH_REL32): Use SH_PARTIAL32 and SH_SRC_MASK32 here too.
(R_SH_REL32, R_SH_TLS_GD_32, R_SH_TLS_LD_32): Likewise.
(R_SH_TLS_LDO_32, R_SH_TLS_IE_32, R_SH_TLS_LE_32): Likewise.
(R_SH_TLS_DTPMOD32, R_SH_TLS_DTPOFF32, R_SH_TLS_TPOFF32): Likewise.
(R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT): Likewise.
(R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Likewise.
(SH_PARTIAL32, SH_SRC_MASK32, SH_ELF_RELOC): Undefine at end of file.
* elf32-sh.c: Include elf32-vxworks.h.
(MINUS_ONE): Define.
(sh_elf_howto_table): Include elf32-sh-relocs.h with SH_PARTIAL32
set to TRUE, SH_SRC_MASK32 set to 0xffffffff, and SH_ELF_RELOC set
to sh_elf_reloc.
(sh_vxworks_howto_table): New variable. Include elf32-sh-relocs.h
with SH_PARTIAL32 set to FALSE, SH_SRC_MASK32 set to 0, and
SH_ELF_RELOC set to bfd_elf_generic_reloc.
(vxworks_object_p, get_howto_table): New functions.
(sh_elf_reloc_type_lookup): Fix typo. Use get_howto_table.
(sh_elf_info_to_howto): Use get_howto_table.
(sh_elf_relax_section): Honor the partial_inplace field of the
R_SH_DIR32 howto.
(sh_elf_relax_delete_bytes): Likewise.
(elf_sh_plt_info): New structure.
(PLT_ENTRY_SIZE): Replace both definitions with...
(ELF_PLT_ENTRY_SIZE): ...this new macro, with separate definitions for
INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(elf_sh_plt0_entry_be): Update sizes of both definitions accordingly.
(elf_sh_plt0_entry_le): Likewise.
(elf_sh_plt_entry_be, elf_sh_plt_entry_le): Likewise.
(elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le): Likewise.
(elf_sh_plts): New structure, with separate definitions for
INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(elf_sh_plt0_entry): Delete both definitions.
(elf_sh_plt_entry, elf_sh_pic_plt_entry): Likewise.
(elf_sh_sizeof_plt, elf_sh_plt_plt0_offset): Likewise.
(elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset): Likewise.
(elf_sh_plt_reloc_offset): Likewise.
(movi_shori_putval): Delete in favor of...
(install_plt_field): ...this new function, with separate definitions
for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(get_plt_info): New function, with separate definitions
for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(elf_sh_plt0_linker_offset, elf_sh_plt0_gotid_offset): Delete.
(VXWORKS_PLT_HEADER_SIZE, VXWORKS_PLT_ENTRY_SIZE): New macros.
(vxworks_sh_plt0_entry_be, vxworks_sh_plt0_entry_le): New constants.
(vxworks_sh_plt_entry_be, vxworks_sh_plt_entry_le): Likewise.
(vxworks_sh_pic_plt_entry_be, vxworks_sh_pic_plt_entry_le): Likewise.
(get_plt_index, get_plt_offset): New functions.
(elf_sh_link_hash_table): Add srelplt2, plt_info and vxworks_p fields.
(sh_elf_link_hash_table_create): Initialize them.
(sh_elf_create_dynamic_sections): Call
elf_vxworks_create_dynamic_sections for VxWorks.
(allocate_dynrelocs): Use htab->plt_info to get the size of PLT
entries. Allocate relocation entries in .rela.plt.unloaded if
generating a VxWorks executable.
(sh_elf_always_size_sections): New function.
(sh_elf_size_dynamic_sections): Extend .rela.plt handling to
.rela.plt.unloaded.
(sh_elf_relocate_section): Use get_howto_table. Honor
partial_inplace when calculating the addend for dynamic
relocations. Use get_plt_index.
(sh_elf_finish_dynamic_symbol): Use get_plt_index, install_plt_field
and htab->plt_info. Fill in the bra .plt offset for VxWorks
executables. Populate .rela.plt.unloaded. Do not make
_GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
(sh_elf_finish_dynamic_sections): Use install_plt_field and
htab->plt_info. Handle cases where there is no special PLT header.
Populate the first relocation in .rela.plt.unloaded and fix up
the remaining entries.
(sh_elf_plt_sym_val): Use get_plt_info.
(elf_backend_always_size_sections): Define.
(TARGET_BIG_SYM, TARGET_BIG_NAME): Override for VxWorks.
(TARGET_LITTLE_SYM, TARGET_BIG_SYM): Likewise.
(elf32_bed, elf_backend_want_plt_sym): Likewise.
(elf_symbol_leading_char, elf_backend_want_got_underscore): Likewise.
(elf_backend_grok_prstatus, elf_backend_grok_psinfo): Likewise.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_link_output_symbol_hook): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_final_write_processing): Likewise.
(ELF_MAXPAGESIZE, ELF_COMMONPAGESIZE): Likewise.
* targets.c (bfd_elf32_shlvxworks_vec): Declare.
(bfd_elf32_shvxworks_vec): Likewise.
(_bfd_target_vector): Include bfd_elf32_shlvxworks_vec and
bfd_elf32_shvxworks_vec.
gas/
* config/tc-sh.c (apply_full_field_fix): New function.
(md_apply_fix): Use it instead of md_number_to_chars. Do not fill
in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
(tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
* config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
ld/
2006-08-02 Richard Sandiford <richard@codesourcery.com>
Kazu Hirata <kazu@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
* Makefile.am (ALL_EMULATIONS): Add eshelf_vxworks.o and
eshlelf_vxworks.o.
(eshelf_vxworks.c, eshlelf_vxworks.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh-*-vxworks): Use shelf_vxworks and
shlelf_vxworks.
* emulparams/shelf_vxworks.sh: New file.
* emulparams/shlelf_vxworks.sh: Likewise.
* emulparams/vxworks.sh (FINI): Prefix _etext with ${SYMPREFIX}.
(OTHER_END_SYMBOLS): Likewise _ehdr.
(DATA_END_SYMBOLS): Likewise _edata.
* emultempl/vxworks.em (vxworks_after_open): Check whether output_bfd
is indeed an ELF file before dealing with --force-dynamic.
ld/testsuite/
* ld-sh/rd-sh.exp: Treat vxworks1-static.d specially.
* ld-sh/sh-vxworks.exp: New file.
* ld-sh/sh.exp: Extend sh-linux SIZEOF_HEADERS handling to
sh-*-vxworks.
* ld-sh/vxworks1-le.dd, ld-sh/vxworks1-lib-le.dd,
* ld-sh/vxworks1-lib.dd, ld-sh/vxworks1-lib.nd,
* ld-sh/vxworks1-lib.rd, ld-sh/vxworks1-lib.s,
* ld-sh/vxworks1-static.d, ld-sh/vxworks1.dd,
* ld-sh/vxworks1.ld, ld-sh/vxworks1.rd, ld-sh/vxworks1.s,
* ld-sh/vxworks2-static.sd, ld-sh/vxworks2.s,
* ld-sh/vxworks2.sd, ld-sh/vxworks3-le.dd,
* ld-sh/vxworks3-lib-le.dd, ld-sh/vxworks3-lib.dd,
* ld-sh/vxworks3-lib.s, ld-sh/vxworks3.dd, ld-sh/vxworks3.s,
* ld-sh/vxworks4.d, ld-sh/vxworks4a.s, ld-sh/vxworks4b.s,
* ld-sh/reloc1.s, ld-sh/reloc1.d: New tests.
* config/tc-arm.c (parse_operands): Handle invalid register name
for OP_RIWR_RIWC.
gas/testsuite:
* gas/arm/iwmmxt-bad.s: Test invalid register names for wldrw and
wstrw.
* gas/arm/iwmmxt-bad.l: Update.
* config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
(parse_operands): Handle it.
(insns): Use it for tmcr and tmrc.
gas/testsuite:
* gas/arm/iwmmxt.s: Test tmcr and tmrc with wcgr registers.
* gas/arm/iwmmxt.d: Update.
* bfd/elf64-x86-64.c: Add FreeBSD support.
(elf64_x86_64_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_x86_64_freebsd_vec.
* bfd/config.bfd (x64_64-*-freebsd*): Add bfd_elf64_x86_64_freebsd_vec to the targ_selvecs.
* bfd/configure.in: Add entry for bfd_elf64_x86_64_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-i386.c (md_parse_option): Treat any target starting with elf64_x86_64 as a viable target for the -64 switch.
(i386_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64.
* gas/config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf_x86_64_fbsd.sh (OUTPUT_FORMAT): Define as elf64-x86-64-freebsd.
bfd/
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_ARM_T32_ADD_IMM.
gas/
* tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
(md_convert_frag): Use correct reloc for add_pc. Use
BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
(arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
gas/testsuite/
* gas/arm/thumb2_add.d: New test.
* gas/arm/thumb2_add.s: New test.
fixup_segment() to repeat a range check on a value that have already
been checked here.
* gas/sh/basic.exp: Run "too_large" dump test.
* gas/sh/too_large.s: New test file. Check that .byte directives do not
generate a bogus overflow message.
* gas/sh/too_large.s: New test control file.
* doc/as.texi: Fix spelling typo: branchs => branches.
* doc/c-m68hc11.texi: Likewise.
* config/tc-m68hc11.c: Likewise.
Support old spelling of command line switch for backwards compatibility.
2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch_tune_set): New.
(cpu_arch_isa): Likewise.
(i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
nops with short or long nop sequences based on -march=/.arch
and -mtune=.
(set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
set cpu_arch_tune and cpu_arch_tune_flags.
(md_parse_option): For -march=, set cpu_arch_isa and set
cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
0. Set cpu_arch_tune_set to 1 for -mtune=.
(i386_target_format): Don't set cpu_arch_tune.
gas/testsuite/
2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops-1, nops-1-i386, nops-1-i686,
nops-1-merom, nops-2, nops-2-i386, nops-2-merom, x86-64-nops-1,
x86-64-nops-1-k8, x86-64-nops-1-nocona and x86-64-nops-1-merom.
* gas/i386/nops-1.s: New file.
* gas/i386/nops-2.s: Likewise.
* gas/i386/nops-1-i386.d: Likewise.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-1-merom.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/x86-64-nops-1.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/i386/x86-64-nops-1-merom.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/sse2.d: Updated to expect xchg %ax,%ax as 2 byte
nop.
* config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
a directive saving VFP registers for ARMv6 or later.
(s_arm_unwind_save): Add parameter arch_v6 and call
s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
appropriate.
(md_pseudo_table): Add entry for new "vsave" directive.
* doc/c-arm.texi: Correct error in example for "save"
directive (fstmdf -> fstmdx). Also document "vsave" directive.
to R_ARM_LDC_SB_G{0,1,2} respectively.
bfd/
* bfd-in2.h: Regenerate.
* elf32-arm.c (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0,
R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1, R_ARM_ALU_PC_G2,
R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2, R_ARM_LDRS_PC_G0,
R_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0,
R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2, R_ARM_ALU_SB_G0_NC,
R_ARM_ALU_SB_G0, R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1,
R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1,
R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G1,
R_ARM_LDRS_SB_G2, R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1,
R_ARM_LDC_SB_G2): New relocation types.
(R_ARM_PC13): Rename to AAELF name R_ARM_LDR_PC_G0 and
adjust HOWTO entry to be consistent with R_ARM_LDR_PC_G1
and friends.
(elf32_arm_howto_table_3): Delete; contents merged into
elf32_arm_howto_table_2.
(elf32_arm_howto_from_type): Adjust correspondingly.
(elf32_arm_reloc_map): Extend with the above relocations.
(calculate_group_reloc_mask): New function.
(identify_add_or_sub): New function.
(elf32_arm_final_link_relocate): Support for the above
relocations.
* reloc.c: Add enumeration entries for BFD_RELOC_ARM_...
codes to correspond to the above relocations.
gas/
* config/tc-arm.c (enum parse_operand_result): New.
(struct group_reloc_table_entry): New.
(enum group_reloc_type): New.
(group_reloc_table): New array.
(find_group_reloc_table_entry): New function.
(parse_shifter_operand_group_reloc): New function.
(parse_address_main): New function, incorporating code
from the old parse_address function. To be used via...
(parse_address): wrapper for parse_address_main; and
(parse_address_group_reloc): new function, likewise.
(enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
OP_ADDRGLDRS, OP_ADDRGLDC.
(parse_operands): Support for these new operand codes.
New macro po_misc_or_fail_no_backtrack.
(encode_arm_cp_address): Preserve group relocations.
(insns): Modify to use the above operand codes where group
relocations are permitted.
(md_apply_fix): Handle the group relocations
ALU_PC_G0_NC through LDC_SB_G2.
(tc_gen_reloc): Likewise.
(arm_force_relocation): Leave group relocations for the linker.
(arm_fix_adjustable): Likewise.
gas/testsuite/
* gas/arm/group-reloc-alu.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.l: New test.
* gas/arm/group-reloc-alu-encoding-bad.s: New test.
* gas/arm/group-reloc-alu-parsing-bad.d: New test.
* gas/arm/group-reloc-alu-parsing-bad.l: New test.
* gas/arm/group-reloc-alu-parsing-bad.s: New test.
* gas/arm/group-reloc-alu.s: New test.
* gas/arm/group-reloc-ldc.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.l: New test.
* gas/arm/group-reloc-ldc-encoding-bad.s: New test.
* gas/arm/group-reloc-ldc-parsing-bad.d: New test.
* gas/arm/group-reloc-ldc-parsing-bad.l: New test.
* gas/arm/group-reloc-ldc-parsing-bad.s: New test.
* gas/arm/group-reloc-ldc.s: New test.
* gas/arm/group-reloc-ldr.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.l: New test.
* gas/arm/group-reloc-ldr-encoding-bad.s: New test.
* gas/arm/group-reloc-ldr-parsing-bad.d: New test.
* gas/arm/group-reloc-ldr-parsing-bad.l: New test.
* gas/arm/group-reloc-ldr-parsing-bad.s: New test.
* gas/arm/group-reloc-ldr.s: New test.
* gas/arm/group-reloc-ldrs.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.l: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.s: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.d: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.l: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.s: New test.
* gas/arm/group-reloc-ldrs.s: New test.
ld/testsuite/
* ld-arm/group-relocs-alu-bad.d: New test.
* ld-arm/group-relocs-alu-bad.s: New test.
* ld-arm/group-relocs.d: New test.
* ld-arm/group-relocs-ldc-bad.d: New test.
* ld-arm/group-relocs-ldc-bad.s: New test.
* ld-arm/group-relocs-ldr-bad.d: New test.
* ld-arm/group-relocs-ldr-bad.s: New test.
* ld-arm/group-relocs-ldrs-bad.d: New test.
* ld-arm/group-relocs-ldrs-bad.s: New test.
* ld-arm/group-relocs.s: New test.
* ld-arm/arm-elf.exp: Wire in new tests.
