Joel Brobecker
8acc9f485b
Update years in copyright notice for the GDB files.
...
Two modifications:
1. The addition of 2013 to the copyright year range for every file;
2. The use of a single year range, instead of potentially multiple
year ranges, as approved by the FSF.
2013-01-01 06:41:43 +00:00
Joel Brobecker
c5a5708100
Copyright year update in most files of the GDB Project.
...
gdb/ChangeLog:
Copyright year update in most files of the GDB Project.
2012-01-04 08:28:28 +00:00
Mike Frysinger
2419798b80
sim: start a unified sim_do_command
...
Since sim_do_command for many people simply calls sim_args_command, start
a unified version of it. For people who handle their own options, they
could switch to this by using sim_add_option_table instead.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-05 19:06:38 +00:00
Joel Brobecker
7b6bb8daac
run copyright.sh for 2011.
2011-01-01 15:34:07 +00:00
Joel Brobecker
dc3cf14f35
Update copyright notices to add year 2010.
2010-01-01 10:03:36 +00:00
Joel Brobecker
e4d013fc0f
Update the copyright notice of some of the files I missed
...
in the previous copyright update.
2009-01-14 10:53:10 +00:00
Daniel Jacobowitz
9b254dd1ce
Updated copyright notices for most files.
2008-01-01 22:53:26 +00:00
Joel Brobecker
4744ac1bb0
Switch the license of all files explicitly copyright the FSF
...
to GPLv3.
2007-08-24 14:30:15 +00:00
Daniel Jacobowitz
6aba47ca06
Copyright updates for 2007.
2007-01-09 17:59:20 +00:00
Nick Clifton
6edf0760c5
Add support for m32r-linux target, including a RELA ABI and PIC.
2003-12-19 11:44:01 +00:00
Nick Clifton
16b47b253e
Add support for the m32r2 processor
2003-12-11 11:33:44 +00:00
Andrew Cagney
0b2e03b491
More reversion of incomplete m32r changes. Should be back to normal.
2003-12-07 16:13:06 +00:00
Andrew Cagney
cd886a95bf
Revert last commit, build problems.
2003-12-07 02:58:01 +00:00
Andrew Cagney
3c041444b5
2003-12-02 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
...
* Makefile.in : Add new machine m32r2.
* m32r2.c : New file for m32r2.
* mloop2.in : Ditto
* model2.c : Ditto
* sem2-switch.c : Ditto
* m32r-sim.h : Add EVB register.
* sim-if.h : Ditto
* sim-main.h : Ditto
* traps.c : Ditto
2003-12-07 02:27:45 +00:00
Andrew Cagney
6b4a89357a
Index: arm/ChangeLog
...
2003-02-27 Andrew Cagney <cagney@redhat.com>
* wrapper.c (sim_create_inferior, sim_open): Rename _bfd to bfd.
Index: common/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* sim-utils.h (sim_analyze_program, sim_load_file): Rename _bfd to bfd.
* sim-hload.c (sim_load), sim-base.h (sim_state_base): Ditto.
* nrun.c (main): Ditto.
Index: d10v/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: erc32/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interf.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: h8300/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: h8500/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: i960/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: m32r/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: m68hc11/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_prepare_for_program, sim_open)
(sim_create_inferior): Rename _bfd to bfd.
Index: mcore/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: mips/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open):
(sim_create_inferior):
Index: mn10200/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: mn10300/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open, sim_create_inferior, sim_open)
(sim_create_inferior): Rename _bfd to bfd.
Index: ppc/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* sim_calls.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: sh/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (init_dsp, sim_open, sim_create_inferior): Rename _bfd
to bfd.
Index: v850/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: z8k/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* iface.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
2003-02-27 23:26:34 +00:00
Jason Molenda
2df3850c7b
import gdb-1999-10-11 snapshot
1999-10-12 04:37:53 +00:00
Stan Shebs
7a292a7adf
import gdb-19990422 snapshot
1999-04-26 18:34:20 +00:00
Stan Shebs
c906108c21
Initial creation of sourceware repository
1999-04-16 01:35:26 +00:00
Stan Shebs
071ea11e85
Initial creation of sourceware repository
1999-04-16 01:34:07 +00:00
Doug Evans
368fc7dba8
* Makefile.in (MAIN_INCLUDE_DEPS): Delete.
...
(INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
(sim-if.o): Use SIM_MAIN_DEPS.
(arch.o,traps.o,devices.o): Ditto.
(M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
(m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
(m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto.
(stamp-arch): Pass mach=all to cgen-arch.
* cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
* m32r-sim.h (fr30bf_h_cr_[gs]et_handler): Declare.
([GS]ET_H_CR): Define.
(fr30bf_h_psw_[gs]et_handler): Declare.
([GS]ET_H_PSW): Define.
(fr30bf_h_accum_[gs]et_handler): Declare.
([GS]ET_H_ACCUM): Define.
(fr30xf_h_{cr,psw,accum}_[gs]et_handler): Declare.
(fr30bf_h_accums_[gs]et_handler): Declare.
([GS]ET_H_ACCUMS): Define.
* sim-if.c (sim_open): Model probing code moved to sim-model.c.
* m32r.c (WANT_CPU): Define as m32rbf.
(all register access fns): Rename to ..._handler.
* cpux.c,cpux.h,decodex.c,modelx.c,semx.c: Regenerate.
* m32rx.c (WANT_CPU): Define as m32rxf.
(all register access fns): Rename to ..._handler.
1999-01-06 03:04:25 +00:00
Doug Evans
3afece8646
* sim-if.c (sim_do_command): Handle "sim info reg {bbpsw,bbpc}".
...
Bring over from branch.
1998-10-28 22:45:11 +00:00
Doug Evans
13ccace0ca
* Makefile.in (INCLUDE_DEPS): Add include/opcode/cgen.h.
...
* sim-if.c (sim_open): Open opcode table.
(sim_close): Close it.
1998-08-03 19:58:36 +00:00
Doug Evans
f99354d0c0
* sim-if.c (do_trap): Treat traps 2-15 as hardware does.
1998-05-19 23:52:23 +00:00
Doug Evans
5f4c24c024
* sim-if.c (sim_stop): Update call to @cpu@_engine_stop.
...
(sim_sync_stop): New function.
1998-05-16 20:11:41 +00:00
Andrew Cagney
0e701ac37b
Add generic sim-info.c:sim_info() function using module mechanism.
...
Clean up compile probs in mips/vr5400.
1998-02-28 02:51:06 +00:00
Andrew Cagney
fbb8b6b9ab
For sim_fetch_register / sim_store_register: Add LENGTH parameter,
...
return actual size of register, 0 if not applicable, -1 of legacy
implementation.
1998-02-17 04:06:38 +00:00
Andrew Cagney
a34abff813
o Add modulo argument to sim_core_attach
...
o Add sim-memopt module - memory option processing.
1997-09-04 03:47:39 +00:00
Andrew Cagney
fafce69ab1
Add ABFD argument to sim_create_inferior. Document.
...
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
1997-08-27 04:44:41 +00:00
Andrew Cagney
7230ff0faa
Flush defunct sim_kill.
1997-08-26 02:05:18 +00:00
Andrew Cagney
247fccdeb5
Add ABFD argument to sim_open call. Pass through to sim_config so
...
that image properties such as endianness can be checked.
More strongly document the expected behavour of each of the sim_*
interfaces.
Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN. Use in sim_config.
1997-08-25 23:14:25 +00:00
Andrew Cagney
7a418800c1
Start of implementation of a distributed (between processors)
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simulator core object.
1997-05-05 13:21:04 +00:00
David Edelsohn
646c6f2b83
Merge from branch into devo. CGEN generic files moved to common
...
directory. K&R C support is no longer provided.
1997-05-01 22:33:23 +00:00