* dwarf2.c (comp_unit): Add new fields 'lookup_funcinfo_table' and
'number_of_functions' to keep lookup table and number of entries in
the table.
(line_sequence): Add new fields 'line_info_lookup' and 'num_lines'
to keep lookup table and number of entries in the table.
(lookup_funcinfo): New structure for lookup table for function
references.
(build_line_info_table): New function to create and build the lookup
table for line information.
(lookup_address_in_line_info_table): Use the lookup table instead of
traverse a linked list.
(compare_lookup_funcinfos): New compare fuction used in sorting of
lookup table for function references.
(build_lookup_funcinfo_table): New function to create, build and
sort the lookup table for functions references.
(lookup_address_in_function_table): Use the table instead of
traverse a linked list.
(_bfd_dwarf2_cleanup_debug_info): Free memory from function references
lookup table.
Break out of the outer switch statement once the inner switch for the
BFD_RELOC_CTOR relocation has been processed, preventing double BFD_FAIL
calls from being made, once from the inner switch and then again from
the default case of the outer switch.
Noticed with a `-Wimplicit-fallthrough' build error reported by a recent
GCC version:
In file included from .../bfd/reloc.c:52:0:
.../bfd/reloc.c: In function 'bfd_default_reloc_type_lookup':
.../bfd/libbfd.h:779:8: error: this statement may fall through [-Werror=implicit-fallthrough=]
do { bfd_assert(__FILE__,__LINE__); } while (0)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
.../bfd/reloc.c:7780:4: note: in expansion of macro 'BFD_FAIL'
BFD_FAIL ();
^~~~~~~~
.../bfd/reloc.c:7782:5: note: here
default:
^~~~~~~
cc1: all warnings being treated as errors
make[4]: *** [reloc.lo] Error 1
bfd/
* reloc.c (bfd_default_reloc_type_lookup) <BFD_RELOC_CTOR>: Do
not fall through to the default case.
In the ARC assembler, when a cpu type is specified using the .cpu
directive, we rely on the bfd list of arc machine types in order to
validate the cpu name passed in.
This validation is only used in order to check that the cpu type passed
to the .cpu directive matches any machine type selected earlier on the
command line. Once that initial check has passed a full check is
performed using the assemblers internal list of know cpu types.
The problem is that the assembler knows about more cpu types than bfd,
some cpu types known by the assembler are actually aliases for a base
cpu type plus a specific set of assembler extensions. One such example
is NPS400, though more could be added later.
This commit removes the need for the assembler to use the bfd list of
machine types for validation. Instead the error checking, to ensure
that any value passed to a '.cpu' directive matches any earlier command
line selection, is moved into the function arc_select_cpu.
I have taken the opportunity to bundle the 4 separate static globals
that describe the currently selected machine type into a single
structure (called selected_cpu).
gas/ChangeLog:
* config/tc-arc.c (arc_target): Delete.
(arc_target_name): Delete.
(arc_features): Delete.
(arc_mach_type): Delete.
(mach_type_specified_p): Delete.
(enum mach_selection_type): New enum.
(mach_selection_mode): New static global.
(selected_cpu): New static global.
(arc_eflag): Rename to ...
(arc_initial_eflag): ...this, and make const.
(arc_select_cpu): Update comment, new parameter, check how
previous machine type selection was made, and record this
selection. Use selected_cpu instead of old globals.
(arc_option): Remove use of arc_get_mach, instead use
arc_select_cpu to validate machine type selection. Use
selected_cpu over old globals.
(allocate_tok): Use selected_cpu over old globals.
(find_opcode_match): Likewise.
(assemble_tokens): Likewise.
(arc_cons_fix_new): Likewise.
(arc_extinsn): Likewise.
(arc_extcorereg): Likewise.
(md_begin): Update default machine type selection, use
selected_cpu over old globals.
(md_parse_option): Update machine type selection option handling,
use selected_cpu over old globals.
* testsuite/gas/arc/nps400-0.s: Add .cpu directive.
bfd/ChangeLog:
* cpu-arc.c (arc_get_mach): Delete.
Fix an aliasing build error:
cc1: warnings being treated as errors
.../bfd/elf32-nds32.c: In function 'nds32_elf_check_relocs':
.../bfd/elf32-nds32.c:6644: warning: dereferencing type-punned pointer will break strict-aliasing rules
make[3]: *** [elf32-nds32.lo] Error 1
in a way following commit 6edfbbad08 ("Fix up gcc4.1 aliasing
warnings"), <https://sourceware.org/ml/binutils/2005-10/msg00071.html>.
bfd/
* elf32-nds32.c (nds32_elf_check_relocs): Avoid aliasing warning
from GCC.
Fix a commit 5025eb7c0d ("Delete relocations associatesd with deleted
exidx entries.") build regression:
cc1: warnings being treated as errors
.../bfd/elf32-arm.c: In function 'elf32_arm_update_relocs':
.../bfd/elf32-arm.c:14951: warning: declaration of 'index' shadows a global declaration
/usr/include/string.h:304: warning: shadowed declaration is here
make[3]: *** [elf32-arm.lo] Error 1
in a way following commit 91d6fa6a03 ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").
bfd/
* elf32-arm.c (elf32_arm_update_relocs): Rename `index' local
variable to `reloc_index'.
See https://sourceware.org/ml/binutils/2016-07/msg00091.html
This patch stop --gc-sections elf_gc_sweep_symbol localizing symbols
that ought to remain global.
The difficulty with always descending into output section statements
is that symbols defined by the script in such statements don't have
a bfd section when lang_do_assignments runs early in the link process.
There are two approaches to curing this problem. Either we can
create the bfd section early, or we can use a special section. This
patch takes the latter approach and uses bfd_und_section. (Creating
bfd sections early results in changed output section order, and thus
lots of testsuite failures. You can't create all output sections
early to ensure proper ordering as KEEP then stops empty sections
from being stripped.)
The wrinkle with this approach is that some code that runs at
gc-sections time needs to be made aware of the odd defined symbols
using bfd_und_section.
bfd/
* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Handle symbols
defined temporarily with bfd_und_section.
* elflink.c (_bfd_elf_gc_keep): Don't set SEC_KEEP for bfd_und_section.
* elfxx-mips.c (mips_elf_local_pic_function_p): Exclude defined
symbols with bfd_und_section.
ld/
* ldlang.c (lang_do_assignments_1): Descend into output section
statements that do not yet have bfd sections. Set symbol section
temporarily for symbols defined in such statements to the undefined
section. Don't error on data or reloc statements until final phase.
* ldexp.c (exp_fold_tree_1 <etree_assign>): Handle bfd_und_section
in expld.section.
* testsuite/ld-mmix/bpo-10.d: Adjust.
* testsuite/ld-mmix/bpo-11.d: Adjust.
bfd/
* elf32-epiphany.c (epiphany_final_link_relocate): Use bitwise
OR in arithmetic expression, not boolean OR.
opcodes/
* cr16-dis.c (print_insn_cr16): Don't use boolean OR in arithmetic.
* crx-dis.c (print_insn_crx): Likewise.
It was like printf, which means you can't use bfd_set_error_handler to
hook in a function to do something and then call the original handler.
The patch also deletes some unused functions and makes pointers local.
bfd/
* bfd-in.h: Include stdarg.h.
* bfd.c (bfd_error_handler_type): Make like vprintf.
(_bfd_error_internal): Rename from _bfd_error_handler. Make static.
(error_handler_internal): New function, split out from..
(_bfd_default_error_handler): ..here. Rename to _bfd_error_handler.
(bfd_set_error_handler): Update.
(bfd_get_error_handler, bfd_get_assert_handler): Delete.
(_bfd_assert_handler): Make static.
* coffgen.c (null_error_handler): Update params.
* elf-bfd.h (struct elf_backend_data <link_order_error_handler>):
Don't use bfd_error_handler_type.
* elf64-mmix.c (mmix_dump_bpo_gregs): Likewise.
* elfxx-target.h (elf_backend_link_order_error_handler): Default
to _bfd_error_handler.
* libbfd-in.h (_bfd_default_error_handler): Don't declare.
(bfd_assert_handler_type): Likewise.
(_bfd_error_handler): Update.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
ld/
* ldlang.c (ignore_bfd_errors): Update params.
PR ld/20636
* elf-bfd.h (struct elf_backend_data): Delete
elf_backend_count_output_relocs callback and add
elf_backend_update_relocs.
* elf32-arm.c (elf32_arm_count_output_relocs): Deleted.
(emit_relocs): Deleted.
(elf32_arm_emit_relocs): Deleted.
(elf_backend_emit_relocs): Updated not to use the old functions.
(elf32_arm_update_relocs): New function.
(elf_backend_update_relocs): New define.
* elflink.c (bfd_elf_final_link): Add additional_reloc_count to the
relocation count. Call elf_backend_emit_relocs.
(_bfd_elf_size_reloc_section): Do not call
elf_backend_count_output_relocs.
* elfxx-target.h (elf_backend_count_output_relocs): Deleted.
(elf_backend_update_relocs): New define.
2016-09-28 Christophe Lyon <christophe.lyon@linaro.org>
PR ld/20608
bfd/
* elf32-arm.c (arm_type_of_stub): Handle the case when the pre-PLT
Thumb-ARM stub is too far.
ld
* testsuite/ld-arm/arm-elf.exp: Handle new testcase.
* testsuite/ld-arm/farcall-mixed-app2.d: New file.
* testsuite/ld-arm/farcall-mixed-app2.r: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.s: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.sym: Likewise.
This patch extends Tag_GNU_Power_ABI_FP to cover long double ABIs,
makes the assembler warn about undefined tag values, and removes
similar warnings from the linker. I think it is better to not
warn in the linker about undefined tag values as future extensions to
the tags then won't result in likely bogus warnings. This is
consistent with the fact that an older linker won't warn on an
entirely new tag.
include/
* elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment.
bfd/
* elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Declare.
* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): New function.
(ppc_elf_merge_obj_attributes): Use it. Don't copy first file
attributes, merge them. Don't warn about undefined tag bits,
or copy unknown values to output.
* elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Call
_bfd_elf_ppc_merge_fp_attributes.
binutils/
* readelf.c (display_power_gnu_attribute): Catch truncated section
for all powerpc attributes. Display long double ABI. Don't
capitalize words, except for names. Show known bits of tag values
when some unknown bits are present. Whitespace fixes.
gas/
* config/tc-ppc.c (ppc_elf_gnu_attribute): New function.
(md_pseudo_table <ELF>): Handle "gnu_attribute".
ld/
* testsuite/ld-powerpc/attr-gnu-4-4.s: Delete.
* testsuite/ld-powerpc/attr-gnu-4-14.d: Delete.
* testsuite/ld-powerpc/attr-gnu-4-24.d: Delete.
* testsuite/ld-powerpc/attr-gnu-4-34.d: Delete.
* testsuite/ld-powerpc/attr-gnu-4-41.d: Delete.
* testsuite/ld-powerpc/attr-gnu-4-32.d: Adjust expected warning.
* testsuite/ld-powerpc/attr-gnu-8-23.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-01.d: Adjust expected output.
* testsuite/ld-powerpc/attr-gnu-4-02.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-03.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-10.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-11.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-20.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-22.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-33.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-8-11.d: Likewise.
* testsuite/ld-powerpc/powerpc.exp: Don't run deleted tests.
PR ld/20595
ld * testsuite/ld-arm/unwind-4.d: Add -q option to linker command
line and -r option to objdump command line. Match emitted relocs
to make sure that superflous relocs are not generated.
bfd * elf-bfd.h (struct elf_backend_data): Add
elf_backend_count_output_relocs callback to count relocations in
the final output.
* elf-arm.c (elf32_arm_add_relocation): Deleted.
(elf32_arm_write_section): Move additional relocation to emit_relocs.
(elf32_arm_count_output_relocs): New function.
(emit_relocs): New function.
(elf32_arm_emit_relocs): New function.
(elf32_arm_vxworks_emit_relocs): New function.
(elf_backend_emit_relocs): Updated to use the new functions.
(elf_backend_count_output_relocs): New define.
* bfd/elflink.c (bfd_elf_final_link): Do not add additional_reloc_count
to the relocation count.
(_bfd_elf_link_size_reloc_section): Use callback to count the
relocations which will be in output.
(_bfd_elf_default_count_output_relocs): New function.
* bfd/elfxx-target.h (elf_backend_count_output_relocs): New define.
The code compiled with the -fpic model in SPARC uses 13-bit signed
immediate PC-relative loads to fetch entries from the GOT table. In
theory this would allow using a GOT table (.got section) containing up
to 1024 entries in elf32 or 512 entries in elf64.
However, in elf64 sparc GNU targets _GLOBAL_OFFSET_TABLE_ is always
placed at the beginning of the .got section, making it impossible to use
negative offsets. This limits the usage of -fpic to GOT tables
containing a maximum of 257 entries in elf64.
This patch activates an optimization that is already used in sparc-elf32
also in sparc-elf64, that sets _GLOBAL_OFFSET_TABLE_ to point 0x1000
into the .got section if the section size is bigger than 0x1000.
2016-09-19 Jose E. Marchesi <jose.marchesi@oracle.com>
* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Allow
negative offsets to _GLOBAL_OFFSET_TABLE_ if the .got section is
bigger than 0x1000 bytes.
bfd/
2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf32-arm.c (elf32_arm_gc_mark_extra_sections): Only mark section
not already marked.
ld/
2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/ld-arm/cmse-veneers.s: Add a test for ARMv8-M Security
Extensions entry functions in absolute section.
* testsuite/ld-arm/cmse-veneers.rd: Adapt expected output accordingly.
We can resolve size relocation against symbol which needs copy relocation
when building executable.
bfd/
PR ld/20550
* elf64-x86-64.c (elf_x86_64_relocate_section): Resolve size
relocation with copy relocation when building executable.
ld/
PR ld/20550
* testsuite/ld-x86-64/pr20550a.s: New file.
* testsuite/ld-x86-64/pr20550b.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp (x86_64tests): Add tests for
PR ld/20550.
Prior to the patch, addends for relocs were being adjusted even if
they went beyond an alignment boundary. This is wrong - to
preserve alignment constraints, the relaxation logic adds as many padding
bytes at the alignment boundary as was deleted, so addends beyond the
boundary should not be adjusted. avr-prop-7.s reproduces this
scenario.
Also, prior to this patch, the relaxation logic assumed that the addr
parameter pointed to the middle of the instruction to be deleted, and
that addr - count would therefore be the shrinked instruction's
address. This is true when actually shrinking instructions.
The alignment constraints handling logic also invokes the same logic
though, with addr as the starting offset of padding bytes and
with count as the number of bytes to be deleted. Calculating the
shrinked insn's address as addr - count is obviously wrong in this
case - that offset would point to count bytes before the last
non-padded byte. avr-prop-8.s reproduces this scenario.
To fix scenario 1, the patch adds an additional check to ensure reloc addends
aren't adjusted if they cross a shrink boundary. The shrink boundary
is either the section size or an alignment boundary. Addends pointing
at an alignment boundary don't need to be adjusted, as padding would
occur and keep the boundary the same. Addends pointing at section size
need to be adjusted though, as no padding occurs and the section size
itself would get decremented. The patch records whether padding
occured (did_pad) and uses that to detect and handle this condition.
To fix scenario 2, the patch adds an additional parameter
(delete_shrinks_insn) to elf32_avr_relax_delete_bytes to distinguish
instruction bytes deletion from padding bytes deletion. It then uses that to
correctly set shrinked_insn_address.
bfd/ChangeLog:
2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20545
* elf32-avr.c (elf32_avr_relax_delete_bytes): Add parameter
delete_shrinks_insn. Modify computation of shrinked_insn_address.
Compute shrink_boundary and adjust addend only if
addend_within_shrink_boundary.
(elf32_avr_relax_section): Modify calls to
elf32_avr_relax_delete_bytes to pass extra parameter.
ld/ChangeLog:
2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20545
* testsuite/ld-avr/avr-prop-7.d: New test.
* testsuite/ld-avr/avr-prop-7.s: New test.
* testsuite/ld-avr/avr-prop-8.d: New test.
* testsuite/ld-avr/avr-prop-8.s: New test.
bfd/
* elf32-arm.c (cmse_entry_fct_p): Store instruction encoding in an
array of bytes and use bfd_get_16 to interpret its encoding according
to endianness of target.
Fixes a gdb segfault if a section named .opd is found in ELFv2 binaries.
* elf64-ppc.c (synthetic_opd): New static var.
(compare_symbols): Don't treat symbols in .opd specially for ELFv2.
(ppc64_elf_get_synthetic_symtab): Likewise. Comment.
Like 57f6d32d, this patch ensures that sections containing external
conditional branches limit the group size.
* elf64-ppc.c (group_sections): Delete stub14_group_size. Instead,
track max group size with a new "group_size" var that is reduced
by a factor of 1024 from the 24-bit branch size whenever a 14-bit
branch is seen.
ELF section sh_flags SHF_PPC_VLE was being set based on arch/mach,
which meant all code sections in an object file has the flag or all
lacked it. We can do better than that. Only those code sections
where VLE is enabled ought to have the flag, allowing an object file
to contain both VLE and non-VLE code.
Also, ELF header p_flags PF_PPC_VLE wasn't being set, and segments
were being split unnecessarily.
bfd/
* elf32-ppc.c (ppc_elf_section_processing): Delete.
(elf_backend_section_processing): Don't define.
(ppc_elf_modify_segment_map): Set p_flags and mark valid. Don't
split on non-exec sections differing in SHF_PPC_VLE. When
splitting segments, mark size invalid.
gas/
* config/tc-ppc.c (md_assemble): Set sh_flags for VLE. Test
ppc_cpu rather than calling ppc_mach to determine VLE mode.
(ppc_frag_check, ppc_handle_align): Likewise use ppc_cpu.
On i386, IFUNC function must be called via PLT. Since PLT in PIC
object uses EBX register, R_386_PLT32 relocation must be used to
call IFUNC function even when IFUNC function is defined locally.
Linker should issue an error when R_386_PC32 relocation is used
to call IFUNC function.
Since PR ld/19784 tests doesn't use PLT relocation to local IFUNC
function, they are moved to the x86-64 test directory.
bfd/
PR ld/14961
PR ld/20515
* elf32-i386.c (elf_i386_check_relocs): Issue an error when
R_386_PC32 relocation is used to call IFUNC function in PIC
object.
ld/
PR ld/14961
PR ld/20515
* testsuite/ld-i386/i386.exp: Run pr20515.
* testsuite/ld-i386/pr20515.d: New file.
* testsuite/ld-i386/pr20515.s: Likewise.
* testsuite/ld-ifunc/ifunc-14a.s: Use R_386_PLT32 to call IFUNC
function.
* testsuite/ld-ifunc/ifunc-14c.s: Likewise.
* testsuite/ld-ifunc/ifunc-2-i386.s: Likewise.
* testsuite/ld-ifunc/ifunc-2-local-i386.s: Likewise.
* testsuite/ld-ifunc/ifunc.exp: Move PR ld/19784 tests to ...
* testsuite/ld-x86-64/x86-64.exp: Here.
* testsuite/ld-ifunc/pr19784a.c: Moved to ...
* testsuite/ld-x86-64/pr19784a.c: Here.
* testsuite/ld-ifunc/pr19784b.c: Moved to ...
* testsuite/ld-x86-64/pr19784b.c: Here.
* testsuite/ld-ifunc/pr19784c.c: Moved to ...
* testsuite/ld-x86-64/pr19784c.c: Here.
Commit 980aa3e6 was supposed to cure dyn_reloc counting problems, but
did the opposite. For PIC we count two types of dyn_reloc, those on
pc-relative relocs, and the total. If a sym needs pc-relative dyn
relocs then all the relocs are dynamic. If not, then only those that
are must_be_dyn_reloc are dynamic.
PR 20519
* elf64-ppc.c (pc_dynrelocs): New function.
(ppc64_elf_relocate_section): Use it and must_be_dyn_reloc to
handle pic dynamic relocs.
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (struct elf32_arm_params): Define.
(bfd_elf32_arm_set_target_relocs): Rename into ...
(bfd_elf32_arm_set_target_params): This. Use a struct
elf32_arm_params to pass all parameters but the bfd and bfd_link_info.
* bfd-in2.h: Regenerate.
* elf32-arm.c (bfd_elf32_arm_set_target_relocs): Rename into ...
(bfd_elf32_arm_set_target_params): This. Pass all values via a struct
elf32_arm_params rather than as individual parameters.
ld/
* emultempl/armelf.em (params): New static variable.
(thumb_entry_symbol, byteswap_code, target1_is_rel, target2_type,
fix_v4bx, use_blx, vfp11_denorm_fix, stm32l4xx_fix, fix_cortex_a8,
no_enum_size_warning, no_wchar_size_warning, pic_veneer,
merge_exidx_entries, fix_arm1176, cmse_implib): move as part of the
above new structure.
(arm_elf_before_allocation): Access static variable from the params
structure.
(gld${EMULATION_NAME}_finish): Likewise.
(arm_elf_create_output_section_statements): Likewise and pass the
address of that structure to bfd_elf32_arm_set_target_relocs instead
of the static variables.
(PARSE_AND_LIST_ARGS_CASES): Access static variable from the params
structure.
bfd/
* elf32-arm.c (elf32_arm_get_stub_entry): Assert that we don't access
passed the end of htab->stub_group array.
(elf32_arm_create_or_find_stub_sec): Likewise.
(elf32_arm_create_stub): Likewise.
Forgot to set should_relocate to TRUE in case of GOT and TLS relocations of
undefined symbols for shared libraries.
In dynamic libraries if symbol is not known the instruction relocation would
not be resolved to point to the respective .got entry.
A test was created to detect similar future mistakes.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* elf32-arc.c (elf_arc_relocate_section): Changed. Set should_relocate
to TRUE for GOT and TLS relocs.
ld/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* ld/testsuite/ld-arc/tls_gd-01.s: Added a testcase for this patch.
* ld/testsuite/ld-arc/tls_gd-01.d: Likewise.
ARC was overloading this options by forcing DT_INIT AND DT_FINI
to always point to _init and _fini, respectively.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synospsys.com>
* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
