Commit Graph

19247 Commits

Author SHA1 Message Date
Alan Modra
01a8854406 tweak latest vms-alpha.c change
It's that tiny bit nicer to have the "len" expression in order of
the components in the buffer.
2024-06-30 14:41:42 +09:30
Alan Modra
6e46bdf64e Re: Rewrite SHT_GROUP handling
Some more error tweaks.  Report a zero entry as "invalid entry.."
rather than "unknown type..", and allow a section to be mentioned
twice in a group.

	* elf.c (process_sht_group_entries): Tweak error messages, and
	allow a duplicate index in a group without reporting an error.
2024-06-30 14:41:37 +09:30
GDB Administrator
8891a9751f Automatic date update in version.in 2024-06-30 00:00:49 +00:00
GDB Administrator
17de5033a2 Automatic date update in version.in 2024-06-29 00:00:35 +00:00
Lulu Cai
e4ed68e577 LoongArch: Do not check R_LARCH_SOP_PUSH_ABSOLUTE to avoid broken links to old object files
R_LARCH_SOP_PUSH_ABSOLUTE with -fPIC was heavily used in the era of gas-2.38.
We do not check this relocation to prevent broken links with old object
files.
2024-06-28 17:35:31 +08:00
Nelson Chu
685dcd295a RISC-V: Shrink the riscv_implicit_subsets table.
Allow to add implicit extensions by using the syntax of `.option arch, +-', so
that the table is shrinked and more readable.

bfd/
	* elfxx-riscv.c (check_implicit_always): Removed the unused IMPLICIT
	parameter.
	(check_implicit_for_i): Likewise.
	(riscv_implicit_subsets): Shrink the table by allowing the syntax of
	`.option arch, +-' for implicit extensions.
	(riscv_update_subset1): New function, called from riscv_update_subset
	or riscv_parse_add_implicit_subsets.  It basically does the same thing
	as riscv_update_subset function before.
	(riscv_parse_add_implicit_subsets): Updated.
	(riscv_update_subset): Updated.
2024-06-28 13:37:08 +08:00
Nelson Chu
81c353cb9c RISC-V: PR27180, Update relocation for riscv_zero_pcrel_hi_reloc.
When pcrel access overflow, the riscv_zero_pcrel_hi_reloc may convert pcrel
relocation to absolutly access if possible at the relocate stage.  We used to
encode the target address into r_sym of R_RISCV_HI20 if it is converted from
R_RISCV_PCREL_HI20.  But that may cause segfault if --emit-relocs is set,
since r_sym becomes an address rather than a symbol index.  Although the
relocate result is correct, it does not meet the definition, so may cause
unexpected behaviors.

This patch encodes the target address into r_addend, rather than r_sym, if
riscv_zero_pcrel_hi_reloc converts the relocation.  Besdies, since the
corresponding pcrel_lo relocation are also changed to absolutly access,
we should also update them to R_RISCV_LO12_I/S.

bfd/
	PR 27180
	* elfnn-riscv.c (riscv_pcrel_hi_reloc): New boolean `absolute', to
	inform corresponding pcrel_lo that the pcrel_hi relocation was already
	converted to hi20 relocation.
	(riscv_record_pcrel_hi_reloc): Likewise, record `absolute'.
	(riscv_pcrel_lo_reloc): Removed `const' for Elf_Internal_Rela *reloc,
	since we may need to convert it from pcrel_lo to lo relocation.
	(riscv_record_pcrel_lo_reloc): Likewise.  Convert pcrel_lo to lo
	relocation if corresponding pcrel_hi was converted to hi relocation.
	(riscv_zero_pcrel_hi_reloc): Encode target absolute address into
	r_addend rather than r_sym.  Clear the `addr' to avoid duplicate
	relocate in the perform_relocation.
	(riscv_elf_relocate_section): Updated.
ld/
	PR 27180
	* testsuite/ld-riscv-elf/pcrel-lo-addend-3a-emit-relocs.d: New testcase.
	Segfault without applying this patch.
	* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
2024-06-28 13:36:49 +08:00
Jiawei
805df5e4a8 RISC-V: Add Zabha extension CAS instructions.
This patch update the cas instruction in Zabha extension [1],
when both Zabha and Zacas extension enabled.

[1] https://github.com/riscv/riscv-zabha/tags

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_multi_subset_supports): New extension case.

gas/ChangeLog:

	* testsuite/gas/riscv/zabha-32.d: New instructions.
	* testsuite/gas/riscv/zabha.d: Ditto.
	* testsuite/gas/riscv/zabha.s: Ditto.

include/ChangeLog:

	* opcode/riscv-opc.h (MATCH_AMOCAS_B): New opcodes.
	(MASK_AMOCAS_B): Ditto.
	(MATCH_AMOCAS_H): Ditto.
	(MASK_AMOCAS_H): Ditto.
	(DECLARE_INSN): New instructions.
	* opcode/riscv.h (enum riscv_insn_class): New class case.

opcodes/ChangeLog:

	* riscv-opc.c: New instructions.
2024-06-28 09:57:50 +08:00
GDB Administrator
b3e08eae16 Automatic date update in version.in 2024-06-28 00:00:22 +00:00
Alan Modra
d58dbdd2a6 Re: Rewrite SHT_GROUP handling
There is no need to loop over the headers twice.  Remove that leftover
from the previous scheme.  Also, the previous scheme silently ignored
a section being mentioned in two or more SHT_GROUP sections.

	* elf.c (process_sht_group_entries): Prevent sections from
	belonging to two groups.
	(_bfd_elf_setup_sections): Process groups in a single loop
	over headers.
2024-06-27 14:28:51 +09:30
GDB Administrator
6cb70d1bf4 Automatic date update in version.in 2024-06-27 00:00:51 +00:00
Alan Modra
f676198220 Rewrite SHT_GROUP handling
This patch delays setting up elf_next_in_group, elf_sec_group and
elf_group_name when reading ELF object files until after all ELF
sections have been processed by bfd_section_from_shdr.  This is simpler
and more robust than the current scheme of driving the whole process
on detecting a section with SHF_GROUP set.

	* elf-bfd.h (struct elf_obj_tdata): Delete group_sect_ptr,
	num_group and group_search_offset.
	* elf.c (Elf_Internal_Group): Delete.
	(setup_group): Delete function.
	(IS_VALID_GROUP_SECTION_HEADER): Delete macro.
	(is_valid_group_section_header),
	(process_sht_group_entries): New functions.
	(_bfd_elf_setup_sections): Handle group sections here..
	(_bfd_elf_make_section_from_shdr): ..rather than here.
	(bfd_section_from_shdr): Don't check SHT_GROUP validity here.
2024-06-27 09:05:23 +09:30
GDB Administrator
b57ce13242 Automatic date update in version.in 2024-06-26 00:00:46 +00:00
Nick Clifton
79b836ef6b Updated Russian translation for the bfd/ sub-directory 2024-06-25 14:16:58 +01:00
Nick Clifton
5ac806f22e Fix calculation of space remaining in buffer when printing the contents of a DST__K_RECBEG type debug symbol for the VMS Alpha port.
PR 31873
2024-06-25 11:56:38 +01:00
Szabolcs Nagy
c9cf7bdfe5 aarch64: Add DT_RELR support for ILP32 ABI
Extend the 64bit DT_RELR support to work on 32bit ELF too. For this
only a few changes were needed in the sizing and creation of the
relr relocations.
2024-06-25 11:07:51 +01:00
GDB Administrator
218bb9dcdb Automatic date update in version.in 2024-06-25 00:00:33 +00:00
Nick Clifton
e13c4e5890 Updated Spanish translations for the bfd and binutils sub-directories 2024-06-24 15:03:22 +01:00
GDB Administrator
18b13d11d3 Automatic date update in version.in 2024-06-24 00:00:29 +00:00
GDB Administrator
b43cf8d3d8 Automatic date update in version.in 2024-06-23 00:00:27 +00:00
GDB Administrator
4c8d6351cc Automatic date update in version.in 2024-06-22 00:00:24 +00:00
Feng Wang
da16a23481 RISC-V: Remove implicit enablement of Zvknha from Zvkn.
Accroding to the Crypto spec, the Zvkned,Zvknhb,Zvkb and Zvkt are
included in the Zvkn.  So the Zvknha should be removed from Zvkn.

bfd/ChangeLog:

	* elfxx-riscv.c: Remove zvknha from zvkn.
2024-06-21 12:56:43 +08:00
GDB Administrator
154960342c Automatic date update in version.in 2024-06-21 00:00:42 +00:00
Alan Modra
56f3903369 Revert "Remove LIBINTL_DEP"
This reverts commit e874cbd387.
The patch was wrong.  LIBINTL_DEP is needed with an in-tree gettext.
2024-06-20 21:15:27 +09:30
Alan Modra
e874cbd387 Remove LIBINTL_DEP
The intl directory in the source no longer exists.  LIBINTL_DEP is
thus always empty.  Remove references to it.

config/
	* gettext-sister.m4: Don't AC_SUBST LIBINTL_DEP.
bfd/
	* Makefile.in: Regenerate.
	* configure: Regenerate.
binutils/
	* Makefile.am (*_DEPENDENCIES): Remove LIBINTL_DEP.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
gas/
	* Makefile.am (as_new_DEPENDENCIES): Remove LIBINTL_DEP.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
gdb/
	* Makefile.in (INTL_DEPS): Don't set or reference.
	* configure: Regenerate.
gdbserver/
	* Makefile.in (INTL_DEPS): Don't set or reference.
gdbsupport/
	* Makefile.in: Regenerate.
	* configure: Regenerate.
gold/
	* Makefile.am (deps_var): Remove LIBINTL_DEP.
	(incremental_dump_DEPENDENCIES, dwp_DEPENDENCIES): Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* testsuite/Makefile.am (DEPENDENCIES): Remove LIBINTL_DEP.
	* testsuite/Makefile.in: Regenerate.
gprof/
	* Makefile.am (gprof_DEPENDENCIES): Remove LIBINTL_DEP.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
ld/
	* Makefile.am (ld_new_DEPENDENCIES): Remove LIBINTL_DEP.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
libctf/
	* Makefile.in: Regenerate.
	* configure: Regenerate.
opcodes/
	* configure.ac (BUILD_LIBS): Remove LIBINTL.
	(BUILD_LIB_DEPS): Remove LIBINTL_DEP.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
2024-06-20 18:33:28 +09:30
Xi Ruoyao
b5b05a6e65 LoongArch: TLS IE needs only one dynamic reloc
As the comment in the code says, TLS_IE needs only one dynamic reloc.
But commit b67a17aa7c ("LoongArch: Fix the issue of excessive
relocation generated by GD and IE") has incorrectly allocated the space
for two dynamic relocs, causing libc.so to contain 8 R_LARCH_NONE.

Adjust tlsdesc-dso.d for the offset changes and add two tests to ensure
there are no R_LARCH_NONE with TLS.

Signed-off-by: Xi Ruoyao <xry111@xry111.site>
2024-06-20 16:55:24 +08:00
GDB Administrator
b5929e7aa0 Automatic date update in version.in 2024-06-20 00:00:22 +00:00
GDB Administrator
9c39329d1c Automatic date update in version.in 2024-06-19 00:00:24 +00:00
Nelson Chu
c2db2b8a37 RISC-V: Fixed typo from smscrind to smcsrind in riscv_implicit_subsets.
bfd/
	* elfxx-riscv.c (riscv_implicit_subsets): Fixed type from smscrind to
	smcsrind.
gas/
	* testsuite/gas/riscv/march-imply-smcsrind.d: New testcase.  It fails
	without applying this patch.
2024-06-18 16:22:30 +08:00
Hau Hsu
7003edc383 RISC-V: Add SiFive cease extension v1.0
Add SiFive cease extension,
https://sifive.cdn.prismic.io/sifive/767804da-53b2-4893-97d5-b7c030ae0a94_s76mc_core_complex_manual_21G3.pdf

This aligns LLVM:
* https://llvm.org/docs/RISCVUsage.html
* https://github.com/llvm/llvm-project/pull/83896

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_supported_vendor_x_ext): Add support for
	'xsfcease'.
	(riscv_multi_subset_supports): Handle INSN_CLASS_XSFCEASE.
	(riscv_multi_subset_supports_ext): Handle INSN_CLASS_XSFCEASE.

gas/ChangeLog:

	* doc/c-riscv.texi: Updated.
	* testsuite/gas/riscv/march-help.l: Updated.
	* testsuite/gas/riscv/sifive-insns.d: Add test case for 'sf.cease'.
	* testsuite/gas/riscv/sifive-insns.s: Likewise.

include/ChangeLog:

	* opcode/riscv-opc.h (MATCH_SF_CEASE, MASK_SF_CEASE): Define match and
	mask encoding for 'sf.cease'.
	* opcode/riscv.h (INSN_CLASS_XSFCEASE): Add new instruction class for
	'xsfcease'.

opcodes/ChangeLog:

    * riscv-opc.c (riscv_opcodes): Add opcode entry for 'sf.cease'.
2024-06-18 15:06:34 +08:00
Gianluca Guida
88729e9616 RISC-V: Support Zacas extension.
https://github.com/riscvarchive/riscv-zacas/releases/tag/v1.0

The Zacas extension introduce compare-and-swap instructions to operate
on 32-bit, 64-bit and 128-bit (RV64 only) data values.

It introduces three new instructions:
  - amocas.w (32-bit CAS)
  - amocas.d (64-bit CAS)
  - amocas.q (128-bit CAS, RV64 only)

Like other AMOs in the A extension, Zacas instructions have '.aq',
'.rl' and '.aqrl' variations.

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_implicit_subsets): 'A' implied by 'Zacas'.
	(riscv_supported_std_z_ext): Add 'Zacas' extension.
	(riscv_multi_subset_supports, riscv_multi_subset_supports_ext):
	Handle INSN_CLASS_ZACAS case.

gas/ChangeLog:

	* NEWS: Updated.
	* testsuite/gas/riscv/march-help.l: Updated.
	* testsuite/gas/riscv/zacas-32.d: New test (RV32).
        * testsuite/gas/riscv/zacas-fail-32.d: Likewise.
	* testsuite/gas/riscv/zacas-64.d: New test (RV64).
        * testsuite/gas/riscv/zacas-fail-64.d: Likewise.
	* testsuite/gas/riscv/zacas.s: New test source.
	* testsuite/gas/riscv/zacas-fail.s: Likewise.
	* testsuite/gas/riscv/zacas-fail-32.l: New file.
	* testsuite/gas/riscv/zacas-fail-64.l: Likewise.

include/ChangeLog:

	* include/opcode/riscv.h (INSN_CLASS_ZACAS): New definition.
	* include/opcode/riscv-opc.h (MATCH_AMOCAS_W, MASK_AMOCAS_W)
	(MATCH_AMOCAS_D, MASK_AMOCAS_D, MATCH_AMOCAS_Q, MASK_AMOCAS_Q):
	Likewise.
	(amocas_w, amocas_d, amocas_q): Declare instructions.

opcodes/ChangeLog:

	* riscv-opc.c (match_rs2_rd_even): New function.
	(amocas_w, amocas_d, amocas_q, amocas_w.aq)
	(amocas_d.aq, amocas_q.aq, amocas_w.rl, amocas_d.rl, amocas_q.rl)
	(amocas_w.aqrl, amocas_d.aqrl, amocas_q.aqrl): Add instructions.
2024-06-18 14:35:50 +08:00
GDB Administrator
6a4f078b5b Automatic date update in version.in 2024-06-18 00:00:13 +00:00
Alan Modra
2df6e96709 Error messages emitted during bfd_check_format_matches
Error/warning messages are only printed for the target that
successfully matched, which makes sense for warnings, but not so much
for errors where the errors cause no target to match.  I noticed this
when looking at the pr20520 testcase again with objdump, which just
reports "file format not recognized" omitting the five "SHT_GROUP
section [index n] has no SHF_GROUP sections" messages.  They are
omitted because multiple ELF targets match the object file.  This is
going to be true for all ELF objects due to at least the proper ELF
target and the generic ELF target matching.

	* format.c (print_and_clear_messages): Print messages if all
	targets with messages have exactly the same set of messages.
2024-06-17 15:57:50 +09:30
GDB Administrator
c3d23f753d Automatic date update in version.in 2024-06-17 00:00:33 +00:00
GDB Administrator
28775f62b9 Automatic date update in version.in 2024-06-16 00:00:16 +00:00
GDB Administrator
f2869f51b2 Automatic date update in version.in 2024-06-15 00:00:22 +00:00
H.J. Lu
93548ee191 x86: Add -z isa-level-report=[none|all|needed|used]
Add -z isa-level-report=[none|all|needed|used] to the x86 ELF linker to
report needed and used x86-64 ISA levels.

bfd/

	PR ld/31868
	* elf-linker-x86.h (elf_x86_isa_level_report): New.
	(elf_linker_x86_params): Add isa_level_report.
	* elfxx-x86.c (report_isa_level): New.
	(_bfd_x86_elf_link_setup_gnu_properties): Check
	-z isa-level-report=[none|all|needed|used] to report needed and
	used x86-64 ISA level.

ld/

	PR ld/31868
	* NEWS: Mention -z isa-level-report=[none|all|needed|used].
	* ld.texi: Document -z isa-level-report=[none|all|needed|used].
	* emulparams/elf32_x86_64.sh: Source x86-64-level-report.sh.
	* emulparams/elf_i386.sh: Likewise.
	* emulparams/elf_x86_64.sh: Likewise.
	* emulparams/x86-64-level-report.sh: New file.
	* testsuite/ld-i386/pr31868a.d: Likewise.
	* testsuite/ld-i386/pr31868b.d: Likewise.
	* testsuite/ld-i386/pr31868c.d: Likewise.
	* testsuite/ld-x86-64/pr31868a-x32.d: Likewise.
	* testsuite/ld-x86-64/pr31868a.d: Likewise.
	* testsuite/ld-x86-64/pr31868a.l: Likewise.
	* testsuite/ld-x86-64/pr31868a.s: Likewise.
	* testsuite/ld-x86-64/pr31868b-x32.d: Likewise.
	* testsuite/ld-x86-64/pr31868b.d: Likewise.
	* testsuite/ld-x86-64/pr31868b.l: Likewise.
	* testsuite/ld-x86-64/pr31868b.s: Likewise.
	* testsuite/ld-x86-64/pr31868c-x32.d: Likewise.
	* testsuite/ld-x86-64/pr31868c.d: Likewise.
	* testsuite/ld-x86-64/pr31868c.l: Likewise.
	* testsuite/ld-i386/i386.exp: Run PR ld/31868 tests.
	* testsuite/ld-x86-64/x86-64.exp: Likewise.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2024-06-14 13:38:19 -07:00
GDB Administrator
6b19a26ee1 Automatic date update in version.in 2024-06-14 00:00:26 +00:00
Nick Clifton
e8e10743f7 Add --rosegment option to BFD linker to stop the '-z separate-code' from generating two read-only segments.
PR 30907
2024-06-13 15:10:15 +01:00
GDB Administrator
5a011d5b86 Automatic date update in version.in 2024-06-13 00:00:22 +00:00
Jiawei
b7641ae1af RISC-V: Support S[sm]csrind extension csrs.
This patch supports RISC-V Smcsrind/Sscsrind privilege extension csrs.
Reuse csr 'smselect/siselect', 'mireg/sireg' and 'vsiselect,vsireg' csrs
in Smaia/Ssaia extension.

bfd/ChangeLog:

	* elfxx-riscv.c: New extensions.

gas/ChangeLog:

	* NEWS: Updated.
	* config/tc-riscv.c (enum riscv_csr_class): New extensions.
	(riscv_csr_address): Ditto.
	* testsuite/gas/riscv/csr-version-1p10.d: New csrs.
	* testsuite/gas/riscv/csr-version-1p10.l: Ditto.
	* testsuite/gas/riscv/csr-version-1p11.d: Ditto.
	* testsuite/gas/riscv/csr-version-1p11.l: Ditto.
	* testsuite/gas/riscv/csr-version-1p12.d: Ditto.
	* testsuite/gas/riscv/csr-version-1p12.l: Ditto.
	* testsuite/gas/riscv/csr.s: Ditto.
	* testsuite/gas/riscv/march-help.l: New extensions.

include/ChangeLog:

	* opcode/riscv-opc.h (CSR_MIREG2): New csr.
	(CSR_MIREG3): Ditto.
	(CSR_MIREG4): Ditto.
	(CSR_MIREG5): Ditto.
	(CSR_MIREG6): Ditto.
	(CSR_SIREG2): Ditto.
	(CSR_SIREG3): Ditto.
	(CSR_SIREG4): Ditto.
	(CSR_SIREG5): Ditto.
	(CSR_SIREG6): Ditto.
	(CSR_VSIREG2): Ditto.
	(CSR_VSIREG3): Ditto.
	(CSR_VSIREG4): Ditto.
	(CSR_VSIREG5): Ditto.
	(CSR_VSIREG6): Ditto.
	(DECLARE_CSR): Ditto.
2024-06-12 08:47:19 +08:00
GDB Administrator
a3d147a454 Automatic date update in version.in 2024-06-12 00:00:37 +00:00
Alan Modra
b20ab53f81 PR31872, Segfault in objdump (elf_slurp_reloc_table_from_section)
This one was triggered by trying to dump an AMDGPU object.
elf64-amdgcn.c lacks support for objdump relocation handling.

	PR 31872
	* elfcode.h (elf_slurp_reloc_table_from_section): Don't segfault
	on NULL elf_info_to_howto_rel.
2024-06-11 12:43:06 +09:30
GDB Administrator
39071d57ab Automatic date update in version.in 2024-06-11 00:00:10 +00:00
Ilya Leoshkevich
48e63b8753 IBM zSystems: Rewrite l(g)rl @GOTENT to larl for --no-pie
Regtested on s390x-redhat-linux.

Rewriting l(g)rl @GOTENT to larl is unnecessarily guarded by
bfd_link_pic().  There were no use cases for this in the past, but
since recently the Linux Kernel on s390x is compiled with -fPIE
and linked with --no-pie.  Remove the unnecessary bfd_link_pic()
check.

bfd/ChangeLog:

        * elf32-s390.c (elf_s390_relocate_section): Don't check for
	bfd_link_pic() when rewriting lrl@GOTENT to larl.
	(elf_s390_finish_dynamic_symbol): Emit a relative reloc for
	the above case.
        * elf64-s390.c (elf_s390_relocate_section): Don't check for
	bfd_link_pic() when rewriting lgrl@GOTENT to larl.
	(elf_s390_finish_dynamic_symbol): Emit a relative reloc for
	the above case.

ld/ChangeLog:

* testsuite/ld-s390/s390.exp: Hook up the new tests.
        * testsuite/ld-s390/gotreloc_31-no-pie-1.dd: New test.
        * testsuite/ld-s390/gotreloc_64-no-pie-1.dd: New test.
2024-06-10 22:37:06 +02:00
Alan Modra
539c3962fa PR31873, buffer overflow in evax_bfd_print_dst
PR 31873
	* vms-alpha.c (evax_bfd_print_dst): Sanity check len against
	dst_size.
2024-06-10 22:53:11 +09:30
GDB Administrator
4186bc40b6 Automatic date update in version.in 2024-06-10 00:00:23 +00:00
Matthieu Longo
e83746f535 autoupdate: regen after replacing obsolete macros 2024-06-10 08:25:56 +09:30
Matthieu Longo
3dee0baea2 autoupdate: add square brackets around arguments of AC_INIT
https://www.gnu.org/savannah-checkouts/gnu/autoconf/manual/autoconf-2.72/autoconf.html#index-AC_005fINIT-2
2024-06-10 08:25:56 +09:30
Matthieu Longo
2cac47f5ba autoupdate: replace obsolete macros AC_AIX, AC_MINIX, and AC_GNU_SOURCE
- AC_AIX, AC_MINIX, and AC_GNU_SOURCE by AC_USE_SYSTEM_EXTENSIONS
  https://www.gnu.org/savannah-checkouts/gnu/autoconf/manual/autoconf-2.72/autoconf.html#index-AC_005fAIX
  https://www.gnu.org/savannah-checkouts/gnu/autoconf/manual/autoconf-2.72/autoconf.html#index-AC_005fMINIX-1
  https://www.gnu.org/savannah-checkouts/gnu/autoconf/manual/autoconf-2.72/autoconf.html#index-AC_005fGNU_005fSOURCE-1
2024-06-10 08:25:55 +09:30