The GNU coding standards said the comments should be complete sentences
and end with a period and two spaces. But sometimes it should be more
cleaner when the comments only include a word or codes. Therefore, I made
the following changes after referring to other target/generic codes,
* Try to write sentences in comments, must end with a period and two spaces.
* End with two spaces without a period for codes/instructions only.
* End with one space without a period for a single word/variable only.
Besids, also rewrite/remove some comments which are obsolete or too long,
and fix indents for comments.
bfd/
* elfnn-riscv.c: Comments tidy and improvement.
* elfxx-riscv.c: Likewise.
* elfxx-riscv.h: Likewise.
gas/
* config/tc-riscv.c: Comments tidy and improvement. Also update
comment "fallthru" to "Fall through" that end with a period and
two spaces.
include/
* elf/riscv.h: Comments tidy and improvement.
* opcode/riscv-opc.h: Likewise.
* opcode/riscv.h: Likewise.
opcodes/
* riscv-dis.c: Comments tidy and improvement.
* riscv-opc.c: Likewise.
Generally, glibc dynamic linker should have two ways to deal with ifunc
- one is to handle the IRELATIVE relocations for the non-preemtive ifunc
symbols, the other is to handle the R_RISCV_32/64 and R_RISCV_JUMP_SLOT
relocations with the STT_IFUNC preemtive symbols. No matter which method
is used, both of them should get the resolved ifunc symbols at runtime.
Therefore, linker needs to generate the correct dynamic relocations for
ifunc to make sure the the dynamic linker works well. For now, there are
thirteen relocations are supported for ifunc in GNU ld,
* R_RISCV_CALL and R_RISCV_CALL_PLT:
The RISC-V compiler won't generate R_RISCV_JAL directly to jump to an
ifunc. Besides, we disable the relaxations for the relocation referenced
to ifunc, so just handling the R_RISCV_CALL and R_RISCV_CALL_PLT should be
enough. Linker should generate a .plt entry and a .got.plt entry for it,
and also needs to insert a dynamic IRELATIVE in the .got.plt enrty, or
insert a R_RISCV_JUMP_SLOT when generating shared library.
* R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO12_I/S:
LA/LLA pattern with local fPIC ifunc symbol, or any non-PIC ifunc symbol.
The PC-relative relocation. The current linker will deal with them in
the same way as R_RISCV_CALL_PLT.
* R_RISCV_GOT_HI20 and R_RISCV_PCREL_LO12_I/S:
LA pattern with global PIC ifunc symbol. Linker should insert a dynamic
IRELATIVE in the .got entry, or insert a R_RISCV_32/64 when generating
shared library.
* R_RISCV_32 and R_RISCV_64:
Store the ifunc symbol into the data section. Linker should insert a
dynamic IRELATIVE in the data section, or insert a R_RISCV_32/64 when
generating shared library.
* R_RISCV_HI20 and R_RISCV_LO12_I/S:
The LUI + ADDI/LW/SW patterns. The absolute access relocation. The
medlow model without the -fPIC compiler option should generate them.
The ld ifunc testsuites "Build pr23169a" and "Build pr23169d" need the
relocations, they are in the ld/testsuite/ld-ifunc/, and need compiler
support.
However, we also made some optimizations with reference to x86,
* If GOT and PLT relocations refer to the same ifunc symbol when generating
pie, then they can actually share a .got entry without creating two entries
to store the same value and relocation.
* If GOT, PLT and DATA relocations refer to the same ifunc symbol when
generating position dependency executable, then linker will fill the address
of .plt entry into the corresponding .got entry and data section, without
insert any dynamic relocations for the GOT and DATA relocations.
For the ifunc testcases, there are three types of them,
1. ifunc-reloc-*: Only check the single type of relocation refers to
ifunc symbol.
* ifunc-reloc-call: R_RISCV_CALL and R_RISCV_CALL_PLT.
* ifunc-reloc-data: R_RISCV_32 and R_RISCV_64.
* ifunc-reloc-got: R_RISCV_GOT_HI20 and R_RISCV_PCREL_LO_I/S.
* ifunc-reloc-pcrel: R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO_I/S.
2. ifunc-[nonplt|plt]-*: If we don't have PLT relocs, then don't need to
create the PLT and it's .plt entries.
* ifunc-nonplt: Combine R_RISCV_GOT_HI20 and R_RISCV_32/64.
* ifunc-plt: Combine all ifunc relocations.
3. ifunc-seperate-*: If we link the ifunc caller and resolver into the
same module (link the objects), then the results are the same as the
ifunc-reloc-* and ifunc-[noplt|plt]-* testcases. Consider the cases that
the ifunc callers and resolver are in the different modules, that is, we
compile the ifunc resolver to the shared library first, and then link it
with the ifunc callers. The output of ifunc callers should be the same as
the normal STT_FUNC cases, and the shared ifunc resolver should define the
symbols as STT_IFUNC.
The R_RISCV_PCREL_HI20 reloc is special. It should be linked and resolved
locally, so if the ifunc resolver is defined in other modules (other shared
libraries), then the R_RISCV_PCREL_HI20 is unresolvable, and linker should
issue an unresolvable reloc error.
bfd/
* elfnn-riscv.c: Include "objalloc.h" since we need objalloc_alloc.
(riscv_elf_link_hash_table): Add loc_hash_table and loc_hash_memory
for local STT_GNU_IFUNC symbols.
(riscv_elf_got_plt_val): Removed.
(riscv_elf_local_htab_hash, riscv_elf_local_htab_eq): New functions.
Use to compare local hash entries.
(riscv_elf_get_local_sym_hash): New function. Find a hash entry for
local symbol, and create a new one if needed.
(riscv_elf_link_hash_table_free): New function. Destroy an riscv
elf linker hash table.
(riscv_elf_link_hash_table_create): Create hash table for local ifunc.
(riscv_elf_check_relocs): Create a fake global symbol to track the
local ifunc symbol. Add support to check and handle the relocations
reference to ifunc symbols.
(allocate_dynrelocs): Let allocate_ifunc_dynrelocs and
allocate_local_ifunc_dynrelocs to handle the ifunc symbols if they
are defined and referenced in a non-shared object.
(allocate_ifunc_dynrelocs): New function. Allocate space in .plt,
.got and associated reloc sections for ifunc dynamic relocs.
(allocate_local_ifunc_dynrelocs): Likewise, but for local ifunc
dynamic relocs.
(riscv_elf_relocate_section): Add support to handle the relocation
referenced to ifunc symbols.
(riscv_elf_size_dynamic_sections): Updated.
(riscv_elf_adjust_dynamic_symbol): Updated.
(riscv_elf_finish_dynamic_symbol): Finish up the ifunc handling,
including fill the PLT and GOT entries for ifunc symbols.
(riscv_elf_finish_local_dynamic_symbol): New function. Called by
riscv_elf_finish_dynamic_symbol to handle the local ifunc symbols.
(_bfd_riscv_relax_section): Don't do the relaxation for ifunc.
* elfxx-riscv.c: Add R_RISCV_IRELATIVE.
* configure.ac: Link elf-ifunc.lo to use the generic ifunc support.
* configure: Regenerated.
include/
* elf/riscv.h: Add R_RISCV_IRELATIVE to 58.
ld/
* emulparams/elf32lriscv-defs.sh: Add IREL_IN_PLT.
* testsuite/ld-ifunc/ifunc.exp: Enable ifunc tests for RISC-V.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp (run_dump_test_ifunc):
New dump test for ifunc. There are two arguments, 'target` and
`output`. The `target` is rv32 or rv64, and the `output` is used
to choose which output you want to test (exe, pie or .so).
* testsuite/ld-riscv-elf/ifunc-reloc-call-01.s: New testcase.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-resolver.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-caller.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-exe.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pic.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pie.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-caller-pcrel.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pic.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pie.d: Likewise.
The symbol address in .eh_frame may be adjusted in
_bfd_elf_discard_section_eh_frame, and the content of .eh_frame will be
adjusted in _bfd_elf_write_section_eh_frame. Therefore, we cannot insert
a relocation whose addend symbol is in .eh_frame. Othrewise, the value
may be adjusted twice.
bfd/ChangeLog
2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
* elfnn-riscv.c (perform_relocation): Support the new
R_RISCV_32_PCREL relocation.
(riscv_elf_relocate_section): Likewise.
* elfxx-riscv.c (howto_table): Likewise.
(riscv_reloc_map): Likewise.
* bfd-in2.h (BFD_RELOC_RISCV_32_PCREL): New relocation.
* libbfd.h: Regenerate.
gas/ChangeLog
2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
* config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a
R_RISCV_32_PCREL relocation.
include/ChangeLog
2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
* elf/riscv.h (R_RISCV_32_PCREL): New.
We missed a "_gp" when changing the GP symbol. To make sure that
doesn't happen again, we now use the same definition everywhere (thanks,
Nick).
include/ChangeLog:
2017-04-03 Palmer Dabbelt <palmer@dabbelt.com>
* elf/riscv.h (RISCV_GP_SYMBOL): New define.
bfd/ChangeLog:
2017-04-03 Palmer Dabbelt <palmer@dabbelt.com>
* elfnn-riscv.c (GP_NAME): Delete.
(riscv_global_pointer_value): Change GP_NAME to RISCV_GP_SYMBOL.
(_bfd_riscv_relax_lui): Likewise.
opcodes/ChangeLog:
2017-04-03 Palmer Dabbelt <palmer@dabbelt.com>
* riscv-dis.c (riscv_disassemble_insn): Change "_gp" to
RISCV_GP_SYMBOL.
We've decided to standardize on two flags for RISC-V: "-march" sets the
target architecture (which determines which instructions can be
generated), and "-mabi" sets the target ABI. We needed to rework this
because the old flag set didn't support soft-float or single-float ABIs,
and didn't support an x32-style ABI on RISC-V.
Additionally, we've changed the behavior of the -march flag: it's now a
lot stricter and only parses things we can actually understand.
Additionally, it's now lowercase-only: the rationale is that while the
RISC-V ISA manual specifies that ISA strings are case-insensitive, in
Linux-land things are usually case-sensitive. Since this flag can be
used to determine library paths, we didn't want to bake some
case-insensitivity in there that would case trouble later.
This patch implements these two new flags and removes the old flags that
could conflict with these. There wasn't a RISC-V release before, so we
want to just support a clean flag set.
include/
* elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define.
(EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define.
(EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define.
(EF_RISCV_FLOAT_ABI_QUAD): Define.
bfd/
* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Use
EF_RISCV_FLOAT_ABI_SOFT instead of EF_RISCV_SOFT_FLOAT.
binutils/
* readelf.c (get_machine_flags): Use
EF_RISCV_FLOAT_ABI_{SOFT,SINGLE,DOBULE,QUAD) instead of
EF_RISCV_{SOFT,HARD}_FLOAT.
gas/
* config/tc-riscv.h (xlen): Delete.
* config/tc-riscv.c (xlen): Make static.
(abi_xlen): New variable.
(options): Replace OPTION_{M32,M64,MSOFT_FLOAT,MHARD_FLOAT,MRVC}
with OPTION_MABI.
(md_longopts): Likewise.
(md_parse_option): Likewise.
(riscv_elf_final_processing): Likewise.
* doc/as.texinfo (Target RISC-V options): Likewise.
* doc/c-riscv.texi (OPTIONS): Likewise.
* config/tc-riscv.c (float_mode): Removed.
(float_abi): New type, specifies the floating-point ABI.
(riscv_set_abi): New function.
(riscv_add_subset): Only allow lower-case ISA names and require
them to start with "rv".
(riscv_after_parse_args): Likewise.
opcodes/
* riscv-dis.c (riscv_disassemble_insn): Default to the ELF's
XLEN when none is provided.
Before this commit we didn't cleanly support CFI directives because the
internal offsets used to get relaxed which broke them. This patch
significantly reworks how we handle linker relaxations:
* DWARF is now properly supported
* There is a ".option norelax" to disable relaxations, for when users
write assembly that can't be relaxed (if it's to be later patched up,
for example).
* There is an additional _RELAX relocation that specifies when previous
relocations can be relaxed.
We're in the process of documenting the RISC-V ELF ABI, which will
include documentation of our relocations
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
but we expect that this relocation set will remain ABI compatible in the
future (ie, it's safe to release).
Thanks to Kuan-Lin Chen for figuring out how to correctly relax the
debug info!
include/
* elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32.
bfd/
* reloc.c (BFD_RELOC_RISCV_TPREL_I): New relocation.
(BFD_RELOC_RISCV_TPREL_S): Likewise.
(BFD_RELOC_RISCV_RELAX): Likewise.
(BFD_RELOC_RISCV_CFA): Likewise.
(BFD_RELOC_RISCV_SUB6): Likewise.
(BFD_RELOC_RISCV_SET8): Likewise.
(BFD_RELOC_RISCV_SET8): Likewise.
(BFD_RELOC_RISCV_SET16): Likewise.
(BFD_RELOC_RISCV_SET32): Likewise.
* elfnn-riscv.c (perform_relocation): Handle the new
relocations.
(_bfd_riscv_relax_tls_le): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_section): Likewise.
(howto_table): Likewise.
(riscv_reloc_map): Likewise.
(relax_func_t): New type.
(_bfd_riscv_relax_call): Add reserve_size argument, which
controls the maximal offset pessimism. Correct type of max_alignment.
(_bfd_riscv_relax_lui): Likewise.
(_bfd_riscv_relax_tls_le): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_section): Compute the required reserve size
when relocating and use it to when calling relax_func.
* bfd-in2.h: Regenerate.
* libbfd.h: Likewise.
gas/
* config/tc-riscv.c (riscv_set_options): Add relax.
(riscv_opts): Likewise.
(s_riscv_option): Add relax and norelax.
(riscv_apply_const_reloc): New function.
(append_insn): Move constant relocation handling to
riscv_apply_const_reloc.
(md_pcrel_from): Likewise.
(parse_relocation): Skip BFD_RELOC_UNUSED.
(md_pcrel_from): Handle BFD_RELOC_RISCV_SUB6,
BFD_RELOC_RISCV_RELAX, BFD_RELOC_RISCV_CFA.
(md_apply_fix): Likewise.
(riscv_pre_output_hook): New function.
* config/tc-riscv.h (md_pre_output_hook): Define.
(riscv_pre_output_hook): Declare.
(DWARF_CIE_DATA_ALIGNMENT): Always -4.
