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00595b5e79
441 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
H.J. Lu
|
17d6eea5d5 |
Don't hardcode .got.plt into DATA_SEGMENT_RELRO_END evaluation
ld/ PR ld/14215 * ldexp.c (fold_name <SIZEOF, ALIGNOF>): Allow forward section references. * emulparams/elf32_x86_64.sh (SEPARATE_GOTPLT): Depend on size of .got.plt. * emulparams/elf32mb_linux.sh (SEPARATE_GOTPLT): Likewise. * emulparams/elf32tilegx.sh (SEPARATE_GOTPLT): Likewise. * emulparams/elf32tilepro.sh (SEPARATE_GOTPLT): Likewise. * emulparams/elf64tilegx.sh (SEPARATE_GOTPLT): Likewise. * emulparams/elf_i386.sh (SEPARATE_GOTPLT): Likewise. * emulparams/elf_k1om.sh (SEPARATE_GOTPLT): Likewise. * emulparams/elf_l1om.sh (SEPARATE_GOTPLT): Likewise. * emulparams/elf_x86_64.sh (SEPARATE_GOTPLT): Likewise. ld/testsuite/ PR ld/14215 * ld-i386/i386.exp: Run pr14215. * ld-x86-64/x86-64.exp: Likewise. * ld-i386/pr14215.d: New file. * ld-i386/pr14215.s: Likewise. * ld-x86-64/pr14215.d: Likewise. * ld-x86-64/pr14215.s: Likewise. |
||
Nick Clifton
|
f6c1a2d592 | Add support for Motorola XGATE embedded CPU | ||
|
Nick Clifton
|
b38cadfb70 |
* elf32-arm.c (elf32_arm_nacl_plt0_entry, elf32_arm_nacl_plt_entry):
New variables.
(struct elf32_arm_link_hash_table): New member `nacl_p'.
(elf32_arm_link_hash_table_create): Initialize it.
(elf32_arm_nacl_link_hash_table_create): New function.
(arm_movw_immediate, arm_movt_immediate): New functions.
(elf32_arm_populate_plt_entry): Test HTAB->nacl_p.
(elf32_arm_finish_dynamic_sections): Likewise.
(elf32_arm_output_plt_map_1): Likewise.
(bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec):
New backend vector stanza.
(elf32_arm_nacl_modify_segment_map): New function.
* config.bfd: Handle arm-*-nacl*, armeb-*-nacl*.
* targets.c: Support bfd_elf32_{big,little}_nacl_vec.
* configure.in: Likewise.
(bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here.
(bfd_elf32_littlearm_nacl_vec): Likewise.
(bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise.
(bfd_elf32_bigarm_symbian_vec): Likewise.
(bfd_elf32_littlearm_symbian_vec): Likewise.
(bfd_elf32_bigarm_vxworks_vec): Likewise.
(bfd_elf32_littlearm_vxworks_vec): Likewise.
* configure: Regenerated.
* configure.tgt (arm-*-nacl*): Match it.
* config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define.
(LOCAL_LABELS_DOLLAR): Define.
* config/tc-arm.c (elf32_arm_target_format) [TE_NACL]:
Use nacl format variants.
* gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets
as -armeabi.
* gas/arm/any-idiv.d: Match *-*-nacl* targets too.
* gas/arm/arch4t.d: Likewise.
* gas/arm/arch4t-eabi.d: Likewise.
* gas/arm/attr-any-armv4t.d: Likewise.
* gas/arm/attr-any-thumbv6.d: Likewise.
* gas/arm/attr-cpu-directive.d: Likewise.
* gas/arm/attr-default.d: Likewise.
* gas/arm/attr-march-all.d: Likewise.
* gas/arm/attr-march-armv1.d: Likewise.
* gas/arm/attr-march-armv2a.d: Likewise.
* gas/arm/attr-march-armv2.d: Likewise.
* gas/arm/attr-march-armv2s.d: Likewise.
* gas/arm/attr-march-armv3.d: Likewise.
* gas/arm/attr-march-armv3m.d: Likewise.
* gas/arm/attr-march-armv4.d: Likewise.
* gas/arm/attr-march-armv4t.d: Likewise.
* gas/arm/attr-march-armv4txm.d: Likewise.
* gas/arm/attr-march-armv4xm.d: Likewise.
* gas/arm/attr-march-armv5.d: Likewise.
* gas/arm/attr-march-armv5t.d: Likewise.
* gas/arm/attr-march-armv5te.d: Likewise.
* gas/arm/attr-march-armv5tej.d: Likewise.
* gas/arm/attr-march-armv5texp.d: Likewise.
* gas/arm/attr-march-armv5txm.d: Likewise.
* gas/arm/attr-march-armv6.d: Likewise.
* gas/arm/attr-march-armv6j.d: Likewise.
* gas/arm/attr-march-armv6k.d: Likewise.
* gas/arm/attr-march-armv6k+sec.d: Likewise.
* gas/arm/attr-march-armv6kt2.d: Likewise.
* gas/arm/attr-march-armv6-m.d: Likewise.
* gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/arm/attr-march-armv6s-m.d: Likewise.
* gas/arm/attr-march-armv6t2.d: Likewise.
* gas/arm/attr-march-armv6z.d: Likewise.
* gas/arm/attr-march-armv6zk.d: Likewise.
* gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/arm/attr-march-armv7-a.d: Likewise.
* gas/arm/attr-march-armv7a.d: Likewise.
* gas/arm/attr-march-armv7-a+idiv.d: Likewise.
* gas/arm/attr-march-armv7-a+mp.d: Likewise.
* gas/arm/attr-march-armv7-a+sec.d: Likewise.
* gas/arm/attr-march-armv7-a+sec+virt.d: Likewise.
* gas/arm/attr-march-armv7-a+virt.d: Likewise.
* gas/arm/attr-march-armv7.d: Likewise.
* gas/arm/attr-march-armv7em.d: Likewise.
* gas/arm/attr-march-armv7-m.d: Likewise.
* gas/arm/attr-march-armv7m.d: Likewise.
* gas/arm/attr-march-armv7-r.d: Likewise.
* gas/arm/attr-march-armv7r.d: Likewise.
* gas/arm/attr-march-armv7-r+mp.d: Likewise.
* gas/arm/attr-march-iwmmxt2.d: Likewise.
* gas/arm/attr-march-iwmmxt.d: Likewise.
* gas/arm/attr-march-xscale.d: Likewise.
* gas/arm/attr-mcpu.d: Likewise.
* gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/arm/attr-mfpu-arm7500fe.d: Likewise.
* gas/arm/attr-mfpu-fpa10.d: Likewise.
* gas/arm/attr-mfpu-fpa11.d: Likewise.
* gas/arm/attr-mfpu-fpa.d: Likewise.
* gas/arm/attr-mfpu-fpe2.d: Likewise.
* gas/arm/attr-mfpu-fpe3.d: Likewise.
* gas/arm/attr-mfpu-fpe.d: Likewise.
* gas/arm/attr-mfpu-maverick.d: Likewise.
* gas/arm/attr-mfpu-neon.d: Likewise.
* gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/arm/attr-mfpu-softfpa.d: Likewise.
* gas/arm/attr-mfpu-softvfp.d: Likewise.
* gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/arm/attr-names.d: Likewise.
* gas/arm/attr-order.d: Likewise.
* gas/arm/attr-override-cpu-directive.d: Likewise.
* gas/arm/attr-override-mcpu.d: Likewise.
* gas/arm/got_prel.d: Likewise.
* gas/arm/mapdir.d: Likewise.
* gas/arm/mapmisc.d: Likewise.
* gas/arm/mapsecs.d: Likewise.
* gas/arm/mapshort-eabi.d: Likewise.
* gas/arm/mapshort-elf.d: Likewise.
* gas/arm/mov-highregs-any.d: Likewise.
* gas/arm/mov-lowregs-any.d: Likewise.
* gas/arm/pr12198-1.d: Likewise.
* gas/arm/pr12198-2.d: Likewise.
* gas/arm/thumb.d: Likewise.
* gas/arm/thumb-eabi.d: Likewise.
* gas/arm/thumbrel.d: Likewise.
* configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them.
* emulparams/armelf_nacl.sh: New file.
* emulparams/armelfb_nacl.sh: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c
and earmelfb_nacl.c here.
(earmelf_nacl.c, earmelfb_nacl.c): New targets.
* Makefile.in: Regenerated.
* ld-arm/arm-elf.exp (armelftests): Split out into ...
(armelftests_common, armelftests_nonacl): ... these two.
(armeabitests): Split out into ...
(armeabitests_common, armeabitests_nonacl): ... these two.
Omit _nonacl sets for arm*-*-nacl* targets.
* ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones.
* ld-arm/farcall-mix2.d: Likewise.
* ld-arm/farcall-group.d: Likewise.
* ld-arm/tls-gdesc-got.d: Match variant file formats too.
Accept some variation in exact addresses.
* ld-arm/thumb2-b-interwork.d: Match variant file formats too.
Fix regexps not to care about exact addresses where not relevant.
* ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any
strings of particular exact lengths.
* ld-arm/thumb2-bl-undefweak1.d: Likewise.
* ld-arm/arm-app.r: Match variant file formats too.
* ld-arm/arm-app-abs32.r: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/arm-lib.r: Likewise.
* ld-arm/arm-static-app.r: Likewise.
* ld-arm/armv4-bx.d: Likewise.
* ld-arm/data-only-map.d: Likewise.
* ld-arm/group-relocs.d: Likewise.
* ld-arm/jump19.d: Likewise.
* ld-arm/reloc-boundaries.d: Likewise.
* ld-arm/thumb1-bl.d: Likewise.
* ld-arm/thumb2-bl.d: Likewise.
* ld-arm/tls-app.d: Likewise.
* ld-arm/tls-app.r: Likewise.
* ld-arm/tls-gdierelax.d: Likewise.
* ld-arm/tls-gdierelax2.d: Likewise.
* ld-arm/tls-gdlerelax.d: Likewise.
* ld-arm/tls-lib.d: Likewise.
* ld-arm/tls-lib.r: Likewise.
* ld-arm/tls-mixed.r: Likewise.
* ld-arm/vfp11-fix-none.d: Likewise.
* ld-arm/vfp11-fix-scalar.d: Likewise.
* ld-arm/vfp11-fix-vector.d: Likewise.
* ld-arm/arm-static-app.d: Likewise.
Fix regexps not to care about exact number of leading spaces.
* ld-arm/arm-app-abs32.d: Likewise.
* ld-arm/fix-arm1176-off.d: Likewise.
* ld-arm/fix-arm1176-on.d: Likewise.
* ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
|
||
|
Nick Clifton
|
202e23565d |
* configure.ac (ia64*-*-*vms*): Add support for ld.
* configure: Regenerate. * scripttempl/ia64vms.sc: New file. * emultempl/vms.em (_before_parse): Support for ia64. (elf64-ia64-vms): New fragment for ia64. * emulparams/elf64_ia64_vms.sh: New file. * configure.tgt (ia64-*-*vms*): Add. * Makefile.am (ALL_64_EMULATION_SOURCES): Add eelf64_ia64_vms.c (eelf64_ia64_vms.c): New rule. * Makefile.in: Regenerate. * elflink.c (elf_link_output_extsym): Add a guard. (bfd_elf_final_link): Remove assertion. (bfd_elf_final_link): Add a guard. * elfnn-ia64.c (INCLUDE_IA64_VMS): Removed. (elfNN_vms_section_from_shdr, elfNN_vms_object_p) (elfNN_vms_post_process_headers, elfNN_vms_section_processing) (elfNN_vms_final_write_processing, elfNN_vms_close_and_cleanup): Remove. (elfNN-ia64-vms target): Move to ... * elf64-ia64-vms.c: New file. * configure.in (bfd_elf64_ia64_vms_vec): Add elf64-ia64-vms.lo * Makefile.am (BFD64_BACKENDS): Add elf64-ia64-vms.lo. (BFD64_BACKENDS_CFILES): Ad elf64-ia64-vms.c. * configure: Regenerate. * Makefile.in: Regenerate. |
||
Roland McGrath
|
5a68afcf73 |
bfd/
2012-04-03 Roland McGrath <mcgrathr@google.com> * elf-nacl.c: New file. * elf-nacl.h: New file. * elf32-i386.c (elf_backend_modify_segment_map): Define for bfd_elf32_i386_nacl_vec. (elf_backend_modify_program_headers): Likewise. * elf64-x86-64.c (elf_backend_modify_segment_map): Define for bfd_elf64_x86_64_nacl_vec and bfd_elf32_x86_64_nacl_vec. (elf_backend_modify_program_headers): Likewise. * Makefile.am (BFD32_BACKENDS, BFD64_BACKENDS): Add elf-nacl.lo here. (BFD32_BACKENDS_CFILES, BFD64_BACKENDS_CFILES): Add elf-nacl.c here. * Makefile.in: Regenerated. * configure.in (bfd_elf64_x86_64_nacl_vec): Add elf-nacl.o to tb here. (bfd_elf32_x86_64_nacl_vec): Likewise. (bfd_elf64_x86_64_vec, bfd_elf32_x86_64_vec): Likewise. (bfd_elf64_x86_64_freebsd_vec, bfd_elf64_x86_64_sol2_vec): Likewise. (bfd_elf64_l1om_vec, bfd_elf64_l1om_freebsd_vec): Likewise. (bfd_elf64_k1om_vec, bfd_elf64_k1om_freebsd_vec): Likewise. (bfd_elf32_i386_nacl_vec): Likewise. (bfd_elf32_i386_sol2_vec, bfd_elf32_i386_freebsd_vec): Likewise. (bfd_elf32_i386_vxworks_vec, bfd_elf32_i386_vec): Likewise. * configure: Regenerated. binutils/testsuite/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * lib/binutils-common.exp (is_elf_format): Consider *-*-nacl* to be ELF too. * binutils-all/elfedit-4.d: Add "#as: --64" option. * binutils-all/i386/i386.exp: Accept nacl targets too. * binutils-all/x86-64/x86-64.exp: Likewise. gas/testsuite/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * gas/i386/k1om.d: Add not-target match for *-*-nacl*. * gas/i386/l1om.d: Likewise. ld/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * configure.tgt (i[3-7]86-*-nacl*, x86_64-*-nacl*): Handle them. * emulparams/elf_nacl.sh: New file. * emulparams/elf_i386_nacl.sh: New file. * emulparams/elf32_x86_64_nacl.sh: New file. * emulparams/elf_x86_64_nacl.sh: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf_i386_nacl.c here. (ALL_64_EMULATION_SOURCES): Add eelf32_x86_64_nacl.c and eelf_x86_64_nacl.c here. (eelf_i386_nacl.c, eelf32_x86_64_nacl.c, eelf_x86_64_nacl.c): New targets. * Makefile.in: Regenerated. * scripttempl/elf.sc: Handle SEPARATE_CODE cases. ld/testsuite/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * ld-x86-64/ilp32-4-nacl.d: New file. * ld-x86-64/x86-64.exp: Run it. * ld-discard/discard.exp: Accept nacl targets too. * ld-elf/binutils.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/tls_common.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-elfvsb/elfvsb.exp: Likewise. * ld-elfweak/elfweak.exp: Likewise. * ld-gc/gc.exp: Likewise. * ld-ifunc/binutils.exp: Likewise. * ld-ifunc/ifunc.exp: Likewise. * ld-linkonce/linkonce.exp:Likewise. * ld-pie/pie.exp: Likewise. * ld-shared/shared.exp: Likewise. * ld-undefined/weak-undef.exp: Likewise. * ld-unique/unique.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/line.exp: Likewise. * lib/ld-lib.exp (slurp_options): Support global array options_regsub to apply substitutions to the contents of options lines read from the file. * ld-i386/emit-relocs.d: Renamed to ... * ld-i386/emit-relocs.rd: ... this. * ld-i386/i386.exp: Accept nacl targets too. For them, use options_regsub to replace elf_i386 with elf_i386_nacl in run_dump_test cases; apply the same substitution in $i386tests; replace foo.rd expectations files with foo-nacl.rd in $i386tests. (i386tests): Change emit-relocs.d to emit-relocs.rd here. * ld-i386/emit-relocs-nacl.rd: New file. * ld-i386/plt-nacl.pd: New file. * ld-i386/plt-pic-nacl.pd: New file. * ld-i386/tlsbin-nacl.rd: New file. * ld-i386/tlsbindesc-nacl.rd: New file. * ld-i386/tlsdesc-nacl.rd: New file. * ld-i386/tlsgdesc-nacl.rd: New file. * ld-i386/tlsnopic-nacl.rd: New file. * ld-i386/tlspic-nacl.rd: New file. * ld-x86-64/x86-64.exp: Accept nacl targets too. For them, use options_regsub to replace elf_x86_64 with elf_x86_64_nacl in run_dump_test cases; apply the same substitution in $x86_64tests; replace foo.rd expectations files with foo-nacl.rd in $x86_64tests. Add explicit -melf_x86_64 to ld options in tests that need it, in case the default emulation is x32 (as it is for x86_64-nacl). * ld/testsuite/ld-x86-64/plt-nacl.pd: New file. * ld/testsuite/ld-x86-64/split-by-file-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsbin-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsbindesc-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsdesc-nacl.pd: New file. * ld/testsuite/ld-x86-64/tlsdesc-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsgdesc-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlspic-nacl.rd: New file. * ld-i386/hidden2.d: Loosen regexps to match any file format variant, and not to depend on exact addresses, displacements, etc. where they are irrelevant. * ld-i386/pcrel16.d: Likewise. * ld-i386/pcrel16abs.d: Likewise. * ld-i386/pr12718.d: Likewise. * ld-i386/pr12921.d: Likewise. * ld-i386/reloc.d: Likewise. * ld-i386/tlsbin.dd: Likewise. * ld-i386/tlsbin.sd: Likewise. * ld-i386/tlsbin.td: Likewise. * ld-i386/tlsbindesc.dd: Likewise. * ld-i386/tlsbindesc.sd: Likewise. * ld-i386/tlsbindesc.td: Likewise. * ld-i386/tlsdesc.dd: Likewise. * ld-i386/tlsdesc.sd: Likewise. * ld-i386/tlsdesc.td: Likewise. * ld-i386/tlsg.sd: Likewise. * ld-i386/tlsgdesc.dd: Likewise. * ld-i386/tlsindntpoff.dd: Likewise. * ld-i386/tlsnopic.dd: Likewise. * ld-i386/tlsnopic.sd: Likewise. * ld-i386/tlspic.dd: Likewise. * ld-i386/tlspic.sd: Likewise. * ld-i386/tlspic.td: Likewise. * ld-i386/tlspie2.d: Likewise. * ld-x86-64/hidden2.d: Likewise. * ld-x86-64/pcrel16.d: Likewise. * ld-x86-64/pr12718.d: Likewise. * ld-x86-64/pr12921.d: Likewise. * ld-x86-64/protected3.d: Likewise. * ld-x86-64/tlsbin.dd: Likewise. * ld-x86-64/tlsbin.sd: Likewise. * ld-x86-64/tlsbin.td: Likewise. * ld-x86-64/tlsbindesc.dd: Likewise. * ld-x86-64/tlsbindesc.sd: Likewise. * ld-x86-64/tlsbindesc.td: Likewise. * ld-x86-64/tlsdesc.dd: Likewise. * ld-x86-64/tlsdesc.sd: Likewise. * ld-x86-64/tlsdesc.td: Likewise. * ld-x86-64/tlsg.sd: Likewise. * ld-x86-64/tlsgd5.dd: Likewise. * ld-x86-64/tlsgd6.dd: Likewise. * ld-x86-64/tlsgdesc.dd: Likewise. * ld-x86-64/tlspic.dd: Likewise. * ld-x86-64/tlspic.sd: Likewise. * ld-x86-64/tlspic.td: Likewise. * ld-x86-64/ilp32-8.d: Match any file format variant. Use a -Ttext and adjust expected results, to handle variant layouts. * ld-x86-64/ilp32-9.d: Likewise. * ld-i386/alloc.t: Remove superfluous OUTPUT_FORMAT statement. * ld-i386/pr12627.t: Likewise. * ld-x86-64/abs-l1om.d: Add target: constraint. * ld-x86-64/protected2-l1om.d: Likewise. * ld-x86-64/protected3-l1om.d: Likewise. * ld-x86-64/ilp32-4.d: Likewise. * ld-x86-64/plt.s: New file. * ld-x86-64/pltlib.s: New file. * ld-x86-64/plt.pd: New file. * ld-x86-64/x86-64.exp (x86_64tests): Add them. * ld-i386/plt.s: New file. * ld-i386/pltlib.s: New file. * ld-i386/plt.pd: New file. * ld-i386/plt-pic.s: New file. * ld-i386/plt-pic.pd: New file. * ld-i386/i386.exp (i386tests): Add them. |
||
Walter Lee
|
fb6ceddedd |
Add big-endian support for tilegx.
bfd/ * config.bfd (tilegx-*-*): rename little endian vector; add big endian vector. (tilegxbe-*-*): New case. * configure.in (bfd_elf32_tilegx_vec): Rename... (bfd_elf32_tilegx_le_vec): ... to this. (bfd_elf32_tilegx_be_vec): New vector. (bfd_elf64_tilegx_vec): Rename... (bfd_elf64_tilegx_le_vec): ... to this. (bfd_elf64_tilegx_be_vec): New vector. * configure: Regenerate. * elf32-tilegx.c (TARGET_LITTLE_SYM): Rename. (TARGET_LITTLE_NAME): Ditto. (TARGET_BIG_SYM): Define. (TARGET_BIG_NAME): Define. * elf64-tilegx.c (TARGET_LITTLE_SYM): Rename. (TARGET_LITTLE_NAME): Ditto. (TARGET_BIG_SYM): Define. (TARGET_BIG_NAME): Define. * targets.c (bfd_elf32_tilegx_vec): Rename... (bfd_elf32_tilegx_le_vec): ... to this. (bfd_elf32_tilegx_be_vec): Declare. (bfd_elf64_tilegx_vec): Rename... (bfd_elf64_tilegx_le_vec): ... to this. (bfd_elf64_tilegx_be_vec): Declare. (_bfd_target_vector): Add / rename above vectors. binutils/testsuite/ * binutils-all/objdump.exp (cpus_expected): Add tilegx. gas/ * tc-tilegx.c (tilegx_target_format): Handle big endian. (OPTION_EB): Define. (OPTION_EL): Define. (md_longopts): Add entries for "EB" and "EL". (md_parse_option): Handle OPTION_EB and OPTION_EL. (md_show_usage): Add -EB and -EL. (md_number_to_chars): New. * tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with ifndef. (md_number_to_chars): Delete. * configure.tgt (tilegx*be): Handle. * doc/as.texinfo [TILE-Gx]: Document -EB and -EL. * doc/c-tilegx.texi: Ditto. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c. (eelf32tilegx_be.c): Add rule to build this file. (eelf64tilegx_be.c): Ditto. * Makefile.in: Regenerate. * configure.tgt (tilegx-*-*): Support big endian. (tilegxbe-*-*): New. * emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename. (BIG_OUTPUT_FORMAT): Define. (LITTLE_OUTPUT_FORMAT): Define. * emulparams/elf32tilegx_be.sh: New. * emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename. (BIG_OUTPUT_FORMAT): Define. (LITTLE_OUTPUT_FORMAT): Define. * emulparams/elf64tilegx_be.sh: New. ld/testsuite/ * ld-tilegx/reloc-be.d: New. * ld-tilegx/reloc-le.d: New. * ld-tilegx/reloc.d: Delete. * ld-tilegx/tilegx.exp: Test big and little endian. |
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|
H.J. Lu
|
b7761f1106 |
Support arch-dependent fill
bfd/ 2012-01-31 H.J. Lu <hongjiu.lu@intel.com> PR ld/13616 * archures.c (bfd_arch_info): Add fill. (bfd_default_arch_struct): Add bfd_arch_default_fill. (bfd_arch_default_fill): New. * configure.in: Set bfd version to 2.22.52. * configure: Regenerated. * cpu-alpha.c: Add bfd_arch_default_fill to bfd_arch_info initializer. * cpu-arc.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-cris.c: Likewise. * cpu-crx.c: Likewise. * cpu-d10v.c: Likewise. * cpu-d30v.c: Likewise. * cpu-dlx.c: Likewise. * cpu-epiphany.c: Likewise. * cpu-fr30.c: Likewise. * cpu-frv.c: Likewise. * cpu-h8300.c: Likewise. * cpu-h8500.c: Likewise. * cpu-hppa.c: Likewise. * cpu-i370.c: Likewise. * cpu-i860.c: Likewise. * cpu-i960.c: Likewise. * cpu-ia64.c: Likewise. * cpu-ip2k.c: Likewise. * cpu-iq2000.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m10200.c: Likewise. * cpu-m10300.c: Likewise. * cpu-m32c.c: Likewise. * cpu-m32r.c: Likewise. * cpu-m68hc11.c: Likewise. * cpu-m68hc12.c: Likewise. * cpu-m68k.c: Likewise. * cpu-m88k.c: Likewise. * cpu-mcore.c: Likewise. * cpu-mep.c: Likewise. * cpu-microblaze.c: Likewise. * cpu-mips.c: Likewise. * cpu-mmix.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-mt.c: Likewise. * cpu-ns32k.c: Likewise. * cpu-openrisc.c: Likewise. * cpu-or32.c: Likewise. * cpu-pdp11.c: Likewise. * cpu-pj.c: Likewise. * cpu-plugin.c: Likewise. * cpu-powerpc.c: Likewise. * cpu-rl78.c: Likewise. * cpu-rs6000.c: Likewise. * cpu-rx.c: Likewise. * cpu-s390.c: Likewise. * cpu-score.c: Likewise. * cpu-sh.c: Likewise. * cpu-sparc.c: Likewise. * cpu-spu.c: Likewise. * cpu-tic30.c: Likewise. * cpu-tic4x.c: Likewise. * cpu-tic54x.c: Likewise. * cpu-tic6x.c: Likewise. * cpu-tic80.c: Likewise. * cpu-tilegx.c: Likewise. * cpu-tilepro.c: Likewise. * cpu-v850.c: Likewise. * cpu-vax.c: Likewise. * cpu-w65.c: Likewise. * cpu-we32k.c: Likewise. * cpu-xc16x.c: Likewise. * cpu-xstormy16.c: Likewise. * cpu-xtensa.c: Likewise. * cpu-z80.c: Likewise. * cpu-z8k.c: Likewise. * cpu-i386.c: Include "libiberty.h". (bfd_arch_i386_fill): New. Add bfd_arch_i386_fill to bfd_arch_info initializer. * cpu-k1om.c: Add bfd_arch_i386_fill to bfd_arch_info initializer. * cpu-l1om.c: Likewise. * linker.c (default_data_link_order): Call abfd->arch_info->fill if fill size is 0. * bfd-in2.h: Regenerated. include/ 2012-01-31 H.J. Lu <hongjiu.lu@intel.com> PR ld/13616 * bfdlink.h (bfd_link_order): Update comments on data size. ld/ 2012-01-31 H.J. Lu <hongjiu.lu@intel.com> PR ld/13616 * emulparams/elf32_x86_64.sh: Remove NOP. * emulparams/elf_i386.sh: Likewise. * emulparams/elf_i386_be.sh: Likewise. * emulparams/elf_i386_ldso.sh: Likewise. * emulparams/elf_i386_vxworks.sh: Likewise. * emulparams/elf_k1om.sh: Likewise. * emulparams/elf_l1om.sh: Likewise. * emulparams/elf_x86_64.sh: Likewise. * ldlang.c (zero_fill): Initialized to 0. * ldwrite.c (build_link_order): Set data size to linker odrder size when they are the same. * scripttempl/elf.sc: Don't specify fill if NOP is undefined. ld/testsuite/ 2012-01-31 H.J. Lu <hongjiu.lu@intel.com> PR ld/13616 * ld-i386/tlsbindesc.dd: Update no-op padding. * ld-i386/tlsnopic.dd: Likewise. * ld-i386/tlspic.dd: Likewise. * ld-x86-64/tlsbin.dd: Likewise. * ld-x86-64/tlsbindesc.dd: Likewise. * ld-x86-64/tlspic.dd: Likewise. |
||
Joseph Myers
|
c0a512e266 |
* emulparams/elf32bmip.sh (OTHER_SECTIONS): Put .mdebug.* and
.gcc_compiled_long* sections at address 0. |
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Alan Modra
|
bd59d91639 |
* Makefile.am (ALL_64_EMULATION_SOURCES): Add powerpc64-*-freebsd
source. (eelf64ppc_fbsd.c): Add rules to build this file. * Makefile.in: Regenerate. * configure.tgt: Add target definition for powerpc64-*-freebsd*. Adjust powerpc-*-freebsd*. * emultempl/ppc64elf.em: Add a mechanism to override the default value of 0 for plt_static_chain. * emulparams/elf32ppc_fbsd.sh (OUTPUT_FORMAT): Override the default. * emulparams/elf64ppc_fbsd.sh (OUTPUT_FORMAT): Likewise. (DEFAULT_PLT_STATIC_CHAIN): Define to 1. |
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DJ Delorie
|
99c513f6ac |
[.]
* configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file. |
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|
Nick Clifton
|
cfb8c0921c |
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise. |
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|
Alan Modra
|
58d180e827 |
bfd/
* elf32-ppc.c: Include dwarf2.h. (struct ppc_elf_link_hash_table): Add glink_eh_frame. (ppc_elf_create_glink): Create .eh_frame section. (glink_eh_frame_cie): New array. (ppc_elf_size_dynamic_sections): Size glink_eh_frame. (ppc_elf_finish_dynamic_sections): Write glink_eh_frame. * elf64-ppc.c: Include dwarg2.h. (struct ppc_link_hash_table): Add glink_eh_frame. (create_linkage_sections): Create .eh_frame section. (ppc64_elf_size_dynamic_sections): Arrange to drop unneeded glink_eh_frame. (glink_eh_frame_cie): New array. (ppc64_elf_size_stubs): Size glink_eh_frame. (ppc64_elf_build_stubs): Init glink_eh_frame contents. (ppc64_elf_finish_dynamic_sections): Write glink_eh_frame. ld/ * emulparams/elf32ppc.sh: Source plt_unwind.sh. * emulparams/elf64ppc.sh: Likewise. * emultempl/ppc32elf.em (OPTION_NO_TLS_OPT): Adjust. (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Append to existing values. * emultempl/ppc64elf.em (OPTION_STUBGROUP_SIZE): Adjust. (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Append to existing values. ld/testsuite/ * ld-powerpc/powerpc.exp: Use --no-ld-generated-unwind-info with some tests. * ld-powerpc/relbrlt.d: Likewise. |
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|
H.J. Lu
|
7a9068fe16 |
Add initial Intel K1OM support.
bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. |
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|
Alan Modra
|
fb42df5ed9 |
* emultempl/elf32.em (gld${EMULATION_NAME}_add_options,
gld${EMULATION_NAME}_handle_option, gld${EMULATION_NAME}_list_options):
Provide --build-id, -z defs, -z muldefs, -z max-page-size,
-z common-page-size, -z execstack, -z noexecstack for all targets.
Add help for --exclude-libs.
(OPTION_LD_GENERATED_UNWIND_INFO,
OPTION_NO_LD_GENERATED_UNWIND_INFO): Move this..
(gld${EMULATION_NAME}_handle_option): ..and code handling
--ld-generated-unwind-info and --no-ld-generated-unwind-info..
* emulparams/plt_unwind.sh: ..to here. New file. Add help.
* emulparams/elf32_x86_64.sh: Include plt_unwind.sh.
* emulparams/elf_i386.sh: Likewise.
* emulparams/elf_i386_chaos.sh: Likewise.
* emulparams/elf_i386_ldso.sh: Likewise.
* emulparams/elf_l1om.sh: Likewise.
* emulparams/elf_x86_64.sh: Likewise.
|
||
|
Nick Clifton
|
aa137e4d51 |
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
|
||
Bernd Schmidt
|
2a6163793f |
ld/
(eelf32_tic6x_linux_be.c, eelf32_tic6x_linux_le.c, eelf32_tic6x_elf_be.c, eelf32_tic6x_elf_le.c): New rules. * Makefile.am (ALL_EMULATIONS): Add these files. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): Depend on tic6xdsbt.em. * Makefile.in: Regenerated. * emultempl/tic6xdsbt.em (is_tic6x_target): Allow more tic6x target vectors. * emulparams/elf32_tic6x_elf_be.sh: New file. * emulparams/elf32_tic6x_elf_le.sh: New file. * emulparams/elf32_tic6x_linux_be.sh: New file. * emulparams/elf32_tic6x_linux_le.sh: New file. * configure.tgt (tic6x-*-elf, tic6x-*-uclinux): New. (tic6x-*-*): Replaced by these. ld/testsuite/ * ld-tic6x/dsbt.ld (OUTPUT_FORMAT): Add. * ld-tic6x/tic6x.exp: Add OSABI tests. bfd/ * config.bfd (tic6x-*-elf, tic6x-*-uclinux): New. (tic6x-*-*): Replaced by these. * elf32-tic6x.c (elf32_tic6x_set_osabi): New static function. (elf32_tic6x_check_relocs): Create dynamic sections if -shared. (elf_backend_relocs_compatible, elf_backend_post_process_headers): Define. (elf32_bed, TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_OSABI): Redefine twice, and include "elf32-target.h" two more times. * configure.in: Handle bfd_elf32_tic6x_linux_be_vec, bfd_elf32_tic6x_linux_le_vec, bfd_elf32_tic6x_elf_be_vec and bfd_elf32_tic6x_elf_le_vec. * configure: Regenerate. |
||
Paul Brook
|
6970a02804 |
2011-04-18 Paul Brook <paul@codesourcery.com>
ld/ * emulparams/elf32_tic6x_le.sh: Define OTHER_READONLY_SECTIONS for unwinding tables. |
||
|
H.J. Lu
|
d02c4aae3d |
Fix elf_l1om linker scripts.
2011-03-31 H.J. Lu <hongjiu.lu@intel.com> * configure.tgt: Add elf_l1om to targ_extra_libpath for x86_64-*-linux-*. * emulparams/elf_l1om.sh: Remove duplicates. |
||
|
Bernd Schmidt
|
ac14530735 |
include/elf/
* tic6x.h (R_C6000_JUMP_SPLOT, R_C6000_EHTYPE, R_C6000_PCR_H16, R_C6000_PCR_L16): New relocs. (SHN_TIC6X_SCOMMON): Define. bfd/ * elf32-tic6x.h (struct elf32_tic6x_params): New. (elf32_tic6x_setup): Declare. * elf32-tic6x.c: Include <limits.h>. (ELF_DYNAMIC_LINKER, DEFAULT_STACK_SIZE, PLT_ENTRY_SIZE): Define. (struct elf32_tic6x_link_hash_table, struct elf32_link_hash_entry): New structures. (elf32_tic6x_link_hash_table, is_tic6x_elf): New macros. (tic6x_elf_scom_section, tic6x_elf_scom_symbol, tic6x_elf_scom_symbol_ptr): New static variables. (elf32_tic6x_howto_table, elf32_tic6x_howto_table_rel, elf32_tic6x_reloc_map): Add R_C6000_JUMP_SLOT, R_C6000_EHTYPE, R_C6000_PCR_H16 and R_C6000_PCR_L16. (elf32_tic6x_link_hash_newfunc, elf32_tic6x_link_hash_table_create, elf32_tic6x_link_hash_table_free, elf32_tic6x_setup, elf32_tic6x_using_dsbt, elf32_tic6x_install_rela, elf32_tic6x_create_dynamic_sections, elf32_tic6x_make_got_dynreloc, elf32_tic6x_finish_dynamic_symbol, elf32_tic6x_gc_sweep_hook, elf32_tic6x_adjust_dynamic_symbol): New static functions. (elf32_tic6x_relocate_section): For R_C6000_PCR_S21, convert branches to weak symbols as required by the ABI. Handle GOT and DSBT_INDEX relocs, and copy relocs to the output file as needed when generating DSBT output. (elf32_tic6x_check_relocs, elf32_tic6x_add_symbol_hook, elf32_tic6x_symbol_processing, elf32_tic6x_section_from_bfd_section, elf32_tic6x_allocate_dynrelocs, elf32_tic6x_size_dynamic_sections, elf32_tic6x_always_size_sections, elf32_tic6x_modify_program_headers, elf32_tic6x_finish_dynamic_sections, elf32_tic6x_plt_sym_val, elf32_tic6x_copy_private_data, elf32_tic6x_link_omit_section_dynsym): New static functions. (ELF_MAXPAGESIZE): Define to 0x1000. (bfd_elf32_bfd_copy_private_bfd_data, bfd_elf32_bfd_link_hash_table_create, bfd_elf32_bfd_link_hash_table_free, elf_backend_can_refcount, elf_backend_want_got_plt, elf_backend_want_dynbss, elf_backend_plt_readonly, elf_backend_got_header_size, elf_backend_gc_sweep_hook, elf_backend_modify_program_headers, elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol, elf_backend_check_relocs, elf_backend_add_symbol_hook, elf_backend_symbol_processing, elf_backend_link_output_symbol_hook, elf_backend_section_from_bfd_section, elf_backend_finish_dynamic_symbol, elf_backend_always_size_sections, elf32_tic6x_size_dynamic_sections, elf_backend_finish_dynamic_sections, elf_backend_omit_section_dynsym, elf_backend_plt_sym_val): Define. * bfd/reloc.c (BFD_RELOC_C6000_JUMP_SLOT, BFD_RELOC_C6000_EHTYPE, BFD_RELOC_C6000_PCR_H16, BFD_RELOC_C6000_PCR_S16): Add. * bfd/bfd-in2.h: Regenerate. * bfd/libbfd.h: Regenerate. * config.bfd: Accept tic6x-*-* instead of tic6x-*-elf. gas/ * config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New static variables. (md_begin): Initialize them. (s_tic6x_scomm): New static function. (md_pseudo_table): Add "scomm". (tc_gen_reloc): Really undo all adjustments made by bfd_install_relocation. * doc/c-tic6x.texi: Document the .scomm directive. gas/testsuite/ * gas/tic6x/scomm-directive-1.s: New test. * gas/tic6x/scomm-directive-1.d: New test. * gas/tic6x/scomm-directive-2.s: New test. * gas/tic6x/scomm-directive-2.d: New test. * gas/tic6x/scomm-directive-3.s: New test. * gas/tic6x/scomm-directive-3.d: New test. * gas/tic6x/scomm-directive-4.s: New test. * gas/tic6x/scomm-directive-4.d: New test. * gas/tic6x/scomm-directive-5.s: New test. * gas/tic6x/scomm-directive-5.d: New test. * gas/tic6x/scomm-directive-6.s: New test. * gas/tic6x/scomm-directive-6.d: New test. * gas/tic6x/scomm-directive-7.s: New test. * gas/tic6x/scomm-directive-7.d: New test. * gas/tic6x/scomm-directive-8.s: New test. * gas/tic6x/scomm-directive-8.d: New test. ld/ * emulparams/elf32_tic6x_le.sh (BIG_OUTPUT_FORMAT, EXTRA_EM_FILE, GENERATE_SHLIB_SCRIPT): New defines. (TEXT_START_ADDR): Define differently depending on target. (.got): Redefine to include "*(.dsbt)". (SDATA_START_SYMBOLS): Remove, replace with (OTHER_GOT_SYMBOLS): New. (OTHER_BSS_SECTIONS): Define only for ELF targets. * emultempl/tic6xdsbt.em: New file. * gen-doc.texi: Set C6X. * ld.texinfo: Likewise. (Options specific to C6X uClinux targets): New section. binutils/ * readelf.c (get_symbol_index_type): Handle SCOM for TIC6X. (dump_relocations): Likewise. binutils/testsuite/ * lib/binutils-common.exp (is_elf_format): Accept tic6x*-*-uclinux*. ld/testsuite/ * ld-scripts/crossref.exp: Add CFLAGS for tic6x*-*-*. * ld-elf/sec-to-seg.exp: Remove tic6x from list of targets defining pagesize to 1. * ld-tic6x/tic6x.exp: Add support for DSBT shared library/executable linking tests. * ld-tic6x/dsbt.ld: New linker script. * ld-tic6x/dsbt-be.ld: New linker script. * ld-tic6x/dsbt-overflow.ld: New linker script. * ld-tic6x/dsbt-inrange.ld: New linker script. * ld-tic6x/shlib-1.s: New test. * ld-tic6x/shlib-2.s: New test. * ld-tic6x/shlib-app-1r.s: New test. * ld-tic6x/shlib-app-1.s: New test. * ld-tic6x/shlib-1.sd: New test. * ld-tic6x/shlib-1.dd: New test. * ld-tic6x/shlib-app-1.rd: New test. * ld-tic6x/shlib-app-1rb.rd: New test. * ld-tic6x/shlib-app-1.sd: New test. * ld-tic6x/static-app-1rb.od: New test. * ld-tic6x/shlib-app-1.dd: New test. * ld-tic6x/shlib-app-1rb.sd: New test. * ld-tic6x/static-app-1b.od: New test. * ld-tic6x/static-app-1r.od: New test. * ld-tic6x/shlib-1rb.rd: New test. * ld-tic6x/shlib-app-1rb.dd: New test. * ld-tic6x/shlib-1rb.sd: New test. * ld-tic6x/shlib-1rb.dd: New test. * ld-tic6x/shlib-app-1b.od: New test. * ld-tic6x/tic6x.exp: New test. * ld-tic6x/static-app-1rb.rd: New test. * ld-tic6x/shlib-app-1r.od: New test. * ld-tic6x/static-app-1.od: New test. * ld-tic6x/static-app-1b.rd: New test. * ld-tic6x/static-app-1r.rd: New test. * ld-tic6x/static-app-1rb.sd: New test. * ld-tic6x/static-app-1b.sd: New test. * ld-tic6x/static-app-1rb.dd: New test. * ld-tic6x/static-app-1r.sd: New test. * ld-tic6x/static-app-1b.dd: New test. * ld-tic6x/shlib-1b.rd: New test. * ld-tic6x/static-app-1r.dd: New test. * ld-tic6x/shlib-app-1b.rd: New test. * ld-tic6x/shlib-1r.rd: New test. * ld-tic6x/shlib-app-1r.rd: New test. * ld-tic6x/shlib-1b.sd: New test. * ld-tic6x/static-app-1.rd: New test. * ld-tic6x/shlib-app-1b.sd: New test. * ld-tic6x/shlib-1r.sd: New test. * ld-tic6x/shlib-1b.dd: New test. * ld-tic6x/shlib-app-1r.sd: New test. * ld-tic6x/shlib-app-1b.dd: New test. * ld-tic6x/shlib-1r.dd: New test. * ld-tic6x/static-app-1.sd: New test. * ld-tic6x/shlib-app-1r.dd: New test. * ld-tic6x/static-app-1.dd: New test. * ld-tic6x/shlib-noindex.rd: New test. * ld-tic6x/shlib-noindex.dd: New test. * ld-tic6x/shlib-noindex.sd: New test. * ld-tic6x/got-reloc-local-1.s: New test. * ld-tic6x/got-reloc-local-2.s: New test. * ld-tic6x/got-reloc-local-r.d: New test. * ld-tic6x/got-reloc-global.s: New test. * ld-tic6x/got-reloc-global-addend-1.d: New test. * ld-tic6x/got-reloc-global-addend-1.s: New test. * ld-tic6x/got-reloc-global-addend-2.d: New test. * ld-tic6x/got-reloc-inrange.d: New test. * ld-tic6x/got-reloc-overflow.d: New test. * ld-tic6x/got-reloc-global-addend-2.s: New test. * ld-tic6x/dsbt-index-error.d: New test. * ld-tic6x/dsbt-index.d: New test. * ld-tic6x/dsbt-index.s: New test. * ld-tic6x/shlib-app-1.od: New test. * ld-tic6x/shlib-app-1rb.od: New test. * ld-tic6x/shlib-1.rd: New test. * ld-tic6x/weak.d: New test. * ld-tic6x/weak-be.d: New test. * ld-tic6x/weak.s: New test. * ld-tic6x/weak-data.d: New test. * ld-tic6x/common.d: New test. * ld-tic6x/common.ld: New test. * ld-tic6x/common.s: New test. |
||
Eric B. Weddington
|
8cc66334fa |
/bfd:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* archures.c: Add AVR XMEGA architecture information.
* cpu-avr.c (arch_info_struct): Likewise.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
(elf32_avr_object_p): Likewise.
/gas:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
(AVR_INSN): Change definition to match.
(avr_opcodes): Likewise, change to match.
(mcu_types): Add XMEGA architecture names and new XMEGA device names.
(md_show_usage): Add XMEGA architecture names.
(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
Add support for SPM Z+ instruction.
* doc/c-avr.texi: Add documentation for XMEGA architectures and
devices.
/include/opcode:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
New instruction set flags.
(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
/ld:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
(eavrxmega?.c): Likewise.
* configure.tgt (targ_extra_emuls): Likewise.
* emulparams/avrxmega1.sh: New file.
* emulparams/avrxmega2.sh: Likewise.
* emulparams/avrxmega3.sh: Likewise.
* emulparams/avrxmega4.sh: Likewise.
* emulparams/avrxmega5.sh: Likewise.
* emulparams/avrxmega6.sh: Likewise.
* emulparams/avrxmega7.sh: Likewise.
* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
Add avrxmega6, avrxmega7 to list of architectures for no stubs.
/opcodes:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
post-increment to support LPM Z+ instruction. Add support for 'E'
constraint for DES instruction.
(print_insn_avr): Adjust calls to avr_operand. Rename variable.
|
||
Dave Anglin
|
ae97b9228d |
PR ld/12376
emulparams/hppalinux.sh (DATA_ADDR): Define. (SHLIB_DATA_ADDR): Likewise. |
||
|
H.J. Lu
|
73f2a3d2e9 |
Change x32 LIBPATH_SUFFIX to x32.
2011-02-16 H.J. Lu <hongjiu.lu@intel.com> * emulparams/elf32_x86_64.sh (LIBPATH_SUFFIX): Changed to x32 for x32. |
||
|
Alan Modra
|
e922bcabdf |
* ldmain.c (main): Flush stdout before and stderr after printing
message. * ldmisc.c (einfo): Similarly. * plugin.c (message): Likewise. * emultempl/ppc64elf.em: Likewise. * emultempl/xtensaelf.em: Likewise. * emulparams/elf32mcore.sh: Use einfo rather than printf. * emultempl/beos.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. |
||
Richard Sandiford
|
aeffff6722 |
bfd/
2010-12-23 Robert Millan <rmh@gnu.org> * config.bfd: Recognize mips-freebsd and mips-kfreebsd-gnu. * configure.host: Likewise. * configure.in: Support for `bfd_elf32_ntradbigmips_freebsd_vec', `bfd_elf32_ntradlittlemips_freebsd_vec', `bfd_elf32_tradbigmips_freebsd_vec', `bfd_elf32_tradlittlemips_freebsd_vec', `bfd_elf64_tradbigmips_freebsd_vec' and `bfd_elf64_tradlittlemips_freebsd_vec'. * configure: Regenerate. * elf32-mips.c: New target for FreeBSD support (same as traditional MIPS but overrides ELF_OSABI with ELFOSABI_FREEBSD). * elf64-mips.c: Likewise. * elfn32-mips.c: Likewise. * targets.c (_bfd_target_vector): Add `bfd_elf32_ntradbigmips_freebsd_vec', `bfd_elf32_ntradlittlemips_freebsd_vec', `bfd_elf32_tradbigmips_freebsd_vec', `bfd_elf32_tradlittlemips_freebsd_vec', `bfd_elf64_tradbigmips_freebsd_vec' and `bfd_elf64_tradlittlemips_freebsd_vec'. ld/ 2010-12-14 Robert Millan <rmh@gnu.org> * configure.tgt: Recognize mips-freebsd and mips-kfreebsd-gnu. * emulparams/elf32btsmip_fbsd.sh: New file. * emulparams/elf32btsmipn32_fbsd.sh: Likewise. * emulparams/elf32ltsmip_fbsd.sh: Likewise. * emulparams/elf32ltsmipn32_fbsd.sh: Likewise. * emulparams/elf64btsmip_fbsd.sh: Likewise. * emulparams/elf64ltsmip_fbsd.sh: Likewise. * Makefile.am: Add build rules for `eelf32btsmip_fbsd.c', `eelf32btsmipn32_fbsd.c', `eelf32ltsmip_fbsd.c', `eelf32ltsmipn32_fbsd.c', `eelf64btsmip_fbsd.c' and `eelf64ltsmip_fbsd.c'. * Makefile.in: Regenerate. gas/ 2010-12-19 Robert Millan <rmh@gnu.org> Richard Sandiford <rdsandiford@googlemail.com> * config/tc-mips.c (ELF_TARGET): New macro. Generates target names accordingly to whether TE_FreeBSD and whether TE_TMIPS are defined. (mips_target_format): Refactor code using ELF_TARGET(). (support_64bit_objects): Likewise. * configure.in: Recognize mips-freebsd and mips-kfreebsd-gnu. * configure.tgt: Likewise. * configure: Regenerate. binutils/testsuite/ * binutils-all/readelf.exp: Handle MIPS FreeBSD targets. gas/testsuite/ * gas/mips/e32el-rel2.d: Accept any file format. * gas/mips/elf-rel.d: Likewise. * gas/mips/elf-rel2.d: Likewise. * gas/mips/elf-rel3.d: Likewise. * gas/mips/elfel-rel.d: Likewise. * gas/mips/elfel-rel2.d: Likewise. * gas/mips/elfel-rel3.d: Likewise. * gas/mips/ldstla-32-mips3-shared.d: Likewise. * gas/mips/ldstla-32-mips3.d: Likewise. * gas/mips/ldstla-32-shared.d: Likewise. * gas/mips/ldstla-32.d: Likewise. * gas/mips/ldstla-n64-shared.d: Likewise. * gas/mips/ldstla-n64.d: Likewise. * gas/mips/noat-1.d: Likewise. * gas/mips/set-arch.d: Likewise. * gas/mips/tls-o32.d: Likewise. ld/testsuite/ * ld-mips-elf/mips-elf-flags.exp: Handle FreeBSD targets. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mips-elf/mips16-call-global.d: Accept any file format. * ld-mips-elf/mips16-intermix.d: Likewise. |
||
|
H.J. Lu
|
351f65ca26 |
Add x86-64 ILP32 support.
bfd/ 2010-12-30 H.J. Lu <hongjiu.lu@intel.com> * archures.c (bfd_mach_x64_32): New. (bfd_mach_x64_32_intel_syntax): Likewise. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf32_x86_64_vec for i[3-7]86-*-linux-*. (targ_selvecs): Add bfd_elf32_x86_64_vec for x86_64-*-linux-*. * configure.in: Support bfd_elf32_x86_64_vec. * configure: Regenerated. * cpu-i386.c (bfd_x64_32_arch_intel_syntax): New. (bfd_x64_32_arch): Likewise. * elf-bfd.h (elf_append_rela): New prototype. (elf_append_rel): Likewise. (elf64_r_info): Likewise. (elf32_r_info): Likewise. (elf64_r_sym): Likewise. (elf32_r_sym): Likewise. * elf64-x86-64.c (ABI_64_P): New. (elf_x86_64_info_to_howto): Replace ELF64_R_TYPE with ELF32_R_TYPE. Replace ELF64_ST_TYPE with ELF_ST_TYPE. (elf_x86_64_check_tls_transition):Likewise. (elf_x86_64_check_relocs): Likewise. (elf_x86_64_gc_mark_hook):Likewise. (elf_x86_64_gc_sweep_hook): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_reloc_type_class): Likewise. (ELF_DYNAMIC_INTERPRETER): Renamed to ... (ELF64_DYNAMIC_INTERPRETER): This. (ELF32_DYNAMIC_INTERPRETER): New. (elf_x86_64_link_hash_table): Add r_info, r_sym, swap_reloca_out, dynamic_interpreter and dynamic_interpreter_size. (elf_x86_64_get_local_sym_hash): Replace ELF64_R_SYM with htab->r_sym. Replace ELF64_R_INFO with htab->r_info. (elf_x86_64_get_local_sym_hash): Likewise. (elf_x86_64_check_tls_transition):Likewise. (elf_x86_64_check_relocs): Likewise. (elf_x86_64_gc_mark_hook):Likewise. (elf_x86_64_gc_sweep_hook): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_finish_dynamic_symbol): Likewise. (elf_x86_64_finish_local_dynamic_symbol): Likewise. (elf_x86_64_link_hash_table_create): Initialize r_info, r_sym, swap_reloca_out, dynamic_interpreter and dynamic_interpreter_size. (elf_x86_64_check_relocs): Check ABI_64_P when requesting for PIC. (elf_x86_64_relocate_section): Likewise. (elf64_x86_64_adjust_dynamic_symbol): Replace sizeof (Elf64_External_Rela) with bed->s->sizeof_rela. (elf64_x86_64_allocate_dynrelocs): Likewise. (elf64_x86_64_size_dynamic_sections): Likewise. (elf64_x86_64_finish_dynamic_symbol): Likewise. (elf64_x86_64_append_rela): Removed. (elf32_x86_64_elf_object_p): New. Add bfd_elf32_x86_64_vec. * elf64-x86-64.c (elf64_x86_64_xxx): Renamed to ... (elf_x86_64_xxx): This. * elflink.c (bfd_elf_final_link): Check ELF file class on error. (elf_append_rela): New. (elf_append_rel): Likewise. (elf64_r_info): Likewise. (elf32_r_info): Likewise. (elf64_r_sym): Likewise. (elf32_r_sym): Likewise. * targets.c (bfd_elf32_x86_64_vec): New. (_bfd_target_vector): Add bfd_elf32_x86_64_vec. gas/ 2010-12-30 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (x86_elf_abi): New. (i386_mach): Return bfd_mach_x64_32 for ILP32. (OPTION_N32): Likewise. (md_longopts): Add "n32" for ELF. (md_parse_option): Handle OPTION_N32. (md_show_usage): Add --n32. (i386_target_format): Update and check x86_elf_abi. * config/tc-i386.h (ELF_TARGET_FORMAT32): New. * doc/as.texinfo: Document --n32. * doc/c-i386.texi: Likewise. gas/testsuite/ 2010-12-30 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/lns/ilp32.exp: New. * gas/i386/ilp32/lns/lns-common-1.d: Likewise. * gas/i386/ilp32/lns/lns-duplicate.d: Likewise. * gas/i386/ilp32/cfi/cfi-common-1.d: New. * gas/i386/ilp32/cfi/cfi-common-2.d: Likewise. * gas/i386/ilp32/cfi/cfi-common-3.d: Likewise. * gas/i386/ilp32/cfi/cfi-common-4.d: Likewise. * gas/i386/ilp32/cfi/cfi-common-5.d: Likewise. * gas/i386/ilp32/cfi/cfi-common-6.d: Likewise. * gas/i386/ilp32/cfi/cfi-common-7.d: Likewise. * gas/i386/ilp32/cfi/cfi-x86_64.d: Likewise. * gas/i386/ilp32/cfi/ilp32.exp: Likewise. * gas/i386/ilp32/elf/ehopt0.d: Likewise. * gas/i386/ilp32/elf/equ-reloc.d: Likewise. * gas/i386/ilp32/elf/file.d: Likewise. * gas/i386/ilp32/elf/group0a.d: Likewise. * gas/i386/ilp32/elf/group0b.d: Likewise. * gas/i386/ilp32/elf/group1a.d: Likewise. * gas/i386/ilp32/elf/group1b.d: Likewise. * gas/i386/ilp32/elf/ifunc-1.d: Likewise. * gas/i386/ilp32/elf/ilp32.exp: Likewise. * gas/i386/ilp32/elf/redef.d: Likewise. * gas/i386/ilp32/elf/section0.d: Likewise. * gas/i386/ilp32/elf/section1.d: Likewise. * gas/i386/ilp32/elf/section3.d: Likewise. * gas/i386/ilp32/elf/section4.d: Likewise. * gas/i386/ilp32/elf/section6.d: Likewise. * gas/i386/ilp32/elf/section7.d: Likewise. * gas/i386/ilp32/elf/struct.d: Likewise. * gas/i386/ilp32/elf/symtab.d: Likewise. * gas/i386/ilp32/elf/symver.d: Likewise. * gas/i386/ilp32/ilp32.exp: New. * gas/i386/ilp32/immed64.d: Likewise. * gas/i386/ilp32/mixed-mode-reloc64.d: Likewise. * gas/i386/ilp32/reloc64.d: Likewise. * gas/i386/ilp32/rex.d: Likewise. * gas/i386/ilp32/rexw.d: Likewise. * gas/i386/ilp32/svme64.d: Likewise. * gas/i386/ilp32/x86-64-addr32.d: Likewise. * gas/i386/ilp32/x86-64-addr32-intel.d: Likewise. * gas/i386/ilp32/x86-64-aes.d: Likewise. * gas/i386/ilp32/x86-64-aes-intel.d: Likewise. * gas/i386/ilp32/x86-64-amdfam10.d: Likewise. * gas/i386/ilp32/x86-64-arch-1.d: Likewise. * gas/i386/ilp32/x86-64-arch-2.d: Likewise. * gas/i386/ilp32/x86-64-avx.d: Likewise. * gas/i386/ilp32/x86-64-avx-intel.d: Likewise. * gas/i386/ilp32/x86-64-avx-swap.d: Likewise. * gas/i386/ilp32/x86-64-avx-swap-intel.d: Likewise. * gas/i386/ilp32/x86-64-branch.d: Likewise. * gas/i386/ilp32/x86-64-cbw.d: Likewise. * gas/i386/ilp32/x86-64-cbw-intel.d: Likewise. * gas/i386/ilp32/x86-64-clmul.d: Likewise. * gas/i386/ilp32/x86-64-clmul-intel.d: Likewise. * gas/i386/ilp32/x86-64-crc32.d: Likewise. * gas/i386/ilp32/x86-64-crc32-intel.d: Likewise. * gas/i386/ilp32/x86-64-crx.d: Likewise. * gas/i386/ilp32/x86-64-crx-suffix.d: Likewise. * gas/i386/ilp32/x86-64.d: Likewise. * gas/i386/ilp32/x86-64-disp.d: Likewise. * gas/i386/ilp32/x86-64-disp-intel.d: Likewise. * gas/i386/ilp32/x86-64-drx.d: Likewise. * gas/i386/ilp32/x86-64-drx-suffix.d: Likewise. * gas/i386/ilp32/x86-64-ept.d: Likewise. * gas/i386/ilp32/x86-64-ept-intel.d: Likewise. * gas/i386/ilp32/x86-64-fma4.d: Likewise. * gas/i386/ilp32/x86-64-fma.d: Likewise. * gas/i386/ilp32/x86-64-fma-intel.d: Likewise. * gas/i386/ilp32/x86-64-gidt.d: Likewise. * gas/i386/ilp32/x86-64-ifunc.d: Likewise. * gas/i386/ilp32/x86-64-intel64.d: Likewise. * gas/i386/ilp32/x86-64-io.d: Likewise. * gas/i386/ilp32/x86-64-io-intel.d: Likewise. * gas/i386/ilp32/x86-64-io-suffix.d: Likewise. * gas/i386/ilp32/x86-64-localpic.d: Likewise. * gas/i386/ilp32/x86-64-mem.d: Likewise. * gas/i386/ilp32/x86-64-mem-intel.d: Likewise. * gas/i386/ilp32/x86-64-movbe.d: Likewise. * gas/i386/ilp32/x86-64-movbe-intel.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise. * gas/i386/ilp32/x86-64-nops-1.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-pentium.d: Likewise. * gas/i386/ilp32/x86-64-nops-2.d: Likewise. * gas/i386/ilp32/x86-64-nops-3.d: Likewise. * gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise. * gas/i386/ilp32/x86-64-nops-4.d: Likewise. * gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops-5.d: Likewise. * gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops.d: Likewise. * gas/i386/ilp32/x86-64-opcode.d: Likewise. * gas/i386/ilp32/x86-64-opcode-inval.d: Likewise. * gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise. * gas/i386/ilp32/x86-64-opts.d: Likewise. * gas/i386/ilp32/x86-64-opts-intel.d: Likewise. * gas/i386/ilp32/x86-64-pcrel.d: Likewise. * gas/i386/ilp32/x86-64-reg.d: Likewise. * gas/i386/ilp32/x86-64-reg-intel.d: Likewise. * gas/i386/ilp32/x86-64-rep.d: Likewise. * gas/i386/ilp32/x86-64-rep-suffix.d: Likewise. * gas/i386/ilp32/x86-64-rip.d: Likewise. * gas/i386/ilp32/x86-64-rip-intel.d: Likewise. * gas/i386/ilp32/x86-64-sib.d: Likewise. * gas/i386/ilp32/x86-64-sib-intel.d: Likewise. * gas/i386/ilp32/x86-64-simd.d: Likewise. * gas/i386/ilp32/x86-64-simd-intel.d: Likewise. * gas/i386/ilp32/x86-64-simd-suffix.d: Likewise. * gas/i386/ilp32/x86-64-sse2avx.d: Likewise. * gas/i386/ilp32/x86-64-sse2avx-opts.d: Likewise. * gas/i386/ilp32/x86-64-sse2avx-opts-intel.d: Likewise. * gas/i386/ilp32/x86-64-sse3.d: Likewise. * gas/i386/ilp32/x86-64-sse4_1.d: Likewise. * gas/i386/ilp32/x86-64-sse4_1-intel.d: Likewise. * gas/i386/ilp32/x86-64-sse4_2.d: Likewise. * gas/i386/ilp32/x86-64-sse4_2-intel.d: Likewise. * gas/i386/ilp32/x86-64-sse-check.d: Likewise. * gas/i386/ilp32/x86-64-sse-check-none.d: Likewise. * gas/i386/ilp32/x86-64-sse-check-warn.d: Likewise. * gas/i386/ilp32/x86-64-sse-noavx.d: Likewise. * gas/i386/ilp32/x86-64-ssse3.d: Likewise. * gas/i386/ilp32/x86-64-stack.d: Likewise. * gas/i386/ilp32/x86-64-stack-intel.d: Likewise. * gas/i386/ilp32/x86-64-stack-suffix.d: Likewise. * gas/i386/ilp32/x86-64-unwind.d: Likewise. * gas/i386/ilp32/x86-64-vmx.d: Likewise. * gas/i386/ilp32/x86-64-xsave.d: Likewise. * gas/i386/ilp32/x86-64-xsave-intel.d: Likewise. ld/ 2010-12-30 H.J. Lu <hongjiu.lu@intel.com> * emulparams/elf32_x86_64.sh: New. * configure.tgt (targ64_extra_emuls): Add elf32_x86_64 for i[3-7]86-*-linux-*. (targ_extra_libpath): Likewise. (targ_extra_emuls): Add elf32_x86_64 for x86_64-*-linux-*. (targ_extra_libpath): Likewise. * Makefile.am (ALL_64_EMULATION_SOURCES): Add eelf32_x86_64.c. (eelf32_x86_64.c): New. * Makefile.in: Regenerated. opcodes/ 2010-12-30 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (print_insn): Support bfd_mach_x64_32 and bfd_mach_x64_32_intel_syntax. |
||
Mike Frysinger
|
781303cee5 |
blackfin: add support for L1 code/data flags
Add new linker options for marking programs to load into L1 memory at runtime. This needs new EF flag bits, so declare them. Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> |
||
Rainer Orth
|
1360ba7676 |
ld:
* emulparams/elf32_sparc_sol2.sh (OUTPUT_FORMAT): Set to elf32-sparc-sol2. * emulparams/elf64_sparc_sol2.sh (OUTPUT_FORMAT): Set to elf64-sparc-sol2. gas: * config/tc-sparc.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define as elf32-sparc-sol2. (ELF64_TARGET_FORMAT): Define as elf64-sparc-sol2. bfd: * elfxx-sparc.c (tpoff): Define bed, static_tls_size. Consider static_tls_alignment. * elf32-sparc.c (TARGET_BIG_SYM): Redefine to bfd_elf32_sparc_sol2_vec. (TARGET_BIG_NAME): Redefine to elf32-sparc-sol2. (elf32_bed): Redefine to elf32_sparc_sol2_bed. (elf_backend_static_tls_alignment): Redefine to 8. Include elf32-target.h. (elf_backend_static_tls_alignment): Undef again for VxWorks. * elf64-sparc.c (TARGET_BIG_SYM): Redefine to bfd_elf64_sparc_sol2_vec. (TARGET_BIG_NAME): Redefine to elf64-sparc-sol2. (ELF_OSABI): Undef. (elf64_bed): Redefine to elf64_sparc_sol2_bed. (elf_backend_static_tls_alignment): Redefine to 16. Include elf64-target.h. * config.bfd (sparc-*-solaris2.[0-6]): Split from sparc-*-elf*. Set targ_defvec to bfd_elf32_sparc_sol2_vec. [BFD64] (sparc-*-solaris2*): Set targ_defvec to bfd_elf32_sparc_sol2_vec. Replace bfd_elf64_sparc_vec by bfd_elf64_sparc_sol2_vec in targ_selvecs. * configure.in: Handle bfd_elf32_sparc_sol2_vec, bfd_elf64_sparc_sol2_vec. * configure: Regenerate. * targets.c (bfd_elf32_sparc_sol2_vec): Declare. (bfd_elf64_sparc_sol2_vec): Declare. (_bfd_target_vector): Add bfd_elf32_sparc_sol2_vec, bfd_elf64_sparc_sol2_vec. |
||
|
Joseph Myers
|
75fa6dc1e8 |
bfd:
* elf32-tic6x.c (elf32_tic6x_merge_arch_attributes): Update for attribute renaming. (elf_backend_obj_attrs_section): Change to ".c6xabi.attributes". binutils: * readelf.c (display_tic6x_attribute): Update for attribute renaming. gas: * config/tc-tic6x.c (tic6x_arch_attribute, tic6x_arches, md_assemble, tic6x_set_attributes): Update for attribute renaming. * doc/c-tic6x.texi: Update for attribute renaming. gas/testsuite: * gas/tic6x/attr-arch-directive-1.d, gas/tic6x/attr-arch-directive-2.d, gas/tic6x/attr-arch-directive-3.d, gas/tic6x/attr-arch-directive-4.d, gas/tic6x/attr-arch-directive-4.s, gas/tic6x/attr-arch-directive-5.d, gas/tic6x/attr-arch-directive-5.s, gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d, gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d, gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d, gas/tic6x/attr-arch-opts-none-1.d, gas/tic6x/attr-arch-opts-none-2.d, gas/tic6x/attr-arch-opts-override-1.d, gas/tic6x/attr-arch-opts-override-2.d: Update for attribute renaming and renumbering. include/elf: * tic6x-attrs.h (Tag_C6XABI_Tag_CPU_arch): Change to Tag_ISA, value 4. * tic6x.h (Values for Tag_C6XABI_Tag_CPU_arch): Rename for attribute renaming. ld: * emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Use .c6xabi.attributes, not __TI_build_attributes. ld/testsuite: * ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d, ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d, ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d, ld-tic6x/attr-arch-c64x+-c62x.d, ld-tic6x/attr-arch-c64x+-c64x+.d, ld-tic6x/attr-arch-c64x+-c64x.d, ld-tic6x/attr-arch-c64x+-c674x.d, ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d, ld-tic6x/attr-arch-c64x-c62x.d, ld-tic6x/attr-arch-c64x-c64x+.d, ld-tic6x/attr-arch-c64x-c64x.d, ld-tic6x/attr-arch-c64x-c674x.d, ld-tic6x/attr-arch-c64x-c67x+.d, ld-tic6x/attr-arch-c64x-c67x.d, ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d, ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d, ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d, ld-tic6x/attr-arch-c67x+-c62x.d, ld-tic6x/attr-arch-c67x+-c64x+.d, ld-tic6x/attr-arch-c67x+-c64x.d, ld-tic6x/attr-arch-c67x+-c674x.d, ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d, ld-tic6x/attr-arch-c67x-c62x.d, ld-tic6x/attr-arch-c67x-c64x+.d, ld-tic6x/attr-arch-c67x-c64x.d, ld-tic6x/attr-arch-c67x-c674x.d, ld-tic6x/attr-arch-c67x-c67x+.d, ld-tic6x/attr-arch-c67x-c67x.d: Update for attribute renaming. |
||
|
Rainer Orth
|
18a1a992e0 |
* emultempl/solaris2.em (elf_solaris2_before_allocation): Renamed
basever_syms to global_syms. Emit global_syms into .dynamic section for all executables and shared objects. (elf_solaris2_after_allocation): New function. (LDEMUL_AFTER_ALLOCATION): Use it. * emulparams/solaris2.sh: New file. * emulparams/elf32_sparc_sol2.sh: Use it. * emulparams/elf64_sparc_sol2.sh: Likewise. * emulparams/elf_i386_sol2.sh: Likewise. * emulparams/elf_x86_64_sol2.sh: Likewise. * Makefile.am (eelf32_sparc_sol2.c): Depend on $(srcdir)/emulparams/solaris2.sh. (eelf64_sparc_sol2.c): Likewise. (eelf_x86_64_sol2.c): Likewise. (eelf_i386_sol2.c): Likewise. * Makefile.in: Regenerate. |
||
David S. Miller
|
d9b807ab58 | * emulparams/elf32_sparc.sh: Set NOP to 0x01000000 | ||
|
Alan Modra
|
360cfc9c8b | remove maxq-coff port | ||
|
Joseph Myers
|
59e6276b64 |
bfd:
* elf-bfd.h (LEAST_KNOWN_OBJ_ATTRIBUTE): Decrease to 2. * elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type, elf32_tic6x_merge_arch_attributes, elf32_tic6x_merge_attributes, elf32_tic6x_merge_private_bfd_data): New. (bfd_elf32_bfd_merge_private_bfd_data, elf_backend_obj_attrs_arg_type, elf_backend_obj_attrs_section, elf_backend_obj_attrs_section_type, elf_backend_obj_attrs_vendor): Define. * elf32-tic6x.h (elf32_tic6x_merge_arch_attributes): Declare. binutils: * readelf.c (display_tic6x_attribute, process_tic6x_specific): New. (process_arch_specific): Call process_tic6x_specific for EM_TI_C6000. gas: * config/tc-tic6x.c: Include elf/tic6x.h. (tic6x_arch_attribute, tic6x_seen_insns): New. (tic6x_arch_table, tic6x_arches): Add attribute values. (tic6x_use_arch): Handle attribute settings. (tic6x_attributes_set_explicitly, s_tic6x_c6xabi_attribute, tic6x_attribute_table, tic6x_attributes, tic6x_convert_symbolic_attribute): New. (md_pseudo_table): Add c6xabi_attribute. (md_assemble): Set tic6x_seen_insns and tic6x_arch_attribute. (tic6x_set_attribute_int, tic6x_set_attributes): New. (tic6x_end): Call tic6x_set_attributes. * config/tc-tic6x.h (CONVERT_SYMBOLIC_ATTRIBUTE): Define. (tic6x_convert_symbolic_attribute): Declare. gas/testsuite: * gas/elf/elf.exp: Set target_machine for tic6x-*-*. * gas/elf/section2.e-tic6x, gas/tic6x/attr-arch-directive-1.d, gas/tic6x/attr-arch-directive-1.s, gas/tic6x/attr-arch-directive-2.d, gas/tic6x/attr-arch-directive-2.s, gas/tic6x/attr-arch-directive-3.d, gas/tic6x/attr-arch-directive-3.s, gas/tic6x/attr-arch-directive-4.d, gas/tic6x/attr-arch-directive-4.s, gas/tic6x/attr-arch-directive-5.d, gas/tic6x/attr-arch-directive-5.s, gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d, gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d, gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d, gas/tic6x/attr-arch-opts-none-1.d, gas/tic6x/attr-arch-opts-none-2.d, gas/tic6x/attr-arch-opts-override-1.d, gas/tic6x/attr-arch-opts-override-2.d, gas/tic6x/empty.s: New. include/elf: * tic6x-attrs.h: New. * tic6x.h: Include elf/tic6x-attrs.h for attribute table. (C6XABI_Tag_CPU_arch_none, C6XABI_Tag_CPU_arch_C62X, C6XABI_Tag_CPU_arch_C67X, C6XABI_Tag_CPU_arch_C67XP, C6XABI_Tag_CPU_arch_C64X, C6XABI_Tag_CPU_arch_C64XP, C6XABI_Tag_CPU_arch_C674X): Define. ld: * emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Define. ld/testsuite: * ld-elf/orphan3.d: Allow section names starting '_'. * ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d, ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d, ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d, ld-tic6x/attr-arch-c62x.s, ld-tic6x/attr-arch-c64x+-c62x.d, ld-tic6x/attr-arch-c64x+-c64x+.d, ld-tic6x/attr-arch-c64x+-c64x.d, ld-tic6x/attr-arch-c64x+-c674x.d, ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d, ld-tic6x/attr-arch-c64x+.s, ld-tic6x/attr-arch-c64x-c62x.d, ld-tic6x/attr-arch-c64x-c64x+.d, ld-tic6x/attr-arch-c64x-c64x.d, ld-tic6x/attr-arch-c64x-c674x.d, ld-tic6x/attr-arch-c64x-c67x+.d, ld-tic6x/attr-arch-c64x-c67x.d, ld-tic6x/attr-arch-c64x.s, ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d, ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d, ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d, ld-tic6x/attr-arch-c674x.s, ld-tic6x/attr-arch-c67x+-c62x.d, ld-tic6x/attr-arch-c67x+-c64x+.d, ld-tic6x/attr-arch-c67x+-c64x.d, ld-tic6x/attr-arch-c67x+-c674x.d, ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d, ld-tic6x/attr-arch-c67x+.s, ld-tic6x/attr-arch-c67x-c62x.d, ld-tic6x/attr-arch-c67x-c64x+.d, ld-tic6x/attr-arch-c67x-c64x.d, ld-tic6x/attr-arch-c67x-c674x.d, ld-tic6x/attr-arch-c67x-c67x+.d, ld-tic6x/attr-arch-c67x-c67x.d, ld-tic6x/attr-arch-c67x.s: New. |
||
|
Bernd Schmidt
|
11dd4e37b4 | * emulparams/elf32_tic6x_le.sh (OTHER_BSS_SECTIONS): New. | ||
|
Nick Clifton
|
8e45593ff3 |
2010-05-21 Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Andrew Stubbs <ams@codesourcery.com>
bfd/
* config.bfd (sh-*-uclinux* | sh[12]-*-uclinux*): Add
bfd_elf32_shl_vec, and FDPIC vectors to targ_selvecs.
* configure.in: Handle FDPIC vectors.
* elf32-sh-relocs.h: Add FDPIC and movi20 relocations.
* elf32-sh.c (DEFAULT_STACK_SIZE): Define.
(SYMBOL_FUNCDESC_LOCAL): Define. Use it instead of
SYMBOL_REFERENCES_LOCAL for function descriptors.
(fdpic_object_p): New.
(sh_reloc_map): Add FDPIC and movi20 relocations.
(sh_elf_info_to_howto, sh_elf_relocate_section): Handle new invalid
range.
(struct elf_sh_plt_info): Add got20 and short_plt. Update all
definitions.
(FDPIC_PLT_ENTRY_SIZE, FDPIC_PLT_LAZY_OFFSET): Define.
(fdpic_sh_plt_entry_be, fdpic_sh_plt_entry_le, fdpic_sh_plts): New.
(FDPIC_SH2A_PLT_ENTRY_SIZE, FDPIC_SH2A_PLT_LAZY_OFFSET): Define.
(fdpic_sh2a_plt_entry_be, fdpic_sh2a_plt_entry_le)
(fdpic_sh2a_short_plt_be, fdpic_sh2a_short_plt_le, fdpic_sh2a_plts):
New.
(get_plt_info): Handle FDPIC.
(MAX_SHORT_PLT): Define.
(get_plt_index, get_plt_offset): Handle short_plt.
(union gotref): New.
(struct elf_sh_link_hash_entry): Add funcdesc, rename tls_type to
got_type and adjust all uses. Add GOT_FUNCDESC.
(struct sh_elf_obj_tdata): Add local_funcdesc. Rename
local_got_tls_type to local_got_type.
(sh_elf_local_got_type): Renamed from sh_elf_local_got_tls_type. All
users changed.
(sh_elf_local_funcdesc): Define.
(struct elf_sh_link_hash_table): Add sfuncdesc, srelfuncdesc, fdpic_p,
and srofixup.
(sh_elf_link_hash_newfunc): Initialize new fields.
(sh_elf_link_hash_table_create): Set fdpic_p.
(sh_elf_omit_section_dynsym): New.
(create_got_section): Create .got.funcdesc, .rela.got.funcdesc
and .rofixup.
(allocate_dynrelocs): Allocate local function descriptors and space
for R_SH_FUNCDESC-related relocations, and for rofixups.
Handle GOT_FUNCDESC. Create fixups. Handle GOT entries which
require function descriptors.
(sh_elf_always_size_sections): Handle PT_GNU_STACK and __stacksize.
(sh_elf_modify_program_headers): New.
(sh_elf_size_dynamic_sections): Allocate function descriptors for
local symbols. Allocate .got.funcdesc contents. Allocate rofixups.
Handle local GOT entries of type GOT_FUNCDESC. Create fixups for
local GOT entries. Ensure that FDPIC libraries always have a PLTGOT
entry in the .dynamic section.
(sh_elf_add_dyn_reloc, sh_elf_got_offset, sh_elf_initialize_funcdesc)
(sh_elf_add_rofixup, sh_elf_osec_to_segment)
(sh_elf_osec_readonly_p, install_movi20_field): New functions.
(sh_elf_relocate_section): Handle new relocations, R_SH_FUNCDESC,
R_SH_GOTFUNCDESC and R_SH_GOTOFFFUNCDESC. Use sh_elf_got_offset
and .got.plt throughout to find _GLOBAL_OFFSET_TABLE_. Add rofixup
read-only section warnings. Handle undefined weak symbols. Generate
fixups for R_SH_DIR32 and GOT entries. Check for cross-segment
relocations and clear EF_SH_PIC. Handle 20-bit relocations.
Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_gc_sweep_hook): Handle R_SH_FUNCDESC, R_SH_GOTOFF20,
R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20, and R_SH_GOTOFFFUNCDESC.
Handle 20-bit relocations.
(sh_elf_copy_indirect_symbol): Copy function descriptor reference
counts.
(sh_elf_check_relocs): Handle new relocations. Make symbols
dynamic for FDPIC relocs. Account for rofixups. Error for FDPIC
symbol mismatches. Allocate a GOT for R_SH_DIR32. Allocate fixups
for R_SH_DIR32.
(sh_elf_copy_private_data): Copy PT_GNU_STACK size.
(sh_elf_merge_private_data): Copy initial flags. Do not clobber
non-mach flags. Set EF_SH_PIC for FDPIC. Reject FDPIC mismatches.
(sh_elf_finish_dynamic_symbol): Do not handle got_funcdesc entries
here. Rename sgot to sgotplt and srel to srelplt. Handle short_plt,
FDPIC descriptors, and got20. Create R_SH_FUNCDESC_VALUE for FDPIC.
Use install_movi20_field. Rename srel to srelgot. Always generate
R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_finish_dynamic_sections): Fill in the GOT pointer in rofixup.
Do not fill in reserved GOT entries for FDPIC. Correct DT_PLTGOT.
Rename sgot to sgotplt. Assert that the right number of rofixups
and dynamic relocations were allocated.
(sh_elf_use_relative_eh_frame, sh_elf_encode_eh_address): New.
(elf_backend_omit_section_dynsym): Use sh_elf_omit_section_dynsym.
(elf_backend_can_make_relative_eh_frame)
(elf_backend_can_make_lsda_relative_eh_frame)
(elf_backend_encode_eh_address): Define.
(TARGET_BIG_SYM, TARGET_BIG_NAME, TARGET_LITTLE_SYM)
(TARGET_LITTLE_NAME, elf_backend_modify_program_headers, elf32_bed):
Redefine for FDPIC vector.
* reloc.c: Add SH FDPIC and movi20 relocations.
* targets.c (_bfd_target_vector): Add FDPIC vectors.
* configure, bfd-in2.h, libbfd.h: Regenerated.
binutils/
* readelf.c (get_machine_flags): Handle EF_SH_PIC and EF_SH_FDPIC.
gas/
* config/tc-sh.c (sh_fdpic): New.
(sh_check_fixup): Handle relocations on movi20.
(parse_exp): Do not reject PIC operators here.
(build_Mytes): Check for unhandled PIC operators here. Use
sh_check_fixup for movi20.
(enum options): Add OPTION_FDPIC.
(md_longopts, md_parse_option, md_show_usage): Add --fdpic.
(sh_fix_adjustable, md_apply_fix): Handle FDPIC and movi20 relocations.
(sh_elf_final_processing): Handle --fdpic.
(sh_uclinux_target_format): New.
(sh_parse_name): Handle FDPIC relocation operators.
* config/tc-sh.h (TARGET_FORMAT): Define specially for TE_UCLINUX.
(sh_uclinux_target_format): Declare for TE_UCLINUX.
* configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): Set
em=uclinux.
* doc/c-sh.texi (SH Options): Document --fdpic.
gas/testsuite/
* gas/sh/basic.exp: Run new tests. Handle uClinux like Linux.
* gas/sh/fdpic.d: New file.
* gas/sh/fdpic.s: New file.
* gas/sh/reg-prefix.d: Force big-endian.
* gas/sh/sh2a-pic.d: New file.
* gas/sh/sh2a-pic.s: New file.
* lib/gas-defs.exp (is_elf_format): Include sh*-*-uclinux*.
include/elf/
* sh.h (EF_SH_PIC, EF_SH_FDPIC): Define.
(R_SH_FIRST_INVALID_RELOC_6, R_SH_LAST_INVALID_RELOC_6): New. Adjust
other invalid ranges.
(R_SH_GOT20, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20)
(R_SH_GOTOFFFUNCDESC, R_SH_GOTOFFFUNCDESC20, R_SH_FUNCDESC)
(R_SH_FUNCDESC_VALUE): New.
ld/
* Makefile.am (ALL_EMULATIONS): Add eshelf_fd.o and eshlelf_fd.o.
(eshelf_fd.c, eshlelf_fd.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh-*-uclinux*): Add shelf_fd and shlelf_fd
emulations.
* emulparams/shelf_fd.sh: New file.
* emulparams/shlelf_fd.sh: New file.
* emulparams/shlelf_linux.sh: Update comment.
ld/testsuite/
* ld-sh/sh.exp: Handle uClinux like Linux.
* lib/ld-lib.exp (is_elf_format): Include sh*-*-uclinux*.
* ld-sh/fdpic-funcdesc-shared.d: New file.
* ld-sh/fdpic-funcdesc-shared.s: New file.
* ld-sh/fdpic-funcdesc-static.d: New file.
* ld-sh/fdpic-funcdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesc-shared.d: New file.
* ld-sh/fdpic-gotfuncdesc-shared.s: New file.
* ld-sh/fdpic-gotfuncdesc-static.d: New file.
* ld-sh/fdpic-gotfuncdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotfuncdesci20-static.d: New file.
* ld-sh/fdpic-gotfuncdesci20-static.s: New file.
* ld-sh/fdpic-goti20-shared.d: New file.
* ld-sh/fdpic-goti20-shared.s: New file.
* ld-sh/fdpic-goti20-static.d: New file.
* ld-sh/fdpic-goti20-static.s: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesc-static.d: New file.
* ld-sh/fdpic-gotofffuncdesc-static.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.s: New file.
* ld-sh/fdpic-gotoffi20-shared.d: New file.
* ld-sh/fdpic-gotoffi20-shared.s: New file.
* ld-sh/fdpic-gotoffi20-static.d: New file.
* ld-sh/fdpic-gotoffi20-static.s: New file.
* ld-sh/fdpic-plt-be.d: New file.
* ld-sh/fdpic-plt-le.d: New file.
* ld-sh/fdpic-plt.s: New file.
* ld-sh/fdpic-plti20-be.d: New file.
* ld-sh/fdpic-plti20-le.d: New file.
* ld-sh/fdpic-stack-default.d: New file.
* ld-sh/fdpic-stack-size.d: New file.
* ld-sh/fdpic-stack.s: New file.
|
||
Tristan Gingold
|
8b351884bb |
2010-04-14 Tristan Gingold <gingold@adacore.com>
* emulparams/alphavms.sh: New file. * emultempl/vms.em: New file. * scripttempl/alphavms.sc: New file. * configure.tgt (alpha*-*-*vms*): Added. * Makefile.am (ALL_EMULATIONS): Add ealphavms.o (ealphavms.c): New target. * Makefile.in: Regenerate. |
||
|
Joseph Myers
|
40b365969f |
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New. |
||
|
Alan Modra
|
0002cc9f07 | rename files | ||
|
Rainer Orth
|
a6cc6b3bc4 |
ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_sparc_sol2.o, eelf_i386_sol2.o. (ALL_64_EMULATIONS): Add eelf_x86_64_sol2.o, eelf64_sparc_sol2.o. (eelf32_sparc_sol2.c): New rule. (eelf64_sparc_sol2.c): Likewise. (eelf_x86_64_sol2.c): Likewise. (eelf_i386_sol2.c): Likewise. * Makefile.in: Regenerate. * configure.tgt (i[3-7]86-*-solaris2*): Change targ_emul to elf_i386_sol2. Add elf_i386_ldso, elf_x86_64_sol2 to targ_extra_emuls. (x86_64-*-solaris2*): Change targ_emul to elf_x86_64_sol2. Add elf_x86_64, elf_i386_sol2, elf_i386 to targ_extra_emuls. (sparc-*-solaris2.[0-6]*): Change targ_emul to elf32_sparc_sol2. Add target_extra_emuls. (sparc-*-solaris2*): Change targ_emul to elf32_sparc_sol2. Add elf32_sparc, elf64_sparc_sol2 to targ_extra_emuls. (sparcv9-*-solaris2*): Change targ_emul to elf64_sparc_sol2. Add elf64_sparc, elf32_sparc_sol2 to target_extra_emuls. * emulparams/elf32_sparc_sol2.sh: New file. * emulparams/elf64_sparc_sol2.sh: New file. * emulparams/elf_i386_sol2.sh: New file. * emulparams/elf_x86_64_sol2.sh: New file. * emultempl/solaris2.em: New file. bfd: * elflink.c (bfd_elf_size_dynamic_sections): Don't emit base version twice. Skip it when constructing def.vd_next. * elf32-i386.c (TARGET_LITTLE_SYM): Redefine to bfd_elf32_i386_sol2_vec. (TARGET_LITTLE_NAME): Redefine to elf32-i386-sol2. (elf32_bed): Redefine to elf32_i386_sol2_bed. (elf_backend_want_plt_sym): Redefine to 1. * elf64-x86-64.c (TARGET_LITTLE_SYM): Redefine to bfd_elf64_x86_64_sol2_vec. (TARGET_LITTLE_NAME): Redefine to elf64-x86-64-sol2. (elf64_bed): Redefine to elf64_x86_64_sol2_bed. (elf_backend_want_plt_sym): Redefine to 1. * config.bfd (i[3-7]86-*-solaris2*): Set targ_defvec to bfd_elf32_i386_sol2_vec. Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in targ64_selvecs. (x86_64-*-solaris2*): Set targ_defvec to bfd_elf32_i386_sol2_vec. Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in targ_selvecs. * configure.in: Handle bfd_elf32_i386_sol2_vec, bfd_elf64_x86_64_sol2_vec. * configure: Regenerate. * targets.c (bfd_elf32_i386_sol2_vec): Declare. (bfd_elf64_x86_64_sol2_vec): Declare. (_bfd_target_vector): Add bfd_elf32_i386_sol2_vec, bfd_elf64_x86_64_sol2_vec. |
||
|
Alan Modra
|
829da89821 |
PR ld/11012
* emulparams/elf64ppc.sh (OTHER_GOT_RELOC_SECTIONS): Move .rela.opd .. (INITIAL_RELOC_SECTIONS): .. to here. New define. * scripttempl/elf.sc: Expand INITIAL_RELOC_SECTIONS. |
||
Thomas Schwinge
|
ce5181b407 |
ld/
2009-11-20 Thomas Schwinge <thomas@codesourcery.com> * emulparams/armelf.sh (OTHER_READONLY_SECTIONS) <__exidx_start, __exidx_end>: Use PROVIDE_HIDDEN. * emulparams/armelf_linux_eabi.sh (OTHER_READONLY_SECTIONS) <__exidx_start, __exidx_end>: Likewise. * emulparams/armsymbian.sh (OTHER_READONLY_SECTIONS) <.ARM.exidx$$Base, __exidx_start, __exidx_end, .ARM.exidx$$Limit>: Likewise. ld/testsuite/ 2009-11-20 Thomas Schwinge <thomas@codesourcery.com> * ld-arm/arm-dyn.ld: Adapt to main linker script changes. * ld-arm/arm-lib.ld: Likewise. * ld-arm/armthumb-lib.sym: : Adjust expected results. * ld-arm/farcall-mixed-app-v5.d: Likewise. * ld-arm/farcall-mixed-app.d: Likewise. * ld-arm/farcall-mixed-app.sym: Likewise. * ld-arm/farcall-mixed-lib.d: Likewise. * ld-arm/mixed-app-v5.d: Likewise. * ld-arm/mixed-app.d: Likewise. * ld-arm/mixed-app.sym: Likewise. * ld-arm/mixed-lib.sym: Likewise. * ld-arm/preempt-app.sym: Likewise. * ld-arm/tls-app.d: Likewise. |
||
|
Alan Modra
|
7984f34977 |
PR ld/9863
* emulparams/armelf_linux.sh (DATA_START_SYMBOLS): Use PROVIDE with __data_start. |
||
Kai Tietz
|
decfa41eac |
2009-11-04 Kai Tietz <kai.tietz@onevision.com>
* emulparams/arm_epoc_pe.sh: Remove ENTRY.
* emulparams/arm_wince_pe.sh: Likewise.
* emulparams/i386pe.sh: Likewise.
* emulparams/i386pe_posix.sh: Likewise.
* emulparams/mcorepe.sh: Likewise.
* emulparams/mipspe.sh: Likewise.
* emulparams/ppcpe.sh: Likewise.
* emulparams/armpe.sh: Likewise.
* emulparams/i386pep.sh: Likewise.
* emulparams/shpe.sh: Likewise.
Additionally cleaned up double-defined
variables SUBSYSTEM and INITIAL_SYMBOL_CHAR.
* emultempl/pe.em: Remove use of ENTRY.
(pe_subsystem): New local variable.
(gld_XXX_before_parse): Don't set default
entry point here.
(set_entry_point): New function to set entry
point.
(set_pe_subsystem): Remove code for entry point.
(gld_XXX_after_parse): Use set_entry_point here.
* emultempl/pep.em: Likewise.
|
||
Nathan Sidwell
|
64c1b14eac |
* emulparams/vxworks.sh (OTHER_READONLY_SECTIONS): Move into ...
(OTHER_READWRITE_SECTIONS): ... here. |
||
|
Nick Clifton
|
94f63f209a |
* emulparams/m68kelf.sh (NOP): Use 0x4e71 (nop) rather than 0x4e75
(rts). |
||
|
Nick Clifton
|
c7927a3c0e |
bfd
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
(ALL_MACHINES_CFILES): Add cpu-rx.c.
(BFD32_BACKENDS): Add elf32-rx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rx.c.
* archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
Export bfd_rx_arch.
(bfd_archures_list): Add bfd_rx_arch.
* config.bfd: Add entry for rx-*-elf.
* configure.in: Add entries for bfd_elf32_rx_le_vec and
bfd_elf32_rx_be_vec.
* reloc.c: Add RX relocations.
* targets.c: Add RX target vectors.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rx.c: New file.
* elf32-rx.c: New file.
binutils
* readelf.c: Add support for RX target.
* MAINTAINERS: Add DJ and NickC as maintainers for RX.
gas
* Makefile.am: Add RX target.
* configure.in: Likewise.
* configure.tgt: Likewise.
* read.c (do_repeat_with_expander): New function.
* read.h: Provide a prototype for do_repeat_with_expander.
* doc/Makefile.am: Add RX target documentation.
* doc/all.texi: Likewise.
* doc/as.texinfo: Likewise.
* Makefile.in: Regenerate.
* NEWS: Mention support for RX architecture.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
* config/rx-defs.h: New file.
* config/rx-parse.y: New file.
* config/tc-rx.h: New file.
* config/tc-rx.c: New file.
* doc/c-rx.texi: New file.
gas/testsuite
* gas/rx: New directory.
* gas/rx/*: New set of test cases.
* gas/elf/section2.e-rx: New expected output file.
* gas/all/gas.exp: Add support for RX target.
* gas/elf/elf.exp: Likewise.
* gas/lns/lns.exp: Likewise.
* gas/macros/macros.exp: Likewise.
include
* dis-asm.h: Add prototype for print_insn_rx.
include/elf
* rx.h: New file.
include/opcode
* rx.h: New file.
ld
* Makefile.am: Add rules to build RX emulation.
* configure.tgt: Likewise.
* NEWS: Mention support for RX architecture.
* Makefile.in: Regenerate.
* emulparams/elf32rx.sh: New file.
* emultempl/rxelf.em: New file.
opcodes
* Makefile.am: Add RX files.
* configure.in: Add support for RX target.
* disassemble.c: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* opc2c.c: New file.
* rx-decode.c: New file.
* rx-decode.opc: New file.
* rx-dis.c: New file.
|
||
Jie Zhang
|
7dd8f318c1 |
* emulparams/elf32bfinfd.sh (OTHER_SECTIONS): Add .l2.text
and .l2.data. |
||
|
Jie Zhang
|
8d17e044d8 |
* scripttempl/elf.sc: Add ${USER_LABEL_PREFIX} to _start, etext,
_stack and __bss_start. * emulparams/bfin.sh (ENTRY): Remove. |
||
|
Nick Clifton
|
7ba29e2a41 |
Add support for Xilinx MicroBlaze processor.
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
|
||
Trevor Smigiel
|
9cc305ec20 |
bfd/
* elf32-spu.h (spu_elf_params): Add member emit_fixups. (spu_elf_size_sections): Declare prototype. * elf32-spu.c (spu_link_hash_table): Add member sfixup. (FIXUP_RECORD_SIZE, FIXUP_GET, FIXUP_PUT): New macros. (spu_elf_emit_fixup): New function. (spu_elf_relocate_section): Emit fixup for each SPU_ADDR32. (spu_elf_size_sections): New function. ld/ * emulparams/elf32_spu.sh (OTHER_READONLY_SECTIONS): Add .fixup section and __fixup_start symbol. * emultempl/spuelf.em (params): Initialize emit_fixups member. (spu_before_allocation): Call spu_elf_size_sections. (OPTION_SPU_EMIT_FIXUPS): Define. (PARSE_AND_LIST_LONGOPTS): Add --emit-fixups. (PARSE_AND_LIST_ARGS_CASES): Handle --emit-fixups. * ld.texinfo (--emit-fixups): Document. ld/testsuite/ * ld-spu/fixup.d: New. * ld-spu/fixup.s: New. |
||
|
Alan Modra
|
8dfab6dd9a |
* emulparams/elf32ppc.sh (PLT): Don't include ".iplt".
* emulparams/elf_i386.sh (IREL_IN_PLT): Define. * emulparams/elf_x86_64.sh (IREL_IN_PLT): Define. * scripttempl/elf.sc: Create separate .iplt and .rela.iplt sections when !IREL_IN_PLT. |