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Fix a bug in the ARM emulator which would not allow 4 byte alignment for double word stores.
PR 22790 * armemu.c (Handle_Store_Double): Allow 4 byte alignment when running in v6 mode.
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2021-04-26 Nick Clifton <nickc@redhat.com>
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PR 22790
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* armemu.c (Handle_Store_Double): Allow 4 byte alignment when
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running in v6 mode.
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2021-04-22 Tom Tromey <tom@tromey.com>
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* configure, config.in: Rebuild.
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@ -5457,7 +5457,10 @@ Handle_Store_Double (ARMul_State * state, ARMword instr)
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addr = base;
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/* The address must be aligned on a 8 byte boundary. */
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if (addr & 0x7)
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if (state->is_v6 && (addr & 0x3) == 0)
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/* Word alignment is enough for v6. */
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;
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else if (addr & 0x7)
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{
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#ifdef ABORTS
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ARMul_DATAABORT (addr);
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