Fix a bug in the ARM emulator which would not allow 4 byte alignment for double word stores.

PR 22790
	* armemu.c (Handle_Store_Double): Allow 4 byte alignment when
	running in v6 mode.
This commit is contained in:
Nick Clifton 2021-04-26 17:16:20 +01:00
parent e8b6c1da56
commit f6b9562fd9
2 changed files with 10 additions and 1 deletions

View File

@ -1,3 +1,9 @@
2021-04-26 Nick Clifton <nickc@redhat.com>
PR 22790
* armemu.c (Handle_Store_Double): Allow 4 byte alignment when
running in v6 mode.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure, config.in: Rebuild.

View File

@ -5457,7 +5457,10 @@ Handle_Store_Double (ARMul_State * state, ARMword instr)
addr = base;
/* The address must be aligned on a 8 byte boundary. */
if (addr & 0x7)
if (state->is_v6 && (addr & 0x3) == 0)
/* Word alignment is enough for v6. */
;
else if (addr & 0x7)
{
#ifdef ABORTS
ARMul_DATAABORT (addr);