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x86/SSE2AVX: respect prefixes
1) Without -msse2avx we unconditionally honor REX.W. Hence we ought to also do so with -msse2avx, converting to VEX.W. 2) {rex} doesn't prevent conversion to VEX encodings. Thus {rex2} shouldn't either.
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@ -3885,7 +3885,7 @@ build_vex_prefix (const insn_template *t)
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/* Check the REX.W bit and VEXW. */
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if (i.tm.opcode_modifier.vexw == VEXWIG)
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w = (vexwig == vexw1 || (i.rex & REX_W)) ? 1 : 0;
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else if (i.tm.opcode_modifier.vexw)
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else if (i.tm.opcode_modifier.vexw && !(i.rex & REX_W))
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w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0;
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else
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w = (flag_code == CODE_64BIT ? i.rex & REX_W : vexwig == vexw1) ? 1 : 0;
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@ -8413,7 +8413,7 @@ check_EgprOperands (const insn_template *t)
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}
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/* Check if pseudo prefix {rex2} is valid. */
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if (i.rex2_encoding)
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if (i.rex2_encoding && !t->opcode_modifier.sse2avx)
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{
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i.error = invalid_pseudo_prefix;
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return true;
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@ -10031,6 +10031,7 @@ process_operands (void)
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i.rex |= i.prefix[REX_PREFIX] & (REX_W | REX_R | REX_X | REX_B);
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i.prefix[REX_PREFIX] = 0;
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i.rex_encoding = 0;
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i.rex2_encoding = 0;
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}
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/* ImmExt should be processed after SSE2AVX. */
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else if (i.tm.opcode_modifier.immext)
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@ -740,6 +740,15 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: c4 e1 fa 2a 00 vcvtsi2ssq \(%rax\),%xmm0,%xmm0
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[ ]*[a-f0-9]+: c4 e3 f9 61 c0 00 vpcmpestriq \$(0x)?0,%xmm0,%xmm0
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[ ]*[a-f0-9]+: c4 e3 f9 60 c0 00 vpcmpestrmq \$(0x)?0,%xmm0,%xmm0
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[ ]*[a-f0-9]+: c5 f9 7e c8 vmovd %xmm1,%eax
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[ ]*[a-f0-9]+: c5 f9 7e c8 vmovd %xmm1,%eax
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[ ]*[a-f0-9]+: c4 c1 79 7e c8 vmovd %xmm1,%r8d
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[ ]*[a-f0-9]+: c5 79 7e c8 vmovd %xmm9,%eax
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[ ]*[a-f0-9]+: c4 a1 79 7e c8 vmovd %xmm1,%eax
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[ ]*[a-f0-9]+: c4 e1 f9 7e c8 vmovq %xmm1,%rax
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[ ]*[a-f0-9]+: c5 f9 7e c8 vmovd %xmm1,%eax
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[ ]*[a-f0-9]+: c5 f9 7e c8 vmovd %xmm1,%eax
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[ ]*[a-f0-9]+: c4 e1 79 7e c8 vmovd %xmm1,%eax
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[ ]*[a-f0-9]+: c5 f8 ae 11 vldmxcsr \(%rcx\)
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[ ]*[a-f0-9]+: c5 f8 ae 19 vstmxcsr \(%rcx\)
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[ ]*[a-f0-9]+: c5 f8 5b f4 vcvtdq2ps %xmm4,%xmm6
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@ -841,6 +841,15 @@ _start:
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rex64 pcmpestri $0, %xmm0, %xmm0
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rex64 pcmpestrm $0, %xmm0, %xmm0
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movd %xmm1, %eax
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rex movd %xmm1, %eax
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rex.b movd %xmm1, %eax
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rex.r movd %xmm1, %eax
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rex.x movd %xmm1, %eax
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rex.w movd %xmm1, %eax
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{rex} movd %xmm1, %eax
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{rex2} movd %xmm1, %eax
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{vex3} movd %xmm1, %eax
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.intel_syntax noprefix
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# Tests for op mem64
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