mirror/binutils-gdb
2
0
Fork 0
mirror of https://sourceware.org/git/binutils-gdb.git synced 2024-12-21 04:42:53 +08:00
Code Issues Packages Projects Releases Wiki Activity

x86: SKINIT with operand needs IgnoreSize

Browse Source 
Without it in 16-bit mode a pointless operand size prefix would be
emitted.
This commit is contained in:
Jan Beulich 2022-08-01 10:53:14 +02:00
parent 20f2e2686c
commit e4971956ea
5 changed files with 47 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
gas/testsuite/gas/i386/i386.exp
View File

@ -109,6 +109,7 @@ if [gas_32_check] then {
run_list_test "cr-err" ""
run_dump_test "cdr"
run_dump_test "svme"
run_dump_test "svme16"
run_dump_test "amdfam10"
run_dump_test "ssse3"
run_dump_test "rep"

3
gas/testsuite/gas/i386/svme.s
View File

@ -1,4 +1,7 @@
.text
.ifdef __ia16__
.code16
.endif
common:
clgi
invlpga

41
gas/testsuite/gas/i386/svme16.d Normal file
View File

@ -0,0 +1,41 @@
#as: --defsym __ia16__=1
#objdump: -dw -Mi8086
#name: 16-bit SVME
#source: svme.s
.*: +file format .*
Disassembly of section .text:
0+000 <common>:
[ ]*[0-9a-f]+:[ ]+0f 01 dd[ ]+clgi
[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
[ ]*[0-9a-f]+:[ ]+0f 01 dc[ ]+stgi
[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
[ ]*[0-9a-f]+:[ ]+0f 01 d9[ ]+vmmcall
[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
[0-9a-f]+ <att32>:
[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga
[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload
[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun
[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave
[0-9a-f]+ <att16>:
[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
[0-9a-f]+ <intel32>:
[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga
[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload
[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun
[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave
[0-9a-f]+ <intel16>:
[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
#pass

2
opcodes/i386-opc.tbl
View File

@ -2068,7 +2068,7 @@ clgi, 0xf01dd, None, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf,
invlpga, 0xf01df, None, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
invlpga, 0xf01df, None, CpuSVME, AddrPrefixOpReg, { Acc|Word|Dword|Qword, RegC|Dword }
skinit, 0xf01de, None, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
skinit, 0xf01de, None, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Acc|Dword }
skinit, 0xf01de, None, CpuSVME, No_bSuf|IgnoreSize|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Acc|Dword }
stgi, 0xf01dc, None, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
vmgexit, 0xf30f01d9, None, CpuSEV_ES, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
vmload, 0xf01da, None, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}

2
opcodes/i386-tbl.h
View File

@ -44880,7 +44880,7 @@ const insn_template i386_optab[] =
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ "skinit", 0x01de, 1, None,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,