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MPX for amd64
2013-06-24 Walfred Tedeschi <walfred.tedeschi@intel.com> * amd64-linux-nat.c (amd64_linux_gregset32_reg_offset): Add MPX registers. (amd64_linux_read_description): Add initialization for MPX and AVX independently. * amd64-linux-tdep.c: Includes features/i386/amd64-mpx-linux.c. (amd64_linux_gregset_reg_offset): Add MPX registers. (amd64_linux_core_read_description): Add initialization for MPX registers. (_initialize_amd64_linux_tdep): Initialize MPX targets. * amd64-linux-tdep.h (AMD64_LINUX_RAX_REGNUM): Set it to the last register on the list. (tdesc_amd64_mpx_linux) Add new target for MPX. * amd64-tdep.c: Includes features/i386/amd64-mpx.c. (amd64_mpx_names): MPX register names. (amd64_init_abi): Add MPX register while initializing the ABI. (_initialize_amd64_tdep): Initialize MPX targets. * amd64-tdep.h (amd64_regnum): Add MPX registers. (AMD64_NUM_REGS): Set number of registers taking MPX into account. Change-Id: I4a785c181e2fb45e4086650b2f87426caeb2f800 Signed-off-by: Walfred Tedeschi <walfred.tedeschi@intel.com> Conflicts: gdb/ChangeLog
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@ -1,3 +1,24 @@
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2013-11-20 Walfred Tedeschi <walfred.tedeschi@intel.com>
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* amd64-linux-nat.c (amd64_linux_gregset32_reg_offset):
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Add MPX registers.
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(amd64_linux_read_description): Add initialization for MPX and
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AVX independently.
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* amd64-linux-tdep.c: Includes features/i386/amd64-mpx-linux.c.
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(amd64_linux_gregset_reg_offset): Add MPX registers.
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(amd64_linux_core_read_description): Add initialization for MPX
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registers.
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(_initialize_amd64_linux_tdep): Initialize MPX targets.
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* amd64-linux-tdep.h (AMD64_LINUX_RAX_REGNUM): Set it to the last
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register on the list.
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(tdesc_amd64_mpx_linux) Add new target for MPX.
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* amd64-tdep.c: Includes features/i386/amd64-mpx.c.
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(amd64_mpx_names): MPX register names.
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(amd64_init_abi): Add MPX register while initializing the ABI.
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(_initialize_amd64_tdep): Initialize MPX targets.
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* amd64-tdep.h (amd64_regnum): Add MPX registers.
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(AMD64_NUM_REGS): Set number of registers taking MPX into account.
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2013-11-20 Walfred Tedeschi <walfred.tedeschi@intel.com>
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* i386-linux-nat.c (GETXSTATEREGS_SUPPLIES): Add MPX
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@ -100,7 +100,9 @@ static int amd64_linux_gregset32_reg_offset[] =
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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ORIG_RAX * 8 /* "orig_eax" */
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-1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
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-1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
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ORIG_RAX * 8, /* "orig_eax" */
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};
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@ -1094,18 +1096,41 @@ amd64_linux_read_description (struct target_ops *ops)
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}
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/* Check the native XCR0 only if PTRACE_GETREGSET is available. */
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if (have_ptrace_getregset
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&& (xcr0 & I386_XSTATE_AVX_MASK) == I386_XSTATE_AVX_MASK)
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if (have_ptrace_getregset && (xcr0 & I386_XSTATE_ALL_MASK))
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{
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if (is_64bit)
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switch (xcr0 & I386_XSTATE_ALL_MASK)
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{
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if (is_x32)
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return tdesc_x32_avx_linux;
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case I386_XSTATE_MPX_MASK:
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if (is_64bit)
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{
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if (is_x32)
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return tdesc_x32_avx_linux; /* No MPX on x32 using AVX. */
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else
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return tdesc_amd64_mpx_linux;
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}
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else
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return tdesc_amd64_avx_linux;
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return tdesc_i386_mpx_linux;
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case I386_XSTATE_AVX_MASK:
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if (is_64bit)
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{
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if (is_x32)
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return tdesc_x32_avx_linux;
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else
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return tdesc_amd64_avx_linux;
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}
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else
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return tdesc_i386_avx_linux;
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default:
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if (is_64bit)
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{
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if (is_x32)
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return tdesc_x32_linux;
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else
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return tdesc_amd64_linux;
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}
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else
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return tdesc_i386_linux;
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}
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else
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return tdesc_i386_avx_linux;
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}
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else
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{
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@ -42,6 +42,7 @@
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#include "features/i386/amd64-linux.c"
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#include "features/i386/amd64-avx-linux.c"
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#include "features/i386/amd64-mpx-linux.c"
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#include "features/i386/x32-linux.c"
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#include "features/i386/x32-avx-linux.c"
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@ -96,6 +97,8 @@ int amd64_linux_gregset_reg_offset[] =
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-1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
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-1, -1, /* MPX registers BNDCFGU and BNDSTATUS. */
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15 * 8 /* "orig_rax" */
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};
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@ -1287,8 +1290,14 @@ amd64_linux_core_read_description (struct gdbarch *gdbarch,
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{
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/* Linux/x86-64. */
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uint64_t xcr0 = i386_linux_core_read_xcr0 (abfd);
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switch ((xcr0 & I386_XSTATE_AVX_MASK))
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switch (xcr0 & I386_XSTATE_ALL_MASK)
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{
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case I386_XSTATE_MPX_MASK:
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if (gdbarch_ptr_bit (gdbarch) == 32)
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return tdesc_x32_avx_linux; /* No x32 MPX falling back to AVX. */
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else
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return tdesc_amd64_mpx_linux;
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case I386_XSTATE_AVX_MASK:
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if (gdbarch_ptr_bit (gdbarch) == 32)
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return tdesc_x32_avx_linux;
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@ -1623,6 +1632,7 @@ _initialize_amd64_linux_tdep (void)
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/* Initialize the Linux target description. */
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initialize_tdesc_amd64_linux ();
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initialize_tdesc_amd64_avx_linux ();
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initialize_tdesc_amd64_mpx_linux ();
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initialize_tdesc_x32_linux ();
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initialize_tdesc_x32_avx_linux ();
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}
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@ -26,7 +26,7 @@
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/* Register number for the "orig_rax" register. If this register
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contains a value >= 0 it is interpreted as the system call number
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that the kernel is supposed to restart. */
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#define AMD64_LINUX_ORIG_RAX_REGNUM (AMD64_YMM15H_REGNUM + 1)
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#define AMD64_LINUX_ORIG_RAX_REGNUM (AMD64_BNDSTATUS_REGNUM + 1)
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/* Total number of registers for GNU/Linux. */
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#define AMD64_LINUX_NUM_REGS (AMD64_LINUX_ORIG_RAX_REGNUM + 1)
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@ -34,6 +34,7 @@
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/* Linux target description. */
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extern struct target_desc *tdesc_amd64_linux;
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extern struct target_desc *tdesc_amd64_avx_linux;
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extern struct target_desc *tdesc_amd64_mpx_linux;
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extern struct target_desc *tdesc_x32_linux;
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extern struct target_desc *tdesc_x32_avx_linux;
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@ -43,6 +43,7 @@
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#include "features/i386/amd64.c"
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#include "features/i386/amd64-avx.c"
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#include "features/i386/amd64-mpx.c"
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#include "features/i386/x32.c"
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#include "features/i386/x32-avx.c"
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@ -92,6 +93,11 @@ static const char *amd64_ymmh_names[] =
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"ymm12h", "ymm13h", "ymm14h", "ymm15h"
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};
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static const char *amd64_mpx_names[] =
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{
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"bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
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};
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/* DWARF Register Number Mapping as defined in the System V psABI,
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section 3.6. */
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@ -2845,6 +2851,13 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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tdep->ymm0h_regnum = AMD64_YMM0H_REGNUM;
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}
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if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx") != NULL)
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{
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tdep->mpx_register_names = amd64_mpx_names;
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tdep->bndcfgu_regnum = AMD64_BNDCFGU_REGNUM;
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tdep->bnd0r_regnum = AMD64_BND0R_REGNUM;
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}
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tdep->num_byte_regs = 20;
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tdep->num_word_regs = 16;
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tdep->num_dword_regs = 16;
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@ -2986,6 +2999,7 @@ _initialize_amd64_tdep (void)
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{
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initialize_tdesc_amd64 ();
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initialize_tdesc_amd64_avx ();
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initialize_tdesc_amd64_mpx ();
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initialize_tdesc_x32 ();
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initialize_tdesc_x32_avx ();
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}
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@ -64,13 +64,17 @@ enum amd64_regnum
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AMD64_XMM1_REGNUM, /* %xmm1 */
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AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16,
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AMD64_YMM0H_REGNUM, /* %ymm0h */
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AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15
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AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15,
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AMD64_BND0R_REGNUM = AMD64_YMM15H_REGNUM + 1,
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AMD64_BND3R_REGNUM = AMD64_BND0R_REGNUM + 3,
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AMD64_BNDCFGU_REGNUM,
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AMD64_BNDSTATUS_REGNUM
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};
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/* Number of general purpose registers. */
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#define AMD64_NUM_GREGS 24
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#define AMD64_NUM_REGS (AMD64_YMM15H_REGNUM + 1)
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#define AMD64_NUM_REGS (AMD64_BNDSTATUS_REGNUM + 1)
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extern struct displaced_step_closure *amd64_displaced_step_copy_insn
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(struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
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