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Fix spelling typos.
This commit is contained in:
Yuri Chornovian
Nick Clifton
parent
c5ed057625
commit
de194d8575
@ -1,3 +1,28 @@
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2017-07-18 Nick Clifton <nickc@redhat.com>
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PR 21775
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* coff-sh.c: Fix spelling typos.
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* compress.c: Likewise.
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* cpu-pdp11.c: Likewise.
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* ecofflink.c: Likewise.
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* elf-m10300.c: Likewise.
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* elf.c: Likewise.
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* elf32-arm.c: Likewise.
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* elf32-m68k.c: Likewise.
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* elf32-nds32.c: Likewise.
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* elf32-ppc.c: Likewise.
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* elf32-sh.c: Likewise.
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* elf32-v850.c: Likewise.
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* elf64-ppc.c: Likewise.
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* elf64-x86-64.c: Likewise.
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* elflink.c: Likewise.
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* elfnn-aarch64.c: Likewise.
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* elfxx-mips.c: Likewise.
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* som.c: Likewise.
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* sunos.c: Likewise.
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* vms-alpha.c: Likewise.
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* xcofflink.c: Likewise.
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2017-07-18 Nick Clifton <nickc@redhat.com>
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PR binutils/21781
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@ -1083,7 +1083,7 @@ sh_relax_delete_bytes (bfd *abfd,
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contents = coff_section_data (abfd, sec)->contents;
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/* The deletion must stop at the next ALIGN reloc for an aligment
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/* The deletion must stop at the next ALIGN reloc for an alignment
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power larger than the number of bytes we are deleting. */
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irelalign = NULL;
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@ -106,7 +106,7 @@ bfd_compress_section_contents (bfd *abfd, sec_ptr sec,
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if (orig_compression_header_size == 0)
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{
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/* Convert it from .zdebug* section. Get the uncompressed
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size first. We need to substract the 12-byte overhead in
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size first. We need to subtract the 12-byte overhead in
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.zdebug* section. Set orig_compression_header_size to
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the 12-bye overhead. */
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orig_compression_header_size = 12;
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@ -31,7 +31,7 @@ const bfd_arch_info_type bfd_pdp11_arch =
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0, /* only 1 machine */
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"pdp11",
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"pdp11",
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1, /* aligment = 16 bit */
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1, /* alignment = 16 bit */
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TRUE, /* the one and only */
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bfd_default_compatible,
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bfd_default_scan,
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@ -898,7 +898,7 @@ bfd_ecoff_debug_accumulate (void * handle,
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if (! bfd_link_relocatable (info))
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{
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/* When are are hashing strings, we lie about the number of
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/* When we are hashing strings, we lie about the number of
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strings attached to each FDR. We need to set cbSs
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because some versions of dbx apparently use it to decide
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how much of the string table to read in. */
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@ -2416,7 +2416,7 @@ mn10300_elf_relax_delete_bytes (bfd *abfd,
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if (ELF32_R_TYPE ((irelend - 1)->r_info) == (int) R_MN10300_ALIGN)
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--irelend;
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/* The deletion must stop at the next ALIGN reloc for an aligment
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/* The deletion must stop at the next ALIGN reloc for an alignment
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power larger than, or not a multiple of, the number of bytes we
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are deleting. */
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for (; irel < irelend; irel++)
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@ -5115,7 +5115,7 @@ elf_sort_sections (const void *arg1, const void *arg2)
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else
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adjustment = vma_offset - off_offset;
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which can can be collapsed into the expression below. */
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which can be collapsed into the expression below. */
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static file_ptr
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vma_page_aligned_bias (bfd_vma vma, ufile_ptr off, bfd_vma maxpagesize)
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@ -14037,7 +14037,7 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
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if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
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{
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_bfd_error_handler
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(_("%B has has both the current and legacy "
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(_("%B has both the current and legacy "
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"Tag_MPextension_use attributes"),
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ibfd);
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result = FALSE;
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@ -703,7 +703,7 @@ struct elf_m68k_got_entry
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struct
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{
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/* Offset from the start of .got section. To calculate offset relative
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to GOT pointer one should substract got->offset from this value. */
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to GOT pointer one should subtract got->offset from this value. */
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bfd_vma offset;
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/* Pointer to the next GOT entry for this global symbol.
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@ -11509,12 +11509,12 @@ nds32_relax_adjust_label (bfd *abfd, asection *sec,
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of instruction a time.
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It recognizes three types of relocations.
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1. R_NDS32_LABEL - a aligment.
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1. R_NDS32_LABEL - a alignment.
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2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
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3. is_16bit_NOP () - remove a 16-bit instruction. */
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/* TODO: It seems currently implementation only support 4-byte aligment.
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We should handle any-aligment. */
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/* TODO: It seems currently implementation only support 4-byte alignment.
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We should handle any-alignment. */
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Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
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Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
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@ -134,7 +134,7 @@ static const bfd_vma ppc_elf_vxworks_pic_plt0_entry
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#define VXWORKS_PLT_NON_JMP_SLOT_RELOCS 3
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/* The number of relocations in the PLTResolve slot. */
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#define VXWORKS_PLTRESOLVE_RELOCS 2
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/* The number of relocations in the PLTResolve slot when when creating
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/* The number of relocations in the PLTResolve slot when creating
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a shared library. */
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#define VXWORKS_PLTRESOLVE_RELOCS_SHLIB 0
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@ -913,7 +913,7 @@ sh_elf_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr,
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contents = elf_section_data (sec)->this_hdr.contents;
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/* The deletion must stop at the next ALIGN reloc for an aligment
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/* The deletion must stop at the next ALIGN reloc for an alignment
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power larger than the number of bytes we are deleting. */
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irelalign = NULL;
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@ -2525,7 +2525,7 @@ v850_elf_merge_notes (bfd * ibfd, bfd *obfd)
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{
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_bfd_error_handler
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/* xgettext:c-format */
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(_("error: %B needs 8-byte aligment but %B is set for 4-byte alignment"),
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(_("error: %B needs 8-byte alignment but %B is set for 4-byte alignment"),
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ibfd, obfd);
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result = FALSE;
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}
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@ -8904,7 +8904,7 @@ ppc64_elf_tls_optimize (struct bfd_link_info *info)
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the values of any global symbols in a toc section that has been
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edited. Globals in toc sections should be a rarity, so this function
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sets a flag if any are found in toc sections other than the one just
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edited, so that futher hash table traversals can be avoided. */
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edited, so that further hash table traversals can be avoided. */
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struct adjust_toc_info
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{
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@ -9400,7 +9400,7 @@ ppc64_elf_edit_toc (struct bfd_link_info *info)
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/* Merge the used and skip arrays. Assume that TOC
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doublewords not appearing as either used or unused belong
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to to an entry more than one doubleword in size. */
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to an entry more than one doubleword in size. */
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for (drop = skip, keep = used, last = 0, some_unused = 0;
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drop < skip + (toc->size + 7) / 8;
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++drop, ++keep)
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@ -611,7 +611,7 @@ static const bfd_byte elf_x86_64_lazy_ibt_plt_entry[LAZY_PLT_ENTRY_SIZE] =
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};
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/* The first entry in the x32 IBT-enabled lazy procedure linkage table
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is the the same as the normal lazy PLT. Subsequent entries for an
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is the same as the normal lazy PLT. Subsequent entries for an
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x32 IBT-enabled lazy procedure linkage table look like this. */
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static const bfd_byte elf_x32_lazy_ibt_plt_entry[LAZY_PLT_ENTRY_SIZE] =
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@ -4669,7 +4669,7 @@ do_ifunc_pointer:
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case R_X86_64_GOTPCREL64:
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/* Use global offset table entry as symbol value. */
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case R_X86_64_GOTPLT64:
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/* This is obsolete and treated the the same as GOT64. */
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/* This is obsolete and treated the same as GOT64. */
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base_got = htab->elf.sgot;
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if (htab->elf.sgot == NULL)
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@ -2935,7 +2935,7 @@ _bfd_elf_adjust_dynamic_copy (struct bfd_link_info *info,
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bfd_vma mask;
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asection *sec = h->root.u.def.section;
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/* The section aligment of definition is the maximum alignment
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/* The section alignment of the definition is the maximum alignment
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requirement of symbols defined in the section. Since we don't
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know the symbol alignment requirement, we start with the
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maximum alignment and check low bits of the symbol address
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@ -3281,7 +3281,7 @@ aarch64_mem_op_p (uint32_t insn, unsigned int *rt, unsigned int *rt2,
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uint32_t v = 0;
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uint32_t opc_v = 0;
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/* Bail out quickly if INSN doesn't fall into the the load-store
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/* Bail out quickly if INSN doesn't fall into the load-store
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encoding space. */
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if (!AARCH64_LDST (insn))
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return FALSE;
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@ -5456,7 +5456,7 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd,
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{
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/* If this is a dynamic link, we should have created a
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_DYNAMIC_LINK symbol or _DYNAMIC_LINKING(for normal mips) symbol
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in in _bfd_mips_elf_create_dynamic_sections.
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in _bfd_mips_elf_create_dynamic_sections.
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Otherwise, we should define the symbol with a value of 0.
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FIXME: It should probably get into the symbol table
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somehow as well. */
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@ -6955,7 +6955,7 @@ _bfd_mips_elf_symbol_processing (bfd *abfd, asymbol *asym)
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{
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asym->section = section;
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/* MIPS_TEXT is a bit special, the address is not an offset
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to the base of the .text section. So substract the section
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to the base of the .text section. So subtract the section
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base address to make it an offset. */
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asym->value -= section->vma;
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}
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@ -6970,7 +6970,7 @@ _bfd_mips_elf_symbol_processing (bfd *abfd, asymbol *asym)
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{
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asym->section = section;
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/* MIPS_DATA is a bit special, the address is not an offset
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to the base of the .data section. So substract the section
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to the base of the .data section. So subtract the section
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base address to make it an offset. */
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asym->value -= section->vma;
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}
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@ -5012,7 +5012,7 @@ som_set_reloc_info (unsigned char *fixup,
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push (v);
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}
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else
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/* An operator. Pop two two values from the stack and
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/* An operator. Pop two values from the stack and
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use them as operands to the given operation. Push
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the result of the operation back on the stack. */
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switch (c)
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@ -2314,7 +2314,7 @@ sunos_write_dynamic_symbol (bfd *output_bfd,
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}
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/* This is called for each reloc against an external symbol. If this
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is a reloc which are are going to copy as a dynamic reloc, then
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is a reloc which are going to copy as a dynamic reloc, then
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copy it over, and tell the caller to not bother processing this
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reloc. */
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@ -6220,7 +6220,7 @@ evax_bfd_print_etir (FILE *file, const char *name,
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fprintf (file, _("OPR_ADD (add)\n"));
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break;
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case ETIR__C_OPR_SUB:
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fprintf (file, _("OPR_SUB (substract)\n"));
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fprintf (file, _("OPR_SUB (subtract)\n"));
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break;
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case ETIR__C_OPR_MUL:
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fprintf (file, _("OPR_MUL (multiply)\n"));
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@ -5310,7 +5310,7 @@ xcoff_write_global_symbol (struct bfd_hash_entry *bh, void * inf)
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tocoff += h->descriptor->u.toc_offset;
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/* The first instruction in the glink code needs to be
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cooked to to hold the correct offset in the toc. The
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cooked to hold the correct offset in the toc. The
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rest are just output raw. */
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bfd_put_32 (output_bfd,
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bfd_xcoff_glink_code(output_bfd, 0) | (tocoff & 0xffff), p);
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@ -1,3 +1,11 @@
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2017-07-18 Nick Clifton <nickc@redhat.com>
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PR 21775
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* coffgrok.c: Fix spelling typos.
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* readelf.c: Likewise.
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* stabs.c: Likewise.
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* testsuite/binutils-all/objcopy.exp: Likewise.
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2017-07-18 Nick Clifton <nickc@redhat.com>
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* po/sv.po: Updated Swedish translation.
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@ -846,13 +846,13 @@ doit (void)
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case C_UNTAG:
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/* Various definition. */
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if (top_scope == NULL)
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fatal (_("Aggregate defintion encountered without a scope"));
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fatal (_("Aggregate definition encountered without a scope"));
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i = do_define (i, top_scope);
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break;
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case C_EXT:
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case C_LABEL:
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if (file_scope == NULL)
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fatal (_("Label defintion encountered without a file scope"));
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fatal (_("Label definition encountered without a file scope"));
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i = do_define (i, file_scope);
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break;
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case C_STAT:
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@ -860,7 +860,7 @@ doit (void)
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case C_AUTO:
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case C_REG:
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if (top_scope == NULL)
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fatal (_("Variable defintion encountered without a scope"));
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fatal (_("Variable definition encountered without a scope"));
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i = do_define (i, top_scope);
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break;
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case C_EOS:
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@ -6706,7 +6706,7 @@ process_section_groups (FILE * file)
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error (_("section [%5u] in group section [%5u] > maximum section [%5u]\n"),
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entry, i, elf_header.e_shnum - 1);
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if (num_group_errors == 10)
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warn (_("Futher error messages about overlarge group section indicies suppressed\n"));
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warn (_("Further error messages about overlarge group section indicies suppressed\n"));
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}
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continue;
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}
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@ -995,7 +995,7 @@ parse_stab_string (void *dhandle, struct stab_handle *info, int stabtype,
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break;
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case 'T':
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/* Struct, union, or enum tag. For GNU C++, this can be be followed
|
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/* Struct, union, or enum tag. For GNU C++, this can be followed
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by 't' which means we are typedef'ing it as well. */
|
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if (*p != 't')
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{
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@ -842,7 +842,7 @@ proc keep_debug_symbols_and_test_copy { prog1 flags1 test1 prog2 flags2 test2 }
|
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}
|
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|
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# Tests that in a debug only copy of a file the sections
|
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# headers whoes types have been changed to NOBITS still
|
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# headers whose types have been changed to NOBITS still
|
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# retain their sh_link fields.
|
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|
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proc keep_debug_symbols_and_check_links { prog flags test } {
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|
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@ -1,3 +1,17 @@
|
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2017-07-18 Nick Clifton <nickc@redhat.com>
|
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|
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PR 21775
|
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* config/tc-arm.c: Fix spelling typos.
|
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* config/tc-mips.c: Likewise.
|
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* config/tc-msp430.c: Likewise.
|
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* config/tc-sh64.c: Likewise.
|
||||
* config/tc-tic4x.c: Likewise.
|
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* ecoff.c: Likewise.
|
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* testsuite/gas/arm/ldr-bad.l: Likewise.
|
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* testsuite/gas/arm/ldr-t-bad.l: Likewise.
|
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* testsuite/gas/tic54x/opcodes.s: Likewise.
|
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* testsuite/gas/msp340/errata_warns.l: Likewise.
|
||||
|
||||
2017-07-18 Nick Clifton <nickc@redhat.com>
|
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|
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* po/uk.po: Updated Ukranian translation.
|
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|
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@ -8979,7 +8979,7 @@ check_ldr_r15_aligned (void)
|
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&& (inst.operands[0].reg == REG_PC
|
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&& inst.operands[1].reg == REG_PC
|
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&& (inst.reloc.exp.X_add_number & 0x3)),
|
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_("ldr to register 15 must be 4-byte alligned"));
|
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_("ldr to register 15 must be 4-byte aligned"));
|
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}
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|
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static void
|
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@ -23542,7 +23542,7 @@ md_apply_fix (fixS * fixP,
|
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/* We are going to store value (shifted right by two) in the
|
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instruction, in a 24 bit, signed field. Bits 26 through 32 either
|
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all clear or all set and bit 0 must be clear. For B/BL bit 1 must
|
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also be be clear. */
|
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also be clear. */
|
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if (value & temp)
|
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as_bad_where (fixP->fx_file, fixP->fx_line,
|
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_("misaligned branch destination"));
|
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|
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@ -4897,7 +4897,7 @@ match_expression (struct mips_arg_info *arg, expressionS *value,
|
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}
|
||||
|
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/* Try to get a constant expression from the next tokens in ARG. Consume
|
||||
the tokens and return return true on success, storing the constant value
|
||||
the tokens and return true on success, storing the constant value
|
||||
in *VALUE. */
|
||||
|
||||
static bfd_boolean
|
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@ -15314,7 +15314,7 @@ fix_bad_misaligned_jump_p (fixS *fixP, int shift)
|
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We accept BFD_RELOC_16_PCREL_S2 relocations against MIPS16 and microMIPS
|
||||
symbols or BFD_RELOC_MICROMIPS_16_PCREL_S1 relocations against regular
|
||||
MIPS symbols and associated with BAL instructions as these instructions
|
||||
may be be converted to JALX by the linker. */
|
||||
may be converted to JALX by the linker. */
|
||||
|
||||
static bfd_boolean
|
||||
fix_bad_cross_mode_branch_p (fixS *fixP)
|
||||
|
||||
@ -2631,7 +2631,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||
|
||||
case NOP_CHECK_CPU12:
|
||||
if (silicon_errata_warn & SILICON_ERRATA_CPU12)
|
||||
as_warn (_("CPU12: CMP/BIT with PC destinstion ignores next instruction"));
|
||||
as_warn (_("CPU12: CMP/BIT with PC destination ignores next instruction"));
|
||||
|
||||
if (silicon_errata_fix & SILICON_ERRATA_CPU12)
|
||||
doit = TRUE;
|
||||
@ -2724,9 +2724,9 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||
|| is_opcode ("bicx") || is_opcode ("bisx") || is_opcode ("movx")))
|
||||
{
|
||||
if (silicon_errata_fix & SILICON_ERRATA_CPU11)
|
||||
as_bad (_("CPU11: PC is destinstion of SR altering instruction"));
|
||||
as_bad (_("CPU11: PC is destination of SR altering instruction"));
|
||||
else if (silicon_errata_warn & SILICON_ERRATA_CPU11)
|
||||
as_warn (_("CPU11: PC is destinstion of SR altering instruction"));
|
||||
as_warn (_("CPU11: PC is destination of SR altering instruction"));
|
||||
}
|
||||
|
||||
/* If the status register is the destination... */
|
||||
@ -2741,9 +2741,9 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||
))
|
||||
{
|
||||
if (silicon_errata_fix & SILICON_ERRATA_CPU13)
|
||||
as_bad (_("CPU13: SR is destinstion of SR altering instruction"));
|
||||
as_bad (_("CPU13: SR is destination of SR altering instruction"));
|
||||
else if (silicon_errata_warn & SILICON_ERRATA_CPU13)
|
||||
as_warn (_("CPU13: SR is destinstion of SR altering instruction"));
|
||||
as_warn (_("CPU13: SR is destination of SR altering instruction"));
|
||||
}
|
||||
|
||||
if (is_opcode ("clr") && bin == 0x4302 /* CLR R2*/)
|
||||
@ -2849,9 +2849,9 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||
))
|
||||
{
|
||||
if (silicon_errata_fix & SILICON_ERRATA_CPU13)
|
||||
as_bad (_("CPU13: SR is destinstion of SR altering instruction"));
|
||||
as_bad (_("CPU13: SR is destination of SR altering instruction"));
|
||||
else if (silicon_errata_warn & SILICON_ERRATA_CPU13)
|
||||
as_warn (_("CPU13: SR is destinstion of SR altering instruction"));
|
||||
as_warn (_("CPU13: SR is destination of SR altering instruction"));
|
||||
}
|
||||
|
||||
if (extended_op)
|
||||
@ -3410,9 +3410,9 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||
|| is_opcode ("bicx") || is_opcode ("bisx") || is_opcode ("movx")))
|
||||
{
|
||||
if (silicon_errata_fix & SILICON_ERRATA_CPU11)
|
||||
as_bad (_("CPU11: PC is destinstion of SR altering instruction"));
|
||||
as_bad (_("CPU11: PC is destination of SR altering instruction"));
|
||||
else if (silicon_errata_warn & SILICON_ERRATA_CPU11)
|
||||
as_warn (_("CPU11: PC is destinstion of SR altering instruction"));
|
||||
as_warn (_("CPU11: PC is destination of SR altering instruction"));
|
||||
}
|
||||
|
||||
/* If the status register is the destination... */
|
||||
@ -3427,9 +3427,9 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||
))
|
||||
{
|
||||
if (silicon_errata_fix & SILICON_ERRATA_CPU13)
|
||||
as_bad (_("CPU13: SR is destinstion of SR altering instruction"));
|
||||
as_bad (_("CPU13: SR is destination of SR altering instruction"));
|
||||
else if (silicon_errata_warn & SILICON_ERRATA_CPU13)
|
||||
as_warn (_("CPU13: SR is destinstion of SR altering instruction"));
|
||||
as_warn (_("CPU13: SR is destination of SR altering instruction"));
|
||||
}
|
||||
|
||||
if ( (is_opcode ("bic") && bin == 0xc232)
|
||||
@ -3605,9 +3605,9 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||
&& (is_opcode ("rra") || is_opcode ("rrc") || is_opcode ("sxt")))
|
||||
{
|
||||
if (silicon_errata_fix & SILICON_ERRATA_CPU13)
|
||||
as_bad (_("CPU13: SR is destinstion of SR altering instruction"));
|
||||
as_bad (_("CPU13: SR is destination of SR altering instruction"));
|
||||
else if (silicon_errata_warn & SILICON_ERRATA_CPU13)
|
||||
as_warn (_("CPU13: SR is destinstion of SR altering instruction"));
|
||||
as_warn (_("CPU13: SR is destination of SR altering instruction"));
|
||||
}
|
||||
|
||||
insn_length = (extended_op ? 2 : 0) + 2 + (op1.ol * 2);
|
||||
|
||||
@ -3030,7 +3030,7 @@ sh64_target_mach (void)
|
||||
return (sh64_abi == sh64_abi_64) ? bfd_mach_sh5 : 0;
|
||||
}
|
||||
|
||||
/* This is MD_PCREL_FROM_SECTION, we we define so it is called instead of
|
||||
/* This is MD_PCREL_FROM_SECTION, we define so it is called instead of
|
||||
md_pcrel_from (in tc-sh.c). */
|
||||
|
||||
valueT
|
||||
|
||||
@ -2353,7 +2353,7 @@ tic4x_insn_check (tic4x_insn_t *tinsn)
|
||||
if (tinsn->operands[1].mode == M_REGISTER
|
||||
&& tinsn->operands[tinsn->num_operands-1].mode == M_REGISTER
|
||||
&& tinsn->operands[1].expr.X_add_number == tinsn->operands[tinsn->num_operands-1].expr.X_add_number )
|
||||
as_warn (_("Equal parallell destination registers, one result will be discarded"));
|
||||
as_warn (_("Equal parallel destination registers, one result will be discarded"));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -618,7 +618,7 @@
|
||||
#26 48 0x00000030 struct no name { ifd = -1, index = 1048575 }
|
||||
*/
|
||||
|
||||
/* Redefinition of of storage classes as an enumeration for better
|
||||
/* Redefinition of storage classes as an enumeration for better
|
||||
debugging. */
|
||||
|
||||
typedef enum sc {
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
[^:]*: Assembler messages:
|
||||
[^:]*:5: Warning: destination register same as write-back base
|
||||
[^:]*:9: Error: ldr to register 15 must be 4-byte alligned -- `ldr r15,\[r15,#5\]'
|
||||
[^:]*:12: Error: ldr to register 15 must be 4-byte alligned -- `ldr r15,.-0xab7'
|
||||
[^:]*:9: Error: ldr to register 15 must be 4-byte aligned -- `ldr r15,\[r15,#5\]'
|
||||
[^:]*:12: Error: ldr to register 15 must be 4-byte aligned -- `ldr r15,.-0xab7'
|
||||
[^:]*:15: Warning: destination register same as write-back base
|
||||
[^:]*:16: Error: cannot use register index with PC-relative addressing -- `ldr r2,\[r15,r2\]!'
|
||||
[^:]*:19: Error: cannot use register index with PC-relative addressing -- `ldr r1,\[r1,r15\]'
|
||||
|
||||
@ -1,9 +1,9 @@
|
||||
[^:]*: Assembler messages:
|
||||
[^:]*:8: Error: registers may not be the same -- `ldr r1,\[r1,#5\]!'
|
||||
[^:]*:12: Error: ldr to register 15 must be 4-byte alligned -- `ldr r15,\[r15,#5\]'
|
||||
[^:]*:12: Error: ldr to register 15 must be 4-byte aligned -- `ldr r15,\[r15,#5\]'
|
||||
[^:]*:16: Error: branch must be last instruction in IT block -- `ldrge r15,\[r15,#4\]'
|
||||
[^:]*:25: Error: branch must be last instruction in IT block -- `ldrge r15,.0x4'
|
||||
[^:]*:30: Error: ldr to register 15 must be 4-byte alligned -- `ldr r15,.-0xab7'
|
||||
[^:]*:30: Error: ldr to register 15 must be 4-byte aligned -- `ldr r15,.-0xab7'
|
||||
[^:]*:36: Error: branch must be last instruction in IT block -- `ldrge r15,\[r15,r1\]'
|
||||
[^:]*:41: Error: r13 not allowed here -- `ldr r1,\[r2,r13\]'
|
||||
[^:]*:42: Error: r15 not allowed here -- `ldr r2,\[r2,r15\]'
|
||||
|
||||
@ -6,39 +6,39 @@
|
||||
[^:]*:13: Warning: CPU8: Stack pointer accessed with an odd offset
|
||||
[^:]*:14: Warning: CPU8: Stack pointer accessed with an odd offset
|
||||
[^:]*:15: Warning: CPU8: Stack pointer accessed with an odd offset
|
||||
[^:]*:18: Warning: CPU11: PC is destinstion of SR altering instruction
|
||||
[^:]*:19: Warning: CPU11: PC is destinstion of SR altering instruction
|
||||
[^:]*:20: Warning: CPU11: PC is destinstion of SR altering instruction
|
||||
[^:]*:21: Warning: CPU12: CMP/BIT with PC destinstion ignores next instruction
|
||||
[^:]*:21: Warning: CPU11: PC is destinstion of SR altering instruction
|
||||
[^:]*:22: Warning: CPU11: PC is destinstion of SR altering instruction
|
||||
[^:]*:23: Warning: CPU11: PC is destinstion of SR altering instruction
|
||||
[^:]*:24: Warning: CPU11: PC is destinstion of SR altering instruction
|
||||
[^:]*:25: Warning: CPU11: PC is destinstion of SR altering instruction
|
||||
[^:]*:26: Warning: CPU11: PC is destinstion of SR altering instruction
|
||||
[^:]*:30: Warning: CPU11: PC is destinstion of SR altering instruction
|
||||
[^:]*:31: Warning: CPU12: CMP/BIT with PC destinstion ignores next instruction
|
||||
[^:]*:31: Warning: CPU11: PC is destinstion of SR altering instruction
|
||||
[^:]*:34: Warning: CPU12: CMP/BIT with PC destinstion ignores next instruction
|
||||
[^:]*:34: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:35: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:36: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:37: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:38: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:39: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:40: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:41: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:42: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:43: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:44: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:45: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:46: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:47: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:48: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:49: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:50: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:51: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:52: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:18: Warning: CPU11: PC is destination of SR altering instruction
|
||||
[^:]*:19: Warning: CPU11: PC is destination of SR altering instruction
|
||||
[^:]*:20: Warning: CPU11: PC is destination of SR altering instruction
|
||||
[^:]*:21: Warning: CPU12: CMP/BIT with PC destination ignores next instruction
|
||||
[^:]*:21: Warning: CPU11: PC is destination of SR altering instruction
|
||||
[^:]*:22: Warning: CPU11: PC is destination of SR altering instruction
|
||||
[^:]*:23: Warning: CPU11: PC is destination of SR altering instruction
|
||||
[^:]*:24: Warning: CPU11: PC is destination of SR altering instruction
|
||||
[^:]*:25: Warning: CPU11: PC is destination of SR altering instruction
|
||||
[^:]*:26: Warning: CPU11: PC is destination of SR altering instruction
|
||||
[^:]*:30: Warning: CPU11: PC is destination of SR altering instruction
|
||||
[^:]*:31: Warning: CPU12: CMP/BIT with PC destination ignores next instruction
|
||||
[^:]*:31: Warning: CPU11: PC is destination of SR altering instruction
|
||||
[^:]*:34: Warning: CPU12: CMP/BIT with PC destination ignores next instruction
|
||||
[^:]*:34: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:35: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:36: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:37: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:38: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:39: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:40: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:41: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:42: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:43: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:44: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:45: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:46: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:47: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:48: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:49: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:50: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:51: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:52: Warning: CPU13: SR is destination of SR altering instruction
|
||||
[^:]*:56: Warning: CPU19: Instruction setting CPUOFF must be followed by a NOP
|
||||
[^:]*:57: Warning: CPU19: Instruction setting CPUOFF must be followed by a NOP
|
||||
[^:]*:57: Warning: CPU13: SR is destinstion of SR altering instruction
|
||||
[^:]*:57: Warning: CPU13: SR is destination of SR altering instruction
|
||||
|
||||
@ -119,7 +119,7 @@ _opcodes:
|
||||
ld #7,arp
|
||||
ld *ar2+,asm
|
||||
ldm ar3,a
|
||||
ld *ar2+,a || mac *ar3+,b ; single-line parallell
|
||||
ld *ar2+,a || mac *ar3+,b ; single-line parallel
|
||||
ld *ar4+,b || macr *ar5+,a ; with optional DST_ specified
|
||||
ld *ar2+,a ; double-line parallel
|
||||
|| mas *ar3+
|
||||
|
||||
@ -1,3 +1,12 @@
|
||||
2017-07-18 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
PR 21775
|
||||
* aarch64.cc: Fix spelling typos.
|
||||
* arm.cc: Likewise.
|
||||
* layout.cc: Likewise.
|
||||
* powerpc.cc: Likewise.
|
||||
* x86_64.cc: Likewise.
|
||||
|
||||
2017-07-12 Alan Modra <amodra@gmail.com>
|
||||
|
||||
* po/es.po: Update from translationproject.org/latest/gold/.
|
||||
|
||||
@ -270,7 +270,7 @@ public:
|
||||
uint32_t v = 0;
|
||||
uint32_t opc_v = 0;
|
||||
|
||||
/* Bail out quickly if INSN doesn't fall into the the load-store
|
||||
/* Bail out quickly if INSN doesn't fall into the load-store
|
||||
encoding space. */
|
||||
if (!aarch64_ldst (insn))
|
||||
return false;
|
||||
@ -1101,7 +1101,7 @@ public:
|
||||
|
||||
private:
|
||||
// Section offset of "adrp". (We do not need a "adrp_shndx_" field, because we
|
||||
// can can obtain it from its parent.)
|
||||
// can obtain it from its parent.)
|
||||
const unsigned int adrp_sh_offset_;
|
||||
};
|
||||
|
||||
|
||||
@ -129,7 +129,7 @@ const size_t ARM_TCB_SIZE = 8;
|
||||
// Target::do_select_as_default_target() hook so that we do not spend time
|
||||
// building the table if we are not linking ARM objects.
|
||||
//
|
||||
// An alternative is to to process the information in arm-reloc.def in
|
||||
// An alternative is to process the information in arm-reloc.def in
|
||||
// compilation time and generate a representation of it in PODs only. That
|
||||
// way we can avoid initialization when the linker starts.
|
||||
|
||||
@ -11660,7 +11660,7 @@ Target_arm<big_endian>::merge_object_attributes(
|
||||
if (in_attr[elfcpp::Tag_MPextension_use].int_value()
|
||||
!= in_attr[i].int_value())
|
||||
{
|
||||
gold_error(_("%s has has both the current and legacy "
|
||||
gold_error(_("%s has both the current and legacy "
|
||||
"Tag_MPextension_use attributes"),
|
||||
name);
|
||||
}
|
||||
@ -12775,7 +12775,7 @@ Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
|
||||
|
||||
Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
|
||||
|
||||
// Add a new stub if destination address in in the same page.
|
||||
// Add a new stub if destination address is in the same page.
|
||||
if (((address + i) & ~0xfffU) == (target & ~0xfffU))
|
||||
{
|
||||
Cortex_a8_stub* stub =
|
||||
@ -12877,7 +12877,7 @@ Target_arm<big_endian>::fix_exidx_coverage(
|
||||
const Task* task)
|
||||
{
|
||||
// We need to look at all the input sections in output in ascending
|
||||
// order of of output address. We do that by building a sorted list
|
||||
// order of output address. We do that by building a sorted list
|
||||
// of output sections by addresses. Then we looks at the output sections
|
||||
// in order. The input sections in an output section are already sorted
|
||||
// by addresses within the output section.
|
||||
|
||||
@ -3464,7 +3464,7 @@ is_text_segment(const Target* target, const Output_segment* seg)
|
||||
}
|
||||
|
||||
// Set the file offsets of all the segments, and all the sections they
|
||||
// contain. They have all been created. LOAD_SEG must be be laid out
|
||||
// contain. They have all been created. LOAD_SEG must be laid out
|
||||
// first. Return the offset of the data to follow.
|
||||
|
||||
off_t
|
||||
|
||||
@ -1064,7 +1064,7 @@ class Target_powerpc : public Sized_target<size, big_endian>
|
||||
this->set_processor_specific_flags(flags);
|
||||
}
|
||||
|
||||
// Offset to to save stack slot
|
||||
// Offset to save stack slot
|
||||
int
|
||||
stk_toc () const
|
||||
{ return this->abiversion() < 2 ? 40 : 24; }
|
||||
|
||||
@ -4211,7 +4211,7 @@ Target_x86_64<size>::Relocate::relocate(
|
||||
|
||||
case elfcpp::R_X86_64_GOT64:
|
||||
case elfcpp::R_X86_64_GOTPLT64:
|
||||
// R_X86_64_GOTPLT64 is obsolete and treated the the same as
|
||||
// R_X86_64_GOTPLT64 is obsolete and treated the same as
|
||||
// GOT64.
|
||||
gold_assert(have_got_offset);
|
||||
Reloc_funcs::rela64(view, got_offset, addend);
|
||||
|
||||
@ -1,3 +1,15 @@
|
||||
2017-07-18 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
PR 21775
|
||||
* aout/adobe.h: Fix spelling typos.
|
||||
* aout/aout64.h: Likewise.
|
||||
* aout/hp300hpux.h: Likewise.
|
||||
* elf/hppa.h: Likewise.
|
||||
* gdb/remote-sim.h: Likewise.
|
||||
* libiberty.h: Likewise.
|
||||
* mach-o/arm.h: Likewise.
|
||||
* opcode/v850.h: Likewise.
|
||||
|
||||
2017-07-14 Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
|
||||
|
||||
* dis-asm.h (struct disassemble_info): Change type of buffer_length
|
||||
|
||||
@ -24,23 +24,23 @@
|
||||
|
||||
/* Struct external_exec is the same. */
|
||||
|
||||
/* This is the layout on disk of the 32-bit or 64-bit exec header. */
|
||||
/* This is the layout on disk of the 32-bit or 64-bit exec header. */
|
||||
|
||||
struct external_exec
|
||||
{
|
||||
bfd_byte e_info[4]; /* magic number and stuff */
|
||||
bfd_byte e_text[BYTES_IN_WORD]; /* length of text section in bytes */
|
||||
bfd_byte e_data[BYTES_IN_WORD]; /* length of data section in bytes */
|
||||
bfd_byte e_bss[BYTES_IN_WORD]; /* length of bss area in bytes */
|
||||
bfd_byte e_syms[BYTES_IN_WORD]; /* length of symbol table in bytes */
|
||||
bfd_byte e_entry[BYTES_IN_WORD]; /* start address */
|
||||
bfd_byte e_trsize[BYTES_IN_WORD]; /* length of text relocation info */
|
||||
bfd_byte e_drsize[BYTES_IN_WORD]; /* length of data relocation info */
|
||||
bfd_byte e_info[4]; /* Magic number and stuff. */
|
||||
bfd_byte e_text[BYTES_IN_WORD]; /* Length of text section in bytes. */
|
||||
bfd_byte e_data[BYTES_IN_WORD]; /* Length of data section in bytes. */
|
||||
bfd_byte e_bss[BYTES_IN_WORD]; /* Length of bss area in bytes. */
|
||||
bfd_byte e_syms[BYTES_IN_WORD]; /* Length of symbol table in bytes. */
|
||||
bfd_byte e_entry[BYTES_IN_WORD]; /* Start address. */
|
||||
bfd_byte e_trsize[BYTES_IN_WORD]; /* Length of text relocation info. */
|
||||
bfd_byte e_drsize[BYTES_IN_WORD]; /* Length of data relocation info. */
|
||||
};
|
||||
|
||||
#define EXEC_BYTES_SIZE (4 + BYTES_IN_WORD * 7)
|
||||
|
||||
/* Magic numbers for a.out files */
|
||||
/* Magic numbers for a.out files. */
|
||||
|
||||
#undef ZMAGIC
|
||||
#define ZMAGIC 0xAD0BE /* Cute, eh? */
|
||||
@ -63,18 +63,20 @@ struct external_exec
|
||||
The actual text of the segments starts at N_TXTOFF in the file,
|
||||
regardless of how many or how few segment headers there are. */
|
||||
|
||||
struct external_segdesc {
|
||||
unsigned char e_type[1];
|
||||
unsigned char e_size[3];
|
||||
unsigned char e_virtbase[4];
|
||||
unsigned char e_filebase[4];
|
||||
struct external_segdesc
|
||||
{
|
||||
unsigned char e_type[1];
|
||||
unsigned char e_size[3];
|
||||
unsigned char e_virtbase[4];
|
||||
unsigned char e_filebase[4];
|
||||
};
|
||||
|
||||
struct internal_segdesc {
|
||||
unsigned int a_type:8; /* Segment type N_TEXT, N_DATA, 0 */
|
||||
unsigned int a_size:24; /* Segment size */
|
||||
bfd_vma a_virtbase; /* Virtual address */
|
||||
unsigned int a_filebase; /* Base address in object file */
|
||||
struct internal_segdesc
|
||||
{
|
||||
unsigned int a_type:8; /* Segment type N_TEXT, N_DATA, 0. */
|
||||
unsigned int a_size:24; /* Segment size. */
|
||||
bfd_vma a_virtbase; /* Virtual address. */
|
||||
unsigned int a_filebase; /* Base address in object file. */
|
||||
};
|
||||
|
||||
#define N_TXTADDR(x) is_this_really_unused?
|
||||
@ -97,41 +99,43 @@ struct internal_segdesc {
|
||||
#define N_SYMOFF(x) ( N_DRELOFF(x) + (x)->a_drsize )
|
||||
#define N_STROFF(x) ( N_SYMOFF(x) + (x)->a_syms )
|
||||
|
||||
/* Symbols */
|
||||
struct external_nlist {
|
||||
bfd_byte e_strx[BYTES_IN_WORD]; /* index into string table of name */
|
||||
bfd_byte e_type[1]; /* type of symbol */
|
||||
bfd_byte e_other[1]; /* misc info (usually empty) */
|
||||
bfd_byte e_desc[2]; /* description field */
|
||||
bfd_byte e_value[BYTES_IN_WORD]; /* value of symbol */
|
||||
/* Symbols. */
|
||||
struct external_nlist
|
||||
{
|
||||
bfd_byte e_strx[BYTES_IN_WORD]; /* Index into string table of name. */
|
||||
bfd_byte e_type[1]; /* Type of symbol. */
|
||||
bfd_byte e_other[1]; /* Misc info (usually empty). */
|
||||
bfd_byte e_desc[2]; /* Description field. */
|
||||
bfd_byte e_value[BYTES_IN_WORD]; /* Value of symbol. */
|
||||
};
|
||||
|
||||
#define EXTERNAL_NLIST_SIZE (BYTES_IN_WORD+4+BYTES_IN_WORD)
|
||||
|
||||
struct internal_nlist {
|
||||
unsigned long n_strx; /* index into string table of name */
|
||||
unsigned char n_type; /* type of symbol */
|
||||
unsigned char n_other; /* misc info (usually empty) */
|
||||
unsigned short n_desc; /* description field */
|
||||
bfd_vma n_value; /* value of symbol */
|
||||
struct internal_nlist
|
||||
{
|
||||
unsigned long n_strx; /* Index into string table of name. */
|
||||
unsigned char n_type; /* Type of symbol. */
|
||||
unsigned char n_other; /* Misc info (usually empty). */
|
||||
unsigned short n_desc; /* Description field. */
|
||||
bfd_vma n_value; /* Value of symbol. */
|
||||
};
|
||||
|
||||
/* The n_type field is the symbol type, containing: */
|
||||
|
||||
#define N_UNDF 0 /* Undefined symbol */
|
||||
#define N_ABS 2 /* Absolute symbol -- defined at particular addr */
|
||||
#define N_TEXT 4 /* Text sym -- defined at offset in text seg */
|
||||
#define N_DATA 6 /* Data sym -- defined at offset in data seg */
|
||||
#define N_BSS 8 /* BSS sym -- defined at offset in zero'd seg */
|
||||
#define N_COMM 0x12 /* Common symbol (visible after shared lib dynlink) */
|
||||
#define N_FN 0x1f /* File name of .o file */
|
||||
#define N_FN_SEQ 0x0C /* N_FN from Sequent compilers (sigh) */
|
||||
#define N_UNDF 0 /* Undefined symbol. */
|
||||
#define N_ABS 2 /* Absolute symbol -- defined at particular addr. */
|
||||
#define N_TEXT 4 /* Text sym -- defined at offset in text seg. */
|
||||
#define N_DATA 6 /* Data sym -- defined at offset in data seg. */
|
||||
#define N_BSS 8 /* BSS sym -- defined at offset in zero'd seg. */
|
||||
#define N_COMM 0x12 /* Common symbol (visible after shared lib dynlink). */
|
||||
#define N_FN 0x1f /* File name of .o file. */
|
||||
#define N_FN_SEQ 0x0C /* N_FN from Sequent compilers (sigh). */
|
||||
/* Note: N_EXT can only be usefully OR-ed with N_UNDF, N_ABS, N_TEXT,
|
||||
N_DATA, or N_BSS. When the low-order bit of other types is set,
|
||||
(e.g. N_WARNING versus N_FN), they are two different types. */
|
||||
#define N_EXT 1 /* External symbol (as opposed to local-to-this-file) */
|
||||
#define N_EXT 1 /* External symbol (as opposed to local-to-this-file). */
|
||||
#define N_TYPE 0x1e
|
||||
#define N_STAB 0xe0 /* If any of these bits are on, it's a debug symbol */
|
||||
#define N_STAB 0xe0 /* If any of these bits are on, it's a debug symbol. */
|
||||
|
||||
#define N_INDR 0x0a
|
||||
|
||||
@ -147,10 +151,10 @@ struct internal_nlist {
|
||||
in that it can satisfy undefined external references. */
|
||||
|
||||
/* These appear as input to LD, in a .o file. */
|
||||
#define N_SETA 0x14 /* Absolute set element symbol */
|
||||
#define N_SETT 0x16 /* Text set element symbol */
|
||||
#define N_SETD 0x18 /* Data set element symbol */
|
||||
#define N_SETB 0x1A /* Bss set element symbol */
|
||||
#define N_SETA 0x14 /* Absolute set element symbol. */
|
||||
#define N_SETT 0x16 /* Text set element symbol. */
|
||||
#define N_SETD 0x18 /* Data set element symbol. */
|
||||
#define N_SETB 0x1A /* Bss set element symbol. */
|
||||
|
||||
/* This is output from LD. */
|
||||
#define N_SETV 0x1C /* Pointer to set vector in data area. */
|
||||
@ -170,25 +174,25 @@ struct internal_nlist {
|
||||
instructions. Eg, on the 68k, each move instruction can reference
|
||||
the target with a displacement of 16 or 32 bits. On the sparc, move
|
||||
instructions use an offset of 14 bits, so the offset is stored in
|
||||
the reloc field, and the data in the section is ignored.
|
||||
*/
|
||||
the reloc field, and the data in the section is ignored. */
|
||||
|
||||
/* This structure describes a single relocation to be performed.
|
||||
The text-relocation section of the file is a vector of these structures,
|
||||
all of which apply to the text section.
|
||||
Likewise, the data-relocation section applies to the data section. */
|
||||
|
||||
struct reloc_std_external {
|
||||
bfd_byte r_address[BYTES_IN_WORD]; /* offset of of data to relocate */
|
||||
bfd_byte r_index[3]; /* symbol table index of symbol */
|
||||
bfd_byte r_type[1]; /* relocation type */
|
||||
struct reloc_std_external
|
||||
{
|
||||
bfd_byte r_address[BYTES_IN_WORD]; /* Offset of data to relocate. */
|
||||
bfd_byte r_index[3]; /* Symbol table index of symbol. */
|
||||
bfd_byte r_type[1]; /* Relocation type. */
|
||||
};
|
||||
|
||||
#define RELOC_STD_BITS_PCREL_BIG 0x80
|
||||
#define RELOC_STD_BITS_PCREL_LITTLE 0x01
|
||||
|
||||
#define RELOC_STD_BITS_LENGTH_BIG 0x60
|
||||
#define RELOC_STD_BITS_LENGTH_SH_BIG 5 /* To shift to units place */
|
||||
#define RELOC_STD_BITS_LENGTH_SH_BIG 5 /* To shift to units place. */
|
||||
#define RELOC_STD_BITS_LENGTH_LITTLE 0x06
|
||||
#define RELOC_STD_BITS_LENGTH_SH_LITTLE 1
|
||||
|
||||
@ -204,7 +208,7 @@ struct reloc_std_external {
|
||||
#define RELOC_STD_BITS_RELATIVE_BIG 0x02
|
||||
#define RELOC_STD_BITS_RELATIVE_LITTLE 0x02
|
||||
|
||||
#define RELOC_STD_SIZE (BYTES_IN_WORD + 3 + 1) /* Bytes per relocation entry */
|
||||
#define RELOC_STD_SIZE (BYTES_IN_WORD + 3 + 1) /* Bytes per relocation entry. */
|
||||
|
||||
struct reloc_std_internal
|
||||
{
|
||||
@ -227,21 +231,22 @@ struct reloc_std_internal
|
||||
unsigned int r_extern:1;
|
||||
/* The next three bits are for SunOS shared libraries, and seem to
|
||||
be undocumented. */
|
||||
unsigned int r_baserel:1; /* Linkage table relative */
|
||||
unsigned int r_jmptable:1; /* pc-relative to jump table */
|
||||
unsigned int r_relative:1; /* "relative relocation" */
|
||||
unsigned int r_baserel:1; /* Linkage table relative. */
|
||||
unsigned int r_jmptable:1; /* pc-relative to jump table. */
|
||||
unsigned int r_relative:1; /* "relative relocation". */
|
||||
/* unused */
|
||||
unsigned int r_pad:1; /* Padding -- set to zero */
|
||||
unsigned int r_pad:1; /* Padding -- set to zero. */
|
||||
};
|
||||
|
||||
|
||||
/* EXTENDED RELOCS */
|
||||
|
||||
struct reloc_ext_external {
|
||||
bfd_byte r_address[BYTES_IN_WORD]; /* offset of of data to relocate */
|
||||
bfd_byte r_index[3]; /* symbol table index of symbol */
|
||||
bfd_byte r_type[1]; /* relocation type */
|
||||
bfd_byte r_addend[BYTES_IN_WORD]; /* datum addend */
|
||||
struct reloc_ext_external
|
||||
{
|
||||
bfd_byte r_address[BYTES_IN_WORD]; /* Offset of data to relocate. */
|
||||
bfd_byte r_index[3]; /* Symbol table index of symbol. */
|
||||
bfd_byte r_type[1]; /* Relocation type. */
|
||||
bfd_byte r_addend[BYTES_IN_WORD]; /* Datum addend. */
|
||||
};
|
||||
|
||||
#define RELOC_EXT_BITS_EXTERN_BIG 0x80
|
||||
@ -257,15 +262,15 @@ struct reloc_ext_external {
|
||||
|
||||
enum reloc_type
|
||||
{
|
||||
/* simple relocations */
|
||||
/* Simple relocations. */
|
||||
RELOC_8, /* data[0:7] = addend + sv */
|
||||
RELOC_16, /* data[0:15] = addend + sv */
|
||||
RELOC_32, /* data[0:31] = addend + sv */
|
||||
/* pc-rel displacement */
|
||||
/* PC-rel displacement. */
|
||||
RELOC_DISP8, /* data[0:7] = addend - pc + sv */
|
||||
RELOC_DISP16, /* data[0:15] = addend - pc + sv */
|
||||
RELOC_DISP32, /* data[0:31] = addend - pc + sv */
|
||||
/* Special */
|
||||
/* Special. */
|
||||
RELOC_WDISP30, /* data[0:29] = (addend + sv - pc)>>2 */
|
||||
RELOC_WDISP22, /* data[0:21] = (addend + sv - pc)>>2 */
|
||||
RELOC_HI22, /* data[0:21] = (addend + sv)>>10 */
|
||||
@ -274,16 +279,16 @@ enum reloc_type
|
||||
RELOC_LO10, /* data[0:9] = (addend + sv) */
|
||||
RELOC_SFA_BASE,
|
||||
RELOC_SFA_OFF13,
|
||||
/* P.I.C. (base-relative) */
|
||||
RELOC_BASE10, /* Not sure - maybe we can do this the */
|
||||
RELOC_BASE13, /* right way now */
|
||||
/* P.I.C. (base-relative). */
|
||||
RELOC_BASE10, /* Not sure - maybe we can do this the */
|
||||
RELOC_BASE13, /* right way now. */
|
||||
RELOC_BASE22,
|
||||
/* for some sort of pc-rel P.I.C. (?) */
|
||||
/* For some sort of pc-rel P.I.C. (?) */
|
||||
RELOC_PC10,
|
||||
RELOC_PC22,
|
||||
/* P.I.C. jump table */
|
||||
/* P.I.C. jump table. */
|
||||
RELOC_JMP_TBL,
|
||||
/* reputedly for shared libraries somehow */
|
||||
/* Reputedly for shared libraries somehow. */
|
||||
RELOC_SEGOFF16,
|
||||
RELOC_GLOB_DAT,
|
||||
RELOC_JMP_SLOT,
|
||||
@ -301,14 +306,14 @@ enum reloc_type
|
||||
RELOC_CONSTH,
|
||||
|
||||
NO_RELOC
|
||||
};
|
||||
|
||||
|
||||
struct reloc_internal {
|
||||
bfd_vma r_address; /* offset of of data to relocate */
|
||||
long r_index; /* symbol table index of symbol */
|
||||
enum reloc_type r_type; /* relocation type */
|
||||
bfd_vma r_addend; /* datum addend */
|
||||
};
|
||||
|
||||
#endif /* __A_OUT_ADOBE_H__ */
|
||||
struct reloc_internal
|
||||
{
|
||||
bfd_vma r_address; /* Offset of data to relocate. */
|
||||
long r_index; /* Symbol table index of symbol. */
|
||||
enum reloc_type r_type; /* Relocation type. */
|
||||
bfd_vma r_addend; /* Datum addend. */
|
||||
};
|
||||
|
||||
#endif /* __A_OUT_ADOBE_H__ */
|
||||
|
||||
@ -346,7 +346,7 @@ struct internal_nlist
|
||||
|
||||
struct reloc_std_external
|
||||
{
|
||||
bfd_byte r_address[BYTES_IN_WORD]; /* Offset of of data to relocate. */
|
||||
bfd_byte r_address[BYTES_IN_WORD]; /* Offset of data to relocate. */
|
||||
bfd_byte r_index[3]; /* Symbol table index of symbol. */
|
||||
bfd_byte r_type[1]; /* Relocation type. */
|
||||
};
|
||||
@ -406,7 +406,7 @@ struct reloc_std_internal
|
||||
|
||||
struct reloc_ext_external
|
||||
{
|
||||
bfd_byte r_address[BYTES_IN_WORD]; /* Offset of of data to relocate. */
|
||||
bfd_byte r_address[BYTES_IN_WORD]; /* Offset of data to relocate. */
|
||||
bfd_byte r_index[3]; /* Symbol table index of symbol. */
|
||||
bfd_byte r_type[1]; /* Relocation type. */
|
||||
bfd_byte r_addend[BYTES_IN_WORD]; /* Datum addend. */
|
||||
@ -501,7 +501,7 @@ enum reloc_type
|
||||
|
||||
struct reloc_internal
|
||||
{
|
||||
bfd_vma r_address; /* Offset of of data to relocate. */
|
||||
bfd_vma r_address; /* Offset of data to relocate. */
|
||||
long r_index; /* Symbol table index of symbol. */
|
||||
enum reloc_type r_type; /* Relocation type. */
|
||||
bfd_vma r_addend; /* Datum addend. */
|
||||
|
||||
@ -38,47 +38,47 @@ struct hp300hpux_exec_bytes
|
||||
#define EXEC_BYTES_SIZE 64
|
||||
|
||||
struct hp300hpux_nlist_bytes
|
||||
{
|
||||
unsigned char e_value[4];
|
||||
unsigned char e_type[1];
|
||||
unsigned char e_length[1]; /* length of ascii symbol name */
|
||||
unsigned char e_almod[2]; /* alignment mod */
|
||||
unsigned char e_shlib[2]; /* info about dynamic linking */
|
||||
};
|
||||
{
|
||||
unsigned char e_value[4];
|
||||
unsigned char e_type[1];
|
||||
unsigned char e_length[1]; /* Length of ascii symbol name. */
|
||||
unsigned char e_almod[2]; /* Alignment mod. */
|
||||
unsigned char e_shlib[2]; /* Info about dynamic linking. */
|
||||
};
|
||||
#define EXTERNAL_NLIST_SIZE 10
|
||||
|
||||
struct hp300hpux_reloc
|
||||
{
|
||||
unsigned char r_address[4];/* offset of of data to relocate */
|
||||
unsigned char r_index[2]; /* symbol table index of symbol */
|
||||
unsigned char r_type[1]; /* relocation type */
|
||||
unsigned char r_length[1]; /* length of item to reloc */
|
||||
};
|
||||
{
|
||||
unsigned char r_address[4];/* offset of data to relocate */
|
||||
unsigned char r_index[2]; /* symbol table index of symbol */
|
||||
unsigned char r_type[1]; /* relocation type */
|
||||
unsigned char r_length[1]; /* length of item to reloc */
|
||||
};
|
||||
|
||||
struct hp300hpux_header_extension
|
||||
{
|
||||
unsigned char e_syms[4];
|
||||
unsigned char unique_headers[12*4];
|
||||
unsigned char e_header[2]; /* type of header */
|
||||
unsigned char e_version[2]; /* version */
|
||||
unsigned char e_size[4]; /* bytes following*/
|
||||
unsigned char e_extension[4];/* file offset of next extension */
|
||||
unsigned char e_syms[4];
|
||||
unsigned char unique_headers[12*4];
|
||||
unsigned char e_header[2]; /* Type of header. */
|
||||
unsigned char e_version[2]; /* Version. */
|
||||
unsigned char e_size[4]; /* Bytes following. */
|
||||
unsigned char e_extension[4];/* File offset of next extension. */
|
||||
};
|
||||
#define EXTERNAL_EXTENSION_HEADER_SIZE (16*4)
|
||||
|
||||
/* hpux separates object files (0x106) and impure executables (0x107) */
|
||||
/* but the bfd code does not distinguish between them. Since we want to*/
|
||||
/* read hpux .o files, we add an special define and use it below in */
|
||||
/* offset and address calculations. */
|
||||
/* HPUX separates object files (0x106) and impure executables (0x107)
|
||||
but the bfd code does not distinguish between them. Since we want to
|
||||
read hpux .o files, we add an special define and use it below in
|
||||
offset and address calculations. */
|
||||
|
||||
#define HPUX_DOT_O_MAGIC 0x106
|
||||
#define OMAGIC 0x107 /* object file or impure executable. */
|
||||
#define OMAGIC 0x107 /* Object file or impure executable. */
|
||||
#define NMAGIC 0x108 /* Code indicating pure executable. */
|
||||
#define ZMAGIC 0x10B /* demand-paged executable. */
|
||||
#define ZMAGIC 0x10B /* Demand-paged executable. */
|
||||
|
||||
#define N_HEADER_IN_TEXT(x) 0
|
||||
|
||||
#if 0 /* libaout.h only uses the lower 8 bits */
|
||||
#if 0 /* libaout.h only uses the lower 8 bits. */
|
||||
#define HP98x6_ID 0x20A
|
||||
#define HP9000S200_ID 0x20C
|
||||
#endif
|
||||
@ -121,7 +121,7 @@ struct hp300hpux_header_extension
|
||||
#define N_EXTHOFF(x) ( N_DRELOFF(x) /* + (x)->a_drsize */)
|
||||
#define N_STROFF(x) ( 0 /* no string table */ )
|
||||
|
||||
/* use these when the file has gnu symbol tables */
|
||||
/* Use these when the file has gnu symbol tables. */
|
||||
#define N_GNU_TRELOFF(x) (N_DATOFF(x) + (x)->a_data)
|
||||
#define N_GNU_DRELOFF(x) (N_GNU_TRELOFF(x) + (x)->a_trsize)
|
||||
#define N_GNU_SYMOFF(x) (N_GNU_DRELOFF(x) + (x)->a_drsize)
|
||||
|
||||
@ -138,7 +138,7 @@ RELOC_NUMBER (R_PARISC_DIR14F, 7)
|
||||
When supporting argument relocations, function calls must be
|
||||
accompanied by parameter relocation information. This information is
|
||||
carried in the ten high-order bits of the addend field. The remaining
|
||||
22 bits of of the addend field are sign-extended to form the Addend.
|
||||
22 bits of the addend field are sign-extended to form the Addend.
|
||||
|
||||
Note the code to build argument relocations depends on the
|
||||
addend being zero. A consequence of this limitation is GAS
|
||||
|
||||
@ -261,7 +261,7 @@ int sim_stop (SIM_DESC sd);
|
||||
that information is not directly accessable via this interface.
|
||||
|
||||
SIM_SIGNALLED: The program has been terminated by a signal. The
|
||||
simulator has encountered target code that causes the the program
|
||||
simulator has encountered target code that causes the program
|
||||
to exit with signal SIGRC.
|
||||
|
||||
SIM_RUNNING, SIM_POLLING: The return of one of these values
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
Copyright (C) 1997-2017 Free Software Foundation, Inc.
|
||||
|
||||
Note - certain prototypes declared in this header file are for
|
||||
functions whoes implementation copyright does not belong to the
|
||||
functions whose implementation copyright does not belong to the
|
||||
FSF. Those prototypes are present in this file for reference
|
||||
purposes only and their presence in this file should not construed
|
||||
as an indication of ownership by the FSF of the implementation of
|
||||
|
||||
@ -24,7 +24,7 @@
|
||||
/* ARM relocations. */
|
||||
#define BFD_MACH_O_ARM_RELOC_VANILLA 0 /* Generic relocation. */
|
||||
#define BFD_MACH_O_ARM_RELOC_PAIR 1 /* Second entry in a pair. */
|
||||
#define BFD_MACH_O_ARM_RELOC_SECTDIFF 2 /* Substract with a PAIR. */
|
||||
#define BFD_MACH_O_ARM_RELOC_SECTDIFF 2 /* Subtract with a PAIR. */
|
||||
#define BFD_MACH_O_ARM_RELOC_LOCAL_SECTDIFF 3 /* Like above, but local ref. */
|
||||
#define BFD_MACH_O_ARM_RELOC_PB_LA_PTR 4 /* Prebound lazy pointer. */
|
||||
#define BFD_MACH_O_ARM_RELOC_BR24 5 /* 24bit branch. */
|
||||
|
||||
@ -230,10 +230,10 @@ extern const struct v850_operand v850_operands[];
|
||||
/* The operand has '%' prefix. */
|
||||
#define V850_OPERAND_PERCENT 0x200000
|
||||
|
||||
/* This operand is a cache oparation. */
|
||||
/* This operand is a cache operation. */
|
||||
#define V850_OPERAND_CACHEOP 0x400000
|
||||
|
||||
/* This operand is a prefetch oparation. */
|
||||
/* This operand is a prefetch operation. */
|
||||
#define V850_OPERAND_PREFOP 0x800000
|
||||
|
||||
/* A PC-relative displacement where a positive value indicates a backwards displacement. */
|
||||
|
||||
@ -1,3 +1,9 @@
|
||||
2017-07-18 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
PR 21775
|
||||
* ld.texinfo: Fix spelling typos.
|
||||
* testsuite/ld-elfcomm/elfcomm.exp: Likewise.
|
||||
|
||||
2017-07-17 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
* testsuite/ld-i386/i386.exp: Run pie1 and pie1-nacl.
|
||||
|
||||
@ -7888,7 +7888,7 @@ application will behave unexpectedly.
|
||||
@code{PRIVATE}: Put the symbol in the DLL's export table, but do not put
|
||||
it into the static import library used to resolve imports at link time. The
|
||||
symbol can still be imported using the @code{LoadLibrary/GetProcAddress}
|
||||
API at runtime or by by using the GNU ld extension of linking directly to
|
||||
API at runtime or by using the GNU ld extension of linking directly to
|
||||
the DLL without an import library.
|
||||
|
||||
See ld/deffilep.y in the binutils sources for the full specification of
|
||||
|
||||
@ -101,7 +101,7 @@ proc test_sort_common {} {
|
||||
|
||||
test_sort_common
|
||||
|
||||
set test1 "size/aligment change of common symbols"
|
||||
set test1 "size/alignment change of common symbols"
|
||||
set test1w1 "$test1 (warning 1)"
|
||||
set test1w2 "$test1 (warning 2)"
|
||||
set test1c1 "$test1 (change 1)"
|
||||
|
||||
@ -1,3 +1,9 @@
|
||||
2017-07-18 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
PR 21775
|
||||
* aarch64-opc.c: Fix spelling typos.
|
||||
* i386-dis.c: Likewise.
|
||||
|
||||
2017-07-14 Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
|
||||
|
||||
* dis-buf.c (buffer_read_memory): Change type of end_addr_offset,
|
||||
|
||||
@ -3050,7 +3050,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
|
||||
case AARCH64_OPND_PAIRREG:
|
||||
case AARCH64_OPND_SVE_Rm:
|
||||
/* The optional-ness of <Xt> in e.g. IC <ic_op>{, <Xt>} is determined by
|
||||
the <ic_op>, therefore we we use opnd->present to override the
|
||||
the <ic_op>, therefore we use opnd->present to override the
|
||||
generic optional-ness information. */
|
||||
if (opnd->type == AARCH64_OPND_Rt_SYS)
|
||||
{
|
||||
|
||||
@ -6957,7 +6957,7 @@ static const struct dis386 x86_64_table[][2] = {
|
||||
|
||||
/* X86_64_82 */
|
||||
{
|
||||
/* Opcode 0x82 is an alias of of opcode 0x80 in 32-bit mode. */
|
||||
/* Opcode 0x82 is an alias of opcode 0x80 in 32-bit mode. */
|
||||
{ REG_TABLE (REG_80) },
|
||||
},
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user