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gdb/riscv: make riscv target description names global
A later commit will need the names of the RISC-V target description features in files other than riscv-tdep.c. This commit just makes the names global strings that can be accessed from other riscv-*.c files. There should be no user visible changes after this commit. gdb/ChangeLog: * riscv-tdep.c (riscv_feature_name_csr): Define. (riscv_feature_name_cpu): Define. (riscv_feature_name_fpu): Define. (riscv_feature_name_virtual): Define. (riscv_xreg_feature): Use riscv_feature_name_cpu. (riscv_freg_feature): Use riscv_feature_name_fpu. (riscv_virtual_feature): Use riscv_feature_name_virtual. (riscv_csr_feature): Use riscv_feature_name_csr. * riscv-tdep.h (riscv_feature_name_csr): Declare.
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@ -1,3 +1,15 @@
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2021-03-05 Andrew Burgess <andrew.burgess@embecosm.com>
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* riscv-tdep.c (riscv_feature_name_csr): Define.
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(riscv_feature_name_cpu): Define.
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(riscv_feature_name_fpu): Define.
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(riscv_feature_name_virtual): Define.
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(riscv_xreg_feature): Use riscv_feature_name_cpu.
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(riscv_freg_feature): Use riscv_feature_name_fpu.
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(riscv_virtual_feature): Use riscv_feature_name_virtual.
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(riscv_csr_feature): Use riscv_feature_name_csr.
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* riscv-tdep.h (riscv_feature_name_csr): Declare.
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2021-03-05 Andrew Burgess <andrew.burgess@embecosm.com>
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Craig Blackmore <craig.blackmore@embecosm.com>
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@ -94,6 +94,12 @@ static unsigned int riscv_debug_unwinder = 0;
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static unsigned int riscv_debug_gdbarch = 0;
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/* The names of the RISC-V target description features. */
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const char *riscv_feature_name_csr = "org.gnu.gdb.riscv.csr";
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static const char *riscv_feature_name_cpu = "org.gnu.gdb.riscv.cpu";
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static const char *riscv_feature_name_fpu = "org.gnu.gdb.riscv.fpu";
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static const char *riscv_feature_name_virtual = "org.gnu.gdb.riscv.virtual";
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/* Cached information about a frame. */
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struct riscv_unwind_cache
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@ -257,7 +263,7 @@ riscv_register_feature::register_info::check
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struct riscv_xreg_feature : public riscv_register_feature
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{
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riscv_xreg_feature ()
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: riscv_register_feature ("org.gnu.gdb.riscv.cpu")
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: riscv_register_feature (riscv_feature_name_cpu)
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{
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m_registers = {
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{ RISCV_ZERO_REGNUM + 0, { "zero", "x0" } },
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@ -354,7 +360,7 @@ static const struct riscv_xreg_feature riscv_xreg_feature;
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struct riscv_freg_feature : public riscv_register_feature
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{
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riscv_freg_feature ()
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: riscv_register_feature ("org.gnu.gdb.riscv.fpu")
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: riscv_register_feature (riscv_feature_name_fpu)
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{
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m_registers = {
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{ RISCV_FIRST_FP_REGNUM + 0, { "ft0", "f0" } },
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@ -482,7 +488,7 @@ static const struct riscv_freg_feature riscv_freg_feature;
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struct riscv_virtual_feature : public riscv_register_feature
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{
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riscv_virtual_feature ()
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: riscv_register_feature ("org.gnu.gdb.riscv.virtual")
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: riscv_register_feature (riscv_feature_name_virtual)
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{
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m_registers = {
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{ RISCV_PRIV_REGNUM, { "priv" } }
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@ -518,7 +524,7 @@ static const struct riscv_virtual_feature riscv_virtual_feature;
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struct riscv_csr_feature : public riscv_register_feature
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{
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riscv_csr_feature ()
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: riscv_register_feature ("org.gnu.gdb.riscv.csr")
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: riscv_register_feature (riscv_feature_name_csr)
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{
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m_registers = {
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#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
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@ -160,4 +160,7 @@ extern void riscv_supply_regset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *regs, size_t len);
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/* The names of the RISC-V target description features. */
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extern const char *riscv_feature_name_csr;
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#endif /* RISCV_TDEP_H */
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