gdb: remove uses of VLA

Remove uses of VLAs, replace with gdb::byte_vector.  There might be more
in files that I can't compile, but it's difficult to tell without
actually compiling on all platforms.

Many thanks to the Linaro pre-commit CI for helping find some problems
with an earlier iteration of this patch.

Change-Id: I3e5e34fcac51f3e6b732bb801c77944e010b162e
Reviewed-by: Keith Seitz <keiths@redhat.com>
This commit is contained in:
Simon Marchi 2024-07-31 14:06:12 -04:00 committed by Simon Marchi
parent 6ce1ea97af
commit d724d71ad2
13 changed files with 86 additions and 85 deletions

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@ -496,12 +496,11 @@ fetch_tlsregs_from_thread (struct regcache *regcache)
gdb_assert (regno != -1); gdb_assert (regno != -1);
gdb_assert (tdep->tls_register_count > 0); gdb_assert (tdep->tls_register_count > 0);
uint64_t tpidrs[tdep->tls_register_count]; std::vector<uint64_t> tpidrs (tdep->tls_register_count);
memset(tpidrs, 0, sizeof(tpidrs));
struct iovec iovec; struct iovec iovec;
iovec.iov_base = tpidrs; iovec.iov_base = tpidrs.data ();
iovec.iov_len = sizeof (tpidrs); iovec.iov_len = tpidrs.size () * sizeof (tpidrs[0]);
int tid = get_ptrace_pid (regcache->ptid ()); int tid = get_ptrace_pid (regcache->ptid ());
if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TLS, &iovec) != 0) if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TLS, &iovec) != 0)
@ -524,8 +523,7 @@ store_tlsregs_to_thread (struct regcache *regcache)
gdb_assert (regno != -1); gdb_assert (regno != -1);
gdb_assert (tdep->tls_register_count > 0); gdb_assert (tdep->tls_register_count > 0);
uint64_t tpidrs[tdep->tls_register_count]; std::vector<uint64_t> tpidrs (tdep->tls_register_count);
memset(tpidrs, 0, sizeof(tpidrs));
for (int i = 0; i < tdep->tls_register_count; i++) for (int i = 0; i < tdep->tls_register_count; i++)
{ {
@ -536,8 +534,8 @@ store_tlsregs_to_thread (struct regcache *regcache)
} }
struct iovec iovec; struct iovec iovec;
iovec.iov_base = &tpidrs; iovec.iov_base = tpidrs.data ();
iovec.iov_len = sizeof (tpidrs); iovec.iov_len = tpidrs.size () * sizeof (tpidrs[0]);
int tid = get_ptrace_pid (regcache->ptid ()); int tid = get_ptrace_pid (regcache->ptid ());
if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_TLS, &iovec) != 0) if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_TLS, &iovec) != 0)

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@ -1298,8 +1298,7 @@ aarch64_linux_supply_za_regset (const struct regset *regset,
} }
else else
{ {
gdb_byte za_zeroed[za_bytes]; gdb::byte_vector za_zeroed (za_bytes, 0);
memset (za_zeroed, 0, za_bytes);
regcache->raw_supply (tdep->sme_za_regnum, za_zeroed); regcache->raw_supply (tdep->sme_za_regnum, za_zeroed);
} }
} }

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@ -1728,16 +1728,15 @@ pass_in_v (struct gdbarch *gdbarch,
{ {
int regnum = AARCH64_V0_REGNUM + info->nsrn; int regnum = AARCH64_V0_REGNUM + info->nsrn;
/* Enough space for a full vector register. */ /* Enough space for a full vector register. */
gdb_byte reg[register_size (gdbarch, regnum)]; gdb::byte_vector reg (register_size (gdbarch, regnum), 0);
gdb_assert (len <= sizeof (reg)); gdb_assert (len <= reg.size ());
info->argnum++; info->argnum++;
info->nsrn++; info->nsrn++;
memset (reg, 0, sizeof (reg));
/* PCS C.1, the argument is allocated to the least significant /* PCS C.1, the argument is allocated to the least significant
bits of V register. */ bits of V register. */
memcpy (reg, buf, len); memcpy (reg.data (), buf, len);
regcache->cooked_write (regnum, reg); regcache->cooked_write (regnum, reg);
aarch64_debug_printf ("arg %d in %s", info->argnum, aarch64_debug_printf ("arg %d in %s", info->argnum,
@ -2544,8 +2543,8 @@ aarch64_extract_return_value (struct type *type, struct regcache *regs,
{ {
int regno = AARCH64_V0_REGNUM + i; int regno = AARCH64_V0_REGNUM + i;
/* Enough space for a full vector register. */ /* Enough space for a full vector register. */
gdb_byte buf[register_size (gdbarch, regno)]; gdb::byte_vector buf (register_size (gdbarch, regno));
gdb_assert (len <= sizeof (buf)); gdb_assert (len <= buf.size ());
aarch64_debug_printf aarch64_debug_printf
("read HFA or HVA return value element %d from %s", ("read HFA or HVA return value element %d from %s",
@ -2553,7 +2552,7 @@ aarch64_extract_return_value (struct type *type, struct regcache *regs,
regs->cooked_read (regno, buf); regs->cooked_read (regno, buf);
memcpy (valbuf, buf, len); memcpy (valbuf, buf.data (), len);
valbuf += len; valbuf += len;
} }
} }
@ -2658,8 +2657,8 @@ aarch64_store_return_value (struct type *type, struct regcache *regs,
{ {
int regno = AARCH64_V0_REGNUM + i; int regno = AARCH64_V0_REGNUM + i;
/* Enough space for a full vector register. */ /* Enough space for a full vector register. */
gdb_byte tmpbuf[register_size (gdbarch, regno)]; gdb::byte_vector tmpbuf (register_size (gdbarch, regno));
gdb_assert (len <= sizeof (tmpbuf)); gdb_assert (len <= tmpbuf.size ());
aarch64_debug_printf aarch64_debug_printf
("write HFA or HVA return value element %d to %s", ("write HFA or HVA return value element %d to %s",
@ -2670,7 +2669,7 @@ aarch64_store_return_value (struct type *type, struct regcache *regs,
original contents of the register before overriding it with a new original contents of the register before overriding it with a new
value that has a potential size <= 16 bytes. */ value that has a potential size <= 16 bytes. */
regs->cooked_read (regno, tmpbuf); regs->cooked_read (regno, tmpbuf);
memcpy (tmpbuf, valbuf, memcpy (tmpbuf.data (), valbuf,
len > V_REGISTER_SIZE ? V_REGISTER_SIZE : len); len > V_REGISTER_SIZE ? V_REGISTER_SIZE : len);
regs->cooked_write (regno, tmpbuf); regs->cooked_write (regno, tmpbuf);
valbuf += len; valbuf += len;
@ -3303,18 +3302,16 @@ aarch64_pseudo_write_1 (gdbarch *gdbarch, const frame_info_ptr &next_frame,
{ {
unsigned raw_regnum = AARCH64_V0_REGNUM + regnum_offset; unsigned raw_regnum = AARCH64_V0_REGNUM + regnum_offset;
/* Enough space for a full vector register. */ /* Enough space for a full vector register.
int raw_reg_size = register_size (gdbarch, raw_regnum);
gdb_byte raw_buf[raw_reg_size];
static_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM);
/* Ensure the register buffer is zero, we want gdb writes of the Ensure the register buffer is zero, we want gdb writes of the
various 'scalar' pseudo registers to behavior like architectural various 'scalar' pseudo registers to behavior like architectural
writes, register width bytes are written the remainder are set to writes, register width bytes are written the remainder are set to
zero. */ zero. */
memset (raw_buf, 0, register_size (gdbarch, AARCH64_V0_REGNUM)); gdb::byte_vector raw_buf (register_size (gdbarch, raw_regnum), 0);
static_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM);
gdb::array_view<gdb_byte> raw_view (raw_buf, raw_reg_size); gdb::array_view<gdb_byte> raw_view (raw_buf);
copy (buf, raw_view.slice (0, buf.size ())); copy (buf, raw_view.slice (0, buf.size ()));
put_frame_register (next_frame, raw_regnum, raw_view); put_frame_register (next_frame, raw_regnum, raw_view);
} }

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@ -235,22 +235,21 @@ amd64_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
if (have_ptrace_getregset == TRIBOOL_TRUE) if (have_ptrace_getregset == TRIBOOL_TRUE)
{ {
char xstateregs[tdep->xsave_layout.sizeof_xsave];
struct iovec iov;
/* Pre-4.14 kernels have a bug (fixed by commit 0852b374173b /* Pre-4.14 kernels have a bug (fixed by commit 0852b374173b
"x86/fpu: Add FPU state copying quirk to handle XRSTOR failure on "x86/fpu: Add FPU state copying quirk to handle XRSTOR failure on
Intel Skylake CPUs") that sometimes causes the mxcsr location in Intel Skylake CPUs") that sometimes causes the mxcsr location in
xstateregs not to be copied by PTRACE_GETREGSET. Make sure that xstateregs not to be copied by PTRACE_GETREGSET. Make sure that
the location is at least initialized with a defined value. */ the location is at least initialized with a defined value. */
memset (xstateregs, 0, sizeof (xstateregs)); gdb::byte_vector xstateregs (tdep->xsave_layout.sizeof_xsave, 0);
iov.iov_base = xstateregs; struct iovec iov;
iov.iov_len = sizeof (xstateregs);
iov.iov_base = xstateregs.data ();
iov.iov_len = xstateregs.size ();
if (ptrace (PTRACE_GETREGSET, tid, if (ptrace (PTRACE_GETREGSET, tid,
(unsigned int) NT_X86_XSTATE, (long) &iov) < 0) (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
perror_with_name (_("Couldn't get extended state status")); perror_with_name (_("Couldn't get extended state status"));
amd64_supply_xsave (regcache, -1, xstateregs); amd64_supply_xsave (regcache, -1, xstateregs.data ());
} }
else else
{ {
@ -300,16 +299,16 @@ amd64_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
if (have_ptrace_getregset == TRIBOOL_TRUE) if (have_ptrace_getregset == TRIBOOL_TRUE)
{ {
char xstateregs[tdep->xsave_layout.sizeof_xsave]; gdb::byte_vector xstateregs (tdep->xsave_layout.sizeof_xsave);
struct iovec iov; struct iovec iov;
iov.iov_base = xstateregs; iov.iov_base = xstateregs.data ();
iov.iov_len = sizeof (xstateregs); iov.iov_len = xstateregs.size ();
if (ptrace (PTRACE_GETREGSET, tid, if (ptrace (PTRACE_GETREGSET, tid,
(unsigned int) NT_X86_XSTATE, (long) &iov) < 0) (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
perror_with_name (_("Couldn't get extended state status")); perror_with_name (_("Couldn't get extended state status"));
amd64_collect_xsave (regcache, regnum, xstateregs, 0); amd64_collect_xsave (regcache, regnum, xstateregs.data (), 0);
if (ptrace (PTRACE_SETREGSET, tid, if (ptrace (PTRACE_SETREGSET, tid,
(unsigned int) NT_X86_XSTATE, (long) &iov) < 0) (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)

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@ -2034,21 +2034,23 @@ fbsd_get_thread_local_address (struct gdbarch *gdbarch, CORE_ADDR dtv_addr,
{ {
LONGEST tls_index = fbsd_get_tls_index (gdbarch, lm_addr); LONGEST tls_index = fbsd_get_tls_index (gdbarch, lm_addr);
gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT]; gdb::byte_vector buf (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
if (target_read_memory (dtv_addr, buf, sizeof buf) != 0) if (target_read_memory (dtv_addr, buf.data (), buf.size ()) != 0)
throw_error (TLS_GENERIC_ERROR, throw_error (TLS_GENERIC_ERROR,
_("Cannot find thread-local variables on this target")); _("Cannot find thread-local variables on this target"));
const struct builtin_type *builtin = builtin_type (gdbarch); const struct builtin_type *builtin = builtin_type (gdbarch);
CORE_ADDR addr = gdbarch_pointer_to_address (gdbarch, CORE_ADDR addr
builtin->builtin_data_ptr, buf); = gdbarch_pointer_to_address (gdbarch, builtin->builtin_data_ptr,
buf.data ());
addr += (tls_index + 1) * builtin->builtin_data_ptr->length (); addr += (tls_index + 1) * builtin->builtin_data_ptr->length ();
if (target_read_memory (addr, buf, sizeof buf) != 0) if (target_read_memory (addr, buf.data (), buf.size ()) != 0)
throw_error (TLS_GENERIC_ERROR, throw_error (TLS_GENERIC_ERROR,
_("Cannot find thread-local variables on this target")); _("Cannot find thread-local variables on this target"));
addr = gdbarch_pointer_to_address (gdbarch, builtin->builtin_data_ptr, buf); addr = gdbarch_pointer_to_address (gdbarch, builtin->builtin_data_ptr,
buf.data ());
return addr + offset; return addr + offset;
} }

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@ -315,19 +315,19 @@ fetch_xstateregs (struct regcache *regcache, int tid)
{ {
struct gdbarch *gdbarch = regcache->arch (); struct gdbarch *gdbarch = regcache->arch ();
const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch); const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
char xstateregs[tdep->xsave_layout.sizeof_xsave]; gdb::byte_vector xstateregs (tdep->xsave_layout.sizeof_xsave);
struct iovec iov; struct iovec iov;
if (have_ptrace_getregset != TRIBOOL_TRUE) if (have_ptrace_getregset != TRIBOOL_TRUE)
return 0; return 0;
iov.iov_base = xstateregs; iov.iov_base = xstateregs.data ();
iov.iov_len = sizeof(xstateregs); iov.iov_len = xstateregs.size ();
if (ptrace (PTRACE_GETREGSET, tid, (unsigned int) NT_X86_XSTATE, if (ptrace (PTRACE_GETREGSET, tid, (unsigned int) NT_X86_XSTATE,
&iov) < 0) &iov) < 0)
perror_with_name (_("Couldn't read extended state status")); perror_with_name (_("Couldn't read extended state status"));
i387_supply_xsave (regcache, -1, xstateregs); i387_supply_xsave (regcache, -1, xstateregs.data ());
return 1; return 1;
} }
@ -340,19 +340,19 @@ store_xstateregs (const struct regcache *regcache, int tid, int regno)
{ {
struct gdbarch *gdbarch = regcache->arch (); struct gdbarch *gdbarch = regcache->arch ();
const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch); const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
char xstateregs[tdep->xsave_layout.sizeof_xsave]; gdb::byte_vector xstateregs (tdep->xsave_layout.sizeof_xsave);
struct iovec iov; struct iovec iov;
if (have_ptrace_getregset != TRIBOOL_TRUE) if (have_ptrace_getregset != TRIBOOL_TRUE)
return 0; return 0;
iov.iov_base = xstateregs; iov.iov_base = xstateregs.data ();
iov.iov_len = sizeof(xstateregs); iov.iov_len = xstateregs.size ();
if (ptrace (PTRACE_GETREGSET, tid, (unsigned int) NT_X86_XSTATE, if (ptrace (PTRACE_GETREGSET, tid, (unsigned int) NT_X86_XSTATE,
&iov) < 0) &iov) < 0)
perror_with_name (_("Couldn't read extended state status")); perror_with_name (_("Couldn't read extended state status"));
i387_collect_xsave (regcache, regno, xstateregs, 0); i387_collect_xsave (regcache, regno, xstateregs.data (), 0);
if (ptrace (PTRACE_SETREGSET, tid, (unsigned int) NT_X86_XSTATE, if (ptrace (PTRACE_SETREGSET, tid, (unsigned int) NT_X86_XSTATE,
(int) &iov) < 0) (int) &iov) < 0)

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@ -36,14 +36,14 @@ static insn_t
loongarch_fetch_instruction (CORE_ADDR pc) loongarch_fetch_instruction (CORE_ADDR pc)
{ {
size_t insn_len = loongarch_insn_length (0); size_t insn_len = loongarch_insn_length (0);
gdb_byte buf[insn_len]; gdb::byte_vector buf (insn_len);
int err; int err;
err = target_read_memory (pc, buf, insn_len); err = target_read_memory (pc, buf.data (), insn_len);
if (err) if (err)
memory_error (TARGET_XFER_E_IO, pc); memory_error (TARGET_XFER_E_IO, pc);
return extract_unsigned_integer (buf, insn_len, BFD_ENDIAN_LITTLE); return extract_unsigned_integer (buf.data (), insn_len, BFD_ENDIAN_LITTLE);
} }
/* Return TRUE if INSN is a unconditional branch instruction, otherwise return FALSE. */ /* Return TRUE if INSN is a unconditional branch instruction, otherwise return FALSE. */
@ -1306,18 +1306,24 @@ loongarch_return_value (struct gdbarch *gdbarch, struct value *function,
and the signed integer scalars are sign-extended. */ and the signed integer scalars are sign-extended. */
if (writebuf) if (writebuf)
{ {
gdb_byte buf[regsize]; gdb::byte_vector buf (regsize);
if (type->is_unsigned ()) if (type->is_unsigned ())
{ {
ULONGEST data = extract_unsigned_integer (writebuf, len, BFD_ENDIAN_LITTLE); ULONGEST data = extract_unsigned_integer (writebuf, len,
store_unsigned_integer (buf, regsize, BFD_ENDIAN_LITTLE, data); BFD_ENDIAN_LITTLE);
store_unsigned_integer (buf.data (), regsize,
BFD_ENDIAN_LITTLE, data);
} }
else else
{ {
LONGEST data = extract_signed_integer (writebuf, len, BFD_ENDIAN_LITTLE); LONGEST data
store_signed_integer (buf, regsize, BFD_ENDIAN_LITTLE, data); = extract_signed_integer (writebuf, len, BFD_ENDIAN_LITTLE);
store_signed_integer (buf.data (), regsize, BFD_ENDIAN_LITTLE,
data);
} }
loongarch_xfer_reg (regcache, a0, regsize, nullptr, buf, 0);
loongarch_xfer_reg (regcache, a0, regsize, nullptr, buf.data (),
0);
} }
else else
loongarch_xfer_reg (regcache, a0, len, readbuf, nullptr, 0); loongarch_xfer_reg (regcache, a0, len, readbuf, nullptr, 0);

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@ -99,16 +99,17 @@ mips_linux_get_longjmp_target (const frame_info_ptr &frame, CORE_ADDR *pc)
CORE_ADDR jb_addr; CORE_ADDR jb_addr;
struct gdbarch *gdbarch = get_frame_arch (frame); struct gdbarch *gdbarch = get_frame_arch (frame);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT]; gdb::byte_vector buf (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM); jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
if (target_read_memory ((jb_addr if (target_read_memory ((jb_addr
+ MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE), + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT)) buf.data (),
gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
return 0; return 0;
*pc = extract_unsigned_integer (buf, *pc = extract_unsigned_integer (buf.data (),
gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
byte_order); byte_order);

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@ -119,10 +119,10 @@ aarch64_mte_fetch_memtags (int tid, CORE_ADDR address, size_t len,
if (ntags == 0) if (ntags == 0)
return true; return true;
gdb_byte tagbuf[ntags]; gdb::byte_vector tagbuf (ntags);
struct iovec iovec; struct iovec iovec;
iovec.iov_base = tagbuf; iovec.iov_base = tagbuf.data ();
iovec.iov_len = ntags; iovec.iov_len = ntags;
tags.clear (); tags.clear ();

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@ -920,8 +920,7 @@ aarch64_za_regs_copy_to_reg_buf (int tid, struct reg_buffer_common *reg_buf,
else else
{ {
size_t za_bytes = header->vl * header->vl; size_t za_bytes = header->vl * header->vl;
gdb_byte za_zeroed[za_bytes]; gdb::byte_vector za_zeroed (za_bytes, 0);
memset (za_zeroed, 0, za_bytes);
reg_buf->raw_supply (za_regnum, za_zeroed); reg_buf->raw_supply (za_regnum, za_zeroed);
} }
@ -994,8 +993,7 @@ aarch64_za_regs_copy_from_reg_buf (int tid,
bool has_za_state = aarch64_has_za_state (tid); bool has_za_state = aarch64_has_za_state (tid);
size_t za_bytes = sve_vl_from_vg (old_svg) * sve_vl_from_vg (old_svg); size_t za_bytes = sve_vl_from_vg (old_svg) * sve_vl_from_vg (old_svg);
gdb_byte za_zeroed[za_bytes]; gdb::byte_vector za_zeroed (za_bytes, 0);
memset (za_zeroed, 0, za_bytes);
/* If the streaming vector length changed, zero out the contents of ZA in /* If the streaming vector length changed, zero out the contents of ZA in
the register cache. Otherwise, we will need to update the ZA contents the register cache. Otherwise, we will need to update the ZA contents
@ -1007,8 +1005,7 @@ aarch64_za_regs_copy_from_reg_buf (int tid,
/* When we update svg, we don't automatically initialize the ZA buffer. If /* When we update svg, we don't automatically initialize the ZA buffer. If
we have no ZA state and the ZA register contents in the register cache are we have no ZA state and the ZA register contents in the register cache are
zero, just return and leave the ZA register cache contents as zero. */ zero, just return and leave the ZA register cache contents as zero. */
if (!has_za_state if (!has_za_state && reg_buf->raw_compare (za_regnum, za_zeroed.data (), 0))
&& reg_buf->raw_compare (za_regnum, za_zeroed, 0))
{ {
/* No ZA state in the thread or in the register cache. This was likely /* No ZA state in the thread or in the register cache. This was likely
just an adjustment of the streaming vector length. Let this fall just an adjustment of the streaming vector length. Let this fall
@ -1020,7 +1017,7 @@ aarch64_za_regs_copy_from_reg_buf (int tid,
need to initialize the ZA data through ptrace. First we initialize need to initialize the ZA data through ptrace. First we initialize
all the bytes of ZA to zero. */ all the bytes of ZA to zero. */
if (!has_za_state if (!has_za_state
&& !reg_buf->raw_compare (za_regnum, za_zeroed, 0)) && !reg_buf->raw_compare (za_regnum, za_zeroed.data (), 0))
aarch64_initialize_za_regset (tid); aarch64_initialize_za_regset (tid);
/* From this point onwards, it is assumed we have a ZA payload in /* From this point onwards, it is assumed we have a ZA payload in

View File

@ -1015,7 +1015,7 @@ riscv_pseudo_register_write (struct gdbarch *gdbarch,
if (regnum == tdep->fflags_regnum || regnum == tdep->frm_regnum) if (regnum == tdep->fflags_regnum || regnum == tdep->frm_regnum)
{ {
int fcsr_regnum = RISCV_CSR_FCSR_REGNUM; int fcsr_regnum = RISCV_CSR_FCSR_REGNUM;
gdb_byte raw_buf[register_size (gdbarch, fcsr_regnum)]; gdb::byte_vector raw_buf (register_size (gdbarch, fcsr_regnum));
regcache->raw_read (fcsr_regnum, raw_buf); regcache->raw_read (fcsr_regnum, raw_buf);

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@ -239,18 +239,18 @@ darwin_current_sos ()
for (int i = 0; i < info->all_image.count; i++) for (int i = 0; i < info->all_image.count; i++)
{ {
CORE_ADDR iinfo = info->all_image.info + i * image_info_size; CORE_ADDR iinfo = info->all_image.info + i * image_info_size;
gdb_byte buf[image_info_size]; gdb::byte_vector buf (image_info_size);
CORE_ADDR load_addr; CORE_ADDR load_addr;
CORE_ADDR path_addr; CORE_ADDR path_addr;
struct mach_o_header_external hdr; struct mach_o_header_external hdr;
unsigned long hdr_val; unsigned long hdr_val;
/* Read image info from inferior. */ /* Read image info from inferior. */
if (target_read_memory (iinfo, buf, image_info_size)) if (target_read_memory (iinfo, buf.data (), image_info_size))
break; break;
load_addr = extract_typed_address (buf, ptr_type); load_addr = extract_typed_address (buf.data (), ptr_type);
path_addr = extract_typed_address (buf + ptr_len, ptr_type); path_addr = extract_typed_address (buf.data () + ptr_len, ptr_type);
/* Read Mach-O header from memory. */ /* Read Mach-O header from memory. */
if (target_read_memory (load_addr, (gdb_byte *) &hdr, sizeof (hdr) - 4)) if (target_read_memory (load_addr, (gdb_byte *) &hdr, sizeof (hdr) - 4))
@ -333,14 +333,14 @@ darwin_read_exec_load_addr_from_dyld (struct darwin_info *info)
for (i = 0; i < info->all_image.count; i++) for (i = 0; i < info->all_image.count; i++)
{ {
CORE_ADDR iinfo = info->all_image.info + i * image_info_size; CORE_ADDR iinfo = info->all_image.info + i * image_info_size;
gdb_byte buf[image_info_size]; gdb::byte_vector buf (image_info_size);
CORE_ADDR load_addr; CORE_ADDR load_addr;
/* Read image info from inferior. */ /* Read image info from inferior. */
if (target_read_memory (iinfo, buf, image_info_size)) if (target_read_memory (iinfo, buf.data (), image_info_size))
break; break;
load_addr = extract_typed_address (buf, ptr_type); load_addr = extract_typed_address (buf.data (), ptr_type);
if (darwin_validate_exec_header (load_addr) == load_addr) if (darwin_validate_exec_header (load_addr) == load_addr)
return load_addr; return load_addr;
} }

View File

@ -154,12 +154,14 @@ trad_frame_set_reg_regmap (struct trad_frame_cache *this_trad_cache,
else else
{ {
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[slot_size]; gdb::byte_vector buf (slot_size);
if (target_read_memory (addr + offs, buf, sizeof buf) == 0) if (target_read_memory (addr + offs, buf.data (), buf.size ())
== 0)
{ {
LONGEST val LONGEST val
= extract_unsigned_integer (buf, sizeof buf, byte_order); = extract_unsigned_integer (buf.data (), buf.size (),
byte_order);
trad_frame_set_reg_value (this_trad_cache, regno, val); trad_frame_set_reg_value (this_trad_cache, regno, val);
} }
} }