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https://sourceware.org/git/binutils-gdb.git
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gdb: remove uses of VLA
Remove uses of VLAs, replace with gdb::byte_vector. There might be more in files that I can't compile, but it's difficult to tell without actually compiling on all platforms. Many thanks to the Linaro pre-commit CI for helping find some problems with an earlier iteration of this patch. Change-Id: I3e5e34fcac51f3e6b732bb801c77944e010b162e Reviewed-by: Keith Seitz <keiths@redhat.com>
This commit is contained in:
parent
6ce1ea97af
commit
d724d71ad2
@ -496,12 +496,11 @@ fetch_tlsregs_from_thread (struct regcache *regcache)
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gdb_assert (regno != -1);
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gdb_assert (regno != -1);
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gdb_assert (tdep->tls_register_count > 0);
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gdb_assert (tdep->tls_register_count > 0);
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uint64_t tpidrs[tdep->tls_register_count];
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std::vector<uint64_t> tpidrs (tdep->tls_register_count);
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memset(tpidrs, 0, sizeof(tpidrs));
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struct iovec iovec;
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struct iovec iovec;
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iovec.iov_base = tpidrs;
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iovec.iov_base = tpidrs.data ();
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iovec.iov_len = sizeof (tpidrs);
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iovec.iov_len = tpidrs.size () * sizeof (tpidrs[0]);
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int tid = get_ptrace_pid (regcache->ptid ());
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int tid = get_ptrace_pid (regcache->ptid ());
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if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TLS, &iovec) != 0)
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if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TLS, &iovec) != 0)
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@ -524,8 +523,7 @@ store_tlsregs_to_thread (struct regcache *regcache)
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gdb_assert (regno != -1);
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gdb_assert (regno != -1);
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gdb_assert (tdep->tls_register_count > 0);
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gdb_assert (tdep->tls_register_count > 0);
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uint64_t tpidrs[tdep->tls_register_count];
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std::vector<uint64_t> tpidrs (tdep->tls_register_count);
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memset(tpidrs, 0, sizeof(tpidrs));
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for (int i = 0; i < tdep->tls_register_count; i++)
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for (int i = 0; i < tdep->tls_register_count; i++)
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{
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{
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@ -536,8 +534,8 @@ store_tlsregs_to_thread (struct regcache *regcache)
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}
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}
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struct iovec iovec;
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struct iovec iovec;
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iovec.iov_base = &tpidrs;
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iovec.iov_base = tpidrs.data ();
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iovec.iov_len = sizeof (tpidrs);
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iovec.iov_len = tpidrs.size () * sizeof (tpidrs[0]);
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int tid = get_ptrace_pid (regcache->ptid ());
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int tid = get_ptrace_pid (regcache->ptid ());
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if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_TLS, &iovec) != 0)
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if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_TLS, &iovec) != 0)
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@ -1298,8 +1298,7 @@ aarch64_linux_supply_za_regset (const struct regset *regset,
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}
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}
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else
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else
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{
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{
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gdb_byte za_zeroed[za_bytes];
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gdb::byte_vector za_zeroed (za_bytes, 0);
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memset (za_zeroed, 0, za_bytes);
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regcache->raw_supply (tdep->sme_za_regnum, za_zeroed);
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regcache->raw_supply (tdep->sme_za_regnum, za_zeroed);
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}
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}
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}
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}
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@ -1728,16 +1728,15 @@ pass_in_v (struct gdbarch *gdbarch,
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{
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{
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int regnum = AARCH64_V0_REGNUM + info->nsrn;
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int regnum = AARCH64_V0_REGNUM + info->nsrn;
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/* Enough space for a full vector register. */
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/* Enough space for a full vector register. */
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gdb_byte reg[register_size (gdbarch, regnum)];
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gdb::byte_vector reg (register_size (gdbarch, regnum), 0);
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gdb_assert (len <= sizeof (reg));
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gdb_assert (len <= reg.size ());
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info->argnum++;
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info->argnum++;
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info->nsrn++;
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info->nsrn++;
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memset (reg, 0, sizeof (reg));
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/* PCS C.1, the argument is allocated to the least significant
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/* PCS C.1, the argument is allocated to the least significant
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bits of V register. */
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bits of V register. */
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memcpy (reg, buf, len);
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memcpy (reg.data (), buf, len);
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regcache->cooked_write (regnum, reg);
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regcache->cooked_write (regnum, reg);
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aarch64_debug_printf ("arg %d in %s", info->argnum,
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aarch64_debug_printf ("arg %d in %s", info->argnum,
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@ -2544,8 +2543,8 @@ aarch64_extract_return_value (struct type *type, struct regcache *regs,
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{
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{
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int regno = AARCH64_V0_REGNUM + i;
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int regno = AARCH64_V0_REGNUM + i;
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/* Enough space for a full vector register. */
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/* Enough space for a full vector register. */
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gdb_byte buf[register_size (gdbarch, regno)];
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gdb::byte_vector buf (register_size (gdbarch, regno));
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gdb_assert (len <= sizeof (buf));
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gdb_assert (len <= buf.size ());
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aarch64_debug_printf
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aarch64_debug_printf
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("read HFA or HVA return value element %d from %s",
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("read HFA or HVA return value element %d from %s",
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@ -2553,7 +2552,7 @@ aarch64_extract_return_value (struct type *type, struct regcache *regs,
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regs->cooked_read (regno, buf);
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regs->cooked_read (regno, buf);
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memcpy (valbuf, buf, len);
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memcpy (valbuf, buf.data (), len);
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valbuf += len;
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valbuf += len;
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}
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}
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}
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}
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@ -2658,8 +2657,8 @@ aarch64_store_return_value (struct type *type, struct regcache *regs,
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{
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{
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int regno = AARCH64_V0_REGNUM + i;
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int regno = AARCH64_V0_REGNUM + i;
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/* Enough space for a full vector register. */
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/* Enough space for a full vector register. */
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gdb_byte tmpbuf[register_size (gdbarch, regno)];
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gdb::byte_vector tmpbuf (register_size (gdbarch, regno));
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gdb_assert (len <= sizeof (tmpbuf));
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gdb_assert (len <= tmpbuf.size ());
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aarch64_debug_printf
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aarch64_debug_printf
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("write HFA or HVA return value element %d to %s",
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("write HFA or HVA return value element %d to %s",
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@ -2670,7 +2669,7 @@ aarch64_store_return_value (struct type *type, struct regcache *regs,
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original contents of the register before overriding it with a new
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original contents of the register before overriding it with a new
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value that has a potential size <= 16 bytes. */
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value that has a potential size <= 16 bytes. */
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regs->cooked_read (regno, tmpbuf);
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regs->cooked_read (regno, tmpbuf);
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memcpy (tmpbuf, valbuf,
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memcpy (tmpbuf.data (), valbuf,
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len > V_REGISTER_SIZE ? V_REGISTER_SIZE : len);
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len > V_REGISTER_SIZE ? V_REGISTER_SIZE : len);
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regs->cooked_write (regno, tmpbuf);
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regs->cooked_write (regno, tmpbuf);
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valbuf += len;
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valbuf += len;
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@ -3303,18 +3302,16 @@ aarch64_pseudo_write_1 (gdbarch *gdbarch, const frame_info_ptr &next_frame,
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{
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{
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unsigned raw_regnum = AARCH64_V0_REGNUM + regnum_offset;
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unsigned raw_regnum = AARCH64_V0_REGNUM + regnum_offset;
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/* Enough space for a full vector register. */
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/* Enough space for a full vector register.
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int raw_reg_size = register_size (gdbarch, raw_regnum);
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gdb_byte raw_buf[raw_reg_size];
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static_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM);
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/* Ensure the register buffer is zero, we want gdb writes of the
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Ensure the register buffer is zero, we want gdb writes of the
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various 'scalar' pseudo registers to behavior like architectural
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various 'scalar' pseudo registers to behavior like architectural
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writes, register width bytes are written the remainder are set to
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writes, register width bytes are written the remainder are set to
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zero. */
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zero. */
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memset (raw_buf, 0, register_size (gdbarch, AARCH64_V0_REGNUM));
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gdb::byte_vector raw_buf (register_size (gdbarch, raw_regnum), 0);
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static_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM);
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gdb::array_view<gdb_byte> raw_view (raw_buf, raw_reg_size);
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gdb::array_view<gdb_byte> raw_view (raw_buf);
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copy (buf, raw_view.slice (0, buf.size ()));
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copy (buf, raw_view.slice (0, buf.size ()));
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put_frame_register (next_frame, raw_regnum, raw_view);
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put_frame_register (next_frame, raw_regnum, raw_view);
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}
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}
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@ -235,22 +235,21 @@ amd64_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
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if (have_ptrace_getregset == TRIBOOL_TRUE)
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if (have_ptrace_getregset == TRIBOOL_TRUE)
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{
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{
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char xstateregs[tdep->xsave_layout.sizeof_xsave];
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struct iovec iov;
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/* Pre-4.14 kernels have a bug (fixed by commit 0852b374173b
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/* Pre-4.14 kernels have a bug (fixed by commit 0852b374173b
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"x86/fpu: Add FPU state copying quirk to handle XRSTOR failure on
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"x86/fpu: Add FPU state copying quirk to handle XRSTOR failure on
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Intel Skylake CPUs") that sometimes causes the mxcsr location in
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Intel Skylake CPUs") that sometimes causes the mxcsr location in
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xstateregs not to be copied by PTRACE_GETREGSET. Make sure that
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xstateregs not to be copied by PTRACE_GETREGSET. Make sure that
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the location is at least initialized with a defined value. */
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the location is at least initialized with a defined value. */
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memset (xstateregs, 0, sizeof (xstateregs));
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gdb::byte_vector xstateregs (tdep->xsave_layout.sizeof_xsave, 0);
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iov.iov_base = xstateregs;
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struct iovec iov;
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iov.iov_len = sizeof (xstateregs);
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iov.iov_base = xstateregs.data ();
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iov.iov_len = xstateregs.size ();
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if (ptrace (PTRACE_GETREGSET, tid,
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if (ptrace (PTRACE_GETREGSET, tid,
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(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
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(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
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perror_with_name (_("Couldn't get extended state status"));
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perror_with_name (_("Couldn't get extended state status"));
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amd64_supply_xsave (regcache, -1, xstateregs);
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amd64_supply_xsave (regcache, -1, xstateregs.data ());
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}
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}
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else
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else
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{
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{
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@ -300,16 +299,16 @@ amd64_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
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if (have_ptrace_getregset == TRIBOOL_TRUE)
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if (have_ptrace_getregset == TRIBOOL_TRUE)
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{
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{
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char xstateregs[tdep->xsave_layout.sizeof_xsave];
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gdb::byte_vector xstateregs (tdep->xsave_layout.sizeof_xsave);
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struct iovec iov;
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struct iovec iov;
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iov.iov_base = xstateregs;
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iov.iov_base = xstateregs.data ();
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iov.iov_len = sizeof (xstateregs);
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iov.iov_len = xstateregs.size ();
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if (ptrace (PTRACE_GETREGSET, tid,
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if (ptrace (PTRACE_GETREGSET, tid,
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(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
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(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
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perror_with_name (_("Couldn't get extended state status"));
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perror_with_name (_("Couldn't get extended state status"));
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amd64_collect_xsave (regcache, regnum, xstateregs, 0);
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amd64_collect_xsave (regcache, regnum, xstateregs.data (), 0);
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if (ptrace (PTRACE_SETREGSET, tid,
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if (ptrace (PTRACE_SETREGSET, tid,
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(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
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(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
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@ -2034,21 +2034,23 @@ fbsd_get_thread_local_address (struct gdbarch *gdbarch, CORE_ADDR dtv_addr,
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{
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{
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LONGEST tls_index = fbsd_get_tls_index (gdbarch, lm_addr);
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LONGEST tls_index = fbsd_get_tls_index (gdbarch, lm_addr);
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gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
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gdb::byte_vector buf (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
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if (target_read_memory (dtv_addr, buf, sizeof buf) != 0)
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if (target_read_memory (dtv_addr, buf.data (), buf.size ()) != 0)
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throw_error (TLS_GENERIC_ERROR,
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throw_error (TLS_GENERIC_ERROR,
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_("Cannot find thread-local variables on this target"));
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_("Cannot find thread-local variables on this target"));
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const struct builtin_type *builtin = builtin_type (gdbarch);
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const struct builtin_type *builtin = builtin_type (gdbarch);
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CORE_ADDR addr = gdbarch_pointer_to_address (gdbarch,
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CORE_ADDR addr
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builtin->builtin_data_ptr, buf);
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= gdbarch_pointer_to_address (gdbarch, builtin->builtin_data_ptr,
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buf.data ());
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addr += (tls_index + 1) * builtin->builtin_data_ptr->length ();
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addr += (tls_index + 1) * builtin->builtin_data_ptr->length ();
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if (target_read_memory (addr, buf, sizeof buf) != 0)
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if (target_read_memory (addr, buf.data (), buf.size ()) != 0)
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throw_error (TLS_GENERIC_ERROR,
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throw_error (TLS_GENERIC_ERROR,
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_("Cannot find thread-local variables on this target"));
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_("Cannot find thread-local variables on this target"));
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addr = gdbarch_pointer_to_address (gdbarch, builtin->builtin_data_ptr, buf);
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addr = gdbarch_pointer_to_address (gdbarch, builtin->builtin_data_ptr,
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buf.data ());
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return addr + offset;
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return addr + offset;
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}
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}
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@ -315,19 +315,19 @@ fetch_xstateregs (struct regcache *regcache, int tid)
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{
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{
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struct gdbarch *gdbarch = regcache->arch ();
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struct gdbarch *gdbarch = regcache->arch ();
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const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
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const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
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char xstateregs[tdep->xsave_layout.sizeof_xsave];
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gdb::byte_vector xstateregs (tdep->xsave_layout.sizeof_xsave);
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struct iovec iov;
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struct iovec iov;
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if (have_ptrace_getregset != TRIBOOL_TRUE)
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if (have_ptrace_getregset != TRIBOOL_TRUE)
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return 0;
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return 0;
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iov.iov_base = xstateregs;
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iov.iov_base = xstateregs.data ();
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iov.iov_len = sizeof(xstateregs);
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iov.iov_len = xstateregs.size ();
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if (ptrace (PTRACE_GETREGSET, tid, (unsigned int) NT_X86_XSTATE,
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if (ptrace (PTRACE_GETREGSET, tid, (unsigned int) NT_X86_XSTATE,
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&iov) < 0)
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&iov) < 0)
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perror_with_name (_("Couldn't read extended state status"));
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perror_with_name (_("Couldn't read extended state status"));
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i387_supply_xsave (regcache, -1, xstateregs);
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i387_supply_xsave (regcache, -1, xstateregs.data ());
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return 1;
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return 1;
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}
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}
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@ -340,19 +340,19 @@ store_xstateregs (const struct regcache *regcache, int tid, int regno)
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{
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{
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struct gdbarch *gdbarch = regcache->arch ();
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struct gdbarch *gdbarch = regcache->arch ();
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const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
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const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
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char xstateregs[tdep->xsave_layout.sizeof_xsave];
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gdb::byte_vector xstateregs (tdep->xsave_layout.sizeof_xsave);
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struct iovec iov;
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struct iovec iov;
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if (have_ptrace_getregset != TRIBOOL_TRUE)
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if (have_ptrace_getregset != TRIBOOL_TRUE)
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return 0;
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return 0;
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iov.iov_base = xstateregs;
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iov.iov_base = xstateregs.data ();
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iov.iov_len = sizeof(xstateregs);
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iov.iov_len = xstateregs.size ();
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if (ptrace (PTRACE_GETREGSET, tid, (unsigned int) NT_X86_XSTATE,
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if (ptrace (PTRACE_GETREGSET, tid, (unsigned int) NT_X86_XSTATE,
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&iov) < 0)
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&iov) < 0)
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perror_with_name (_("Couldn't read extended state status"));
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perror_with_name (_("Couldn't read extended state status"));
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i387_collect_xsave (regcache, regno, xstateregs, 0);
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i387_collect_xsave (regcache, regno, xstateregs.data (), 0);
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if (ptrace (PTRACE_SETREGSET, tid, (unsigned int) NT_X86_XSTATE,
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if (ptrace (PTRACE_SETREGSET, tid, (unsigned int) NT_X86_XSTATE,
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(int) &iov) < 0)
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(int) &iov) < 0)
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@ -36,14 +36,14 @@ static insn_t
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loongarch_fetch_instruction (CORE_ADDR pc)
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loongarch_fetch_instruction (CORE_ADDR pc)
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{
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{
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size_t insn_len = loongarch_insn_length (0);
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size_t insn_len = loongarch_insn_length (0);
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gdb_byte buf[insn_len];
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gdb::byte_vector buf (insn_len);
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int err;
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int err;
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err = target_read_memory (pc, buf, insn_len);
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err = target_read_memory (pc, buf.data (), insn_len);
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if (err)
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if (err)
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||||||
memory_error (TARGET_XFER_E_IO, pc);
|
memory_error (TARGET_XFER_E_IO, pc);
|
||||||
|
|
||||||
return extract_unsigned_integer (buf, insn_len, BFD_ENDIAN_LITTLE);
|
return extract_unsigned_integer (buf.data (), insn_len, BFD_ENDIAN_LITTLE);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Return TRUE if INSN is a unconditional branch instruction, otherwise return FALSE. */
|
/* Return TRUE if INSN is a unconditional branch instruction, otherwise return FALSE. */
|
||||||
@ -1306,18 +1306,24 @@ loongarch_return_value (struct gdbarch *gdbarch, struct value *function,
|
|||||||
and the signed integer scalars are sign-extended. */
|
and the signed integer scalars are sign-extended. */
|
||||||
if (writebuf)
|
if (writebuf)
|
||||||
{
|
{
|
||||||
gdb_byte buf[regsize];
|
gdb::byte_vector buf (regsize);
|
||||||
if (type->is_unsigned ())
|
if (type->is_unsigned ())
|
||||||
{
|
{
|
||||||
ULONGEST data = extract_unsigned_integer (writebuf, len, BFD_ENDIAN_LITTLE);
|
ULONGEST data = extract_unsigned_integer (writebuf, len,
|
||||||
store_unsigned_integer (buf, regsize, BFD_ENDIAN_LITTLE, data);
|
BFD_ENDIAN_LITTLE);
|
||||||
|
store_unsigned_integer (buf.data (), regsize,
|
||||||
|
BFD_ENDIAN_LITTLE, data);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
LONGEST data = extract_signed_integer (writebuf, len, BFD_ENDIAN_LITTLE);
|
LONGEST data
|
||||||
store_signed_integer (buf, regsize, BFD_ENDIAN_LITTLE, data);
|
= extract_signed_integer (writebuf, len, BFD_ENDIAN_LITTLE);
|
||||||
|
store_signed_integer (buf.data (), regsize, BFD_ENDIAN_LITTLE,
|
||||||
|
data);
|
||||||
}
|
}
|
||||||
loongarch_xfer_reg (regcache, a0, regsize, nullptr, buf, 0);
|
|
||||||
|
loongarch_xfer_reg (regcache, a0, regsize, nullptr, buf.data (),
|
||||||
|
0);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
loongarch_xfer_reg (regcache, a0, len, readbuf, nullptr, 0);
|
loongarch_xfer_reg (regcache, a0, len, readbuf, nullptr, 0);
|
||||||
|
@ -99,16 +99,17 @@ mips_linux_get_longjmp_target (const frame_info_ptr &frame, CORE_ADDR *pc)
|
|||||||
CORE_ADDR jb_addr;
|
CORE_ADDR jb_addr;
|
||||||
struct gdbarch *gdbarch = get_frame_arch (frame);
|
struct gdbarch *gdbarch = get_frame_arch (frame);
|
||||||
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
||||||
gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
|
gdb::byte_vector buf (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
|
||||||
|
|
||||||
jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
|
jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
|
||||||
|
|
||||||
if (target_read_memory ((jb_addr
|
if (target_read_memory ((jb_addr
|
||||||
+ MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
|
+ MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
|
||||||
buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
|
buf.data (),
|
||||||
|
gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
*pc = extract_unsigned_integer (buf,
|
*pc = extract_unsigned_integer (buf.data (),
|
||||||
gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
|
gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
|
||||||
byte_order);
|
byte_order);
|
||||||
|
|
||||||
|
@ -119,10 +119,10 @@ aarch64_mte_fetch_memtags (int tid, CORE_ADDR address, size_t len,
|
|||||||
if (ntags == 0)
|
if (ntags == 0)
|
||||||
return true;
|
return true;
|
||||||
|
|
||||||
gdb_byte tagbuf[ntags];
|
gdb::byte_vector tagbuf (ntags);
|
||||||
|
|
||||||
struct iovec iovec;
|
struct iovec iovec;
|
||||||
iovec.iov_base = tagbuf;
|
iovec.iov_base = tagbuf.data ();
|
||||||
iovec.iov_len = ntags;
|
iovec.iov_len = ntags;
|
||||||
|
|
||||||
tags.clear ();
|
tags.clear ();
|
||||||
|
@ -920,8 +920,7 @@ aarch64_za_regs_copy_to_reg_buf (int tid, struct reg_buffer_common *reg_buf,
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
size_t za_bytes = header->vl * header->vl;
|
size_t za_bytes = header->vl * header->vl;
|
||||||
gdb_byte za_zeroed[za_bytes];
|
gdb::byte_vector za_zeroed (za_bytes, 0);
|
||||||
memset (za_zeroed, 0, za_bytes);
|
|
||||||
reg_buf->raw_supply (za_regnum, za_zeroed);
|
reg_buf->raw_supply (za_regnum, za_zeroed);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -994,8 +993,7 @@ aarch64_za_regs_copy_from_reg_buf (int tid,
|
|||||||
bool has_za_state = aarch64_has_za_state (tid);
|
bool has_za_state = aarch64_has_za_state (tid);
|
||||||
|
|
||||||
size_t za_bytes = sve_vl_from_vg (old_svg) * sve_vl_from_vg (old_svg);
|
size_t za_bytes = sve_vl_from_vg (old_svg) * sve_vl_from_vg (old_svg);
|
||||||
gdb_byte za_zeroed[za_bytes];
|
gdb::byte_vector za_zeroed (za_bytes, 0);
|
||||||
memset (za_zeroed, 0, za_bytes);
|
|
||||||
|
|
||||||
/* If the streaming vector length changed, zero out the contents of ZA in
|
/* If the streaming vector length changed, zero out the contents of ZA in
|
||||||
the register cache. Otherwise, we will need to update the ZA contents
|
the register cache. Otherwise, we will need to update the ZA contents
|
||||||
@ -1007,8 +1005,7 @@ aarch64_za_regs_copy_from_reg_buf (int tid,
|
|||||||
/* When we update svg, we don't automatically initialize the ZA buffer. If
|
/* When we update svg, we don't automatically initialize the ZA buffer. If
|
||||||
we have no ZA state and the ZA register contents in the register cache are
|
we have no ZA state and the ZA register contents in the register cache are
|
||||||
zero, just return and leave the ZA register cache contents as zero. */
|
zero, just return and leave the ZA register cache contents as zero. */
|
||||||
if (!has_za_state
|
if (!has_za_state && reg_buf->raw_compare (za_regnum, za_zeroed.data (), 0))
|
||||||
&& reg_buf->raw_compare (za_regnum, za_zeroed, 0))
|
|
||||||
{
|
{
|
||||||
/* No ZA state in the thread or in the register cache. This was likely
|
/* No ZA state in the thread or in the register cache. This was likely
|
||||||
just an adjustment of the streaming vector length. Let this fall
|
just an adjustment of the streaming vector length. Let this fall
|
||||||
@ -1020,7 +1017,7 @@ aarch64_za_regs_copy_from_reg_buf (int tid,
|
|||||||
need to initialize the ZA data through ptrace. First we initialize
|
need to initialize the ZA data through ptrace. First we initialize
|
||||||
all the bytes of ZA to zero. */
|
all the bytes of ZA to zero. */
|
||||||
if (!has_za_state
|
if (!has_za_state
|
||||||
&& !reg_buf->raw_compare (za_regnum, za_zeroed, 0))
|
&& !reg_buf->raw_compare (za_regnum, za_zeroed.data (), 0))
|
||||||
aarch64_initialize_za_regset (tid);
|
aarch64_initialize_za_regset (tid);
|
||||||
|
|
||||||
/* From this point onwards, it is assumed we have a ZA payload in
|
/* From this point onwards, it is assumed we have a ZA payload in
|
||||||
|
@ -1015,7 +1015,7 @@ riscv_pseudo_register_write (struct gdbarch *gdbarch,
|
|||||||
if (regnum == tdep->fflags_regnum || regnum == tdep->frm_regnum)
|
if (regnum == tdep->fflags_regnum || regnum == tdep->frm_regnum)
|
||||||
{
|
{
|
||||||
int fcsr_regnum = RISCV_CSR_FCSR_REGNUM;
|
int fcsr_regnum = RISCV_CSR_FCSR_REGNUM;
|
||||||
gdb_byte raw_buf[register_size (gdbarch, fcsr_regnum)];
|
gdb::byte_vector raw_buf (register_size (gdbarch, fcsr_regnum));
|
||||||
|
|
||||||
regcache->raw_read (fcsr_regnum, raw_buf);
|
regcache->raw_read (fcsr_regnum, raw_buf);
|
||||||
|
|
||||||
|
@ -239,18 +239,18 @@ darwin_current_sos ()
|
|||||||
for (int i = 0; i < info->all_image.count; i++)
|
for (int i = 0; i < info->all_image.count; i++)
|
||||||
{
|
{
|
||||||
CORE_ADDR iinfo = info->all_image.info + i * image_info_size;
|
CORE_ADDR iinfo = info->all_image.info + i * image_info_size;
|
||||||
gdb_byte buf[image_info_size];
|
gdb::byte_vector buf (image_info_size);
|
||||||
CORE_ADDR load_addr;
|
CORE_ADDR load_addr;
|
||||||
CORE_ADDR path_addr;
|
CORE_ADDR path_addr;
|
||||||
struct mach_o_header_external hdr;
|
struct mach_o_header_external hdr;
|
||||||
unsigned long hdr_val;
|
unsigned long hdr_val;
|
||||||
|
|
||||||
/* Read image info from inferior. */
|
/* Read image info from inferior. */
|
||||||
if (target_read_memory (iinfo, buf, image_info_size))
|
if (target_read_memory (iinfo, buf.data (), image_info_size))
|
||||||
break;
|
break;
|
||||||
|
|
||||||
load_addr = extract_typed_address (buf, ptr_type);
|
load_addr = extract_typed_address (buf.data (), ptr_type);
|
||||||
path_addr = extract_typed_address (buf + ptr_len, ptr_type);
|
path_addr = extract_typed_address (buf.data () + ptr_len, ptr_type);
|
||||||
|
|
||||||
/* Read Mach-O header from memory. */
|
/* Read Mach-O header from memory. */
|
||||||
if (target_read_memory (load_addr, (gdb_byte *) &hdr, sizeof (hdr) - 4))
|
if (target_read_memory (load_addr, (gdb_byte *) &hdr, sizeof (hdr) - 4))
|
||||||
@ -333,14 +333,14 @@ darwin_read_exec_load_addr_from_dyld (struct darwin_info *info)
|
|||||||
for (i = 0; i < info->all_image.count; i++)
|
for (i = 0; i < info->all_image.count; i++)
|
||||||
{
|
{
|
||||||
CORE_ADDR iinfo = info->all_image.info + i * image_info_size;
|
CORE_ADDR iinfo = info->all_image.info + i * image_info_size;
|
||||||
gdb_byte buf[image_info_size];
|
gdb::byte_vector buf (image_info_size);
|
||||||
CORE_ADDR load_addr;
|
CORE_ADDR load_addr;
|
||||||
|
|
||||||
/* Read image info from inferior. */
|
/* Read image info from inferior. */
|
||||||
if (target_read_memory (iinfo, buf, image_info_size))
|
if (target_read_memory (iinfo, buf.data (), image_info_size))
|
||||||
break;
|
break;
|
||||||
|
|
||||||
load_addr = extract_typed_address (buf, ptr_type);
|
load_addr = extract_typed_address (buf.data (), ptr_type);
|
||||||
if (darwin_validate_exec_header (load_addr) == load_addr)
|
if (darwin_validate_exec_header (load_addr) == load_addr)
|
||||||
return load_addr;
|
return load_addr;
|
||||||
}
|
}
|
||||||
|
@ -154,12 +154,14 @@ trad_frame_set_reg_regmap (struct trad_frame_cache *this_trad_cache,
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
||||||
gdb_byte buf[slot_size];
|
gdb::byte_vector buf (slot_size);
|
||||||
|
|
||||||
if (target_read_memory (addr + offs, buf, sizeof buf) == 0)
|
if (target_read_memory (addr + offs, buf.data (), buf.size ())
|
||||||
|
== 0)
|
||||||
{
|
{
|
||||||
LONGEST val
|
LONGEST val
|
||||||
= extract_unsigned_integer (buf, sizeof buf, byte_order);
|
= extract_unsigned_integer (buf.data (), buf.size (),
|
||||||
|
byte_order);
|
||||||
trad_frame_set_reg_value (this_trad_cache, regno, val);
|
trad_frame_set_reg_value (this_trad_cache, regno, val);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user